1 /*
2 * Copyright (C) 2016 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17 #include <stdint.h>
18 #include <seos.h>
19
20 #define VEC_(nm, pfx) void nm##pfx(void) __attribute__ ((weak, alias ("IntDefaultHandler")))
21 #define VEC(nm) VEC_(nm, _Handler)
22 #define VECI(nm) VEC_(nm, _IRQHandler)
23
24
25
26 #ifndef OS_STACK_SIZE
27 #define OS_STACK_SIZE 2048
28 #endif
29
30 void __attribute__ ((weak)) IntDefaultHandler(void);
31 VEC(NMI);
32 VEC(HardFault);
33 VEC(MemoryManagemntFault);
34 VEC(BusFault);
35 VEC(UsageFault);
36 VEC(SVC);
37 VEC(DebugMonitor);
38 VEC(PendSV);
39 VEC(SysTick);
40
41 VECI(WWDG);
42 VECI(EXTI16_PVD);
43 VECI(EXTI21_TAMP_STAMP);
44 VECI(EXTI22_RTC_WKUP);
45 VECI(FLASH);
46 VECI(RCC);
47 VECI(EXTI0);
48 VECI(EXTI1);
49 VECI(EXTI2);
50 VECI(EXTI3);
51 VECI(EXTI4);
52 VECI(DMA1_Stream0);
53 VECI(DMA1_Stream1);
54 VECI(DMA1_Stream2);
55 VECI(DMA1_Stream3);
56 VECI(DMA1_Stream4);
57 VECI(DMA1_Stream5);
58 VECI(DMA1_Stream6);
59 VECI(ADC);
60 VECI(EXTI9_5);
61 VECI(TIM1_BRK_TIM9);
62 VECI(TIM1_UP_TIM10);
63 VECI(TIM1_TRG_COM_TIM11);
64 VECI(TIM1_CC);
65 VECI(TIM2);
66 VECI(TIM3);
67 VECI(TIM4);
68 VECI(I2C1_EV);
69 VECI(I2C1_ER);
70 VECI(I2C2_EV);
71 VECI(I2C2_ER);
72 VECI(SPI1);
73 VECI(SPI2);
74 VECI(USART1);
75 VECI(USART2);
76 VECI(EXTI15_10);
77 VECI(EXTI17_RTC_ALARM);
78 VECI(EXTI18_OTG_FS_WKUP);
79 VECI(DMA1_Stream7);
80 VECI(SDIO);
81 VECI(TIM5);
82 VECI(SPI3);
83 VECI(DMA2_Stream0);
84 VECI(DMA2_Stream1);
85 VECI(DMA2_Stream2);
86 VECI(DMA2_Stream3);
87 VECI(DMA2_Stream4);
88 VECI(OTG_FS);
89 VECI(DMA2_Stream5);
90 VECI(DMA2_Stream6);
91 VECI(DMA2_Stream7);
92 VECI(USART6);
93 VECI(I2C3_EV);
94 VECI(I2C3_ER);
95 VECI(FPU);
96 VECI(SPI4);
97 VECI(SPI5);
98
99
100 //stack top (provided by linker)
101 extern uint32_t __stack_top[];
102 extern uint32_t __data_data[];
103 extern uint32_t __data_start[];
104 extern uint32_t __data_end[];
105 extern uint32_t __bss_start[];
106 extern uint32_t __bss_end[];
107
108
109
110
111 //OS stack
112 uint64_t __attribute__ ((section (".stack"))) _STACK[OS_STACK_SIZE / sizeof(uint64_t)];
113
IntDefaultHandler(void)114 void __attribute__((noreturn)) IntDefaultHandler(void)
115 {
116 while (1) {
117 //ints off
118 asm("cpsid i");
119
120 //spin/sleep/whatever forever
121 asm("wfi":::"memory");
122 }
123 }
124
125 void __attribute__((noreturn)) ResetISR(void);
ResetISR(void)126 void __attribute__((noreturn)) ResetISR(void)
127 {
128 uint32_t *dst, *src, *end;
129
130 //copy data
131 dst = __data_start;
132 src = __data_data;
133 end = __data_end;
134 while(dst != end)
135 *dst++ = *src++;
136
137 //init bss
138 dst = __bss_start;
139 end = __bss_end;
140 while(dst != end)
141 *dst++ = 0;
142
143 //call code
144 osMain();
145
146 //if main returns => bad
147 while(1);
148 }
149
150
151 //vector table
152 __attribute__ ((section(".vectors"))) __attribute__((naked)) void __VECTORS(void);
__VECTORS(void)153 __attribute__ ((section(".vectors"))) __attribute__((naked)) void __VECTORS(void)
154 {
155 asm volatile (
156 ".word __stack_top \n"
157 ".word ResetISR + 1 \n"
158 ".word NMI_Handler + 1 \n"
159 ".word HardFault_Handler + 1 \n"
160 ".word MemoryManagemntFault_Handler + 1 \n"
161 ".word BusFault_Handler + 1 \n"
162 ".word UsageFault_Handler + 1 \n"
163 ".word 0 \n"
164 ".word 0 \n"
165 ".word 0 \n"
166 ".word 0 \n"
167 ".word SVC_Handler + 1 \n"
168 ".word DebugMonitor_Handler + 1 \n"
169 ".word 0 \n"
170 ".word PendSV_Handler + 1 \n"
171 ".word SysTick_Handler + 1 \n"
172
173 ".word WWDG_IRQHandler + 1 \n"
174 ".word EXTI16_PVD_IRQHandler + 1 \n"
175 ".word EXTI21_TAMP_STAMP_IRQHandler + 1 \n"
176 ".word EXTI22_RTC_WKUP_IRQHandler + 1 \n"
177 ".word FLASH_IRQHandler + 1 \n"
178 ".word RCC_IRQHandler + 1 \n"
179 ".word EXTI0_IRQHandler + 1 \n"
180 ".word EXTI1_IRQHandler + 1 \n"
181 ".word EXTI2_IRQHandler + 1 \n"
182 ".word EXTI3_IRQHandler + 1 \n"
183 ".word EXTI4_IRQHandler + 1 \n"
184 ".word DMA1_Stream0_IRQHandler + 1 \n"
185 ".word DMA1_Stream1_IRQHandler + 1 \n"
186 ".word DMA1_Stream2_IRQHandler + 1 \n"
187 ".word DMA1_Stream3_IRQHandler + 1 \n"
188 ".word DMA1_Stream4_IRQHandler + 1 \n"
189 ".word DMA1_Stream5_IRQHandler + 1 \n"
190 ".word DMA1_Stream6_IRQHandler + 1 \n"
191 ".word ADC_IRQHandler + 1 \n"
192 ".word 0 \n"
193 ".word 0 \n"
194 ".word 0 \n"
195 ".word 0 \n"
196 ".word EXTI9_5_IRQHandler + 1 \n"
197 ".word TIM1_BRK_TIM9_IRQHandler + 1 \n"
198 ".word TIM1_UP_TIM10_IRQHandler + 1 \n"
199 ".word TIM1_TRG_COM_TIM11_IRQHandler + 1\n"
200 ".word TIM1_CC_IRQHandler + 1 \n"
201 ".word TIM2_IRQHandler + 1 \n"
202 ".word TIM3_IRQHandler + 1 \n"
203 ".word TIM4_IRQHandler + 1 \n"
204 ".word I2C1_EV_IRQHandler + 1 \n"
205 ".word I2C1_ER_IRQHandler + 1 \n"
206 ".word I2C2_EV_IRQHandler + 1 \n"
207 ".word I2C2_ER_IRQHandler + 1 \n"
208 ".word SPI1_IRQHandler + 1 \n"
209 ".word SPI2_IRQHandler + 1 \n"
210 ".word USART1_IRQHandler + 1 \n"
211 ".word USART2_IRQHandler + 1 \n"
212 ".word 0 \n"
213 ".word EXTI15_10_IRQHandler + 1 \n"
214 ".word EXTI17_RTC_ALARM_IRQHandler + 1 \n"
215 ".word EXTI18_OTG_FS_WKUP_IRQHandler + 1\n"
216 ".word 0 \n"
217 ".word 0 \n"
218 ".word 0 \n"
219 ".word 0 \n"
220 ".word DMA1_Stream7_IRQHandler + 1 \n"
221 ".word 0 \n"
222 ".word SDIO_IRQHandler + 1 \n"
223 ".word TIM5_IRQHandler + 1 \n"
224 ".word SPI3_IRQHandler + 1 \n"
225 ".word 0 \n"
226 ".word 0 \n"
227 ".word 0 \n"
228 ".word 0 \n"
229 ".word DMA2_Stream0_IRQHandler + 1 \n"
230 ".word DMA2_Stream1_IRQHandler + 1 \n"
231 ".word DMA2_Stream2_IRQHandler + 1 \n"
232 ".word DMA2_Stream3_IRQHandler + 1 \n"
233 ".word DMA2_Stream4_IRQHandler + 1 \n"
234 ".word 0 \n"
235 ".word 0 \n"
236 ".word 0 \n"
237 ".word 0 \n"
238 ".word 0 \n"
239 ".word 0 \n"
240 ".word OTG_FS_IRQHandler + 1 \n"
241 ".word DMA2_Stream5_IRQHandler + 1 \n"
242 ".word DMA2_Stream6_IRQHandler + 1 \n"
243 ".word DMA2_Stream7_IRQHandler + 1 \n"
244 ".word USART6_IRQHandler + 1 \n"
245 ".word I2C3_EV_IRQHandler + 1 \n"
246 ".word I2C3_ER_IRQHandler + 1 \n"
247 ".word 0 \n"
248 ".word 0 \n"
249 ".word 0 \n"
250 ".word 0 \n"
251 ".word 0 \n"
252 ".word 0 \n"
253 ".word 0 \n"
254 ".word FPU_IRQHandler + 1 \n"
255 ".word 0 \n"
256 ".word 0 \n"
257 ".word SPI4_IRQHandler + 1 \n"
258 ".word SPI5_IRQHandler + 1 \n"
259 );
260 };
261
262
263