1 /*
2 * Copyright (C) 2010 The Android Open Source Project
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in
12 * the documentation and/or other materials provided with the
13 * distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
16 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
17 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
18 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
19 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
22 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
25 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29 /* ChangeLog for this library:
30 *
31 * NDK r10e?: Add MIPS MSA feature.
32 *
33 * NDK r10: Support for 64-bit CPUs (Intel, ARM & MIPS).
34 *
35 * NDK r8d: Add android_setCpu().
36 *
37 * NDK r8c: Add new ARM CPU features: VFPv2, VFP_D32, VFP_FP16,
38 * VFP_FMA, NEON_FMA, IDIV_ARM, IDIV_THUMB2 and iWMMXt.
39 *
40 * Rewrite the code to parse /proc/self/auxv instead of
41 * the "Features" field in /proc/cpuinfo.
42 *
43 * Dynamically allocate the buffer that hold the content
44 * of /proc/cpuinfo to deal with newer hardware.
45 *
46 * NDK r7c: Fix CPU count computation. The old method only reported the
47 * number of _active_ CPUs when the library was initialized,
48 * which could be less than the real total.
49 *
50 * NDK r5: Handle buggy kernels which report a CPU Architecture number of 7
51 * for an ARMv6 CPU (see below).
52 *
53 * Handle kernels that only report 'neon', and not 'vfpv3'
54 * (VFPv3 is mandated by the ARM architecture is Neon is implemented)
55 *
56 * Handle kernels that only report 'vfpv3d16', and not 'vfpv3'
57 *
58 * Fix x86 compilation. Report ANDROID_CPU_FAMILY_X86 in
59 * android_getCpuFamily().
60 *
61 * NDK r4: Initial release
62 */
63
64 #include "cpu-features.h"
65
66 #include <dlfcn.h>
67 #include <errno.h>
68 #include <fcntl.h>
69 #include <pthread.h>
70 #include <stdio.h>
71 #include <stdlib.h>
72 #include <sys/system_properties.h>
73
74 static pthread_once_t g_once;
75 static int g_inited;
76 static AndroidCpuFamily g_cpuFamily;
77 static uint64_t g_cpuFeatures;
78 static int g_cpuCount;
79
80 #ifdef __arm__
81 static uint32_t g_cpuIdArm;
82 #endif
83
84 static const int android_cpufeatures_debug = 0;
85
86 #define D(...) \
87 do { \
88 if (android_cpufeatures_debug) { \
89 printf(__VA_ARGS__); fflush(stdout); \
90 } \
91 } while (0)
92
93 #ifdef __i386__
x86_cpuid(int func,int values[4])94 static __inline__ void x86_cpuid(int func, int values[4])
95 {
96 int a, b, c, d;
97 /* We need to preserve ebx since we're compiling PIC code */
98 /* this means we can't use "=b" for the second output register */
99 __asm__ __volatile__ ( \
100 "push %%ebx\n"
101 "cpuid\n" \
102 "mov %%ebx, %1\n"
103 "pop %%ebx\n"
104 : "=a" (a), "=r" (b), "=c" (c), "=d" (d) \
105 : "a" (func) \
106 );
107 values[0] = a;
108 values[1] = b;
109 values[2] = c;
110 values[3] = d;
111 }
112 #elif defined(__x86_64__)
x86_cpuid(int func,int values[4])113 static __inline__ void x86_cpuid(int func, int values[4])
114 {
115 int64_t a, b, c, d;
116 /* We need to preserve ebx since we're compiling PIC code */
117 /* this means we can't use "=b" for the second output register */
118 __asm__ __volatile__ ( \
119 "push %%rbx\n"
120 "cpuid\n" \
121 "mov %%rbx, %1\n"
122 "pop %%rbx\n"
123 : "=a" (a), "=r" (b), "=c" (c), "=d" (d) \
124 : "a" (func) \
125 );
126 values[0] = a;
127 values[1] = b;
128 values[2] = c;
129 values[3] = d;
130 }
131 #endif
132
133 /* Get the size of a file by reading it until the end. This is needed
134 * because files under /proc do not always return a valid size when
135 * using fseek(0, SEEK_END) + ftell(). Nor can they be mmap()-ed.
136 */
137 static int
get_file_size(const char * pathname)138 get_file_size(const char* pathname)
139 {
140
141 int fd, result = 0;
142 char buffer[256];
143
144 fd = open(pathname, O_RDONLY);
145 if (fd < 0) {
146 D("Can't open %s: %s\n", pathname, strerror(errno));
147 return -1;
148 }
149
150 for (;;) {
151 int ret = read(fd, buffer, sizeof buffer);
152 if (ret < 0) {
153 if (errno == EINTR)
154 continue;
155 D("Error while reading %s: %s\n", pathname, strerror(errno));
156 break;
157 }
158 if (ret == 0)
159 break;
160
161 result += ret;
162 }
163 close(fd);
164 return result;
165 }
166
167 /* Read the content of /proc/cpuinfo into a user-provided buffer.
168 * Return the length of the data, or -1 on error. Does *not*
169 * zero-terminate the content. Will not read more
170 * than 'buffsize' bytes.
171 */
172 static int
read_file(const char * pathname,char * buffer,size_t buffsize)173 read_file(const char* pathname, char* buffer, size_t buffsize)
174 {
175 int fd, count;
176
177 fd = open(pathname, O_RDONLY);
178 if (fd < 0) {
179 D("Could not open %s: %s\n", pathname, strerror(errno));
180 return -1;
181 }
182 count = 0;
183 while (count < (int)buffsize) {
184 int ret = read(fd, buffer + count, buffsize - count);
185 if (ret < 0) {
186 if (errno == EINTR)
187 continue;
188 D("Error while reading from %s: %s\n", pathname, strerror(errno));
189 if (count == 0)
190 count = -1;
191 break;
192 }
193 if (ret == 0)
194 break;
195 count += ret;
196 }
197 close(fd);
198 return count;
199 }
200
201 #ifdef __arm__
202 /* Extract the content of a the first occurence of a given field in
203 * the content of /proc/cpuinfo and return it as a heap-allocated
204 * string that must be freed by the caller.
205 *
206 * Return NULL if not found
207 */
208 static char*
extract_cpuinfo_field(const char * buffer,int buflen,const char * field)209 extract_cpuinfo_field(const char* buffer, int buflen, const char* field)
210 {
211 int fieldlen = strlen(field);
212 const char* bufend = buffer + buflen;
213 char* result = NULL;
214 int len;
215 const char *p, *q;
216
217 /* Look for first field occurence, and ensures it starts the line. */
218 p = buffer;
219 for (;;) {
220 p = memmem(p, bufend-p, field, fieldlen);
221 if (p == NULL)
222 goto EXIT;
223
224 if (p == buffer || p[-1] == '\n')
225 break;
226
227 p += fieldlen;
228 }
229
230 /* Skip to the first column followed by a space */
231 p += fieldlen;
232 p = memchr(p, ':', bufend-p);
233 if (p == NULL || p[1] != ' ')
234 goto EXIT;
235
236 /* Find the end of the line */
237 p += 2;
238 q = memchr(p, '\n', bufend-p);
239 if (q == NULL)
240 q = bufend;
241
242 /* Copy the line into a heap-allocated buffer */
243 len = q-p;
244 result = malloc(len+1);
245 if (result == NULL)
246 goto EXIT;
247
248 memcpy(result, p, len);
249 result[len] = '\0';
250
251 EXIT:
252 return result;
253 }
254
255 /* Checks that a space-separated list of items contains one given 'item'.
256 * Returns 1 if found, 0 otherwise.
257 */
258 static int
has_list_item(const char * list,const char * item)259 has_list_item(const char* list, const char* item)
260 {
261 const char* p = list;
262 int itemlen = strlen(item);
263
264 if (list == NULL)
265 return 0;
266
267 while (*p) {
268 const char* q;
269
270 /* skip spaces */
271 while (*p == ' ' || *p == '\t')
272 p++;
273
274 /* find end of current list item */
275 q = p;
276 while (*q && *q != ' ' && *q != '\t')
277 q++;
278
279 if (itemlen == q-p && !memcmp(p, item, itemlen))
280 return 1;
281
282 /* skip to next item */
283 p = q;
284 }
285 return 0;
286 }
287 #endif /* __arm__ */
288
289 /* Parse a number starting from 'input', but not going further
290 * than 'limit'. Return the value into '*result'.
291 *
292 * NOTE: Does not skip over leading spaces, or deal with sign characters.
293 * NOTE: Ignores overflows.
294 *
295 * The function returns NULL in case of error (bad format), or the new
296 * position after the decimal number in case of success (which will always
297 * be <= 'limit').
298 */
299 static const char*
parse_number(const char * input,const char * limit,int base,int * result)300 parse_number(const char* input, const char* limit, int base, int* result)
301 {
302 const char* p = input;
303 int val = 0;
304 while (p < limit) {
305 int d = (*p - '0');
306 if ((unsigned)d >= 10U) {
307 d = (*p - 'a');
308 if ((unsigned)d >= 6U)
309 d = (*p - 'A');
310 if ((unsigned)d >= 6U)
311 break;
312 d += 10;
313 }
314 if (d >= base)
315 break;
316 val = val*base + d;
317 p++;
318 }
319 if (p == input)
320 return NULL;
321
322 *result = val;
323 return p;
324 }
325
326 static const char*
parse_decimal(const char * input,const char * limit,int * result)327 parse_decimal(const char* input, const char* limit, int* result)
328 {
329 return parse_number(input, limit, 10, result);
330 }
331
332 #ifdef __arm__
333 static const char*
parse_hexadecimal(const char * input,const char * limit,int * result)334 parse_hexadecimal(const char* input, const char* limit, int* result)
335 {
336 return parse_number(input, limit, 16, result);
337 }
338 #endif /* __arm__ */
339
340 /* This small data type is used to represent a CPU list / mask, as read
341 * from sysfs on Linux. See http://www.kernel.org/doc/Documentation/cputopology.txt
342 *
343 * For now, we don't expect more than 32 cores on mobile devices, so keep
344 * everything simple.
345 */
346 typedef struct {
347 uint32_t mask;
348 } CpuList;
349
350 static __inline__ void
cpulist_init(CpuList * list)351 cpulist_init(CpuList* list) {
352 list->mask = 0;
353 }
354
355 static __inline__ void
cpulist_and(CpuList * list1,CpuList * list2)356 cpulist_and(CpuList* list1, CpuList* list2) {
357 list1->mask &= list2->mask;
358 }
359
360 static __inline__ void
cpulist_set(CpuList * list,int index)361 cpulist_set(CpuList* list, int index) {
362 if ((unsigned)index < 32) {
363 list->mask |= (uint32_t)(1U << index);
364 }
365 }
366
367 static __inline__ int
cpulist_count(CpuList * list)368 cpulist_count(CpuList* list) {
369 return __builtin_popcount(list->mask);
370 }
371
372 /* Parse a textual list of cpus and store the result inside a CpuList object.
373 * Input format is the following:
374 * - comma-separated list of items (no spaces)
375 * - each item is either a single decimal number (cpu index), or a range made
376 * of two numbers separated by a single dash (-). Ranges are inclusive.
377 *
378 * Examples: 0
379 * 2,4-127,128-143
380 * 0-1
381 */
382 static void
cpulist_parse(CpuList * list,const char * line,int line_len)383 cpulist_parse(CpuList* list, const char* line, int line_len)
384 {
385 const char* p = line;
386 const char* end = p + line_len;
387 const char* q;
388
389 /* NOTE: the input line coming from sysfs typically contains a
390 * trailing newline, so take care of it in the code below
391 */
392 while (p < end && *p != '\n')
393 {
394 int val, start_value, end_value;
395
396 /* Find the end of current item, and put it into 'q' */
397 q = memchr(p, ',', end-p);
398 if (q == NULL) {
399 q = end;
400 }
401
402 /* Get first value */
403 p = parse_decimal(p, q, &start_value);
404 if (p == NULL)
405 goto BAD_FORMAT;
406
407 end_value = start_value;
408
409 /* If we're not at the end of the item, expect a dash and
410 * and integer; extract end value.
411 */
412 if (p < q && *p == '-') {
413 p = parse_decimal(p+1, q, &end_value);
414 if (p == NULL)
415 goto BAD_FORMAT;
416 }
417
418 /* Set bits CPU list bits */
419 for (val = start_value; val <= end_value; val++) {
420 cpulist_set(list, val);
421 }
422
423 /* Jump to next item */
424 p = q;
425 if (p < end)
426 p++;
427 }
428
429 BAD_FORMAT:
430 ;
431 }
432
433 /* Read a CPU list from one sysfs file */
434 static void
cpulist_read_from(CpuList * list,const char * filename)435 cpulist_read_from(CpuList* list, const char* filename)
436 {
437 char file[64];
438 int filelen;
439
440 cpulist_init(list);
441
442 filelen = read_file(filename, file, sizeof file);
443 if (filelen < 0) {
444 D("Could not read %s: %s\n", filename, strerror(errno));
445 return;
446 }
447
448 cpulist_parse(list, file, filelen);
449 }
450 #if defined(__aarch64__)
451 // see <uapi/asm/hwcap.h> kernel header
452 #define HWCAP_FP (1 << 0)
453 #define HWCAP_ASIMD (1 << 1)
454 #define HWCAP_AES (1 << 3)
455 #define HWCAP_PMULL (1 << 4)
456 #define HWCAP_SHA1 (1 << 5)
457 #define HWCAP_SHA2 (1 << 6)
458 #define HWCAP_CRC32 (1 << 7)
459 #endif
460
461 #if defined(__arm__)
462
463 // See <asm/hwcap.h> kernel header.
464 #define HWCAP_VFP (1 << 6)
465 #define HWCAP_IWMMXT (1 << 9)
466 #define HWCAP_NEON (1 << 12)
467 #define HWCAP_VFPv3 (1 << 13)
468 #define HWCAP_VFPv3D16 (1 << 14)
469 #define HWCAP_VFPv4 (1 << 16)
470 #define HWCAP_IDIVA (1 << 17)
471 #define HWCAP_IDIVT (1 << 18)
472
473 // see <uapi/asm/hwcap.h> kernel header
474 #define HWCAP2_AES (1 << 0)
475 #define HWCAP2_PMULL (1 << 1)
476 #define HWCAP2_SHA1 (1 << 2)
477 #define HWCAP2_SHA2 (1 << 3)
478 #define HWCAP2_CRC32 (1 << 4)
479
480 // This is the list of 32-bit ARMv7 optional features that are _always_
481 // supported by ARMv8 CPUs, as mandated by the ARM Architecture Reference
482 // Manual.
483 #define HWCAP_SET_FOR_ARMV8 \
484 ( HWCAP_VFP | \
485 HWCAP_NEON | \
486 HWCAP_VFPv3 | \
487 HWCAP_VFPv4 | \
488 HWCAP_IDIVA | \
489 HWCAP_IDIVT )
490 #endif
491
492 #if defined(__mips__)
493 // see <uapi/asm/hwcap.h> kernel header
494 #define HWCAP_MIPS_R6 (1 << 0)
495 #define HWCAP_MIPS_MSA (1 << 1)
496 #endif
497
498 #if defined(__arm__) || defined(__aarch64__) || defined(__mips__)
499
500 #define AT_HWCAP 16
501 #define AT_HWCAP2 26
502
503 // Probe the system's C library for a 'getauxval' function and call it if
504 // it exits, or return 0 for failure. This function is available since API
505 // level 20.
506 //
507 // This code does *NOT* check for '__ANDROID_API__ >= 20' to support the
508 // edge case where some NDK developers use headers for a platform that is
509 // newer than the one really targetted by their application.
510 // This is typically done to use newer native APIs only when running on more
511 // recent Android versions, and requires careful symbol management.
512 //
513 // Note that getauxval() can't really be re-implemented here, because
514 // its implementation does not parse /proc/self/auxv. Instead it depends
515 // on values that are passed by the kernel at process-init time to the
516 // C runtime initialization layer.
517 static uint32_t
get_elf_hwcap_from_getauxval(int hwcap_type)518 get_elf_hwcap_from_getauxval(int hwcap_type) {
519 typedef unsigned long getauxval_func_t(unsigned long);
520
521 dlerror();
522 void* libc_handle = dlopen("libc.so", RTLD_NOW);
523 if (!libc_handle) {
524 D("Could not dlopen() C library: %s\n", dlerror());
525 return 0;
526 }
527
528 uint32_t ret = 0;
529 getauxval_func_t* func = (getauxval_func_t*)
530 dlsym(libc_handle, "getauxval");
531 if (!func) {
532 D("Could not find getauxval() in C library\n");
533 } else {
534 // Note: getauxval() returns 0 on failure. Doesn't touch errno.
535 ret = (uint32_t)(*func)(hwcap_type);
536 }
537 dlclose(libc_handle);
538 return ret;
539 }
540 #endif
541
542 #if defined(__arm__)
543 // Parse /proc/self/auxv to extract the ELF HW capabilities bitmap for the
544 // current CPU. Note that this file is not accessible from regular
545 // application processes on some Android platform releases.
546 // On success, return new ELF hwcaps, or 0 on failure.
547 static uint32_t
get_elf_hwcap_from_proc_self_auxv(void)548 get_elf_hwcap_from_proc_self_auxv(void) {
549 const char filepath[] = "/proc/self/auxv";
550 int fd = TEMP_FAILURE_RETRY(open(filepath, O_RDONLY));
551 if (fd < 0) {
552 D("Could not open %s: %s\n", filepath, strerror(errno));
553 return 0;
554 }
555
556 struct { uint32_t tag; uint32_t value; } entry;
557
558 uint32_t result = 0;
559 for (;;) {
560 int ret = TEMP_FAILURE_RETRY(read(fd, (char*)&entry, sizeof entry));
561 if (ret < 0) {
562 D("Error while reading %s: %s\n", filepath, strerror(errno));
563 break;
564 }
565 // Detect end of list.
566 if (ret == 0 || (entry.tag == 0 && entry.value == 0))
567 break;
568 if (entry.tag == AT_HWCAP) {
569 result = entry.value;
570 break;
571 }
572 }
573 close(fd);
574 return result;
575 }
576
577 /* Compute the ELF HWCAP flags from the content of /proc/cpuinfo.
578 * This works by parsing the 'Features' line, which lists which optional
579 * features the device's CPU supports, on top of its reference
580 * architecture.
581 */
582 static uint32_t
get_elf_hwcap_from_proc_cpuinfo(const char * cpuinfo,int cpuinfo_len)583 get_elf_hwcap_from_proc_cpuinfo(const char* cpuinfo, int cpuinfo_len) {
584 uint32_t hwcaps = 0;
585 long architecture = 0;
586 char* cpuArch = extract_cpuinfo_field(cpuinfo, cpuinfo_len, "CPU architecture");
587 if (cpuArch) {
588 architecture = strtol(cpuArch, NULL, 10);
589 free(cpuArch);
590
591 if (architecture >= 8L) {
592 // This is a 32-bit ARM binary running on a 64-bit ARM64 kernel.
593 // The 'Features' line only lists the optional features that the
594 // device's CPU supports, compared to its reference architecture
595 // which are of no use for this process.
596 D("Faking 32-bit ARM HWCaps on ARMv%ld CPU\n", architecture);
597 return HWCAP_SET_FOR_ARMV8;
598 }
599 }
600
601 char* cpuFeatures = extract_cpuinfo_field(cpuinfo, cpuinfo_len, "Features");
602 if (cpuFeatures != NULL) {
603 D("Found cpuFeatures = '%s'\n", cpuFeatures);
604
605 if (has_list_item(cpuFeatures, "vfp"))
606 hwcaps |= HWCAP_VFP;
607 if (has_list_item(cpuFeatures, "vfpv3"))
608 hwcaps |= HWCAP_VFPv3;
609 if (has_list_item(cpuFeatures, "vfpv3d16"))
610 hwcaps |= HWCAP_VFPv3D16;
611 if (has_list_item(cpuFeatures, "vfpv4"))
612 hwcaps |= HWCAP_VFPv4;
613 if (has_list_item(cpuFeatures, "neon"))
614 hwcaps |= HWCAP_NEON;
615 if (has_list_item(cpuFeatures, "idiva"))
616 hwcaps |= HWCAP_IDIVA;
617 if (has_list_item(cpuFeatures, "idivt"))
618 hwcaps |= HWCAP_IDIVT;
619 if (has_list_item(cpuFeatures, "idiv"))
620 hwcaps |= HWCAP_IDIVA | HWCAP_IDIVT;
621 if (has_list_item(cpuFeatures, "iwmmxt"))
622 hwcaps |= HWCAP_IWMMXT;
623
624 free(cpuFeatures);
625 }
626 return hwcaps;
627 }
628 #endif /* __arm__ */
629
630 /* Return the number of cpus present on a given device.
631 *
632 * To handle all weird kernel configurations, we need to compute the
633 * intersection of the 'present' and 'possible' CPU lists and count
634 * the result.
635 */
636 static int
get_cpu_count(void)637 get_cpu_count(void)
638 {
639 CpuList cpus_present[1];
640 CpuList cpus_possible[1];
641
642 cpulist_read_from(cpus_present, "/sys/devices/system/cpu/present");
643 cpulist_read_from(cpus_possible, "/sys/devices/system/cpu/possible");
644
645 /* Compute the intersection of both sets to get the actual number of
646 * CPU cores that can be used on this device by the kernel.
647 */
648 cpulist_and(cpus_present, cpus_possible);
649
650 return cpulist_count(cpus_present);
651 }
652
653 static void
android_cpuInitFamily(void)654 android_cpuInitFamily(void)
655 {
656 #if defined(__arm__)
657 g_cpuFamily = ANDROID_CPU_FAMILY_ARM;
658 #elif defined(__i386__)
659 g_cpuFamily = ANDROID_CPU_FAMILY_X86;
660 #elif defined(__mips64)
661 /* Needs to be before __mips__ since the compiler defines both */
662 g_cpuFamily = ANDROID_CPU_FAMILY_MIPS64;
663 #elif defined(__mips__)
664 g_cpuFamily = ANDROID_CPU_FAMILY_MIPS;
665 #elif defined(__aarch64__)
666 g_cpuFamily = ANDROID_CPU_FAMILY_ARM64;
667 #elif defined(__x86_64__)
668 g_cpuFamily = ANDROID_CPU_FAMILY_X86_64;
669 #else
670 g_cpuFamily = ANDROID_CPU_FAMILY_UNKNOWN;
671 #endif
672 }
673
674 static void
android_cpuInit(void)675 android_cpuInit(void)
676 {
677 char* cpuinfo = NULL;
678 int cpuinfo_len;
679
680 android_cpuInitFamily();
681
682 g_cpuFeatures = 0;
683 g_cpuCount = 1;
684 g_inited = 1;
685
686 cpuinfo_len = get_file_size("/proc/cpuinfo");
687 if (cpuinfo_len < 0) {
688 D("cpuinfo_len cannot be computed!");
689 return;
690 }
691 cpuinfo = malloc(cpuinfo_len);
692 if (cpuinfo == NULL) {
693 D("cpuinfo buffer could not be allocated");
694 return;
695 }
696 cpuinfo_len = read_file("/proc/cpuinfo", cpuinfo, cpuinfo_len);
697 D("cpuinfo_len is (%d):\n%.*s\n", cpuinfo_len,
698 cpuinfo_len >= 0 ? cpuinfo_len : 0, cpuinfo);
699
700 if (cpuinfo_len < 0) /* should not happen */ {
701 free(cpuinfo);
702 return;
703 }
704
705 /* Count the CPU cores, the value may be 0 for single-core CPUs */
706 g_cpuCount = get_cpu_count();
707 if (g_cpuCount == 0) {
708 g_cpuCount = 1;
709 }
710
711 D("found cpuCount = %d\n", g_cpuCount);
712
713 #ifdef __arm__
714 {
715 /* Extract architecture from the "CPU Architecture" field.
716 * The list is well-known, unlike the the output of
717 * the 'Processor' field which can vary greatly.
718 *
719 * See the definition of the 'proc_arch' array in
720 * $KERNEL/arch/arm/kernel/setup.c and the 'c_show' function in
721 * same file.
722 */
723 char* cpuArch = extract_cpuinfo_field(cpuinfo, cpuinfo_len, "CPU architecture");
724
725 if (cpuArch != NULL) {
726 char* end;
727 long archNumber;
728 int hasARMv7 = 0;
729
730 D("found cpuArch = '%s'\n", cpuArch);
731
732 /* read the initial decimal number, ignore the rest */
733 archNumber = strtol(cpuArch, &end, 10);
734
735 /* Note that ARMv8 is upwards compatible with ARMv7. */
736 if (end > cpuArch && archNumber >= 7) {
737 hasARMv7 = 1;
738 }
739
740 /* Unfortunately, it seems that certain ARMv6-based CPUs
741 * report an incorrect architecture number of 7!
742 *
743 * See http://code.google.com/p/android/issues/detail?id=10812
744 *
745 * We try to correct this by looking at the 'elf_format'
746 * field reported by the 'Processor' field, which is of the
747 * form of "(v7l)" for an ARMv7-based CPU, and "(v6l)" for
748 * an ARMv6-one.
749 */
750 if (hasARMv7) {
751 char* cpuProc = extract_cpuinfo_field(cpuinfo, cpuinfo_len,
752 "Processor");
753 if (cpuProc != NULL) {
754 D("found cpuProc = '%s'\n", cpuProc);
755 if (has_list_item(cpuProc, "(v6l)")) {
756 D("CPU processor and architecture mismatch!!\n");
757 hasARMv7 = 0;
758 }
759 free(cpuProc);
760 }
761 }
762
763 if (hasARMv7) {
764 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_ARMv7;
765 }
766
767 /* The LDREX / STREX instructions are available from ARMv6 */
768 if (archNumber >= 6) {
769 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_LDREX_STREX;
770 }
771
772 free(cpuArch);
773 }
774
775 /* Extract the list of CPU features from ELF hwcaps */
776 uint32_t hwcaps = 0;
777 hwcaps = get_elf_hwcap_from_getauxval(AT_HWCAP);
778 if (!hwcaps) {
779 D("Parsing /proc/self/auxv to extract ELF hwcaps!\n");
780 hwcaps = get_elf_hwcap_from_proc_self_auxv();
781 }
782 if (!hwcaps) {
783 // Parsing /proc/self/auxv will fail from regular application
784 // processes on some Android platform versions, when this happens
785 // parse proc/cpuinfo instead.
786 D("Parsing /proc/cpuinfo to extract ELF hwcaps!\n");
787 hwcaps = get_elf_hwcap_from_proc_cpuinfo(cpuinfo, cpuinfo_len);
788 }
789
790 if (hwcaps != 0) {
791 int has_vfp = (hwcaps & HWCAP_VFP);
792 int has_vfpv3 = (hwcaps & HWCAP_VFPv3);
793 int has_vfpv3d16 = (hwcaps & HWCAP_VFPv3D16);
794 int has_vfpv4 = (hwcaps & HWCAP_VFPv4);
795 int has_neon = (hwcaps & HWCAP_NEON);
796 int has_idiva = (hwcaps & HWCAP_IDIVA);
797 int has_idivt = (hwcaps & HWCAP_IDIVT);
798 int has_iwmmxt = (hwcaps & HWCAP_IWMMXT);
799
800 // The kernel does a poor job at ensuring consistency when
801 // describing CPU features. So lots of guessing is needed.
802
803 // 'vfpv4' implies VFPv3|VFP_FMA|FP16
804 if (has_vfpv4)
805 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_VFPv3 |
806 ANDROID_CPU_ARM_FEATURE_VFP_FP16 |
807 ANDROID_CPU_ARM_FEATURE_VFP_FMA;
808
809 // 'vfpv3' or 'vfpv3d16' imply VFPv3. Note that unlike GCC,
810 // a value of 'vfpv3' doesn't necessarily mean that the D32
811 // feature is present, so be conservative. All CPUs in the
812 // field that support D32 also support NEON, so this should
813 // not be a problem in practice.
814 if (has_vfpv3 || has_vfpv3d16)
815 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_VFPv3;
816
817 // 'vfp' is super ambiguous. Depending on the kernel, it can
818 // either mean VFPv2 or VFPv3. Make it depend on ARMv7.
819 if (has_vfp) {
820 if (g_cpuFeatures & ANDROID_CPU_ARM_FEATURE_ARMv7)
821 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_VFPv3;
822 else
823 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_VFPv2;
824 }
825
826 // Neon implies VFPv3|D32, and if vfpv4 is detected, NEON_FMA
827 if (has_neon) {
828 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_VFPv3 |
829 ANDROID_CPU_ARM_FEATURE_NEON |
830 ANDROID_CPU_ARM_FEATURE_VFP_D32;
831 if (has_vfpv4)
832 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_NEON_FMA;
833 }
834
835 // VFPv3 implies VFPv2 and ARMv7
836 if (g_cpuFeatures & ANDROID_CPU_ARM_FEATURE_VFPv3)
837 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_VFPv2 |
838 ANDROID_CPU_ARM_FEATURE_ARMv7;
839
840 if (has_idiva)
841 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_IDIV_ARM;
842 if (has_idivt)
843 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_IDIV_THUMB2;
844
845 if (has_iwmmxt)
846 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_iWMMXt;
847 }
848
849 /* Extract the list of CPU features from ELF hwcaps2 */
850 uint32_t hwcaps2 = 0;
851 hwcaps2 = get_elf_hwcap_from_getauxval(AT_HWCAP2);
852 if (hwcaps2 != 0) {
853 int has_aes = (hwcaps2 & HWCAP2_AES);
854 int has_pmull = (hwcaps2 & HWCAP2_PMULL);
855 int has_sha1 = (hwcaps2 & HWCAP2_SHA1);
856 int has_sha2 = (hwcaps2 & HWCAP2_SHA2);
857 int has_crc32 = (hwcaps2 & HWCAP2_CRC32);
858
859 if (has_aes)
860 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_AES;
861 if (has_pmull)
862 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_PMULL;
863 if (has_sha1)
864 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_SHA1;
865 if (has_sha2)
866 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_SHA2;
867 if (has_crc32)
868 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_CRC32;
869 }
870 /* Extract the cpuid value from various fields */
871 // The CPUID value is broken up in several entries in /proc/cpuinfo.
872 // This table is used to rebuild it from the entries.
873 static const struct CpuIdEntry {
874 const char* field;
875 char format;
876 char bit_lshift;
877 char bit_length;
878 } cpu_id_entries[] = {
879 { "CPU implementer", 'x', 24, 8 },
880 { "CPU variant", 'x', 20, 4 },
881 { "CPU part", 'x', 4, 12 },
882 { "CPU revision", 'd', 0, 4 },
883 };
884 size_t i;
885 D("Parsing /proc/cpuinfo to recover CPUID\n");
886 for (i = 0;
887 i < sizeof(cpu_id_entries)/sizeof(cpu_id_entries[0]);
888 ++i) {
889 const struct CpuIdEntry* entry = &cpu_id_entries[i];
890 char* value = extract_cpuinfo_field(cpuinfo,
891 cpuinfo_len,
892 entry->field);
893 if (value == NULL)
894 continue;
895
896 D("field=%s value='%s'\n", entry->field, value);
897 char* value_end = value + strlen(value);
898 int val = 0;
899 const char* start = value;
900 const char* p;
901 if (value[0] == '0' && (value[1] == 'x' || value[1] == 'X')) {
902 start += 2;
903 p = parse_hexadecimal(start, value_end, &val);
904 } else if (entry->format == 'x')
905 p = parse_hexadecimal(value, value_end, &val);
906 else
907 p = parse_decimal(value, value_end, &val);
908
909 if (p > (const char*)start) {
910 val &= ((1 << entry->bit_length)-1);
911 val <<= entry->bit_lshift;
912 g_cpuIdArm |= (uint32_t) val;
913 }
914
915 free(value);
916 }
917
918 // Handle kernel configuration bugs that prevent the correct
919 // reporting of CPU features.
920 static const struct CpuFix {
921 uint32_t cpuid;
922 uint64_t or_flags;
923 } cpu_fixes[] = {
924 /* The Nexus 4 (Qualcomm Krait) kernel configuration
925 * forgets to report IDIV support. */
926 { 0x510006f2, ANDROID_CPU_ARM_FEATURE_IDIV_ARM |
927 ANDROID_CPU_ARM_FEATURE_IDIV_THUMB2 },
928 { 0x510006f3, ANDROID_CPU_ARM_FEATURE_IDIV_ARM |
929 ANDROID_CPU_ARM_FEATURE_IDIV_THUMB2 },
930 };
931 size_t n;
932 for (n = 0; n < sizeof(cpu_fixes)/sizeof(cpu_fixes[0]); ++n) {
933 const struct CpuFix* entry = &cpu_fixes[n];
934
935 if (g_cpuIdArm == entry->cpuid)
936 g_cpuFeatures |= entry->or_flags;
937 }
938
939 // Special case: The emulator-specific Android 4.2 kernel fails
940 // to report support for the 32-bit ARM IDIV instruction.
941 // Technically, this is a feature of the virtual CPU implemented
942 // by the emulator. Note that it could also support Thumb IDIV
943 // in the future, and this will have to be slightly updated.
944 char* hardware = extract_cpuinfo_field(cpuinfo,
945 cpuinfo_len,
946 "Hardware");
947 if (hardware) {
948 if (!strcmp(hardware, "Goldfish") &&
949 g_cpuIdArm == 0x4100c080 &&
950 (g_cpuFamily & ANDROID_CPU_ARM_FEATURE_ARMv7) != 0) {
951 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_IDIV_ARM;
952 }
953 free(hardware);
954 }
955 }
956 #endif /* __arm__ */
957 #ifdef __aarch64__
958 {
959 /* Extract the list of CPU features from ELF hwcaps */
960 uint32_t hwcaps = 0;
961 hwcaps = get_elf_hwcap_from_getauxval(AT_HWCAP);
962 if (hwcaps != 0) {
963 int has_fp = (hwcaps & HWCAP_FP);
964 int has_asimd = (hwcaps & HWCAP_ASIMD);
965 int has_aes = (hwcaps & HWCAP_AES);
966 int has_pmull = (hwcaps & HWCAP_PMULL);
967 int has_sha1 = (hwcaps & HWCAP_SHA1);
968 int has_sha2 = (hwcaps & HWCAP_SHA2);
969 int has_crc32 = (hwcaps & HWCAP_CRC32);
970
971 if(has_fp == 0) {
972 D("ERROR: Floating-point unit missing, but is required by Android on AArch64 CPUs\n");
973 }
974 if(has_asimd == 0) {
975 D("ERROR: ASIMD unit missing, but is required by Android on AArch64 CPUs\n");
976 }
977
978 if (has_fp)
979 g_cpuFeatures |= ANDROID_CPU_ARM64_FEATURE_FP;
980 if (has_asimd)
981 g_cpuFeatures |= ANDROID_CPU_ARM64_FEATURE_ASIMD;
982 if (has_aes)
983 g_cpuFeatures |= ANDROID_CPU_ARM64_FEATURE_AES;
984 if (has_pmull)
985 g_cpuFeatures |= ANDROID_CPU_ARM64_FEATURE_PMULL;
986 if (has_sha1)
987 g_cpuFeatures |= ANDROID_CPU_ARM64_FEATURE_SHA1;
988 if (has_sha2)
989 g_cpuFeatures |= ANDROID_CPU_ARM64_FEATURE_SHA2;
990 if (has_crc32)
991 g_cpuFeatures |= ANDROID_CPU_ARM64_FEATURE_CRC32;
992 }
993 }
994 #endif /* __aarch64__ */
995
996 #if defined(__i386__) || defined(__x86_64__)
997 int regs[4];
998
999 /* According to http://en.wikipedia.org/wiki/CPUID */
1000 #define VENDOR_INTEL_b 0x756e6547
1001 #define VENDOR_INTEL_c 0x6c65746e
1002 #define VENDOR_INTEL_d 0x49656e69
1003
1004 x86_cpuid(0, regs);
1005 int vendorIsIntel = (regs[1] == VENDOR_INTEL_b &&
1006 regs[2] == VENDOR_INTEL_c &&
1007 regs[3] == VENDOR_INTEL_d);
1008
1009 x86_cpuid(1, regs);
1010 if ((regs[2] & (1 << 9)) != 0) {
1011 g_cpuFeatures |= ANDROID_CPU_X86_FEATURE_SSSE3;
1012 }
1013 if ((regs[2] & (1 << 23)) != 0) {
1014 g_cpuFeatures |= ANDROID_CPU_X86_FEATURE_POPCNT;
1015 }
1016 if ((regs[2] & (1 << 19)) != 0) {
1017 g_cpuFeatures |= ANDROID_CPU_X86_FEATURE_SSE4_1;
1018 }
1019 if ((regs[2] & (1 << 20)) != 0) {
1020 g_cpuFeatures |= ANDROID_CPU_X86_FEATURE_SSE4_2;
1021 }
1022 if (vendorIsIntel && (regs[2] & (1 << 22)) != 0) {
1023 g_cpuFeatures |= ANDROID_CPU_X86_FEATURE_MOVBE;
1024 }
1025 #endif
1026 #if defined( __mips__)
1027 { /* MIPS and MIPS64 */
1028 /* Extract the list of CPU features from ELF hwcaps */
1029 uint32_t hwcaps = 0;
1030 hwcaps = get_elf_hwcap_from_getauxval(AT_HWCAP);
1031 if (hwcaps != 0) {
1032 int has_r6 = (hwcaps & HWCAP_MIPS_R6);
1033 int has_msa = (hwcaps & HWCAP_MIPS_MSA);
1034 if (has_r6)
1035 g_cpuFeatures |= ANDROID_CPU_MIPS_FEATURE_R6;
1036 if (has_msa)
1037 g_cpuFeatures |= ANDROID_CPU_MIPS_FEATURE_MSA;
1038 }
1039 }
1040 #endif /* __mips__ */
1041
1042 free(cpuinfo);
1043 }
1044
1045
1046 AndroidCpuFamily
android_getCpuFamily(void)1047 android_getCpuFamily(void)
1048 {
1049 pthread_once(&g_once, android_cpuInit);
1050 return g_cpuFamily;
1051 }
1052
1053
1054 uint64_t
android_getCpuFeatures(void)1055 android_getCpuFeatures(void)
1056 {
1057 pthread_once(&g_once, android_cpuInit);
1058 return g_cpuFeatures;
1059 }
1060
1061
1062 int
android_getCpuCount(void)1063 android_getCpuCount(void)
1064 {
1065 pthread_once(&g_once, android_cpuInit);
1066 return g_cpuCount;
1067 }
1068
1069 static void
android_cpuInitDummy(void)1070 android_cpuInitDummy(void)
1071 {
1072 g_inited = 1;
1073 }
1074
1075 int
android_setCpu(int cpu_count,uint64_t cpu_features)1076 android_setCpu(int cpu_count, uint64_t cpu_features)
1077 {
1078 /* Fail if the library was already initialized. */
1079 if (g_inited)
1080 return 0;
1081
1082 android_cpuInitFamily();
1083 g_cpuCount = (cpu_count <= 0 ? 1 : cpu_count);
1084 g_cpuFeatures = cpu_features;
1085 pthread_once(&g_once, android_cpuInitDummy);
1086
1087 return 1;
1088 }
1089
1090 #ifdef __arm__
1091 uint32_t
android_getCpuIdArm(void)1092 android_getCpuIdArm(void)
1093 {
1094 pthread_once(&g_once, android_cpuInit);
1095 return g_cpuIdArm;
1096 }
1097
1098 int
android_setCpuArm(int cpu_count,uint64_t cpu_features,uint32_t cpu_id)1099 android_setCpuArm(int cpu_count, uint64_t cpu_features, uint32_t cpu_id)
1100 {
1101 if (!android_setCpu(cpu_count, cpu_features))
1102 return 0;
1103
1104 g_cpuIdArm = cpu_id;
1105 return 1;
1106 }
1107 #endif /* __arm__ */
1108
1109 /*
1110 * Technical note: Making sense of ARM's FPU architecture versions.
1111 *
1112 * FPA was ARM's first attempt at an FPU architecture. There is no Android
1113 * device that actually uses it since this technology was already obsolete
1114 * when the project started. If you see references to FPA instructions
1115 * somewhere, you can be sure that this doesn't apply to Android at all.
1116 *
1117 * FPA was followed by "VFP", soon renamed "VFPv1" due to the emergence of
1118 * new versions / additions to it. ARM considers this obsolete right now,
1119 * and no known Android device implements it either.
1120 *
1121 * VFPv2 added a few instructions to VFPv1, and is an *optional* extension
1122 * supported by some ARMv5TE, ARMv6 and ARMv6T2 CPUs. Note that a device
1123 * supporting the 'armeabi' ABI doesn't necessarily support these.
1124 *
1125 * VFPv3-D16 adds a few instructions on top of VFPv2 and is typically used
1126 * on ARMv7-A CPUs which implement a FPU. Note that it is also mandated
1127 * by the Android 'armeabi-v7a' ABI. The -D16 suffix in its name means
1128 * that it provides 16 double-precision FPU registers (d0-d15) and 32
1129 * single-precision ones (s0-s31) which happen to be mapped to the same
1130 * register banks.
1131 *
1132 * VFPv3-D32 is the name of an extension to VFPv3-D16 that provides 16
1133 * additional double precision registers (d16-d31). Note that there are
1134 * still only 32 single precision registers.
1135 *
1136 * VFPv3xD is a *subset* of VFPv3-D16 that only provides single-precision
1137 * registers. It is only used on ARMv7-M (i.e. on micro-controllers) which
1138 * are not supported by Android. Note that it is not compatible with VFPv2.
1139 *
1140 * NOTE: The term 'VFPv3' usually designate either VFPv3-D16 or VFPv3-D32
1141 * depending on context. For example GCC uses it for VFPv3-D32, but
1142 * the Linux kernel code uses it for VFPv3-D16 (especially in
1143 * /proc/cpuinfo). Always try to use the full designation when
1144 * possible.
1145 *
1146 * NEON, a.k.a. "ARM Advanced SIMD" is an extension that provides
1147 * instructions to perform parallel computations on vectors of 8, 16,
1148 * 32, 64 and 128 bit quantities. NEON requires VFPv32-D32 since all
1149 * NEON registers are also mapped to the same register banks.
1150 *
1151 * VFPv4-D16, adds a few instructions on top of VFPv3-D16 in order to
1152 * perform fused multiply-accumulate on VFP registers, as well as
1153 * half-precision (16-bit) conversion operations.
1154 *
1155 * VFPv4-D32 is VFPv4-D16 with 32, instead of 16, FPU double precision
1156 * registers.
1157 *
1158 * VPFv4-NEON is VFPv4-D32 with NEON instructions. It also adds fused
1159 * multiply-accumulate instructions that work on the NEON registers.
1160 *
1161 * NOTE: Similarly, "VFPv4" might either reference VFPv4-D16 or VFPv4-D32
1162 * depending on context.
1163 *
1164 * The following information was determined by scanning the binutils-2.22
1165 * sources:
1166 *
1167 * Basic VFP instruction subsets:
1168 *
1169 * #define FPU_VFP_EXT_V1xD 0x08000000 // Base VFP instruction set.
1170 * #define FPU_VFP_EXT_V1 0x04000000 // Double-precision insns.
1171 * #define FPU_VFP_EXT_V2 0x02000000 // ARM10E VFPr1.
1172 * #define FPU_VFP_EXT_V3xD 0x01000000 // VFPv3 single-precision.
1173 * #define FPU_VFP_EXT_V3 0x00800000 // VFPv3 double-precision.
1174 * #define FPU_NEON_EXT_V1 0x00400000 // Neon (SIMD) insns.
1175 * #define FPU_VFP_EXT_D32 0x00200000 // Registers D16-D31.
1176 * #define FPU_VFP_EXT_FP16 0x00100000 // Half-precision extensions.
1177 * #define FPU_NEON_EXT_FMA 0x00080000 // Neon fused multiply-add
1178 * #define FPU_VFP_EXT_FMA 0x00040000 // VFP fused multiply-add
1179 *
1180 * FPU types (excluding NEON)
1181 *
1182 * FPU_VFP_V1xD (EXT_V1xD)
1183 * |
1184 * +--------------------------+
1185 * | |
1186 * FPU_VFP_V1 (+EXT_V1) FPU_VFP_V3xD (+EXT_V2+EXT_V3xD)
1187 * | |
1188 * | |
1189 * FPU_VFP_V2 (+EXT_V2) FPU_VFP_V4_SP_D16 (+EXT_FP16+EXT_FMA)
1190 * |
1191 * FPU_VFP_V3D16 (+EXT_Vx3D+EXT_V3)
1192 * |
1193 * +--------------------------+
1194 * | |
1195 * FPU_VFP_V3 (+EXT_D32) FPU_VFP_V4D16 (+EXT_FP16+EXT_FMA)
1196 * | |
1197 * | FPU_VFP_V4 (+EXT_D32)
1198 * |
1199 * FPU_VFP_HARD (+EXT_FMA+NEON_EXT_FMA)
1200 *
1201 * VFP architectures:
1202 *
1203 * ARCH_VFP_V1xD (EXT_V1xD)
1204 * |
1205 * +------------------+
1206 * | |
1207 * | ARCH_VFP_V3xD (+EXT_V2+EXT_V3xD)
1208 * | |
1209 * | ARCH_VFP_V3xD_FP16 (+EXT_FP16)
1210 * | |
1211 * | ARCH_VFP_V4_SP_D16 (+EXT_FMA)
1212 * |
1213 * ARCH_VFP_V1 (+EXT_V1)
1214 * |
1215 * ARCH_VFP_V2 (+EXT_V2)
1216 * |
1217 * ARCH_VFP_V3D16 (+EXT_V3xD+EXT_V3)
1218 * |
1219 * +-------------------+
1220 * | |
1221 * | ARCH_VFP_V3D16_FP16 (+EXT_FP16)
1222 * |
1223 * +-------------------+
1224 * | |
1225 * | ARCH_VFP_V4_D16 (+EXT_FP16+EXT_FMA)
1226 * | |
1227 * | ARCH_VFP_V4 (+EXT_D32)
1228 * | |
1229 * | ARCH_NEON_VFP_V4 (+EXT_NEON+EXT_NEON_FMA)
1230 * |
1231 * ARCH_VFP_V3 (+EXT_D32)
1232 * |
1233 * +-------------------+
1234 * | |
1235 * | ARCH_VFP_V3_FP16 (+EXT_FP16)
1236 * |
1237 * ARCH_VFP_V3_PLUS_NEON_V1 (+EXT_NEON)
1238 * |
1239 * ARCH_NEON_FP16 (+EXT_FP16)
1240 *
1241 * -fpu=<name> values and their correspondance with FPU architectures above:
1242 *
1243 * {"vfp", FPU_ARCH_VFP_V2},
1244 * {"vfp9", FPU_ARCH_VFP_V2},
1245 * {"vfp3", FPU_ARCH_VFP_V3}, // For backwards compatbility.
1246 * {"vfp10", FPU_ARCH_VFP_V2},
1247 * {"vfp10-r0", FPU_ARCH_VFP_V1},
1248 * {"vfpxd", FPU_ARCH_VFP_V1xD},
1249 * {"vfpv2", FPU_ARCH_VFP_V2},
1250 * {"vfpv3", FPU_ARCH_VFP_V3},
1251 * {"vfpv3-fp16", FPU_ARCH_VFP_V3_FP16},
1252 * {"vfpv3-d16", FPU_ARCH_VFP_V3D16},
1253 * {"vfpv3-d16-fp16", FPU_ARCH_VFP_V3D16_FP16},
1254 * {"vfpv3xd", FPU_ARCH_VFP_V3xD},
1255 * {"vfpv3xd-fp16", FPU_ARCH_VFP_V3xD_FP16},
1256 * {"neon", FPU_ARCH_VFP_V3_PLUS_NEON_V1},
1257 * {"neon-fp16", FPU_ARCH_NEON_FP16},
1258 * {"vfpv4", FPU_ARCH_VFP_V4},
1259 * {"vfpv4-d16", FPU_ARCH_VFP_V4D16},
1260 * {"fpv4-sp-d16", FPU_ARCH_VFP_V4_SP_D16},
1261 * {"neon-vfpv4", FPU_ARCH_NEON_VFP_V4},
1262 *
1263 *
1264 * Simplified diagram that only includes FPUs supported by Android:
1265 * Only ARCH_VFP_V3D16 is actually mandated by the armeabi-v7a ABI,
1266 * all others are optional and must be probed at runtime.
1267 *
1268 * ARCH_VFP_V3D16 (EXT_V1xD+EXT_V1+EXT_V2+EXT_V3xD+EXT_V3)
1269 * |
1270 * +-------------------+
1271 * | |
1272 * | ARCH_VFP_V3D16_FP16 (+EXT_FP16)
1273 * |
1274 * +-------------------+
1275 * | |
1276 * | ARCH_VFP_V4_D16 (+EXT_FP16+EXT_FMA)
1277 * | |
1278 * | ARCH_VFP_V4 (+EXT_D32)
1279 * | |
1280 * | ARCH_NEON_VFP_V4 (+EXT_NEON+EXT_NEON_FMA)
1281 * |
1282 * ARCH_VFP_V3 (+EXT_D32)
1283 * |
1284 * +-------------------+
1285 * | |
1286 * | ARCH_VFP_V3_FP16 (+EXT_FP16)
1287 * |
1288 * ARCH_VFP_V3_PLUS_NEON_V1 (+EXT_NEON)
1289 * |
1290 * ARCH_NEON_FP16 (+EXT_FP16)
1291 *
1292 */
1293