1 //===---- ScheduleDAGSDNodes.h - SDNode Scheduling --------------*- C++ -*-===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the ScheduleDAGSDNodes class, which implements
11 // scheduling for an SDNode-based dependency graph.
12 //
13 //===----------------------------------------------------------------------===//
14 
15 #ifndef LLVM_LIB_CODEGEN_SELECTIONDAG_SCHEDULEDAGSDNODES_H
16 #define LLVM_LIB_CODEGEN_SELECTIONDAG_SCHEDULEDAGSDNODES_H
17 
18 #include "llvm/CodeGen/MachineBasicBlock.h"
19 #include "llvm/CodeGen/ScheduleDAG.h"
20 
21 namespace llvm {
22   /// ScheduleDAGSDNodes - A ScheduleDAG for scheduling SDNode-based DAGs.
23   ///
24   /// Edges between SUnits are initially based on edges in the SelectionDAG,
25   /// and additional edges can be added by the schedulers as heuristics.
26   /// SDNodes such as Constants, Registers, and a few others that are not
27   /// interesting to schedulers are not allocated SUnits.
28   ///
29   /// SDNodes with MVT::Glue operands are grouped along with the flagged
30   /// nodes into a single SUnit so that they are scheduled together.
31   ///
32   /// SDNode-based scheduling graphs do not use SDep::Anti or SDep::Output
33   /// edges.  Physical register dependence information is not carried in
34   /// the DAG and must be handled explicitly by schedulers.
35   ///
36   class ScheduleDAGSDNodes : public ScheduleDAG {
37   public:
38     MachineBasicBlock *BB;
39     SelectionDAG *DAG;                    // DAG of the current basic block
40     const InstrItineraryData *InstrItins;
41 
42     /// The schedule. Null SUnit*'s represent noop instructions.
43     std::vector<SUnit*> Sequence;
44 
45     explicit ScheduleDAGSDNodes(MachineFunction &mf);
46 
~ScheduleDAGSDNodes()47     ~ScheduleDAGSDNodes() override {}
48 
49     /// Run - perform scheduling.
50     ///
51     void Run(SelectionDAG *dag, MachineBasicBlock *bb);
52 
53     /// isPassiveNode - Return true if the node is a non-scheduled leaf.
54     ///
isPassiveNode(SDNode * Node)55     static bool isPassiveNode(SDNode *Node) {
56       if (isa<ConstantSDNode>(Node))       return true;
57       if (isa<ConstantFPSDNode>(Node))     return true;
58       if (isa<RegisterSDNode>(Node))       return true;
59       if (isa<RegisterMaskSDNode>(Node))   return true;
60       if (isa<GlobalAddressSDNode>(Node))  return true;
61       if (isa<BasicBlockSDNode>(Node))     return true;
62       if (isa<FrameIndexSDNode>(Node))     return true;
63       if (isa<ConstantPoolSDNode>(Node))   return true;
64       if (isa<TargetIndexSDNode>(Node))    return true;
65       if (isa<JumpTableSDNode>(Node))      return true;
66       if (isa<ExternalSymbolSDNode>(Node)) return true;
67       if (isa<MCSymbolSDNode>(Node))       return true;
68       if (isa<BlockAddressSDNode>(Node))   return true;
69       if (Node->getOpcode() == ISD::EntryToken ||
70           isa<MDNodeSDNode>(Node)) return true;
71       return false;
72     }
73 
74     /// NewSUnit - Creates a new SUnit and return a ptr to it.
75     ///
76     SUnit *newSUnit(SDNode *N);
77 
78     /// Clone - Creates a clone of the specified SUnit. It does not copy the
79     /// predecessors / successors info nor the temporary scheduling states.
80     ///
81     SUnit *Clone(SUnit *N);
82 
83     /// BuildSchedGraph - Build the SUnit graph from the selection dag that we
84     /// are input.  This SUnit graph is similar to the SelectionDAG, but
85     /// excludes nodes that aren't interesting to scheduling, and represents
86     /// flagged together nodes with a single SUnit.
87     void BuildSchedGraph(AliasAnalysis *AA);
88 
89     /// InitNumRegDefsLeft - Determine the # of regs defined by this node.
90     ///
91     void InitNumRegDefsLeft(SUnit *SU);
92 
93     /// computeLatency - Compute node latency.
94     ///
95     virtual void computeLatency(SUnit *SU);
96 
97     virtual void computeOperandLatency(SDNode *Def, SDNode *Use,
98                                        unsigned OpIdx, SDep& dep) const;
99 
100     /// Schedule - Order nodes according to selected style, filling
101     /// in the Sequence member.
102     ///
103     virtual void Schedule() = 0;
104 
105     /// VerifyScheduledSequence - Verify that all SUnits are scheduled and
106     /// consistent with the Sequence of scheduled instructions.
107     void VerifyScheduledSequence(bool isBottomUp);
108 
109     /// EmitSchedule - Insert MachineInstrs into the MachineBasicBlock
110     /// according to the order specified in Sequence.
111     ///
112     virtual MachineBasicBlock*
113     EmitSchedule(MachineBasicBlock::iterator &InsertPos);
114 
115     void dumpNode(const SUnit *SU) const override;
116 
117     void dumpSchedule() const;
118 
119     std::string getGraphNodeLabel(const SUnit *SU) const override;
120 
121     std::string getDAGName() const override;
122 
123     virtual void getCustomGraphFeatures(GraphWriter<ScheduleDAG*> &GW) const;
124 
125     /// RegDefIter - In place iteration over the values defined by an
126     /// SUnit. This does not need copies of the iterator or any other STLisms.
127     /// The iterator creates itself, rather than being provided by the SchedDAG.
128     class RegDefIter {
129       const ScheduleDAGSDNodes *SchedDAG;
130       const SDNode *Node;
131       unsigned DefIdx;
132       unsigned NodeNumDefs;
133       MVT ValueType;
134     public:
135       RegDefIter(const SUnit *SU, const ScheduleDAGSDNodes *SD);
136 
IsValid()137       bool IsValid() const { return Node != nullptr; }
138 
GetValue()139       MVT GetValue() const {
140         assert(IsValid() && "bad iterator");
141         return ValueType;
142       }
143 
GetNode()144       const SDNode *GetNode() const {
145         return Node;
146       }
147 
GetIdx()148       unsigned GetIdx() const {
149         return DefIdx-1;
150       }
151 
152       void Advance();
153     private:
154       void InitNodeNumDefs();
155     };
156 
157   protected:
158     /// ForceUnitLatencies - Return true if all scheduling edges should be given
159     /// a latency value of one.  The default is to return false; schedulers may
160     /// override this as needed.
forceUnitLatencies()161     virtual bool forceUnitLatencies() const { return false; }
162 
163   private:
164     /// ClusterNeighboringLoads - Cluster loads from "near" addresses into
165     /// combined SUnits.
166     void ClusterNeighboringLoads(SDNode *Node);
167     /// ClusterNodes - Cluster certain nodes which should be scheduled together.
168     ///
169     void ClusterNodes();
170 
171     /// BuildSchedUnits, AddSchedEdges - Helper functions for BuildSchedGraph.
172     void BuildSchedUnits();
173     void AddSchedEdges();
174 
175     void EmitPhysRegCopy(SUnit *SU, DenseMap<SUnit*, unsigned> &VRBaseMap,
176                          MachineBasicBlock::iterator InsertPos);
177   };
178 }
179 
180 #endif
181