/external/opencv3/modules/core/include/opencv2/core/cuda/ |
D | warp.hpp | 97 unsigned int lane = laneId(); in transform() local 109 const unsigned int lane = laneId(); in reduce() local 128 unsigned int lane = laneId(); in yota() local
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D | scan.hpp | 68 const unsigned int lane = idx & 31; in operator ()() local 102 const unsigned int lane = threadIdx.x & 31; in operator ()() local 143 const unsigned int lane = tid & warp_mask; in operator ()() local
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D | warp_reduce.hpp | 57 const unsigned int lane = tid & 31; // index of thread in warp (0..31) in warp_reduce() local
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/external/opencv3/modules/cudev/include/opencv2/cudev/warp/ |
D | warp.hpp | 104 uint lane = Warp::laneId(); in warpTransform() local 116 uint lane = Warp::laneId(); in warpYota() local
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/external/vixl/test/ |
D | test-simulator-a64.cc | 1295 for (unsigned lane = 0; lane < vd_lane_count; lane++) { in Test1OpNEON() local 1318 for (unsigned lane = 0; lane < vd_lane_count; lane++) { in Test1OpNEON() local 1336 for (unsigned lane = 0; in Test1OpNEON() local 1486 for (unsigned lane = 0; lane < vd_lane_count; lane++) { in Test1OpAcrossNEON() local 1509 for (unsigned lane = 0; lane < vd_lane_count; lane++) { in Test1OpAcrossNEON() local 1534 for (unsigned lane = 0; lane < vn_lane_count; lane++) { in Test1OpAcrossNEON() local 1717 for (unsigned lane = 0; lane < vd_lane_count; lane++) { in Test2OpNEON() local 1741 for (unsigned lane = 0; lane < vd_lane_count; lane++) { in Test2OpNEON() local 1759 for (unsigned lane = 0; lane < vd_lane_count; lane++) { in Test2OpNEON() local 1954 for (unsigned lane = 0; lane < vd_lane_count; lane++) { in TestByElementNEON() local [all …]
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/external/vixl/src/vixl/a64/ |
D | macro-assembler-a64.h | 2555 int lane, in Ld1() 2576 int lane, in Ld2() 2600 int lane, in Ld3() 2627 int lane, in Ld4() 2750 int lane, in St1() 2782 int lane, in St2() 2791 int lane, in St3() 2801 int lane, in St4()
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D | simulator-a64.cc | 650 for (int lane = leftmost_lane; lane >= rightmost_lane; lane--) { in PrintVRegisterFPHelper() local 745 unsigned lane) { in PrintVRead() 776 unsigned lane) { in PrintVWrite() 3212 int lane = instr->NEONLSIndex(index_shift); in NEONLoadStoreSingleStructHelper() local
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D | assembler-a64.cc | 2087 int lane, in ld2() 2120 int lane, in ld3() 2156 int lane, in ld4() 2228 int lane, in st2() 2251 int lane, in st3() 2276 int lane, in st4() 2286 uint32_t lane, in LoadStoreStructSingle() 2320 int lane, in ld1() 2333 int lane, in st1()
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D | simulator-a64.h | 291 void Insert(int lane, T new_value) { in Insert()
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/external/v8/src/js/ |
D | harmony-simd.js | 101 function NAMEExtractLaneJS(instance, lane) { argument 150 function NAMEReplaceLaneJS(instance, lane, value) { argument
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/external/gemmlowp/meta/generators/ |
D | mul_Nx8_Mx8_neon.py | 24 def AddLane(self, lane): argument
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D | neon_emitter.py | 350 def Lane(self, value, lane): argument
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/external/opencv3/modules/videoio/src/ |
D | cap_mjpeg_encoder.cpp | 1290 uint16x8_t lane = vld1q_u16((unsigned short*)(pix_data+v_plane_ofs)); in writeFrameData() local 1306 int16x8_t lane = vreinterpretq_s16_u16(vmovl_u8(vld1_u8(pix_data))); in writeFrameData() local
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/external/mesa3d/src/gallium/drivers/nv50/codegen/ |
D | nv50_ir_emit_nv50.cpp | 779 CodeEmitterNV50::emitQUADOP(const Instruction *i, uint8_t lane, uint8_t quOp) in emitQUADOP()
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/external/valgrind/VEX/priv/ |
D | guest_arm64_toIR.c | 8740 IRExpr* lane = getQRegLane(nn, laneNo, Ity_I8); in dis_AdvSIMD_copy() local 8747 IRExpr* lane = getQRegLane(nn, laneNo, Ity_I8); in dis_AdvSIMD_copy() local 8754 IRExpr* lane = getQRegLane(nn, laneNo, Ity_I16); in dis_AdvSIMD_copy() local 8761 IRExpr* lane = getQRegLane(nn, laneNo, Ity_I16); in dis_AdvSIMD_copy() local 8768 IRExpr* lane = getQRegLane(nn, laneNo, Ity_I32); in dis_AdvSIMD_copy() local 8775 IRExpr* lane = getQRegLane(nn, laneNo, Ity_I32); in dis_AdvSIMD_copy() local 8782 IRExpr* lane = getQRegLane(nn, laneNo, Ity_I64); in dis_AdvSIMD_copy() local
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D | guest_x86_toIR.c | 8879 Int lane; in disInstr_X86_WRK() local 10969 Int lane; in disInstr_X86_WRK() local
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D | guest_amd64_toIR.c | 14234 Int lane; in dis_ESC_0F__SSE2() local 14275 Int lane; in dis_ESC_0F__SSE2() local 27755 IRExpr* lane = (laneIs32 ? getYMMRegLane32 : getYMMRegLane64)( rV, i ); in dis_VMASKMOV() local
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