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Image becomes periodic. 93 nppStBorderMirror = 3 ///< reflect out of range position across borders 94 }; 95 96 97 /** 98 * Filter types for image resizing 99 */ 100 enum NppStInterpMode 101 { 102 nppStSupersample, ///< Supersampling. For downscaling only 103 nppStBicubic ///< Bicubic convolution filter, a = -0.5 (cubic Hermite spline) 104 }; 105 106 107 /** Frame interpolation state 108 * 109 * This structure holds parameters required for frame interpolation. 110 * Forward displacement field is a per-pixel mapping from frame 0 to frame 1. 111 * Backward displacement field is a per-pixel mapping from frame 1 to frame 0. 112 */ 113 114 struct NppStInterpolationState 115 { 116 NcvSize32u size; ///< frame size 117 Ncv32u nStep; ///< pitch 118 Ncv32f pos; ///< new frame position 119 Ncv32f *pSrcFrame0; ///< frame 0 120 Ncv32f *pSrcFrame1; ///< frame 1 121 Ncv32f *pFU; ///< forward horizontal displacement 122 Ncv32f *pFV; ///< forward vertical displacement 123 Ncv32f *pBU; ///< backward horizontal displacement 124 Ncv32f *pBV; ///< backward vertical displacement 125 Ncv32f *pNewFrame; ///< new frame 126 Ncv32f *ppBuffers[6]; ///< temporary buffers 127 }; 128 129 130 /** Size of a buffer required for interpolation. 131 * 132 * Requires several such buffers. See \see NppStInterpolationState. 133 * 134 * \param srcSize [IN] Frame size (both frames must be of the same size) 135 * \param nStep [IN] Frame line step 136 * \param hpSize [OUT] Where to store computed size (host memory) 137 * 138 * \return NCV status code 139 */ 140 CV_EXPORTS 141 NCVStatus nppiStGetInterpolationBufferSize(NcvSize32u srcSize, 142 Ncv32u nStep, 143 Ncv32u *hpSize); 144 145 146 /** Interpolate frames (images) using provided optical flow (displacement field). 147 * 32-bit floating point images, single channel 148 * 149 * \param pState [IN] structure containing all required parameters (host memory) 150 * 151 * \return NCV status code 152 */ 153 CV_EXPORTS 154 NCVStatus nppiStInterpolateFrames(const NppStInterpolationState *pState); 155 156 157 /** Row linear filter. 32-bit floating point image, single channel 158 * 159 * Apply horizontal linear filter 160 * 161 * \param pSrc [IN] Source image pointer (CUDA device memory) 162 * \param srcSize [IN] Source image size 163 * \param nSrcStep [IN] Source image line step 164 * \param pDst [OUT] Destination image pointer (CUDA device memory) 165 * \param dstSize [OUT] Destination image size 166 * \param nDstStep 167 * \param oROI [IN] Region of interest in the source image 168 * \param borderType [IN] Type of border 169 * \param pKernel [IN] Pointer to row kernel values (CUDA device memory) 170 * \param nKernelSize [IN] Size of the kernel in pixels 171 * \param nAnchor [IN] The kernel row alignment with respect to the position of the input pixel 172 * \param multiplier [IN] Value by which the computed result is multiplied 173 * 174 * \return NCV status code 175 */ 176 CV_EXPORTS 177 NCVStatus nppiStFilterRowBorder_32f_C1R(const Ncv32f *pSrc, 178 NcvSize32u srcSize, 179 Ncv32u nSrcStep, 180 Ncv32f *pDst, 181 NcvSize32u dstSize, 182 Ncv32u nDstStep, 183 NcvRect32u oROI, 184 NppStBorderType borderType, 185 const Ncv32f *pKernel, 186 Ncv32s nKernelSize, 187 Ncv32s nAnchor, 188 Ncv32f multiplier); 189 190 191 /** Column linear filter. 32-bit floating point image, single channel 192 * 193 * Apply vertical linear filter 194 * 195 * \param pSrc [IN] Source image pointer (CUDA device memory) 196 * \param srcSize [IN] Source image size 197 * \param nSrcStep [IN] Source image line step 198 * \param pDst [OUT] Destination image pointer (CUDA device memory) 199 * \param dstSize [OUT] Destination image size 200 * \param nDstStep [IN] 201 * \param oROI [IN] Region of interest in the source image 202 * \param borderType [IN] Type of border 203 * \param pKernel [IN] Pointer to column kernel values (CUDA device memory) 204 * \param nKernelSize [IN] Size of the kernel in pixels 205 * \param nAnchor [IN] The kernel column alignment with respect to the position of the input pixel 206 * \param multiplier [IN] Value by which the computed result is multiplied 207 * 208 * \return NCV status code 209 */ 210 CV_EXPORTS 211 NCVStatus nppiStFilterColumnBorder_32f_C1R(const Ncv32f *pSrc, 212 NcvSize32u srcSize, 213 Ncv32u nSrcStep, 214 Ncv32f *pDst, 215 NcvSize32u dstSize, 216 Ncv32u nDstStep, 217 NcvRect32u oROI, 218 NppStBorderType borderType, 219 const Ncv32f *pKernel, 220 Ncv32s nKernelSize, 221 Ncv32s nAnchor, 222 Ncv32f multiplier); 223 224 225 /** Size of buffer required for vector image warping. 226 * 227 * \param srcSize [IN] Source image size 228 * \param nSrcStep [IN] Source image line step 229 * \param hpSize [OUT] Where to store computed size (host memory) 230 * 231 * \return NCV status code 232 */ 233 CV_EXPORTS 234 NCVStatus nppiStVectorWarpGetBufferSize(NcvSize32u srcSize, 235 Ncv32u nSrcStep, 236 Ncv32u *hpSize); 237 238 239 /** Warp image using provided 2D vector field and 1x1 point spread function. 240 * 32-bit floating point image, single channel 241 * 242 * During warping pixels from the source image may fall between pixels of the destination image. 243 * PSF (point spread function) describes how the source image pixel affects pixels of the destination. 244 * For 1x1 PSF only single pixel with the largest intersection is affected (similar to nearest interpolation). 245 * 246 * Destination image size and line step must be the same as the source image size and line step 247 * 248 * \param pSrc [IN] Source image pointer (CUDA device memory) 249 * \param srcSize [IN] Source image size 250 * \param nSrcStep [IN] Source image line step 251 * \param pU [IN] Pointer to horizontal displacement field (CUDA device memory) 252 * \param pV [IN] Pointer to vertical displacement field (CUDA device memory) 253 * \param nVFStep [IN] Displacement field line step 254 * \param timeScale [IN] Value by which displacement field will be scaled for warping 255 * \param pDst [OUT] Destination image pointer (CUDA device memory) 256 * 257 * \return NCV status code 258 */ 259 CV_EXPORTS 260 NCVStatus nppiStVectorWarp_PSF1x1_32f_C1(const Ncv32f *pSrc, 261 NcvSize32u srcSize, 262 Ncv32u nSrcStep, 263 const Ncv32f *pU, 264 const Ncv32f *pV, 265 Ncv32u nVFStep, 266 Ncv32f timeScale, 267 Ncv32f *pDst); 268 269 270 /** Warp image using provided 2D vector field and 2x2 point spread function. 271 * 32-bit floating point image, single channel 272 * 273 * During warping pixels from the source image may fall between pixels of the destination image. 274 * PSF (point spread function) describes how the source image pixel affects pixels of the destination. 275 * For 2x2 PSF all four intersected pixels will be affected. 276 * 277 * Destination image size and line step must be the same as the source image size and line step 278 * 279 * \param pSrc [IN] Source image pointer (CUDA device memory) 280 * \param srcSize [IN] Source image size 281 * \param nSrcStep [IN] Source image line step 282 * \param pU [IN] Pointer to horizontal displacement field (CUDA device memory) 283 * \param pV [IN] Pointer to vertical displacement field (CUDA device memory) 284 * \param nVFStep [IN] Displacement field line step 285 * \param pBuffer 286 * \param timeScale [IN] Value by which displacement field will be scaled for warping 287 * \param pDst [OUT] Destination image pointer (CUDA device memory) 288 * 289 * \return NCV status code 290 */ 291 CV_EXPORTS 292 NCVStatus nppiStVectorWarp_PSF2x2_32f_C1(const Ncv32f *pSrc, 293 NcvSize32u srcSize, 294 Ncv32u nSrcStep, 295 const Ncv32f *pU, 296 const Ncv32f *pV, 297 Ncv32u nVFStep, 298 Ncv32f *pBuffer, 299 Ncv32f timeScale, 300 Ncv32f *pDst); 301 302 303 /** Resize. 32-bit floating point image, single channel 304 * 305 * Resizes image using specified filter (interpolation type) 306 * 307 * \param pSrc [IN] Source image pointer (CUDA device memory) 308 * \param srcSize [IN] Source image size 309 * \param nSrcStep [IN] Source image line step 310 * \param srcROI [IN] Source image region of interest 311 * \param pDst [OUT] Destination image pointer (CUDA device memory) 312 * \param dstSize [IN] Destination image size 313 * \param nDstStep [IN] Destination image line step 314 * \param dstROI [IN] Destination image region of interest 315 * \param xFactor [IN] Row scale factor 316 * \param yFactor [IN] Column scale factor 317 * \param interpolation [IN] Interpolation type 318 * 319 * \return NCV status code 320 */ 321 CV_EXPORTS 322 NCVStatus nppiStResize_32f_C1R(const Ncv32f *pSrc, 323 NcvSize32u srcSize, 324 Ncv32u nSrcStep, 325 NcvRect32u srcROI, 326 Ncv32f *pDst, 327 NcvSize32u dstSize, 328 Ncv32u nDstStep, 329 NcvRect32u dstROI, 330 Ncv32f xFactor, 331 Ncv32f yFactor, 332 NppStInterpMode interpolation); 333 334 335 /** 336 * Downsamples (decimates) an image using the nearest neighbor algorithm. 32-bit unsigned pixels, single channel. 337 * 338 * \param d_src [IN] Source image pointer (CUDA device memory) 339 * \param srcStep [IN] Source image line step 340 * \param d_dst [OUT] Destination image pointer (CUDA device memory) 341 * \param dstStep [IN] Destination image line step 342 * \param srcRoi [IN] Region of interest in the source image 343 * \param scale [IN] Downsampling scale factor (positive integer) 344 * \param readThruTexture [IN] Performance hint to cache source in texture (true) or read directly (false) 345 * 346 * \return NCV status code 347 */ 348 CV_EXPORTS 349 NCVStatus nppiStDecimate_32u_C1R(Ncv32u *d_src, Ncv32u srcStep, 350 Ncv32u *d_dst, Ncv32u dstStep, 351 NcvSize32u srcRoi, Ncv32u scale, 352 NcvBool readThruTexture); 353 354 355 /** 356 * Downsamples (decimates) an image using the nearest neighbor algorithm. 32-bit signed pixels, single channel. 357 * \see nppiStDecimate_32u_C1R 358 */ 359 CV_EXPORTS 360 NCVStatus nppiStDecimate_32s_C1R(Ncv32s *d_src, Ncv32u srcStep, 361 Ncv32s *d_dst, Ncv32u dstStep, 362 NcvSize32u srcRoi, Ncv32u scale, 363 NcvBool readThruTexture); 364 365 366 /** 367 * Downsamples (decimates) an image using the nearest neighbor algorithm. 32-bit float pixels, single channel. 368 * \see nppiStDecimate_32u_C1R 369 */ 370 CV_EXPORTS 371 NCVStatus nppiStDecimate_32f_C1R(Ncv32f *d_src, Ncv32u srcStep, 372 Ncv32f *d_dst, Ncv32u dstStep, 373 NcvSize32u srcRoi, Ncv32u scale, 374 NcvBool readThruTexture); 375 376 377 /** 378 * Downsamples (decimates) an image using the nearest neighbor algorithm. 64-bit unsigned pixels, single channel. 379 * \see nppiStDecimate_32u_C1R 380 */ 381 CV_EXPORTS 382 NCVStatus nppiStDecimate_64u_C1R(Ncv64u *d_src, Ncv32u srcStep, 383 Ncv64u *d_dst, Ncv32u dstStep, 384 NcvSize32u srcRoi, Ncv32u scale, 385 NcvBool readThruTexture); 386 387 388 /** 389 * Downsamples (decimates) an image using the nearest neighbor algorithm. 64-bit signed pixels, single channel. 390 * \see nppiStDecimate_32u_C1R 391 */ 392 CV_EXPORTS 393 NCVStatus nppiStDecimate_64s_C1R(Ncv64s *d_src, Ncv32u srcStep, 394 Ncv64s *d_dst, Ncv32u dstStep, 395 NcvSize32u srcRoi, Ncv32u scale, 396 NcvBool readThruTexture); 397 398 399 /** 400 * Downsamples (decimates) an image using the nearest neighbor algorithm. 64-bit float pixels, single channel. 401 * \see nppiStDecimate_32u_C1R 402 */ 403 CV_EXPORTS 404 NCVStatus nppiStDecimate_64f_C1R(Ncv64f *d_src, Ncv32u srcStep, 405 Ncv64f *d_dst, Ncv32u dstStep, 406 NcvSize32u srcRoi, Ncv32u scale, 407 NcvBool readThruTexture); 408 409 410 /** 411 * Downsamples (decimates) an image using the nearest neighbor algorithm. 32-bit unsigned pixels, single channel. Host implementation. 412 * 413 * \param h_src [IN] Source image pointer (Host or pinned memory) 414 * \param srcStep [IN] Source image line step 415 * \param h_dst [OUT] Destination image pointer (Host or pinned memory) 416 * \param dstStep [IN] Destination image line step 417 * \param srcRoi [IN] Region of interest in the source image 418 * \param scale [IN] Downsampling scale factor (positive integer) 419 * 420 * \return NCV status code 421 */ 422 CV_EXPORTS 423 NCVStatus nppiStDecimate_32u_C1R_host(Ncv32u *h_src, Ncv32u srcStep, 424 Ncv32u *h_dst, Ncv32u dstStep, 425 NcvSize32u srcRoi, Ncv32u scale); 426 427 428 /** 429 * Downsamples (decimates) an image using the nearest neighbor algorithm. 32-bit signed pixels, single channel. Host implementation. 430 * \see nppiStDecimate_32u_C1R_host 431 */ 432 CV_EXPORTS 433 NCVStatus nppiStDecimate_32s_C1R_host(Ncv32s *h_src, Ncv32u srcStep, 434 Ncv32s *h_dst, Ncv32u dstStep, 435 NcvSize32u srcRoi, Ncv32u scale); 436 437 438 /** 439 * Downsamples (decimates) an image using the nearest neighbor algorithm. 32-bit float pixels, single channel. Host implementation. 440 * \see nppiStDecimate_32u_C1R_host 441 */ 442 CV_EXPORTS 443 NCVStatus nppiStDecimate_32f_C1R_host(Ncv32f *h_src, Ncv32u srcStep, 444 Ncv32f *h_dst, Ncv32u dstStep, 445 NcvSize32u srcRoi, Ncv32u scale); 446 447 448 /** 449 * Downsamples (decimates) an image using the nearest neighbor algorithm. 64-bit unsigned pixels, single channel. Host implementation. 450 * \see nppiStDecimate_32u_C1R_host 451 */ 452 CV_EXPORTS 453 NCVStatus nppiStDecimate_64u_C1R_host(Ncv64u *h_src, Ncv32u srcStep, 454 Ncv64u *h_dst, Ncv32u dstStep, 455 NcvSize32u srcRoi, Ncv32u scale); 456 457 458 /** 459 * Downsamples (decimates) an image using the nearest neighbor algorithm. 64-bit signed pixels, single channel. Host implementation. 460 * \see nppiStDecimate_32u_C1R_host 461 */ 462 CV_EXPORTS 463 NCVStatus nppiStDecimate_64s_C1R_host(Ncv64s *h_src, Ncv32u srcStep, 464 Ncv64s *h_dst, Ncv32u dstStep, 465 NcvSize32u srcRoi, Ncv32u scale); 466 467 468 /** 469 * Downsamples (decimates) an image using the nearest neighbor algorithm. 64-bit float pixels, single channel. Host implementation. 470 * \see nppiStDecimate_32u_C1R_host 471 */ 472 CV_EXPORTS 473 NCVStatus nppiStDecimate_64f_C1R_host(Ncv64f *h_src, Ncv32u srcStep, 474 Ncv64f *h_dst, Ncv32u dstStep, 475 NcvSize32u srcRoi, Ncv32u scale); 476 477 478 /** 479 * Computes standard deviation for each rectangular region of the input image using integral images. 480 * 481 * \param d_sum [IN] Integral image pointer (CUDA device memory) 482 * \param sumStep [IN] Integral image line step 483 * \param d_sqsum [IN] Squared integral image pointer (CUDA device memory) 484 * \param sqsumStep [IN] Squared integral image line step 485 * \param d_norm [OUT] Stddev image pointer (CUDA device memory). Each pixel contains stddev of a rect with top-left corner at the original location in the image 486 * \param normStep [IN] Stddev image line step 487 * \param roi [IN] Region of interest in the source image 488 * \param rect [IN] Rectangular region to calculate stddev over 489 * \param scaleArea [IN] Multiplication factor to account decimated scale 490 * \param readThruTexture [IN] Performance hint to cache source in texture (true) or read directly (false) 491 * 492 * \return NCV status code 493 */ 494 CV_EXPORTS 495 NCVStatus nppiStRectStdDev_32f_C1R(Ncv32u *d_sum, Ncv32u sumStep, 496 Ncv64u *d_sqsum, Ncv32u sqsumStep, 497 Ncv32f *d_norm, Ncv32u normStep, 498 NcvSize32u roi, NcvRect32u rect, 499 Ncv32f scaleArea, NcvBool readThruTexture); 500 501 502 /** 503 * Computes standard deviation for each rectangular region of the input image using integral images. Host implementation 504 * 505 * \param h_sum [IN] Integral image pointer (Host or pinned memory) 506 * \param sumStep [IN] Integral image line step 507 * \param h_sqsum [IN] Squared integral image pointer (Host or pinned memory) 508 * \param sqsumStep [IN] Squared integral image line step 509 * \param h_norm [OUT] Stddev image pointer (Host or pinned memory). Each pixel contains stddev of a rect with top-left corner at the original location in the image 510 * \param normStep [IN] Stddev image line step 511 * \param roi [IN] Region of interest in the source image 512 * \param rect [IN] Rectangular region to calculate stddev over 513 * \param scaleArea [IN] Multiplication factor to account decimated scale 514 * 515 * \return NCV status code 516 */ 517 CV_EXPORTS 518 NCVStatus nppiStRectStdDev_32f_C1R_host(Ncv32u *h_sum, Ncv32u sumStep, 519 Ncv64u *h_sqsum, Ncv32u sqsumStep, 520 Ncv32f *h_norm, Ncv32u normStep, 521 NcvSize32u roi, NcvRect32u rect, 522 Ncv32f scaleArea); 523 524 525 /** 526 * Transposes an image. 32-bit unsigned pixels, single channel 527 * 528 * \param d_src [IN] Source image pointer (CUDA device memory) 529 * \param srcStride [IN] Source image line step 530 * \param d_dst [OUT] Destination image pointer (CUDA device memory) 531 * \param dstStride [IN] Destination image line step 532 * \param srcRoi [IN] Region of interest of the source image 533 * 534 * \return NCV status code 535 */ 536 CV_EXPORTS 537 NCVStatus nppiStTranspose_32u_C1R(Ncv32u *d_src, Ncv32u srcStride, 538 Ncv32u *d_dst, Ncv32u dstStride, NcvSize32u srcRoi); 539 540 541 /** 542 * Transposes an image. 32-bit signed pixels, single channel 543 * \see nppiStTranspose_32u_C1R 544 */ 545 CV_EXPORTS 546 NCVStatus nppiStTranspose_32s_C1R(Ncv32s *d_src, Ncv32u srcStride, 547 Ncv32s *d_dst, Ncv32u dstStride, NcvSize32u srcRoi); 548 549 550 /** 551 * Transposes an image. 32-bit float pixels, single channel 552 * \see nppiStTranspose_32u_C1R 553 */ 554 CV_EXPORTS 555 NCVStatus nppiStTranspose_32f_C1R(Ncv32f *d_src, Ncv32u srcStride, 556 Ncv32f *d_dst, Ncv32u dstStride, NcvSize32u srcRoi); 557 558 559 /** 560 * Transposes an image. 64-bit unsigned pixels, single channel 561 * \see nppiStTranspose_32u_C1R 562 */ 563 CV_EXPORTS 564 NCVStatus nppiStTranspose_64u_C1R(Ncv64u *d_src, Ncv32u srcStride, 565 Ncv64u *d_dst, Ncv32u dstStride, NcvSize32u srcRoi); 566 567 568 /** 569 * Transposes an image. 64-bit signed pixels, single channel 570 * \see nppiStTranspose_32u_C1R 571 */ 572 CV_EXPORTS 573 NCVStatus nppiStTranspose_64s_C1R(Ncv64s *d_src, Ncv32u srcStride, 574 Ncv64s *d_dst, Ncv32u dstStride, NcvSize32u srcRoi); 575 576 577 /** 578 * Transposes an image. 64-bit float pixels, single channel 579 * \see nppiStTranspose_32u_C1R 580 */ 581 CV_EXPORTS 582 NCVStatus nppiStTranspose_64f_C1R(Ncv64f *d_src, Ncv32u srcStride, 583 Ncv64f *d_dst, Ncv32u dstStride, NcvSize32u srcRoi); 584 585 586 /** 587 * Transposes an image. 128-bit pixels of any type, single channel 588 * \see nppiStTranspose_32u_C1R 589 */ 590 CV_EXPORTS 591 NCVStatus nppiStTranspose_128_C1R(void *d_src, Ncv32u srcStep, 592 void *d_dst, Ncv32u dstStep, NcvSize32u srcRoi); 593 594 595 /** 596 * Transposes an image. 32-bit unsigned pixels, single channel. Host implementation 597 * 598 * \param h_src [IN] Source image pointer (Host or pinned memory) 599 * \param srcStride [IN] Source image line step 600 * \param h_dst [OUT] Destination image pointer (Host or pinned memory) 601 * \param dstStride [IN] Destination image line step 602 * \param srcRoi [IN] Region of interest of the source image 603 * 604 * \return NCV status code 605 */ 606 CV_EXPORTS 607 NCVStatus nppiStTranspose_32u_C1R_host(Ncv32u *h_src, Ncv32u srcStride, 608 Ncv32u *h_dst, Ncv32u dstStride, NcvSize32u srcRoi); 609 610 611 /** 612 * Transposes an image. 32-bit signed pixels, single channel. Host implementation 613 * \see nppiStTranspose_32u_C1R_host 614 */ 615 CV_EXPORTS 616 NCVStatus nppiStTranspose_32s_C1R_host(Ncv32s *h_src, Ncv32u srcStride, 617 Ncv32s *h_dst, Ncv32u dstStride, NcvSize32u srcRoi); 618 619 620 /** 621 * Transposes an image. 32-bit float pixels, single channel. Host implementation 622 * \see nppiStTranspose_32u_C1R_host 623 */ 624 CV_EXPORTS 625 NCVStatus nppiStTranspose_32f_C1R_host(Ncv32f *h_src, Ncv32u srcStride, 626 Ncv32f *h_dst, Ncv32u dstStride, NcvSize32u srcRoi); 627 628 629 /** 630 * Transposes an image. 64-bit unsigned pixels, single channel. Host implementation 631 * \see nppiStTranspose_32u_C1R_host 632 */ 633 CV_EXPORTS 634 NCVStatus nppiStTranspose_64u_C1R_host(Ncv64u *h_src, Ncv32u srcStride, 635 Ncv64u *h_dst, Ncv32u dstStride, NcvSize32u srcRoi); 636 637 638 /** 639 * Transposes an image. 64-bit signed pixels, single channel. Host implementation 640 * \see nppiStTranspose_32u_C1R_host 641 */ 642 CV_EXPORTS 643 NCVStatus nppiStTranspose_64s_C1R_host(Ncv64s *h_src, Ncv32u srcStride, 644 Ncv64s *h_dst, Ncv32u dstStride, NcvSize32u srcRoi); 645 646 647 /** 648 * Transposes an image. 64-bit float pixels, single channel. Host implementation 649 * \see nppiStTranspose_32u_C1R_host 650 */ 651 CV_EXPORTS 652 NCVStatus nppiStTranspose_64f_C1R_host(Ncv64f *h_src, Ncv32u srcStride, 653 Ncv64f *h_dst, Ncv32u dstStride, NcvSize32u srcRoi); 654 655 656 /** 657 * Transposes an image. 128-bit pixels of any type, single channel. Host implementation 658 * \see nppiStTranspose_32u_C1R_host 659 */ 660 CV_EXPORTS 661 NCVStatus nppiStTranspose_128_C1R_host(void *d_src, Ncv32u srcStep, 662 void *d_dst, Ncv32u dstStep, NcvSize32u srcRoi); 663 664 665 /** 666 * Calculates the size of the temporary buffer for integral image creation 667 * 668 * \param roiSize [IN] Size of the input image 669 * \param pBufsize [OUT] Pointer to host variable that returns the size of the temporary buffer (in bytes) 670 * \param devProp [IN] CUDA device properties structure, containing texture alignment information 671 * 672 * \return NCV status code 673 */ 674 CV_EXPORTS 675 NCVStatus nppiStIntegralGetSize_8u32u(NcvSize32u roiSize, Ncv32u *pBufsize, cudaDeviceProp &devProp); 676 677 678 /** 679 * Calculates the size of the temporary buffer for integral image creation 680 * \see nppiStIntegralGetSize_8u32u 681 */ 682 CV_EXPORTS 683 NCVStatus nppiStIntegralGetSize_32f32f(NcvSize32u roiSize, Ncv32u *pBufsize, cudaDeviceProp &devProp); 684 685 686 /** 687 * Creates an integral image representation for the input image 688 * 689 * \param d_src [IN] Source image pointer (CUDA device memory) 690 * \param srcStep [IN] Source image line step 691 * \param d_dst [OUT] Destination integral image pointer (CUDA device memory) 692 * \param dstStep [IN] Destination image line step 693 * \param roiSize [IN] Region of interest of the source image 694 * \param pBuffer [IN] Pointer to the pre-allocated temporary buffer (CUDA device memory) 695 * \param bufSize [IN] Size of the pBuffer in bytes 696 * \param devProp [IN] CUDA device properties structure, containing texture alignment information 697 * 698 * \return NCV status code 699 */ 700 CV_EXPORTS 701 NCVStatus nppiStIntegral_8u32u_C1R(Ncv8u *d_src, Ncv32u srcStep, 702 Ncv32u *d_dst, Ncv32u dstStep, NcvSize32u roiSize, 703 Ncv8u *pBuffer, Ncv32u bufSize, cudaDeviceProp &devProp); 704 705 706 /** 707 * Creates an integral image representation for the input image 708 * \see nppiStIntegral_8u32u_C1R 709 */ 710 CV_EXPORTS 711 NCVStatus nppiStIntegral_32f32f_C1R(Ncv32f *d_src, Ncv32u srcStep, 712 Ncv32f *d_dst, Ncv32u dstStep, NcvSize32u roiSize, 713 Ncv8u *pBuffer, Ncv32u bufSize, cudaDeviceProp &devProp); 714 715 716 /** 717 * Creates an integral image representation for the input image. Host implementation 718 * 719 * \param h_src [IN] Source image pointer (Host or pinned memory) 720 * \param srcStep [IN] Source image line step 721 * \param h_dst [OUT] Destination integral image pointer (Host or pinned memory) 722 * \param dstStep [IN] Destination image line step 723 * \param roiSize [IN] Region of interest of the source image 724 * 725 * \return NCV status code 726 */ 727 CV_EXPORTS 728 NCVStatus nppiStIntegral_8u32u_C1R_host(Ncv8u *h_src, Ncv32u srcStep, 729 Ncv32u *h_dst, Ncv32u dstStep, NcvSize32u roiSize); 730 731 732 /** 733 * Creates an integral image representation for the input image. Host implementation 734 * \see nppiStIntegral_8u32u_C1R_host 735 */ 736 CV_EXPORTS 737 NCVStatus nppiStIntegral_32f32f_C1R_host(Ncv32f *h_src, Ncv32u srcStep, 738 Ncv32f *h_dst, Ncv32u dstStep, NcvSize32u roiSize); 739 740 741 /** 742 * Calculates the size of the temporary buffer for squared integral image creation 743 * 744 * \param roiSize [IN] Size of the input image 745 * \param pBufsize [OUT] Pointer to host variable that returns the size of the temporary buffer (in bytes) 746 * \param devProp [IN] CUDA device properties structure, containing texture alignment information 747 * 748 * \return NCV status code 749 */ 750 CV_EXPORTS 751 NCVStatus nppiStSqrIntegralGetSize_8u64u(NcvSize32u roiSize, Ncv32u *pBufsize, cudaDeviceProp &devProp); 752 753 754 /** 755 * Creates a squared integral image representation for the input image 756 * 757 * \param d_src [IN] Source image pointer (CUDA device memory) 758 * \param srcStep [IN] Source image line step 759 * \param d_dst [OUT] Destination squared integral image pointer (CUDA device memory) 760 * \param dstStep [IN] Destination image line step 761 * \param roiSize [IN] Region of interest of the source image 762 * \param pBuffer [IN] Pointer to the pre-allocated temporary buffer (CUDA device memory) 763 * \param bufSize [IN] Size of the pBuffer in bytes 764 * \param devProp [IN] CUDA device properties structure, containing texture alignment information 765 * 766 * \return NCV status code 767 */ 768 CV_EXPORTS 769 NCVStatus nppiStSqrIntegral_8u64u_C1R(Ncv8u *d_src, Ncv32u srcStep, 770 Ncv64u *d_dst, Ncv32u dstStep, NcvSize32u roiSize, 771 Ncv8u *pBuffer, Ncv32u bufSize, cudaDeviceProp &devProp); 772 773 774 /** 775 * Creates a squared integral image representation for the input image. Host implementation 776 * 777 * \param h_src [IN] Source image pointer (Host or pinned memory) 778 * \param srcStep [IN] Source image line step 779 * \param h_dst [OUT] Destination squared integral image pointer (Host or pinned memory) 780 * \param dstStep [IN] Destination image line step 781 * \param roiSize [IN] Region of interest of the source image 782 * 783 * \return NCV status code 784 */ 785 CV_EXPORTS 786 NCVStatus nppiStSqrIntegral_8u64u_C1R_host(Ncv8u *h_src, Ncv32u srcStep, 787 Ncv64u *h_dst, Ncv32u dstStep, NcvSize32u roiSize); 788 789 790 /*@}*/ 791 792 793 /** \defgroup npps NPPST Signal Processing 794 * @{ 795 */ 796 797 798 /** 799 * Calculates the size of the temporary buffer for vector compaction. 32-bit unsigned values 800 * 801 * \param srcLen [IN] Length of the input vector in elements 802 * \param pBufsize [OUT] Pointer to host variable that returns the size of the temporary buffer (in bytes) 803 * \param devProp [IN] CUDA device properties structure, containing texture alignment information 804 * 805 * \return NCV status code 806 */ 807 CV_EXPORTS 808 NCVStatus nppsStCompactGetSize_32u(Ncv32u srcLen, Ncv32u *pBufsize, cudaDeviceProp &devProp); 809 810 811 /** 812 * Calculates the size of the temporary buffer for vector compaction. 32-bit signed values 813 * \see nppsStCompactGetSize_32u 814 */ 815 NCVStatus nppsStCompactGetSize_32s(Ncv32u srcLen, Ncv32u *pBufsize, cudaDeviceProp &devProp); 816 817 818 /** 819 * Calculates the size of the temporary buffer for vector compaction. 32-bit float values 820 * \see nppsStCompactGetSize_32u 821 */ 822 NCVStatus nppsStCompactGetSize_32f(Ncv32u srcLen, Ncv32u *pBufsize, cudaDeviceProp &devProp); 823 824 825 /** 826 * Compacts the input vector by removing elements of specified value. 32-bit unsigned values 827 * 828 * \param d_src [IN] Source vector pointer (CUDA device memory) 829 * \param srcLen [IN] Source vector length 830 * \param d_dst [OUT] Destination vector pointer (CUDA device memory) 831 * \param p_dstLen [OUT] Pointer to the destination vector length (Pinned memory or NULL) 832 * \param elemRemove [IN] The value to be removed 833 * \param pBuffer [IN] Pointer to the pre-allocated temporary buffer (CUDA device memory) 834 * \param bufSize [IN] Size of the pBuffer in bytes 835 * \param devProp [IN] CUDA device properties structure, containing texture alignment information 836 * 837 * \return NCV status code 838 */ 839 CV_EXPORTS 840 NCVStatus nppsStCompact_32u(Ncv32u *d_src, Ncv32u srcLen, 841 Ncv32u *d_dst, Ncv32u *p_dstLen, 842 Ncv32u elemRemove, Ncv8u *pBuffer, 843 Ncv32u bufSize, cudaDeviceProp &devProp); 844 845 846 /** 847 * Compacts the input vector by removing elements of specified value. 32-bit signed values 848 * \see nppsStCompact_32u 849 */ 850 CV_EXPORTS 851 NCVStatus nppsStCompact_32s(Ncv32s *d_src, Ncv32u srcLen, 852 Ncv32s *d_dst, Ncv32u *p_dstLen, 853 Ncv32s elemRemove, Ncv8u *pBuffer, 854 Ncv32u bufSize, cudaDeviceProp &devProp); 855 856 857 /** 858 * Compacts the input vector by removing elements of specified value. 32-bit float values 859 * \see nppsStCompact_32u 860 */ 861 CV_EXPORTS 862 NCVStatus nppsStCompact_32f(Ncv32f *d_src, Ncv32u srcLen, 863 Ncv32f *d_dst, Ncv32u *p_dstLen, 864 Ncv32f elemRemove, Ncv8u *pBuffer, 865 Ncv32u bufSize, cudaDeviceProp &devProp); 866 867 868 /** 869 * Compacts the input vector by removing elements of specified value. 32-bit unsigned values. Host implementation 870 * 871 * \param h_src [IN] Source vector pointer (CUDA device memory) 872 * \param srcLen [IN] Source vector length 873 * \param h_dst [OUT] Destination vector pointer (CUDA device memory) 874 * \param dstLen [OUT] Pointer to the destination vector length (can be NULL) 875 * \param elemRemove [IN] The value to be removed 876 * 877 * \return NCV status code 878 */ 879 CV_EXPORTS 880 NCVStatus nppsStCompact_32u_host(Ncv32u *h_src, Ncv32u srcLen, 881 Ncv32u *h_dst, Ncv32u *dstLen, Ncv32u elemRemove); 882 883 884 /** 885 * Compacts the input vector by removing elements of specified value. 32-bit signed values. Host implementation 886 * \see nppsStCompact_32u_host 887 */ 888 CV_EXPORTS 889 NCVStatus nppsStCompact_32s_host(Ncv32s *h_src, Ncv32u srcLen, 890 Ncv32s *h_dst, Ncv32u *dstLen, Ncv32s elemRemove); 891 892 893 /** 894 * Compacts the input vector by removing elements of specified value. 32-bit float values. Host implementation 895 * \see nppsStCompact_32u_host 896 */ 897 CV_EXPORTS 898 NCVStatus nppsStCompact_32f_host(Ncv32f *h_src, Ncv32u srcLen, 899 Ncv32f *h_dst, Ncv32u *dstLen, Ncv32f elemRemove); 900 901 902 /*@}*/ 903 904 //! @} 905 906 #endif // _npp_staging_hpp_ 907