1 /*
2  * Copyright 2008 Ben Skeggs
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
18  * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
19  * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
20  * SOFTWARE.
21  */
22 
23 #include <stdint.h>
24 
25 #include "pipe/p_defines.h"
26 
27 #include "util/u_inlines.h"
28 #include "util/u_pack_color.h"
29 #include "util/u_format.h"
30 #include "util/u_surface.h"
31 
32 #include "nv50_context.h"
33 #include "nv50_resource.h"
34 
35 #include "nv50_defs.xml.h"
36 #include "nv50_texture.xml.h"
37 
38 #define NV50_ENG2D_SUPPORTED_FORMATS 0xff0843e080608409ULL
39 
40 /* return TRUE for formats that can be converted among each other by NV50_2D */
41 static INLINE boolean
nv50_2d_format_faithful(enum pipe_format format)42 nv50_2d_format_faithful(enum pipe_format format)
43 {
44    uint8_t id = nv50_format_table[format].rt;
45 
46    return (id >= 0xc0) &&
47       (NV50_ENG2D_SUPPORTED_FORMATS & (1ULL << (id - 0xc0)));
48 }
49 
50 static INLINE uint8_t
nv50_2d_format(enum pipe_format format)51 nv50_2d_format(enum pipe_format format)
52 {
53    uint8_t id = nv50_format_table[format].rt;
54 
55    /* Hardware values for color formats range from 0xc0 to 0xff,
56     * but the 2D engine doesn't support all of them.
57     */
58    if ((id >= 0xc0) && (NV50_ENG2D_SUPPORTED_FORMATS & (1ULL << (id - 0xc0))))
59       return id;
60 
61    switch (util_format_get_blocksize(format)) {
62    case 1:
63       return NV50_SURFACE_FORMAT_R8_UNORM;
64    case 2:
65       return NV50_SURFACE_FORMAT_R16_UNORM;
66    case 4:
67       return NV50_SURFACE_FORMAT_BGRA8_UNORM;
68    default:
69       return 0;
70    }
71 }
72 
73 static int
nv50_2d_texture_set(struct nouveau_pushbuf * push,int dst,struct nv50_miptree * mt,unsigned level,unsigned layer)74 nv50_2d_texture_set(struct nouveau_pushbuf *push, int dst,
75                     struct nv50_miptree *mt, unsigned level, unsigned layer)
76 {
77    struct nouveau_bo *bo = mt->base.bo;
78    uint32_t width, height, depth;
79    uint32_t format;
80    uint32_t mthd = dst ? NV50_2D_DST_FORMAT : NV50_2D_SRC_FORMAT;
81    uint32_t offset = mt->level[level].offset;
82 
83    format = nv50_2d_format(mt->base.base.format);
84    if (!format) {
85       NOUVEAU_ERR("invalid/unsupported surface format: %s\n",
86                   util_format_name(mt->base.base.format));
87       return 1;
88    }
89 
90    width = u_minify(mt->base.base.width0, level) << mt->ms_x;
91    height = u_minify(mt->base.base.height0, level) << mt->ms_y;
92 
93    offset = mt->level[level].offset;
94    if (!mt->layout_3d) {
95       offset += mt->layer_stride * layer;
96       depth = 1;
97       layer = 0;
98    } else {
99       depth = u_minify(mt->base.base.depth0, level);
100    }
101 
102    if (!nouveau_bo_memtype(bo)) {
103       BEGIN_NV04(push, SUBC_2D(mthd), 2);
104       PUSH_DATA (push, format);
105       PUSH_DATA (push, 1);
106       BEGIN_NV04(push, SUBC_2D(mthd + 0x14), 5);
107       PUSH_DATA (push, mt->level[level].pitch);
108       PUSH_DATA (push, width);
109       PUSH_DATA (push, height);
110       PUSH_DATAh(push, bo->offset + offset);
111       PUSH_DATA (push, bo->offset + offset);
112    } else {
113       BEGIN_NV04(push, SUBC_2D(mthd), 5);
114       PUSH_DATA (push, format);
115       PUSH_DATA (push, 0);
116       PUSH_DATA (push, mt->level[level].tile_mode);
117       PUSH_DATA (push, depth);
118       PUSH_DATA (push, layer);
119       BEGIN_NV04(push, SUBC_2D(mthd + 0x18), 4);
120       PUSH_DATA (push, width);
121       PUSH_DATA (push, height);
122       PUSH_DATAh(push, bo->offset + offset);
123       PUSH_DATA (push, bo->offset + offset);
124    }
125 
126 #if 0
127    if (dst) {
128       BEGIN_NV04(push, SUBC_2D(NV50_2D_CLIP_X), 4);
129       PUSH_DATA (push, 0);
130       PUSH_DATA (push, 0);
131       PUSH_DATA (push, width);
132       PUSH_DATA (push, height);
133    }
134 #endif
135    return 0;
136 }
137 
138 static int
nv50_2d_texture_do_copy(struct nouveau_pushbuf * push,struct nv50_miptree * dst,unsigned dst_level,unsigned dx,unsigned dy,unsigned dz,struct nv50_miptree * src,unsigned src_level,unsigned sx,unsigned sy,unsigned sz,unsigned w,unsigned h)139 nv50_2d_texture_do_copy(struct nouveau_pushbuf *push,
140                         struct nv50_miptree *dst, unsigned dst_level,
141                         unsigned dx, unsigned dy, unsigned dz,
142                         struct nv50_miptree *src, unsigned src_level,
143                         unsigned sx, unsigned sy, unsigned sz,
144                         unsigned w, unsigned h)
145 {
146    static const uint32_t duvdxy[5] =
147    {
148       0x40000000, 0x80000000, 0x00000001, 0x00000002, 0x00000004
149    };
150 
151    int ret;
152    uint32_t ctrl;
153 #if 0
154    ret = MARK_RING(chan, 2 * 16 + 32, 4);
155    if (ret)
156       return ret;
157 #endif
158    ret = nv50_2d_texture_set(push, 1, dst, dst_level, dz);
159    if (ret)
160       return ret;
161 
162    ret = nv50_2d_texture_set(push, 0, src, src_level, sz);
163    if (ret)
164       return ret;
165 
166    /* NOTE: 2D engine doesn't work for MS8 */
167    if (src->ms_x)
168       ctrl = 0x11;
169 
170    /* 0/1 = CENTER/CORNER, 00/10 = POINT/BILINEAR */
171    BEGIN_NV04(push, NV50_2D(BLIT_CONTROL), 1);
172    PUSH_DATA (push, ctrl);
173    BEGIN_NV04(push, NV50_2D(BLIT_DST_X), 4);
174    PUSH_DATA (push, dx << dst->ms_x);
175    PUSH_DATA (push, dy << dst->ms_y);
176    PUSH_DATA (push, w << dst->ms_x);
177    PUSH_DATA (push, h << dst->ms_y);
178    BEGIN_NV04(push, NV50_2D(BLIT_DU_DX_FRACT), 4);
179    PUSH_DATA (push, duvdxy[2 + ((int)src->ms_x - (int)dst->ms_x)] & 0xf0000000);
180    PUSH_DATA (push, duvdxy[2 + ((int)src->ms_x - (int)dst->ms_x)] & 0x0000000f);
181    PUSH_DATA (push, duvdxy[2 + ((int)src->ms_y - (int)dst->ms_y)] & 0xf0000000);
182    PUSH_DATA (push, duvdxy[2 + ((int)src->ms_y - (int)dst->ms_y)] & 0x0000000f);
183    BEGIN_NV04(push, NV50_2D(BLIT_SRC_X_FRACT), 4);
184    PUSH_DATA (push, 0);
185    PUSH_DATA (push, sx << src->ms_x);
186    PUSH_DATA (push, 0);
187    PUSH_DATA (push, sy << src->ms_y);
188 
189    return 0;
190 }
191 
192 static void
nv50_resource_copy_region(struct pipe_context * pipe,struct pipe_resource * dst,unsigned dst_level,unsigned dstx,unsigned dsty,unsigned dstz,struct pipe_resource * src,unsigned src_level,const struct pipe_box * src_box)193 nv50_resource_copy_region(struct pipe_context *pipe,
194                           struct pipe_resource *dst, unsigned dst_level,
195                           unsigned dstx, unsigned dsty, unsigned dstz,
196                           struct pipe_resource *src, unsigned src_level,
197                           const struct pipe_box *src_box)
198 {
199    struct nv50_context *nv50 = nv50_context(pipe);
200    int ret;
201    boolean m2mf;
202    unsigned dst_layer = dstz, src_layer = src_box->z;
203 
204    /* Fallback for buffers. */
205    if (dst->target == PIPE_BUFFER && src->target == PIPE_BUFFER) {
206       util_resource_copy_region(pipe, dst, dst_level, dstx, dsty, dstz,
207                                 src, src_level, src_box);
208       return;
209    }
210 
211    /* 0 and 1 are equal, only supporting 0/1, 2, 4 and 8 */
212    assert((src->nr_samples | 1) == (dst->nr_samples | 1));
213 
214    m2mf = (src->format == dst->format) ||
215       (util_format_get_blocksizebits(src->format) ==
216        util_format_get_blocksizebits(dst->format));
217 
218    nv04_resource(dst)->status |= NOUVEAU_BUFFER_STATUS_GPU_WRITING;
219 
220    if (m2mf) {
221       struct nv50_m2mf_rect drect, srect;
222       unsigned i;
223       unsigned nx = util_format_get_nblocksx(src->format, src_box->width);
224       unsigned ny = util_format_get_nblocksy(src->format, src_box->height);
225 
226       nv50_m2mf_rect_setup(&drect, dst, dst_level, dstx, dsty, dstz);
227       nv50_m2mf_rect_setup(&srect, src, src_level,
228                            src_box->x, src_box->y, src_box->z);
229 
230       for (i = 0; i < src_box->depth; ++i) {
231          nv50_m2mf_transfer_rect(nv50, &drect, &srect, nx, ny);
232 
233          if (nv50_miptree(dst)->layout_3d)
234             drect.z++;
235          else
236             drect.base += nv50_miptree(dst)->layer_stride;
237 
238          if (nv50_miptree(src)->layout_3d)
239             srect.z++;
240          else
241             srect.base += nv50_miptree(src)->layer_stride;
242       }
243       return;
244    }
245 
246    assert((src->format == dst->format) ||
247           (nv50_2d_format_faithful(src->format) &&
248            nv50_2d_format_faithful(dst->format)));
249 
250    BCTX_REFN(nv50->bufctx, 2D, nv04_resource(src), RD);
251    BCTX_REFN(nv50->bufctx, 2D, nv04_resource(dst), WR);
252    nouveau_pushbuf_bufctx(nv50->base.pushbuf, nv50->bufctx);
253    nouveau_pushbuf_validate(nv50->base.pushbuf);
254 
255    for (; dst_layer < dstz + src_box->depth; ++dst_layer, ++src_layer) {
256       ret = nv50_2d_texture_do_copy(nv50->base.pushbuf,
257                                     nv50_miptree(dst), dst_level,
258                                     dstx, dsty, dst_layer,
259                                     nv50_miptree(src), src_level,
260                                     src_box->x, src_box->y, src_layer,
261                                     src_box->width, src_box->height);
262       if (ret)
263          break;
264    }
265    nouveau_bufctx_reset(nv50->bufctx, NV50_BIND_2D);
266 }
267 
268 static void
nv50_clear_render_target(struct pipe_context * pipe,struct pipe_surface * dst,const union pipe_color_union * color,unsigned dstx,unsigned dsty,unsigned width,unsigned height)269 nv50_clear_render_target(struct pipe_context *pipe,
270                          struct pipe_surface *dst,
271 			 const union pipe_color_union *color,
272                          unsigned dstx, unsigned dsty,
273                          unsigned width, unsigned height)
274 {
275    struct nv50_context *nv50 = nv50_context(pipe);
276    struct nouveau_pushbuf *push = nv50->base.pushbuf;
277    struct nv50_miptree *mt = nv50_miptree(dst->texture);
278    struct nv50_surface *sf = nv50_surface(dst);
279    struct nouveau_bo *bo = mt->base.bo;
280 
281    BEGIN_NV04(push, NV50_3D(CLEAR_COLOR(0)), 4);
282    PUSH_DATAf(push, color->f[0]);
283    PUSH_DATAf(push, color->f[1]);
284    PUSH_DATAf(push, color->f[2]);
285    PUSH_DATAf(push, color->f[3]);
286 #if 0
287    if (MARK_RING(chan, 18, 2))
288       return;
289 #endif
290    BEGIN_NV04(push, NV50_3D(RT_CONTROL), 1);
291    PUSH_DATA (push, 1);
292    BEGIN_NV04(push, NV50_3D(RT_ADDRESS_HIGH(0)), 5);
293    PUSH_DATAh(push, bo->offset + sf->offset);
294    PUSH_DATA (push, bo->offset + sf->offset);
295    PUSH_DATA (push, nv50_format_table[dst->format].rt);
296    PUSH_DATA (push, mt->level[sf->base.u.tex.level].tile_mode);
297    PUSH_DATA (push, 0);
298    BEGIN_NV04(push, NV50_3D(RT_HORIZ(0)), 2);
299    if (nouveau_bo_memtype(bo))
300       PUSH_DATA(push, sf->width);
301    else
302       PUSH_DATA(push, NV50_3D_RT_HORIZ_LINEAR | mt->level[0].pitch);
303    PUSH_DATA (push, sf->height);
304    BEGIN_NV04(push, NV50_3D(RT_ARRAY_MODE), 1);
305    PUSH_DATA (push, 1);
306 
307    if (!nouveau_bo_memtype(bo)) {
308       BEGIN_NV04(push, NV50_3D(ZETA_ENABLE), 1);
309       PUSH_DATA (push, 0);
310    }
311 
312    /* NOTE: only works with D3D clear flag (5097/0x143c bit 4) */
313 
314    BEGIN_NV04(push, NV50_3D(VIEWPORT_HORIZ(0)), 2);
315    PUSH_DATA (push, (width << 16) | dstx);
316    PUSH_DATA (push, (height << 16) | dsty);
317 
318    BEGIN_NV04(push, NV50_3D(CLEAR_BUFFERS), 1);
319    PUSH_DATA (push, 0x3c);
320 
321    nv50->dirty |= NV50_NEW_FRAMEBUFFER;
322 }
323 
324 static void
nv50_clear_depth_stencil(struct pipe_context * pipe,struct pipe_surface * dst,unsigned clear_flags,double depth,unsigned stencil,unsigned dstx,unsigned dsty,unsigned width,unsigned height)325 nv50_clear_depth_stencil(struct pipe_context *pipe,
326                          struct pipe_surface *dst,
327                          unsigned clear_flags,
328                          double depth,
329                          unsigned stencil,
330                          unsigned dstx, unsigned dsty,
331                          unsigned width, unsigned height)
332 {
333    struct nv50_context *nv50 = nv50_context(pipe);
334    struct nouveau_pushbuf *push = nv50->base.pushbuf;
335    struct nv50_miptree *mt = nv50_miptree(dst->texture);
336    struct nv50_surface *sf = nv50_surface(dst);
337    struct nouveau_bo *bo = mt->base.bo;
338    uint32_t mode = 0;
339 
340    assert(nouveau_bo_memtype(bo)); /* ZETA cannot be linear */
341 
342    if (clear_flags & PIPE_CLEAR_DEPTH) {
343       BEGIN_NV04(push, NV50_3D(CLEAR_DEPTH), 1);
344       PUSH_DATAf(push, depth);
345       mode |= NV50_3D_CLEAR_BUFFERS_Z;
346    }
347 
348    if (clear_flags & PIPE_CLEAR_STENCIL) {
349       BEGIN_NV04(push, NV50_3D(CLEAR_STENCIL), 1);
350       PUSH_DATA (push, stencil & 0xff);
351       mode |= NV50_3D_CLEAR_BUFFERS_S;
352    }
353 #if 0
354    if (MARK_RING(chan, 17, 2))
355       return;
356 #endif
357    BEGIN_NV04(push, NV50_3D(ZETA_ADDRESS_HIGH), 5);
358    PUSH_DATAh(push, bo->offset + sf->offset);
359    PUSH_DATA (push, bo->offset + sf->offset);
360    PUSH_DATA (push, nv50_format_table[dst->format].rt);
361    PUSH_DATA (push, mt->level[sf->base.u.tex.level].tile_mode);
362    PUSH_DATA (push, 0);
363    BEGIN_NV04(push, NV50_3D(ZETA_ENABLE), 1);
364    PUSH_DATA (push, 1);
365    BEGIN_NV04(push, NV50_3D(ZETA_HORIZ), 3);
366    PUSH_DATA (push, sf->width);
367    PUSH_DATA (push, sf->height);
368    PUSH_DATA (push, (1 << 16) | 1);
369 
370    BEGIN_NV04(push, NV50_3D(VIEWPORT_HORIZ(0)), 2);
371    PUSH_DATA (push, (width << 16) | dstx);
372    PUSH_DATA (push, (height << 16) | dsty);
373 
374    BEGIN_NV04(push, NV50_3D(CLEAR_BUFFERS), 1);
375    PUSH_DATA (push, mode);
376 
377    nv50->dirty |= NV50_NEW_FRAMEBUFFER;
378 }
379 
380 void
nv50_clear(struct pipe_context * pipe,unsigned buffers,const union pipe_color_union * color,double depth,unsigned stencil)381 nv50_clear(struct pipe_context *pipe, unsigned buffers,
382            const union pipe_color_union *color,
383            double depth, unsigned stencil)
384 {
385    struct nv50_context *nv50 = nv50_context(pipe);
386    struct nouveau_pushbuf *push = nv50->base.pushbuf;
387    struct pipe_framebuffer_state *fb = &nv50->framebuffer;
388    unsigned i;
389    uint32_t mode = 0;
390 
391    /* don't need NEW_BLEND, COLOR_MASK doesn't affect CLEAR_BUFFERS */
392    if (!nv50_state_validate(nv50, NV50_NEW_FRAMEBUFFER, 9 + (fb->nr_cbufs * 2)))
393       return;
394 
395    if (buffers & PIPE_CLEAR_COLOR && fb->nr_cbufs) {
396       BEGIN_NV04(push, NV50_3D(CLEAR_COLOR(0)), 4);
397       PUSH_DATAf(push, color->f[0]);
398       PUSH_DATAf(push, color->f[1]);
399       PUSH_DATAf(push, color->f[2]);
400       PUSH_DATAf(push, color->f[3]);
401       mode =
402          NV50_3D_CLEAR_BUFFERS_R | NV50_3D_CLEAR_BUFFERS_G |
403          NV50_3D_CLEAR_BUFFERS_B | NV50_3D_CLEAR_BUFFERS_A;
404    }
405 
406    if (buffers & PIPE_CLEAR_DEPTH) {
407       BEGIN_NV04(push, NV50_3D(CLEAR_DEPTH), 1);
408       PUSH_DATA (push, fui(depth));
409       mode |= NV50_3D_CLEAR_BUFFERS_Z;
410    }
411 
412    if (buffers & PIPE_CLEAR_STENCIL) {
413       BEGIN_NV04(push, NV50_3D(CLEAR_STENCIL), 1);
414       PUSH_DATA (push, stencil & 0xff);
415       mode |= NV50_3D_CLEAR_BUFFERS_S;
416    }
417 
418    BEGIN_NV04(push, NV50_3D(CLEAR_BUFFERS), 1);
419    PUSH_DATA (push, mode);
420 
421    for (i = 1; i < fb->nr_cbufs; i++) {
422       BEGIN_NV04(push, NV50_3D(CLEAR_BUFFERS), 1);
423       PUSH_DATA (push, (i << 6) | 0x3c);
424    }
425 }
426 
427 
428 struct nv50_blitctx
429 {
430    struct nv50_screen *screen;
431    struct {
432       struct pipe_framebuffer_state fb;
433       struct nv50_program *vp;
434       struct nv50_program *gp;
435       struct nv50_program *fp;
436       unsigned num_textures[3];
437       unsigned num_samplers[3];
438       struct pipe_sampler_view *texture[2];
439       struct nv50_tsc_entry *sampler[2];
440       unsigned dirty;
441    } saved;
442    struct nv50_program vp;
443    struct nv50_program fp;
444    struct nv50_tsc_entry sampler[2]; /* nearest, bilinear */
445    uint32_t fp_offset;
446    uint16_t color_mask;
447    uint8_t filter;
448 };
449 
450 static void
nv50_blitctx_make_vp(struct nv50_blitctx * blit)451 nv50_blitctx_make_vp(struct nv50_blitctx *blit)
452 {
453    static const uint32_t code[] =
454    {
455       0x10000001, /* mov b32 o[0x00] s[0x00] */ /* HPOS.x */
456       0x0423c788,
457       0x10000205, /* mov b32 o[0x04] s[0x04] */ /* HPOS.y */
458       0x0423c788,
459       0x10000409, /* mov b32 o[0x08] s[0x08] */ /* TEXC.x */
460       0x0423c788,
461       0x1000060d, /* mov b32 o[0x0c] s[0x0c] */ /* TEXC.y */
462       0x0423c788,
463       0x10000811, /* exit mov b32 o[0x10] s[0x10] */ /* TEXC.z */
464       0x0423c789,
465    };
466 
467    blit->vp.type = PIPE_SHADER_VERTEX;
468    blit->vp.translated = TRUE;
469    blit->vp.code = (uint32_t *)code; /* const_cast */
470    blit->vp.code_size = sizeof(code);
471    blit->vp.max_gpr = 4;
472    blit->vp.max_out = 5;
473    blit->vp.out_nr = 2;
474    blit->vp.out[0].mask = 0x3;
475    blit->vp.out[0].sn = TGSI_SEMANTIC_POSITION;
476    blit->vp.out[1].hw = 2;
477    blit->vp.out[1].mask = 0x7;
478    blit->vp.out[1].sn = TGSI_SEMANTIC_GENERIC;
479    blit->vp.vp.attrs[0] = 0x73;
480    blit->vp.vp.psiz = 0x40;
481    blit->vp.vp.edgeflag = 0x40;
482 }
483 
484 static void
nv50_blitctx_make_fp(struct nv50_blitctx * blit)485 nv50_blitctx_make_fp(struct nv50_blitctx *blit)
486 {
487    static const uint32_t code[] =
488    {
489       /* 3 coords RGBA in, RGBA out, also for Z32_FLOAT(_S8X24_UINT) */
490       0x80000000, /* interp $r0 v[0x0] */
491       0x80010004, /* interp $r1 v[0x4] */
492       0x80020009, /* interp $r2 flat v[0x8] */
493       0x00040780,
494       0xf6800001, /* texauto live { $r0,1,2,3 } $t0 $s0 { $r0,1,2 } */
495       0x0000c785, /* exit */
496 
497       /* 3 coords ZS in, S encoded in R, Z encoded in GBA (8_UNORM) */
498       0x80000000, /* interp $r0 v[0x00] */
499       0x80010004, /* interp $r1 v[0x04] */
500       0x80020108, /* interp $r2 flat v[0x8] */
501       0x10008010, /* mov b32 $r4 $r0 */
502       0xf2820201, /* texauto live { $r0,#,#,# } $t1 $s1 { $r0,1,2 } */
503       0x00000784,
504       0xa000000d, /* cvt f32 $r3 s32 $r0 */
505       0x44014780,
506       0x10000801, /* mov b32 $r0 $r4 */
507       0x0403c780,
508       0xf2800001, /* texauto live { $r0,#,#,# } $t0 $s0 { $r0,1,2 } */
509       0x00000784,
510       0xc03f0009, /* mul f32 $r2 $r0 (2^24 - 1) */
511       0x04b7ffff,
512       0xa0000409, /* cvt rni s32 $r2 f32 $r2 */
513       0x8c004780,
514       0xc0010601, /* mul f32 $r0 $r3 1/0xff */
515       0x03b8080b,
516       0xd03f0405, /* and b32 $r1 $r2 0x0000ff */
517       0x0000000f,
518       0xd000040d, /* and b32 $r3 $r2 0xff0000 */
519       0x000ff003,
520       0xd0000409, /* and b32 $r2 $r2 0x00ff00 */
521       0x00000ff3,
522       0xa0000205, /* cvt f32 $r1 s32 $r1 */
523       0x44014780,
524       0xa000060d, /* cvt f32 $r3 s32 $r3 */
525       0x44014780,
526       0xa0000409, /* cvt f32 $r2 s32 $r2 */
527       0x44014780,
528       0xc0010205, /* mul f32 $r1 $r1 1/0x0000ff */
529       0x03b8080b,
530       0xc001060d, /* mul f32 $r3 $r3 1/0x00ff00 */
531       0x0338080b,
532       0xc0010409, /* mul f32 $r2 $r2 1/0xff0000 */
533       0x0378080b,
534       0xf0000001, /* exit never nop */
535       0xe0000001,
536 
537       /* 3 coords ZS in, Z encoded in RGB, S encoded in A (U8_UNORM) */
538       0x80000000, /* interp $r0 v[0x00] */
539       0x80010004, /* interp $r1 v[0x04] */
540       0x80020108, /* interp $r2 flat v[0x8] */
541       0x10008010, /* mov b32 $r4 $r0 */
542       0xf2820201, /* texauto live { $r0,#,#,# } $t1 $s1 { $r0,1,2 } */
543       0x00000784,
544       0xa000000d, /* cvt f32 $r3 s32 $r0 */
545       0x44014780,
546       0x10000801, /* mov b32 $r0 $r4 */
547       0x0403c780,
548       0xf2800001, /* texauto live { $r0,#,#,# } $t0 $s0 { $r0,1,2 } */
549       0x00000784,
550       0xc03f0009, /* mul f32 $r2 $r0 (2^24 - 1) */
551       0x04b7ffff,
552       0xa0000409, /* cvt rni s32 $r2 f32 $r2 */
553       0x8c004780,
554       0xc001060d, /* mul f32 $r3 $r3 1/0xff */
555       0x03b8080b,
556       0xd03f0401, /* and b32 $r0 $r2 0x0000ff */
557       0x0000000f,
558       0xd0000405, /* and b32 $r1 $r2 0x00ff00 */
559       0x00000ff3,
560       0xd0000409, /* and b32 $r2 $r2 0xff0000 */
561       0x000ff003,
562       0xa0000001, /* cvt f32 $r0 s32 $r0 */
563       0x44014780,
564       0xa0000205, /* cvt f32 $r1 s32 $r1 */
565       0x44014780,
566       0xa0000409, /* cvt f32 $r2 s32 $r2 */
567       0x44014780,
568       0xc0010001, /* mul f32 $r0 $r0 1/0x0000ff */
569       0x03b8080b,
570       0xc0010205, /* mul f32 $r1 $r1 1/0x00ff00 */
571       0x0378080b,
572       0xc0010409, /* mul f32 $r2 $r2 1/0xff0000 */
573       0x0338080b,
574       0xf0000001, /* exit never nop */
575       0xe0000001
576    };
577 
578    blit->fp.type = PIPE_SHADER_FRAGMENT;
579    blit->fp.translated = TRUE;
580    blit->fp.code = (uint32_t *)code; /* const_cast */
581    blit->fp.code_size = sizeof(code);
582    blit->fp.max_gpr = 5;
583    blit->fp.max_out = 4;
584    blit->fp.in_nr = 1;
585    blit->fp.in[0].mask = 0x7; /* last component flat */
586    blit->fp.in[0].linear = 1;
587    blit->fp.in[0].sn = TGSI_SEMANTIC_GENERIC;
588    blit->fp.out_nr = 1;
589    blit->fp.out[0].mask = 0xf;
590    blit->fp.out[0].sn = TGSI_SEMANTIC_COLOR;
591    blit->fp.fp.interp = 0x00020403;
592    blit->fp.gp.primid = 0x80;
593 }
594 
595 static void
nv50_blitctx_make_sampler(struct nv50_blitctx * blit)596 nv50_blitctx_make_sampler(struct nv50_blitctx *blit)
597 {
598    /* clamp to edge, min/max lod = 0, nearest filtering */
599 
600    blit->sampler[0].id = -1;
601 
602    blit->sampler[0].tsc[0] = NV50_TSC_0_SRGB_CONVERSION_ALLOWED |
603       (NV50_TSC_WRAP_CLAMP_TO_EDGE << NV50_TSC_0_WRAPS__SHIFT) |
604       (NV50_TSC_WRAP_CLAMP_TO_EDGE << NV50_TSC_0_WRAPT__SHIFT) |
605       (NV50_TSC_WRAP_CLAMP_TO_EDGE << NV50_TSC_0_WRAPR__SHIFT);
606    blit->sampler[0].tsc[1] =
607       NV50_TSC_1_MAGF_NEAREST | NV50_TSC_1_MINF_NEAREST | NV50_TSC_1_MIPF_NONE;
608 
609    /* clamp to edge, min/max lod = 0, bilinear filtering */
610 
611    blit->sampler[1].id = -1;
612 
613    blit->sampler[1].tsc[0] = blit->sampler[0].tsc[0];
614    blit->sampler[1].tsc[1] =
615       NV50_TSC_1_MAGF_LINEAR | NV50_TSC_1_MINF_LINEAR | NV50_TSC_1_MIPF_NONE;
616 }
617 
618 /* Since shaders cannot export stencil, we cannot copy stencil values when
619  * rendering to ZETA, so we attach the ZS surface to a colour render target.
620  */
621 static INLINE enum pipe_format
nv50_blit_zeta_to_colour_format(enum pipe_format format)622 nv50_blit_zeta_to_colour_format(enum pipe_format format)
623 {
624    switch (format) {
625    case PIPE_FORMAT_Z16_UNORM:               return PIPE_FORMAT_R16_UNORM;
626    case PIPE_FORMAT_Z24_UNORM_S8_UINT:
627    case PIPE_FORMAT_S8_UINT_Z24_UNORM:
628    case PIPE_FORMAT_Z24X8_UNORM:             return PIPE_FORMAT_R8G8B8A8_UNORM;
629    case PIPE_FORMAT_Z32_FLOAT:               return PIPE_FORMAT_R32_FLOAT;
630    case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT: return PIPE_FORMAT_R32G32_FLOAT;
631    default:
632       assert(0);
633       return PIPE_FORMAT_NONE;
634    }
635 }
636 
637 static void
nv50_blitctx_get_color_mask_and_fp(struct nv50_blitctx * blit,enum pipe_format format,uint8_t mask)638 nv50_blitctx_get_color_mask_and_fp(struct nv50_blitctx *blit,
639                                    enum pipe_format format, uint8_t mask)
640 {
641    blit->color_mask = 0;
642 
643    switch (format) {
644    case PIPE_FORMAT_Z24X8_UNORM:
645    case PIPE_FORMAT_Z24_UNORM_S8_UINT:
646       blit->fp_offset = 0xb0;
647       if (mask & PIPE_MASK_Z)
648          blit->color_mask |= 0x0111;
649       if (mask & PIPE_MASK_S)
650          blit->color_mask |= 0x1000;
651       break;
652    case PIPE_FORMAT_S8_UINT_Z24_UNORM:
653       blit->fp_offset = 0x18;
654       if (mask & PIPE_MASK_Z)
655          blit->color_mask |= 0x1110;
656       if (mask & PIPE_MASK_S)
657          blit->color_mask |= 0x0001;
658       break;
659    default:
660       blit->fp_offset = 0;
661       if (mask & (PIPE_MASK_R | PIPE_MASK_Z)) blit->color_mask |= 0x0001;
662       if (mask & (PIPE_MASK_G | PIPE_MASK_S)) blit->color_mask |= 0x0010;
663       if (mask & PIPE_MASK_B) blit->color_mask |= 0x0100;
664       if (mask & PIPE_MASK_A) blit->color_mask |= 0x1000;
665       break;
666    }
667 }
668 
669 static void
nv50_blit_set_dst(struct nv50_context * nv50,struct pipe_resource * res,unsigned level,unsigned layer)670 nv50_blit_set_dst(struct nv50_context *nv50,
671                   struct pipe_resource *res, unsigned level, unsigned layer)
672 {
673    struct pipe_context *pipe = &nv50->base.pipe;
674    struct pipe_surface templ;
675 
676    if (util_format_is_depth_or_stencil(res->format))
677       templ.format = nv50_blit_zeta_to_colour_format(res->format);
678    else
679       templ.format = res->format;
680 
681    templ.usage = PIPE_USAGE_STREAM;
682    templ.u.tex.level = level;
683    templ.u.tex.first_layer = templ.u.tex.last_layer = layer;
684 
685    nv50->framebuffer.cbufs[0] = nv50_miptree_surface_new(pipe, res, &templ);
686    nv50->framebuffer.nr_cbufs = 1;
687    nv50->framebuffer.zsbuf = NULL;
688    nv50->framebuffer.width = nv50->framebuffer.cbufs[0]->width;
689    nv50->framebuffer.height = nv50->framebuffer.cbufs[0]->height;
690 }
691 
692 static INLINE void
nv50_blit_fixup_tic_entry(struct pipe_sampler_view * view)693 nv50_blit_fixup_tic_entry(struct pipe_sampler_view *view)
694 {
695    struct nv50_tic_entry *ent = nv50_tic_entry(view);
696 
697    ent->tic[2] &= ~(1 << 31); /* scaled coordinates, ok with 3d textures ? */
698 
699    /* magic: */
700 
701    ent->tic[3] = 0x20000000; /* affects quality of near vertical edges in MS8 */
702 }
703 
704 static void
nv50_blit_set_src(struct nv50_context * nv50,struct pipe_resource * res,unsigned level,unsigned layer)705 nv50_blit_set_src(struct nv50_context *nv50,
706                   struct pipe_resource *res, unsigned level, unsigned layer)
707 {
708    struct pipe_context *pipe = &nv50->base.pipe;
709    struct pipe_sampler_view templ;
710 
711    templ.format = res->format;
712    templ.u.tex.first_layer = templ.u.tex.last_layer = layer;
713    templ.u.tex.first_level = templ.u.tex.last_level = level;
714    templ.swizzle_r = PIPE_SWIZZLE_RED;
715    templ.swizzle_g = PIPE_SWIZZLE_GREEN;
716    templ.swizzle_b = PIPE_SWIZZLE_BLUE;
717    templ.swizzle_a = PIPE_SWIZZLE_ALPHA;
718 
719    nv50->textures[2][0] = nv50_create_sampler_view(pipe, res, &templ);
720    nv50->textures[2][1] = NULL;
721 
722    nv50_blit_fixup_tic_entry(nv50->textures[2][0]);
723 
724    nv50->num_textures[0] = nv50->num_textures[1] = 0;
725    nv50->num_textures[2] = 1;
726 
727    templ.format = nv50_zs_to_s_format(res->format);
728    if (templ.format != res->format) {
729       nv50->textures[2][1] = nv50_create_sampler_view(pipe, res, &templ);
730       nv50_blit_fixup_tic_entry(nv50->textures[2][1]);
731       nv50->num_textures[2] = 2;
732    }
733 }
734 
735 static void
nv50_blitctx_prepare_state(struct nv50_blitctx * blit)736 nv50_blitctx_prepare_state(struct nv50_blitctx *blit)
737 {
738    struct nouveau_pushbuf *push = blit->screen->base.pushbuf;
739 
740    /* blend state */
741    BEGIN_NV04(push, NV50_3D(COLOR_MASK(0)), 1);
742    PUSH_DATA (push, blit->color_mask);
743    BEGIN_NV04(push, NV50_3D(BLEND_ENABLE(0)), 1);
744    PUSH_DATA (push, 0);
745    BEGIN_NV04(push, NV50_3D(LOGIC_OP_ENABLE), 1);
746    PUSH_DATA (push, 0);
747 
748    /* rasterizer state */
749 #ifndef NV50_SCISSORS_CLIPPING
750    BEGIN_NV04(push, NV50_3D(SCISSOR_ENABLE(0)), 1);
751    PUSH_DATA (push, 1);
752 #endif
753    BEGIN_NV04(push, NV50_3D(VERTEX_TWO_SIDE_ENABLE), 1);
754    PUSH_DATA (push, 0);
755    BEGIN_NV04(push, NV50_3D(FRAG_COLOR_CLAMP_EN), 1);
756    PUSH_DATA (push, 0);
757    BEGIN_NV04(push, NV50_3D(MULTISAMPLE_ENABLE), 1);
758    PUSH_DATA (push, 0);
759    BEGIN_NV04(push, NV50_3D(MSAA_MASK(0)), 4);
760    PUSH_DATA (push, 0xffff);
761    PUSH_DATA (push, 0xffff);
762    PUSH_DATA (push, 0xffff);
763    PUSH_DATA (push, 0xffff);
764    BEGIN_NV04(push, NV50_3D(POLYGON_MODE_FRONT), 3);
765    PUSH_DATA (push, NV50_3D_POLYGON_MODE_FRONT_FILL);
766    PUSH_DATA (push, NV50_3D_POLYGON_MODE_BACK_FILL);
767    PUSH_DATA (push, 0);
768    BEGIN_NV04(push, NV50_3D(CULL_FACE_ENABLE), 1);
769    PUSH_DATA (push, 0);
770    BEGIN_NV04(push, NV50_3D(POLYGON_STIPPLE_ENABLE), 1);
771    PUSH_DATA (push, 0);
772    BEGIN_NV04(push, NV50_3D(POLYGON_OFFSET_FILL_ENABLE), 1);
773    PUSH_DATA (push, 0);
774 
775    /* zsa state */
776    BEGIN_NV04(push, NV50_3D(DEPTH_TEST_ENABLE), 1);
777    PUSH_DATA (push, 0);
778    BEGIN_NV04(push, NV50_3D(STENCIL_ENABLE), 1);
779    PUSH_DATA (push, 0);
780    BEGIN_NV04(push, NV50_3D(ALPHA_TEST_ENABLE), 1);
781    PUSH_DATA (push, 0);
782 }
783 
784 static void
nv50_blitctx_pre_blit(struct nv50_blitctx * blit,struct nv50_context * nv50)785 nv50_blitctx_pre_blit(struct nv50_blitctx *blit, struct nv50_context *nv50)
786 {
787    int s;
788 
789    blit->saved.fb.width = nv50->framebuffer.width;
790    blit->saved.fb.height = nv50->framebuffer.height;
791    blit->saved.fb.nr_cbufs = nv50->framebuffer.nr_cbufs;
792    blit->saved.fb.cbufs[0] = nv50->framebuffer.cbufs[0];
793    blit->saved.fb.zsbuf = nv50->framebuffer.zsbuf;
794 
795    blit->saved.vp = nv50->vertprog;
796    blit->saved.gp = nv50->gmtyprog;
797    blit->saved.fp = nv50->fragprog;
798 
799    nv50->vertprog = &blit->vp;
800    nv50->gmtyprog = NULL;
801    nv50->fragprog = &blit->fp;
802 
803    for (s = 0; s < 3; ++s) {
804       blit->saved.num_textures[s] = nv50->num_textures[s];
805       blit->saved.num_samplers[s] = nv50->num_samplers[s];
806    }
807    blit->saved.texture[0] = nv50->textures[2][0];
808    blit->saved.texture[1] = nv50->textures[2][1];
809    blit->saved.sampler[0] = nv50->samplers[2][0];
810    blit->saved.sampler[1] = nv50->samplers[2][1];
811 
812    nv50->samplers[2][0] = &blit->sampler[blit->filter];
813    nv50->samplers[2][1] = &blit->sampler[blit->filter];
814 
815    nv50->num_samplers[0] = nv50->num_samplers[1] = 0;
816    nv50->num_samplers[2] = 2;
817 
818    blit->saved.dirty = nv50->dirty;
819 
820    nv50->dirty =
821       NV50_NEW_FRAMEBUFFER |
822       NV50_NEW_VERTPROG | NV50_NEW_FRAGPROG | NV50_NEW_GMTYPROG |
823       NV50_NEW_TEXTURES | NV50_NEW_SAMPLERS;
824 }
825 
826 static void
nv50_blitctx_post_blit(struct nv50_context * nv50,struct nv50_blitctx * blit)827 nv50_blitctx_post_blit(struct nv50_context *nv50, struct nv50_blitctx *blit)
828 {
829    int s;
830 
831    pipe_surface_reference(&nv50->framebuffer.cbufs[0], NULL);
832 
833    nv50->framebuffer.width = blit->saved.fb.width;
834    nv50->framebuffer.height = blit->saved.fb.height;
835    nv50->framebuffer.nr_cbufs = blit->saved.fb.nr_cbufs;
836    nv50->framebuffer.cbufs[0] = blit->saved.fb.cbufs[0];
837    nv50->framebuffer.zsbuf = blit->saved.fb.zsbuf;
838 
839    nv50->vertprog = blit->saved.vp;
840    nv50->gmtyprog = blit->saved.gp;
841    nv50->fragprog = blit->saved.fp;
842 
843    pipe_sampler_view_reference(&nv50->textures[2][0], NULL);
844    pipe_sampler_view_reference(&nv50->textures[2][1], NULL);
845 
846    for (s = 0; s < 3; ++s) {
847       nv50->num_textures[s] = blit->saved.num_textures[s];
848       nv50->num_samplers[s] = blit->saved.num_samplers[s];
849    }
850    nv50->textures[2][0] = blit->saved.texture[0];
851    nv50->textures[2][1] = blit->saved.texture[1];
852    nv50->samplers[2][0] = blit->saved.sampler[0];
853    nv50->samplers[2][1] = blit->saved.sampler[1];
854 
855    nv50->dirty = blit->saved.dirty |
856       (NV50_NEW_FRAMEBUFFER | NV50_NEW_SCISSOR | NV50_NEW_SAMPLE_MASK |
857        NV50_NEW_RASTERIZER | NV50_NEW_ZSA | NV50_NEW_BLEND |
858        NV50_NEW_TEXTURES | NV50_NEW_SAMPLERS |
859        NV50_NEW_VERTPROG | NV50_NEW_GMTYPROG | NV50_NEW_FRAGPROG);
860 }
861 
862 static void
nv50_resource_resolve(struct pipe_context * pipe,const struct pipe_resolve_info * info)863 nv50_resource_resolve(struct pipe_context *pipe,
864                       const struct pipe_resolve_info *info)
865 {
866    struct nv50_context *nv50 = nv50_context(pipe);
867    struct nv50_screen *screen = nv50->screen;
868    struct nv50_blitctx *blit = screen->blitctx;
869    struct nouveau_pushbuf *push = nv50->base.pushbuf;
870    struct pipe_resource *src = info->src.res;
871    struct pipe_resource *dst = info->dst.res;
872    float x0, x1, y0, y1, z;
873    float x_range, y_range;
874 
875    nv50_blitctx_get_color_mask_and_fp(blit, dst->format, info->mask);
876 
877    blit->filter = util_format_is_depth_or_stencil(dst->format) ? 0 : 1;
878 
879    nv50_blitctx_pre_blit(blit, nv50);
880 
881    nv50_blit_set_dst(nv50, dst, info->dst.level, info->dst.layer);
882    nv50_blit_set_src(nv50, src, 0,               info->src.layer);
883 
884    nv50_blitctx_prepare_state(blit);
885 
886    nv50_state_validate(nv50, ~0, 36);
887 
888    x_range =
889       (float)(info->src.x1 - info->src.x0) /
890       (float)(info->dst.x1 - info->dst.x0);
891    y_range =
892       (float)(info->src.y1 - info->src.y0) /
893       (float)(info->dst.y1 - info->dst.y0);
894 
895    x0 = (float)info->src.x0 - x_range * (float)info->dst.x0;
896    y0 = (float)info->src.y0 - y_range * (float)info->dst.y0;
897 
898    x1 = x0 + 16384.0f * x_range;
899    y1 = y0 + 16384.0f * y_range;
900 
901    x0 *= (float)(1 << nv50_miptree(src)->ms_x);
902    x1 *= (float)(1 << nv50_miptree(src)->ms_x);
903    y0 *= (float)(1 << nv50_miptree(src)->ms_y);
904    y1 *= (float)(1 << nv50_miptree(src)->ms_y);
905 
906    z = (float)info->src.layer;
907 
908    BEGIN_NV04(push, NV50_3D(FP_START_ID), 1);
909    PUSH_DATA (push,
910               blit->fp.code_base + blit->fp_offset);
911 
912    BEGIN_NV04(push, NV50_3D(VIEWPORT_TRANSFORM_EN), 1);
913    PUSH_DATA (push, 0);
914 
915    /* Draw a large triangle in screen coordinates covering the whole
916     * render target, with scissors defining the destination region.
917     * The vertex is supplied with non-normalized texture coordinates
918     * arranged in a way to yield the desired offset and scale.
919     */
920 
921    BEGIN_NV04(push, NV50_3D(SCISSOR_HORIZ(0)), 2);
922    PUSH_DATA (push, (info->dst.x1 << 16) | info->dst.x0);
923    PUSH_DATA (push, (info->dst.y1 << 16) | info->dst.y0);
924 
925    BEGIN_NV04(push, NV50_3D(VERTEX_BEGIN_GL), 1);
926    PUSH_DATA (push, NV50_3D_VERTEX_BEGIN_GL_PRIMITIVE_TRIANGLES);
927    BEGIN_NV04(push, NV50_3D(VTX_ATTR_3F_X(1)), 3);
928    PUSH_DATAf(push, x0);
929    PUSH_DATAf(push, y0);
930    PUSH_DATAf(push, z);
931    BEGIN_NV04(push, NV50_3D(VTX_ATTR_2F_X(0)), 2);
932    PUSH_DATAf(push, 0.0f);
933    PUSH_DATAf(push, 0.0f);
934    BEGIN_NV04(push, NV50_3D(VTX_ATTR_3F_X(1)), 3);
935    PUSH_DATAf(push, x1);
936    PUSH_DATAf(push, y0);
937    PUSH_DATAf(push, z);
938    BEGIN_NV04(push, NV50_3D(VTX_ATTR_2F_X(0)), 2);
939    PUSH_DATAf(push, 16384 << nv50_miptree(dst)->ms_x);
940    PUSH_DATAf(push, 0.0f);
941    BEGIN_NV04(push, NV50_3D(VTX_ATTR_3F_X(1)), 3);
942    PUSH_DATAf(push, x0);
943    PUSH_DATAf(push, y1);
944    PUSH_DATAf(push, z);
945    BEGIN_NV04(push, NV50_3D(VTX_ATTR_2F_X(0)), 2);
946    PUSH_DATAf(push, 0.0f);
947    PUSH_DATAf(push, 16384 << nv50_miptree(dst)->ms_y);
948    BEGIN_NV04(push, NV50_3D(VERTEX_END_GL), 1);
949    PUSH_DATA (push, 0);
950 
951    /* re-enable normally constant state */
952 
953    BEGIN_NV04(push, NV50_3D(VIEWPORT_TRANSFORM_EN), 1);
954    PUSH_DATA (push, 1);
955 
956    nv50_blitctx_post_blit(nv50, blit);
957 }
958 
959 boolean
nv50_blitctx_create(struct nv50_screen * screen)960 nv50_blitctx_create(struct nv50_screen *screen)
961 {
962    screen->blitctx = CALLOC_STRUCT(nv50_blitctx);
963    if (!screen->blitctx) {
964       NOUVEAU_ERR("failed to allocate blit context\n");
965       return FALSE;
966    }
967 
968    screen->blitctx->screen = screen;
969 
970    nv50_blitctx_make_vp(screen->blitctx);
971    nv50_blitctx_make_fp(screen->blitctx);
972 
973    nv50_blitctx_make_sampler(screen->blitctx);
974 
975    screen->blitctx->color_mask = 0x1111;
976 
977    return TRUE;
978 }
979 
980 void
nv50_init_surface_functions(struct nv50_context * nv50)981 nv50_init_surface_functions(struct nv50_context *nv50)
982 {
983    struct pipe_context *pipe = &nv50->base.pipe;
984 
985    pipe->resource_copy_region = nv50_resource_copy_region;
986    pipe->resource_resolve = nv50_resource_resolve;
987    pipe->clear_render_target = nv50_clear_render_target;
988    pipe->clear_depth_stencil = nv50_clear_depth_stencil;
989 }
990 
991 
992