1 /* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
2 Copyright (C) 1994-2014 Free Software Foundation, Inc.
3 Written by Ian Lance Taylor, Cygnus Support.
4
5 This file is part of GAS, the GNU Assembler.
6
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
10 any later version.
11
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
20 02110-1301, USA. */
21
22 #include "as.h"
23 #include "safe-ctype.h"
24 #include "subsegs.h"
25 #include "dw2gencfi.h"
26 #include "opcode/ppc.h"
27
28 #ifdef OBJ_ELF
29 #include "elf/ppc.h"
30 #include "elf/ppc64.h"
31 #include "dwarf2dbg.h"
32 #endif
33
34 #ifdef TE_PE
35 #include "coff/pe.h"
36 #endif
37
38 #ifdef OBJ_XCOFF
39 #include "coff/xcoff.h"
40 #include "libxcoff.h"
41 #endif
42
43 /* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
44
45 /* Tell the main code what the endianness is. */
46 extern int target_big_endian;
47
48 /* Whether or not, we've set target_big_endian. */
49 static int set_target_endian = 0;
50
51 /* Whether to use user friendly register names. */
52 #ifndef TARGET_REG_NAMES_P
53 #ifdef TE_PE
54 #define TARGET_REG_NAMES_P TRUE
55 #else
56 #define TARGET_REG_NAMES_P FALSE
57 #endif
58 #endif
59
60 /* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
61 HIGHESTA. */
62
63 /* #lo(value) denotes the least significant 16 bits of the indicated. */
64 #define PPC_LO(v) ((v) & 0xffff)
65
66 /* #hi(value) denotes bits 16 through 31 of the indicated value. */
67 #define PPC_HI(v) (((v) >> 16) & 0xffff)
68
69 /* #ha(value) denotes the high adjusted value: bits 16 through 31 of
70 the indicated value, compensating for #lo() being treated as a
71 signed number. */
72 #define PPC_HA(v) PPC_HI ((v) + 0x8000)
73
74 /* #higher(value) denotes bits 32 through 47 of the indicated value. */
75 #define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
76
77 /* #highera(value) denotes bits 32 through 47 of the indicated value,
78 compensating for #lo() being treated as a signed number. */
79 #define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
80
81 /* #highest(value) denotes bits 48 through 63 of the indicated value. */
82 #define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
83
84 /* #highesta(value) denotes bits 48 through 63 of the indicated value,
85 compensating for #lo being treated as a signed number. */
86 #define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
87
88 #define SEX16(val) (((val) ^ 0x8000) - 0x8000)
89
90 /* For the time being on ppc64, don't report overflow on @h and @ha
91 applied to constants. */
92 #define REPORT_OVERFLOW_HI 0
93
94 static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
95
96 static void ppc_macro (char *, const struct powerpc_macro *);
97 static void ppc_byte (int);
98
99 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
100 static void ppc_tc (int);
101 static void ppc_machine (int);
102 #endif
103
104 #ifdef OBJ_XCOFF
105 static void ppc_comm (int);
106 static void ppc_bb (int);
107 static void ppc_bc (int);
108 static void ppc_bf (int);
109 static void ppc_biei (int);
110 static void ppc_bs (int);
111 static void ppc_eb (int);
112 static void ppc_ec (int);
113 static void ppc_ef (int);
114 static void ppc_es (int);
115 static void ppc_csect (int);
116 static void ppc_dwsect (int);
117 static void ppc_change_csect (symbolS *, offsetT);
118 static void ppc_function (int);
119 static void ppc_extern (int);
120 static void ppc_lglobl (int);
121 static void ppc_ref (int);
122 static void ppc_section (int);
123 static void ppc_named_section (int);
124 static void ppc_stabx (int);
125 static void ppc_rename (int);
126 static void ppc_toc (int);
127 static void ppc_xcoff_cons (int);
128 static void ppc_vbyte (int);
129 #endif
130
131 #ifdef OBJ_ELF
132 static void ppc_elf_rdata (int);
133 static void ppc_elf_lcomm (int);
134 static void ppc_elf_localentry (int);
135 static void ppc_elf_abiversion (int);
136 #endif
137
138 #ifdef TE_PE
139 static void ppc_previous (int);
140 static void ppc_pdata (int);
141 static void ppc_ydata (int);
142 static void ppc_reldata (int);
143 static void ppc_rdata (int);
144 static void ppc_ualong (int);
145 static void ppc_znop (int);
146 static void ppc_pe_comm (int);
147 static void ppc_pe_section (int);
148 static void ppc_pe_function (int);
149 static void ppc_pe_tocd (int);
150 #endif
151
152 /* Generic assembler global variables which must be defined by all
153 targets. */
154
155 #ifdef OBJ_ELF
156 /* This string holds the chars that always start a comment. If the
157 pre-processor is disabled, these aren't very useful. The macro
158 tc_comment_chars points to this. We use this, rather than the
159 usual comment_chars, so that we can switch for Solaris conventions. */
160 static const char ppc_solaris_comment_chars[] = "#!";
161 static const char ppc_eabi_comment_chars[] = "#";
162
163 #ifdef TARGET_SOLARIS_COMMENT
164 const char *ppc_comment_chars = ppc_solaris_comment_chars;
165 #else
166 const char *ppc_comment_chars = ppc_eabi_comment_chars;
167 #endif
168 #else
169 const char comment_chars[] = "#";
170 #endif
171
172 /* Characters which start a comment at the beginning of a line. */
173 const char line_comment_chars[] = "#";
174
175 /* Characters which may be used to separate multiple commands on a
176 single line. */
177 const char line_separator_chars[] = ";";
178
179 /* Characters which are used to indicate an exponent in a floating
180 point number. */
181 const char EXP_CHARS[] = "eE";
182
183 /* Characters which mean that a number is a floating point constant,
184 as in 0d1.0. */
185 const char FLT_CHARS[] = "dD";
186
187 /* Anything that can start an operand needs to be mentioned here,
188 to stop the input scrubber eating whitespace. */
189 const char ppc_symbol_chars[] = "%[";
190
191 /* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
192 int ppc_cie_data_alignment;
193
194 /* The dwarf2 minimum instruction length. */
195 int ppc_dwarf2_line_min_insn_length;
196
197 /* More than this number of nops in an alignment op gets a branch
198 instead. */
199 unsigned long nop_limit = 4;
200
201 /* The type of processor we are assembling for. This is one or more
202 of the PPC_OPCODE flags defined in opcode/ppc.h. */
203 ppc_cpu_t ppc_cpu = 0;
204 ppc_cpu_t sticky = 0;
205
206 /* Value for ELF e_flags EF_PPC64_ABI. */
207 unsigned int ppc_abiversion = 0;
208
209 /* Flags set on encountering toc relocs. */
210 enum {
211 has_large_toc_reloc = 1,
212 has_small_toc_reloc = 2
213 } toc_reloc_types;
214
215 /* Warn on emitting data to code sections. */
216 int warn_476;
217 unsigned long last_insn;
218 segT last_seg;
219 subsegT last_subseg;
220
221 /* The target specific pseudo-ops which we support. */
222
223 const pseudo_typeS md_pseudo_table[] =
224 {
225 /* Pseudo-ops which must be overridden. */
226 { "byte", ppc_byte, 0 },
227
228 #ifdef OBJ_XCOFF
229 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
230 legitimately belong in the obj-*.c file. However, XCOFF is based
231 on COFF, and is only implemented for the RS/6000. We just use
232 obj-coff.c, and add what we need here. */
233 { "comm", ppc_comm, 0 },
234 { "lcomm", ppc_comm, 1 },
235 { "bb", ppc_bb, 0 },
236 { "bc", ppc_bc, 0 },
237 { "bf", ppc_bf, 0 },
238 { "bi", ppc_biei, 0 },
239 { "bs", ppc_bs, 0 },
240 { "csect", ppc_csect, 0 },
241 { "dwsect", ppc_dwsect, 0 },
242 { "data", ppc_section, 'd' },
243 { "eb", ppc_eb, 0 },
244 { "ec", ppc_ec, 0 },
245 { "ef", ppc_ef, 0 },
246 { "ei", ppc_biei, 1 },
247 { "es", ppc_es, 0 },
248 { "extern", ppc_extern, 0 },
249 { "function", ppc_function, 0 },
250 { "lglobl", ppc_lglobl, 0 },
251 { "ref", ppc_ref, 0 },
252 { "rename", ppc_rename, 0 },
253 { "section", ppc_named_section, 0 },
254 { "stabx", ppc_stabx, 0 },
255 { "text", ppc_section, 't' },
256 { "toc", ppc_toc, 0 },
257 { "long", ppc_xcoff_cons, 2 },
258 { "llong", ppc_xcoff_cons, 3 },
259 { "word", ppc_xcoff_cons, 1 },
260 { "short", ppc_xcoff_cons, 1 },
261 { "vbyte", ppc_vbyte, 0 },
262 #endif
263
264 #ifdef OBJ_ELF
265 { "llong", cons, 8 },
266 { "rdata", ppc_elf_rdata, 0 },
267 { "rodata", ppc_elf_rdata, 0 },
268 { "lcomm", ppc_elf_lcomm, 0 },
269 { "localentry", ppc_elf_localentry, 0 },
270 { "abiversion", ppc_elf_abiversion, 0 },
271 #endif
272
273 #ifdef TE_PE
274 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
275 { "previous", ppc_previous, 0 },
276 { "pdata", ppc_pdata, 0 },
277 { "ydata", ppc_ydata, 0 },
278 { "reldata", ppc_reldata, 0 },
279 { "rdata", ppc_rdata, 0 },
280 { "ualong", ppc_ualong, 0 },
281 { "znop", ppc_znop, 0 },
282 { "comm", ppc_pe_comm, 0 },
283 { "lcomm", ppc_pe_comm, 1 },
284 { "section", ppc_pe_section, 0 },
285 { "function", ppc_pe_function,0 },
286 { "tocd", ppc_pe_tocd, 0 },
287 #endif
288
289 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
290 { "tc", ppc_tc, 0 },
291 { "machine", ppc_machine, 0 },
292 #endif
293
294 { NULL, NULL, 0 }
295 };
296
297
298 /* Predefined register names if -mregnames (or default for Windows NT).
299 In general, there are lots of them, in an attempt to be compatible
300 with a number of other Windows NT assemblers. */
301
302 /* Structure to hold information about predefined registers. */
303 struct pd_reg
304 {
305 char *name;
306 int value;
307 };
308
309 /* List of registers that are pre-defined:
310
311 Each general register has predefined names of the form:
312 1. r<reg_num> which has the value <reg_num>.
313 2. r.<reg_num> which has the value <reg_num>.
314
315 Each floating point register has predefined names of the form:
316 1. f<reg_num> which has the value <reg_num>.
317 2. f.<reg_num> which has the value <reg_num>.
318
319 Each vector unit register has predefined names of the form:
320 1. v<reg_num> which has the value <reg_num>.
321 2. v.<reg_num> which has the value <reg_num>.
322
323 Each condition register has predefined names of the form:
324 1. cr<reg_num> which has the value <reg_num>.
325 2. cr.<reg_num> which has the value <reg_num>.
326
327 There are individual registers as well:
328 sp or r.sp has the value 1
329 rtoc or r.toc has the value 2
330 fpscr has the value 0
331 xer has the value 1
332 lr has the value 8
333 ctr has the value 9
334 pmr has the value 0
335 dar has the value 19
336 dsisr has the value 18
337 dec has the value 22
338 sdr1 has the value 25
339 srr0 has the value 26
340 srr1 has the value 27
341
342 The table is sorted. Suitable for searching by a binary search. */
343
344 static const struct pd_reg pre_defined_registers[] =
345 {
346 { "cr.0", 0 }, /* Condition Registers */
347 { "cr.1", 1 },
348 { "cr.2", 2 },
349 { "cr.3", 3 },
350 { "cr.4", 4 },
351 { "cr.5", 5 },
352 { "cr.6", 6 },
353 { "cr.7", 7 },
354
355 { "cr0", 0 },
356 { "cr1", 1 },
357 { "cr2", 2 },
358 { "cr3", 3 },
359 { "cr4", 4 },
360 { "cr5", 5 },
361 { "cr6", 6 },
362 { "cr7", 7 },
363
364 { "ctr", 9 },
365
366 { "dar", 19 }, /* Data Access Register */
367 { "dec", 22 }, /* Decrementer */
368 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
369
370 { "f.0", 0 }, /* Floating point registers */
371 { "f.1", 1 },
372 { "f.10", 10 },
373 { "f.11", 11 },
374 { "f.12", 12 },
375 { "f.13", 13 },
376 { "f.14", 14 },
377 { "f.15", 15 },
378 { "f.16", 16 },
379 { "f.17", 17 },
380 { "f.18", 18 },
381 { "f.19", 19 },
382 { "f.2", 2 },
383 { "f.20", 20 },
384 { "f.21", 21 },
385 { "f.22", 22 },
386 { "f.23", 23 },
387 { "f.24", 24 },
388 { "f.25", 25 },
389 { "f.26", 26 },
390 { "f.27", 27 },
391 { "f.28", 28 },
392 { "f.29", 29 },
393 { "f.3", 3 },
394 { "f.30", 30 },
395 { "f.31", 31 },
396
397 { "f.32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
398 { "f.33", 33 },
399 { "f.34", 34 },
400 { "f.35", 35 },
401 { "f.36", 36 },
402 { "f.37", 37 },
403 { "f.38", 38 },
404 { "f.39", 39 },
405 { "f.4", 4 },
406 { "f.40", 40 },
407 { "f.41", 41 },
408 { "f.42", 42 },
409 { "f.43", 43 },
410 { "f.44", 44 },
411 { "f.45", 45 },
412 { "f.46", 46 },
413 { "f.47", 47 },
414 { "f.48", 48 },
415 { "f.49", 49 },
416 { "f.5", 5 },
417 { "f.50", 50 },
418 { "f.51", 51 },
419 { "f.52", 52 },
420 { "f.53", 53 },
421 { "f.54", 54 },
422 { "f.55", 55 },
423 { "f.56", 56 },
424 { "f.57", 57 },
425 { "f.58", 58 },
426 { "f.59", 59 },
427 { "f.6", 6 },
428 { "f.60", 60 },
429 { "f.61", 61 },
430 { "f.62", 62 },
431 { "f.63", 63 },
432 { "f.7", 7 },
433 { "f.8", 8 },
434 { "f.9", 9 },
435
436 { "f0", 0 },
437 { "f1", 1 },
438 { "f10", 10 },
439 { "f11", 11 },
440 { "f12", 12 },
441 { "f13", 13 },
442 { "f14", 14 },
443 { "f15", 15 },
444 { "f16", 16 },
445 { "f17", 17 },
446 { "f18", 18 },
447 { "f19", 19 },
448 { "f2", 2 },
449 { "f20", 20 },
450 { "f21", 21 },
451 { "f22", 22 },
452 { "f23", 23 },
453 { "f24", 24 },
454 { "f25", 25 },
455 { "f26", 26 },
456 { "f27", 27 },
457 { "f28", 28 },
458 { "f29", 29 },
459 { "f3", 3 },
460 { "f30", 30 },
461 { "f31", 31 },
462
463 { "f32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
464 { "f33", 33 },
465 { "f34", 34 },
466 { "f35", 35 },
467 { "f36", 36 },
468 { "f37", 37 },
469 { "f38", 38 },
470 { "f39", 39 },
471 { "f4", 4 },
472 { "f40", 40 },
473 { "f41", 41 },
474 { "f42", 42 },
475 { "f43", 43 },
476 { "f44", 44 },
477 { "f45", 45 },
478 { "f46", 46 },
479 { "f47", 47 },
480 { "f48", 48 },
481 { "f49", 49 },
482 { "f5", 5 },
483 { "f50", 50 },
484 { "f51", 51 },
485 { "f52", 52 },
486 { "f53", 53 },
487 { "f54", 54 },
488 { "f55", 55 },
489 { "f56", 56 },
490 { "f57", 57 },
491 { "f58", 58 },
492 { "f59", 59 },
493 { "f6", 6 },
494 { "f60", 60 },
495 { "f61", 61 },
496 { "f62", 62 },
497 { "f63", 63 },
498 { "f7", 7 },
499 { "f8", 8 },
500 { "f9", 9 },
501
502 { "fpscr", 0 },
503
504 /* Quantization registers used with pair single instructions. */
505 { "gqr.0", 0 },
506 { "gqr.1", 1 },
507 { "gqr.2", 2 },
508 { "gqr.3", 3 },
509 { "gqr.4", 4 },
510 { "gqr.5", 5 },
511 { "gqr.6", 6 },
512 { "gqr.7", 7 },
513 { "gqr0", 0 },
514 { "gqr1", 1 },
515 { "gqr2", 2 },
516 { "gqr3", 3 },
517 { "gqr4", 4 },
518 { "gqr5", 5 },
519 { "gqr6", 6 },
520 { "gqr7", 7 },
521
522 { "lr", 8 }, /* Link Register */
523
524 { "pmr", 0 },
525
526 { "r.0", 0 }, /* General Purpose Registers */
527 { "r.1", 1 },
528 { "r.10", 10 },
529 { "r.11", 11 },
530 { "r.12", 12 },
531 { "r.13", 13 },
532 { "r.14", 14 },
533 { "r.15", 15 },
534 { "r.16", 16 },
535 { "r.17", 17 },
536 { "r.18", 18 },
537 { "r.19", 19 },
538 { "r.2", 2 },
539 { "r.20", 20 },
540 { "r.21", 21 },
541 { "r.22", 22 },
542 { "r.23", 23 },
543 { "r.24", 24 },
544 { "r.25", 25 },
545 { "r.26", 26 },
546 { "r.27", 27 },
547 { "r.28", 28 },
548 { "r.29", 29 },
549 { "r.3", 3 },
550 { "r.30", 30 },
551 { "r.31", 31 },
552 { "r.4", 4 },
553 { "r.5", 5 },
554 { "r.6", 6 },
555 { "r.7", 7 },
556 { "r.8", 8 },
557 { "r.9", 9 },
558
559 { "r.sp", 1 }, /* Stack Pointer */
560
561 { "r.toc", 2 }, /* Pointer to the table of contents */
562
563 { "r0", 0 }, /* More general purpose registers */
564 { "r1", 1 },
565 { "r10", 10 },
566 { "r11", 11 },
567 { "r12", 12 },
568 { "r13", 13 },
569 { "r14", 14 },
570 { "r15", 15 },
571 { "r16", 16 },
572 { "r17", 17 },
573 { "r18", 18 },
574 { "r19", 19 },
575 { "r2", 2 },
576 { "r20", 20 },
577 { "r21", 21 },
578 { "r22", 22 },
579 { "r23", 23 },
580 { "r24", 24 },
581 { "r25", 25 },
582 { "r26", 26 },
583 { "r27", 27 },
584 { "r28", 28 },
585 { "r29", 29 },
586 { "r3", 3 },
587 { "r30", 30 },
588 { "r31", 31 },
589 { "r4", 4 },
590 { "r5", 5 },
591 { "r6", 6 },
592 { "r7", 7 },
593 { "r8", 8 },
594 { "r9", 9 },
595
596 { "rtoc", 2 }, /* Table of contents */
597
598 { "sdr1", 25 }, /* Storage Description Register 1 */
599
600 { "sp", 1 },
601
602 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
603 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
604
605 { "v.0", 0 }, /* Vector (Altivec/VMX) registers */
606 { "v.1", 1 },
607 { "v.10", 10 },
608 { "v.11", 11 },
609 { "v.12", 12 },
610 { "v.13", 13 },
611 { "v.14", 14 },
612 { "v.15", 15 },
613 { "v.16", 16 },
614 { "v.17", 17 },
615 { "v.18", 18 },
616 { "v.19", 19 },
617 { "v.2", 2 },
618 { "v.20", 20 },
619 { "v.21", 21 },
620 { "v.22", 22 },
621 { "v.23", 23 },
622 { "v.24", 24 },
623 { "v.25", 25 },
624 { "v.26", 26 },
625 { "v.27", 27 },
626 { "v.28", 28 },
627 { "v.29", 29 },
628 { "v.3", 3 },
629 { "v.30", 30 },
630 { "v.31", 31 },
631 { "v.4", 4 },
632 { "v.5", 5 },
633 { "v.6", 6 },
634 { "v.7", 7 },
635 { "v.8", 8 },
636 { "v.9", 9 },
637
638 { "v0", 0 },
639 { "v1", 1 },
640 { "v10", 10 },
641 { "v11", 11 },
642 { "v12", 12 },
643 { "v13", 13 },
644 { "v14", 14 },
645 { "v15", 15 },
646 { "v16", 16 },
647 { "v17", 17 },
648 { "v18", 18 },
649 { "v19", 19 },
650 { "v2", 2 },
651 { "v20", 20 },
652 { "v21", 21 },
653 { "v22", 22 },
654 { "v23", 23 },
655 { "v24", 24 },
656 { "v25", 25 },
657 { "v26", 26 },
658 { "v27", 27 },
659 { "v28", 28 },
660 { "v29", 29 },
661 { "v3", 3 },
662 { "v30", 30 },
663 { "v31", 31 },
664 { "v4", 4 },
665 { "v5", 5 },
666 { "v6", 6 },
667 { "v7", 7 },
668 { "v8", 8 },
669 { "v9", 9 },
670
671 { "vs.0", 0 }, /* Vector Scalar (VSX) registers (ISA 2.06). */
672 { "vs.1", 1 },
673 { "vs.10", 10 },
674 { "vs.11", 11 },
675 { "vs.12", 12 },
676 { "vs.13", 13 },
677 { "vs.14", 14 },
678 { "vs.15", 15 },
679 { "vs.16", 16 },
680 { "vs.17", 17 },
681 { "vs.18", 18 },
682 { "vs.19", 19 },
683 { "vs.2", 2 },
684 { "vs.20", 20 },
685 { "vs.21", 21 },
686 { "vs.22", 22 },
687 { "vs.23", 23 },
688 { "vs.24", 24 },
689 { "vs.25", 25 },
690 { "vs.26", 26 },
691 { "vs.27", 27 },
692 { "vs.28", 28 },
693 { "vs.29", 29 },
694 { "vs.3", 3 },
695 { "vs.30", 30 },
696 { "vs.31", 31 },
697 { "vs.32", 32 },
698 { "vs.33", 33 },
699 { "vs.34", 34 },
700 { "vs.35", 35 },
701 { "vs.36", 36 },
702 { "vs.37", 37 },
703 { "vs.38", 38 },
704 { "vs.39", 39 },
705 { "vs.4", 4 },
706 { "vs.40", 40 },
707 { "vs.41", 41 },
708 { "vs.42", 42 },
709 { "vs.43", 43 },
710 { "vs.44", 44 },
711 { "vs.45", 45 },
712 { "vs.46", 46 },
713 { "vs.47", 47 },
714 { "vs.48", 48 },
715 { "vs.49", 49 },
716 { "vs.5", 5 },
717 { "vs.50", 50 },
718 { "vs.51", 51 },
719 { "vs.52", 52 },
720 { "vs.53", 53 },
721 { "vs.54", 54 },
722 { "vs.55", 55 },
723 { "vs.56", 56 },
724 { "vs.57", 57 },
725 { "vs.58", 58 },
726 { "vs.59", 59 },
727 { "vs.6", 6 },
728 { "vs.60", 60 },
729 { "vs.61", 61 },
730 { "vs.62", 62 },
731 { "vs.63", 63 },
732 { "vs.7", 7 },
733 { "vs.8", 8 },
734 { "vs.9", 9 },
735
736 { "vs0", 0 },
737 { "vs1", 1 },
738 { "vs10", 10 },
739 { "vs11", 11 },
740 { "vs12", 12 },
741 { "vs13", 13 },
742 { "vs14", 14 },
743 { "vs15", 15 },
744 { "vs16", 16 },
745 { "vs17", 17 },
746 { "vs18", 18 },
747 { "vs19", 19 },
748 { "vs2", 2 },
749 { "vs20", 20 },
750 { "vs21", 21 },
751 { "vs22", 22 },
752 { "vs23", 23 },
753 { "vs24", 24 },
754 { "vs25", 25 },
755 { "vs26", 26 },
756 { "vs27", 27 },
757 { "vs28", 28 },
758 { "vs29", 29 },
759 { "vs3", 3 },
760 { "vs30", 30 },
761 { "vs31", 31 },
762 { "vs32", 32 },
763 { "vs33", 33 },
764 { "vs34", 34 },
765 { "vs35", 35 },
766 { "vs36", 36 },
767 { "vs37", 37 },
768 { "vs38", 38 },
769 { "vs39", 39 },
770 { "vs4", 4 },
771 { "vs40", 40 },
772 { "vs41", 41 },
773 { "vs42", 42 },
774 { "vs43", 43 },
775 { "vs44", 44 },
776 { "vs45", 45 },
777 { "vs46", 46 },
778 { "vs47", 47 },
779 { "vs48", 48 },
780 { "vs49", 49 },
781 { "vs5", 5 },
782 { "vs50", 50 },
783 { "vs51", 51 },
784 { "vs52", 52 },
785 { "vs53", 53 },
786 { "vs54", 54 },
787 { "vs55", 55 },
788 { "vs56", 56 },
789 { "vs57", 57 },
790 { "vs58", 58 },
791 { "vs59", 59 },
792 { "vs6", 6 },
793 { "vs60", 60 },
794 { "vs61", 61 },
795 { "vs62", 62 },
796 { "vs63", 63 },
797 { "vs7", 7 },
798 { "vs8", 8 },
799 { "vs9", 9 },
800
801 { "xer", 1 },
802
803 };
804
805 #define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
806
807 /* Given NAME, find the register number associated with that name, return
808 the integer value associated with the given name or -1 on failure. */
809
810 static int
reg_name_search(const struct pd_reg * regs,int regcount,const char * name)811 reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
812 {
813 int middle, low, high;
814 int cmp;
815
816 low = 0;
817 high = regcount - 1;
818
819 do
820 {
821 middle = (low + high) / 2;
822 cmp = strcasecmp (name, regs[middle].name);
823 if (cmp < 0)
824 high = middle - 1;
825 else if (cmp > 0)
826 low = middle + 1;
827 else
828 return regs[middle].value;
829 }
830 while (low <= high);
831
832 return -1;
833 }
834
835 /*
836 * Summary of register_name.
837 *
838 * in: Input_line_pointer points to 1st char of operand.
839 *
840 * out: A expressionS.
841 * The operand may have been a register: in this case, X_op == O_register,
842 * X_add_number is set to the register number, and truth is returned.
843 * Input_line_pointer->(next non-blank) char after operand, or is in its
844 * original state.
845 */
846
847 static bfd_boolean
register_name(expressionS * expressionP)848 register_name (expressionS *expressionP)
849 {
850 int reg_number;
851 char *name;
852 char *start;
853 char c;
854
855 /* Find the spelling of the operand. */
856 start = name = input_line_pointer;
857 if (name[0] == '%' && ISALPHA (name[1]))
858 name = ++input_line_pointer;
859
860 else if (!reg_names_p || !ISALPHA (name[0]))
861 return FALSE;
862
863 c = get_symbol_end ();
864 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
865
866 /* Put back the delimiting char. */
867 *input_line_pointer = c;
868
869 /* Look to see if it's in the register table. */
870 if (reg_number >= 0)
871 {
872 expressionP->X_op = O_register;
873 expressionP->X_add_number = reg_number;
874
875 /* Make the rest nice. */
876 expressionP->X_add_symbol = NULL;
877 expressionP->X_op_symbol = NULL;
878 return TRUE;
879 }
880
881 /* Reset the line as if we had not done anything. */
882 input_line_pointer = start;
883 return FALSE;
884 }
885
886 /* This function is called for each symbol seen in an expression. It
887 handles the special parsing which PowerPC assemblers are supposed
888 to use for condition codes. */
889
890 /* Whether to do the special parsing. */
891 static bfd_boolean cr_operand;
892
893 /* Names to recognize in a condition code. This table is sorted. */
894 static const struct pd_reg cr_names[] =
895 {
896 { "cr0", 0 },
897 { "cr1", 1 },
898 { "cr2", 2 },
899 { "cr3", 3 },
900 { "cr4", 4 },
901 { "cr5", 5 },
902 { "cr6", 6 },
903 { "cr7", 7 },
904 { "eq", 2 },
905 { "gt", 1 },
906 { "lt", 0 },
907 { "so", 3 },
908 { "un", 3 }
909 };
910
911 /* Parsing function. This returns non-zero if it recognized an
912 expression. */
913
914 int
ppc_parse_name(const char * name,expressionS * exp)915 ppc_parse_name (const char *name, expressionS *exp)
916 {
917 int val;
918
919 if (! cr_operand)
920 return 0;
921
922 if (*name == '%')
923 ++name;
924 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
925 name);
926 if (val < 0)
927 return 0;
928
929 exp->X_op = O_constant;
930 exp->X_add_number = val;
931
932 return 1;
933 }
934
935 /* Local variables. */
936
937 /* Whether to target xcoff64/elf64. */
938 static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
939
940 /* Opcode hash table. */
941 static struct hash_control *ppc_hash;
942
943 /* Macro hash table. */
944 static struct hash_control *ppc_macro_hash;
945
946 #ifdef OBJ_ELF
947 /* What type of shared library support to use. */
948 static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
949
950 /* Flags to set in the elf header. */
951 static flagword ppc_flags = 0;
952
953 /* Whether this is Solaris or not. */
954 #ifdef TARGET_SOLARIS_COMMENT
955 #define SOLARIS_P TRUE
956 #else
957 #define SOLARIS_P FALSE
958 #endif
959
960 static bfd_boolean msolaris = SOLARIS_P;
961 #endif
962
963 #ifdef OBJ_XCOFF
964
965 /* The RS/6000 assembler uses the .csect pseudo-op to generate code
966 using a bunch of different sections. These assembler sections,
967 however, are all encompassed within the .text or .data sections of
968 the final output file. We handle this by using different
969 subsegments within these main segments. */
970
971 /* Next subsegment to allocate within the .text segment. */
972 static subsegT ppc_text_subsegment = 2;
973
974 /* Linked list of csects in the text section. */
975 static symbolS *ppc_text_csects;
976
977 /* Next subsegment to allocate within the .data segment. */
978 static subsegT ppc_data_subsegment = 2;
979
980 /* Linked list of csects in the data section. */
981 static symbolS *ppc_data_csects;
982
983 /* The current csect. */
984 static symbolS *ppc_current_csect;
985
986 /* The RS/6000 assembler uses a TOC which holds addresses of functions
987 and variables. Symbols are put in the TOC with the .tc pseudo-op.
988 A special relocation is used when accessing TOC entries. We handle
989 the TOC as a subsegment within the .data segment. We set it up if
990 we see a .toc pseudo-op, and save the csect symbol here. */
991 static symbolS *ppc_toc_csect;
992
993 /* The first frag in the TOC subsegment. */
994 static fragS *ppc_toc_frag;
995
996 /* The first frag in the first subsegment after the TOC in the .data
997 segment. NULL if there are no subsegments after the TOC. */
998 static fragS *ppc_after_toc_frag;
999
1000 /* The current static block. */
1001 static symbolS *ppc_current_block;
1002
1003 /* The COFF debugging section; set by md_begin. This is not the
1004 .debug section, but is instead the secret BFD section which will
1005 cause BFD to set the section number of a symbol to N_DEBUG. */
1006 static asection *ppc_coff_debug_section;
1007
1008 /* Structure to set the length field of the dwarf sections. */
1009 struct dw_subsection {
1010 /* Subsections are simply linked. */
1011 struct dw_subsection *link;
1012
1013 /* The subsection number. */
1014 subsegT subseg;
1015
1016 /* Expression to compute the length of the section. */
1017 expressionS end_exp;
1018 };
1019
1020 static struct dw_section {
1021 /* Corresponding section. */
1022 segT sect;
1023
1024 /* Simply linked list of subsections with a label. */
1025 struct dw_subsection *list_subseg;
1026
1027 /* The anonymous subsection. */
1028 struct dw_subsection *anon_subseg;
1029 } dw_sections[XCOFF_DWSECT_NBR_NAMES];
1030 #endif /* OBJ_XCOFF */
1031
1032 #ifdef TE_PE
1033
1034 /* Various sections that we need for PE coff support. */
1035 static segT ydata_section;
1036 static segT pdata_section;
1037 static segT reldata_section;
1038 static segT rdata_section;
1039 static segT tocdata_section;
1040
1041 /* The current section and the previous section. See ppc_previous. */
1042 static segT ppc_previous_section;
1043 static segT ppc_current_section;
1044
1045 #endif /* TE_PE */
1046
1047 #ifdef OBJ_ELF
1048 symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
1049 #define PPC_APUINFO_ISEL 0x40
1050 #define PPC_APUINFO_PMR 0x41
1051 #define PPC_APUINFO_RFMCI 0x42
1052 #define PPC_APUINFO_CACHELCK 0x43
1053 #define PPC_APUINFO_SPE 0x100
1054 #define PPC_APUINFO_EFS 0x101
1055 #define PPC_APUINFO_BRLOCK 0x102
1056 #define PPC_APUINFO_VLE 0x104
1057
1058 /*
1059 * We keep a list of APUinfo
1060 */
1061 unsigned long *ppc_apuinfo_list;
1062 unsigned int ppc_apuinfo_num;
1063 unsigned int ppc_apuinfo_num_alloc;
1064 #endif /* OBJ_ELF */
1065
1066 #ifdef OBJ_ELF
1067 const char *const md_shortopts = "b:l:usm:K:VQ:";
1068 #else
1069 const char *const md_shortopts = "um:";
1070 #endif
1071 #define OPTION_NOPS (OPTION_MD_BASE + 0)
1072 const struct option md_longopts[] = {
1073 {"nops", required_argument, NULL, OPTION_NOPS},
1074 {"ppc476-workaround", no_argument, &warn_476, 1},
1075 {"no-ppc476-workaround", no_argument, &warn_476, 0},
1076 {NULL, no_argument, NULL, 0}
1077 };
1078 const size_t md_longopts_size = sizeof (md_longopts);
1079
1080 int
md_parse_option(int c,char * arg)1081 md_parse_option (int c, char *arg)
1082 {
1083 ppc_cpu_t new_cpu;
1084
1085 switch (c)
1086 {
1087 case 'u':
1088 /* -u means that any undefined symbols should be treated as
1089 external, which is the default for gas anyhow. */
1090 break;
1091
1092 #ifdef OBJ_ELF
1093 case 'l':
1094 /* Solaris as takes -le (presumably for little endian). For completeness
1095 sake, recognize -be also. */
1096 if (strcmp (arg, "e") == 0)
1097 {
1098 target_big_endian = 0;
1099 set_target_endian = 1;
1100 if (ppc_cpu & PPC_OPCODE_VLE)
1101 as_bad (_("the use of -mvle requires big endian."));
1102 }
1103 else
1104 return 0;
1105
1106 break;
1107
1108 case 'b':
1109 if (strcmp (arg, "e") == 0)
1110 {
1111 target_big_endian = 1;
1112 set_target_endian = 1;
1113 }
1114 else
1115 return 0;
1116
1117 break;
1118
1119 case 'K':
1120 /* Recognize -K PIC. */
1121 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
1122 {
1123 shlib = SHLIB_PIC;
1124 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1125 }
1126 else
1127 return 0;
1128
1129 break;
1130 #endif
1131
1132 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1133 case 'a':
1134 if (strcmp (arg, "64") == 0)
1135 {
1136 #ifdef BFD64
1137 ppc_obj64 = 1;
1138 if (ppc_cpu & PPC_OPCODE_VLE)
1139 as_bad (_("the use of -mvle requires -a32."));
1140 #else
1141 as_fatal (_("%s unsupported"), "-a64");
1142 #endif
1143 }
1144 else if (strcmp (arg, "32") == 0)
1145 ppc_obj64 = 0;
1146 else
1147 return 0;
1148 break;
1149
1150 case 'm':
1151 new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, arg);
1152 if (new_cpu != 0)
1153 {
1154 ppc_cpu = new_cpu;
1155 if (strcmp (arg, "vle") == 0)
1156 {
1157 if (set_target_endian && target_big_endian == 0)
1158 as_bad (_("the use of -mvle requires big endian."));
1159 if (ppc_obj64)
1160 as_bad (_("the use of -mvle requires -a32."));
1161 }
1162 }
1163
1164 else if (strcmp (arg, "regnames") == 0)
1165 reg_names_p = TRUE;
1166
1167 else if (strcmp (arg, "no-regnames") == 0)
1168 reg_names_p = FALSE;
1169
1170 #ifdef OBJ_ELF
1171 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1172 that require relocation. */
1173 else if (strcmp (arg, "relocatable") == 0)
1174 {
1175 shlib = SHLIB_MRELOCATABLE;
1176 ppc_flags |= EF_PPC_RELOCATABLE;
1177 }
1178
1179 else if (strcmp (arg, "relocatable-lib") == 0)
1180 {
1181 shlib = SHLIB_MRELOCATABLE;
1182 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1183 }
1184
1185 /* -memb, set embedded bit. */
1186 else if (strcmp (arg, "emb") == 0)
1187 ppc_flags |= EF_PPC_EMB;
1188
1189 /* -mlittle/-mbig set the endianness. */
1190 else if (strcmp (arg, "little") == 0
1191 || strcmp (arg, "little-endian") == 0)
1192 {
1193 target_big_endian = 0;
1194 set_target_endian = 1;
1195 if (ppc_cpu & PPC_OPCODE_VLE)
1196 as_bad (_("the use of -mvle requires big endian."));
1197 }
1198
1199 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1200 {
1201 target_big_endian = 1;
1202 set_target_endian = 1;
1203 }
1204
1205 else if (strcmp (arg, "solaris") == 0)
1206 {
1207 msolaris = TRUE;
1208 ppc_comment_chars = ppc_solaris_comment_chars;
1209 }
1210
1211 else if (strcmp (arg, "no-solaris") == 0)
1212 {
1213 msolaris = FALSE;
1214 ppc_comment_chars = ppc_eabi_comment_chars;
1215 }
1216 #endif
1217 else
1218 {
1219 as_bad (_("invalid switch -m%s"), arg);
1220 return 0;
1221 }
1222 break;
1223
1224 #ifdef OBJ_ELF
1225 /* -V: SVR4 argument to print version ID. */
1226 case 'V':
1227 print_version_id ();
1228 break;
1229
1230 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1231 should be emitted or not. FIXME: Not implemented. */
1232 case 'Q':
1233 break;
1234
1235 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1236 rather than .stabs.excl, which is ignored by the linker.
1237 FIXME: Not implemented. */
1238 case 's':
1239 if (arg)
1240 return 0;
1241
1242 break;
1243 #endif
1244
1245 case OPTION_NOPS:
1246 {
1247 char *end;
1248 nop_limit = strtoul (optarg, &end, 0);
1249 if (*end)
1250 as_bad (_("--nops needs a numeric argument"));
1251 }
1252 break;
1253
1254 case 0:
1255 break;
1256
1257 default:
1258 return 0;
1259 }
1260
1261 return 1;
1262 }
1263
1264 void
md_show_usage(FILE * stream)1265 md_show_usage (FILE *stream)
1266 {
1267 fprintf (stream, _("\
1268 PowerPC options:\n\
1269 -a32 generate ELF32/XCOFF32\n\
1270 -a64 generate ELF64/XCOFF64\n\
1271 -u ignored\n\
1272 -mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1273 -mpwr generate code for POWER (RIOS1)\n\
1274 -m601 generate code for PowerPC 601\n\
1275 -mppc, -mppc32, -m603, -m604\n\
1276 generate code for PowerPC 603/604\n\
1277 -m403 generate code for PowerPC 403\n\
1278 -m405 generate code for PowerPC 405\n\
1279 -m440 generate code for PowerPC 440\n\
1280 -m464 generate code for PowerPC 464\n\
1281 -m476 generate code for PowerPC 476\n\
1282 -m7400, -m7410, -m7450, -m7455\n\
1283 generate code for PowerPC 7400/7410/7450/7455\n\
1284 -m750cl generate code for PowerPC 750cl\n"));
1285 fprintf (stream, _("\
1286 -mppc64, -m620 generate code for PowerPC 620/625/630\n\
1287 -mppc64bridge generate code for PowerPC 64, including bridge insns\n\
1288 -mbooke generate code for 32-bit PowerPC BookE\n\
1289 -ma2 generate code for A2 architecture\n\
1290 -mpower4, -mpwr4 generate code for Power4 architecture\n\
1291 -mpower5, -mpwr5, -mpwr5x\n\
1292 generate code for Power5 architecture\n\
1293 -mpower6, -mpwr6 generate code for Power6 architecture\n\
1294 -mpower7, -mpwr7 generate code for Power7 architecture\n\
1295 -mpower8, -mpwr8 generate code for Power8 architecture\n\
1296 -mcell generate code for Cell Broadband Engine architecture\n\
1297 -mcom generate code Power/PowerPC common instructions\n\
1298 -many generate code for any architecture (PWR/PWRX/PPC)\n"));
1299 fprintf (stream, _("\
1300 -maltivec generate code for AltiVec\n\
1301 -mvsx generate code for Vector-Scalar (VSX) instructions\n\
1302 -mhtm generate code for Hardware Transactional Memory\n\
1303 -me300 generate code for PowerPC e300 family\n\
1304 -me500, -me500x2 generate code for Motorola e500 core complex\n\
1305 -me500mc, generate code for Freescale e500mc core complex\n\
1306 -me500mc64, generate code for Freescale e500mc64 core complex\n\
1307 -me5500, generate code for Freescale e5500 core complex\n\
1308 -me6500, generate code for Freescale e6500 core complex\n\
1309 -mspe generate code for Motorola SPE instructions\n\
1310 -mvle generate code for Freescale VLE instructions\n\
1311 -mtitan generate code for AppliedMicro Titan core complex\n\
1312 -mregnames Allow symbolic names for registers\n\
1313 -mno-regnames Do not allow symbolic names for registers\n"));
1314 #ifdef OBJ_ELF
1315 fprintf (stream, _("\
1316 -mrelocatable support for GCC's -mrelocatble option\n\
1317 -mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1318 -memb set PPC_EMB bit in ELF flags\n\
1319 -mlittle, -mlittle-endian, -le\n\
1320 generate code for a little endian machine\n\
1321 -mbig, -mbig-endian, -be\n\
1322 generate code for a big endian machine\n\
1323 -msolaris generate code for Solaris\n\
1324 -mno-solaris do not generate code for Solaris\n\
1325 -K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n\
1326 -V print assembler version number\n\
1327 -Qy, -Qn ignored\n"));
1328 #endif
1329 fprintf (stream, _("\
1330 -nops=count when aligning, more than COUNT nops uses a branch\n\
1331 -ppc476-workaround warn if emitting data to code sections\n"));
1332 }
1333
1334 /* Set ppc_cpu if it is not already set. */
1335
1336 static void
ppc_set_cpu(void)1337 ppc_set_cpu (void)
1338 {
1339 const char *default_os = TARGET_OS;
1340 const char *default_cpu = TARGET_CPU;
1341
1342 if ((ppc_cpu & ~(ppc_cpu_t) PPC_OPCODE_ANY) == 0)
1343 {
1344 if (ppc_obj64)
1345 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_64;
1346 else if (strncmp (default_os, "aix", 3) == 0
1347 && default_os[3] >= '4' && default_os[3] <= '9')
1348 ppc_cpu |= PPC_OPCODE_COMMON;
1349 else if (strncmp (default_os, "aix3", 4) == 0)
1350 ppc_cpu |= PPC_OPCODE_POWER;
1351 else if (strcmp (default_cpu, "rs6000") == 0)
1352 ppc_cpu |= PPC_OPCODE_POWER;
1353 else if (strncmp (default_cpu, "powerpc", 7) == 0)
1354 ppc_cpu |= PPC_OPCODE_PPC;
1355 else
1356 as_fatal (_("unknown default cpu = %s, os = %s"),
1357 default_cpu, default_os);
1358 }
1359 }
1360
1361 /* Figure out the BFD architecture to use. This function and ppc_mach
1362 are called well before md_begin, when the output file is opened. */
1363
1364 enum bfd_architecture
ppc_arch(void)1365 ppc_arch (void)
1366 {
1367 const char *default_cpu = TARGET_CPU;
1368 ppc_set_cpu ();
1369
1370 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1371 return bfd_arch_powerpc;
1372 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
1373 return bfd_arch_powerpc;
1374 if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1375 return bfd_arch_rs6000;
1376 if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1377 {
1378 if (strcmp (default_cpu, "rs6000") == 0)
1379 return bfd_arch_rs6000;
1380 else if (strncmp (default_cpu, "powerpc", 7) == 0)
1381 return bfd_arch_powerpc;
1382 }
1383
1384 as_fatal (_("neither Power nor PowerPC opcodes were selected."));
1385 return bfd_arch_unknown;
1386 }
1387
1388 unsigned long
ppc_mach(void)1389 ppc_mach (void)
1390 {
1391 if (ppc_obj64)
1392 return bfd_mach_ppc64;
1393 else if (ppc_arch () == bfd_arch_rs6000)
1394 return bfd_mach_rs6k;
1395 else if (ppc_cpu & PPC_OPCODE_TITAN)
1396 return bfd_mach_ppc_titan;
1397 else if (ppc_cpu & PPC_OPCODE_VLE)
1398 return bfd_mach_ppc_vle;
1399 else
1400 return bfd_mach_ppc;
1401 }
1402
1403 extern char*
ppc_target_format(void)1404 ppc_target_format (void)
1405 {
1406 #ifdef OBJ_COFF
1407 #ifdef TE_PE
1408 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
1409 #elif TE_POWERMAC
1410 return "xcoff-powermac";
1411 #else
1412 # ifdef TE_AIX5
1413 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
1414 # else
1415 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
1416 # endif
1417 #endif
1418 #endif
1419 #ifdef OBJ_ELF
1420 # ifdef TE_FreeBSD
1421 return (ppc_obj64 ? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd");
1422 # elif defined (TE_VXWORKS)
1423 return "elf32-powerpc-vxworks";
1424 # else
1425 return (target_big_endian
1426 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1427 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
1428 # endif
1429 #endif
1430 }
1431
1432 /* Validate one entry in powerpc_opcodes[] or vle_opcodes[].
1433 Return TRUE if there's a problem, otherwise FALSE. */
1434
1435 static bfd_boolean
insn_validate(const struct powerpc_opcode * op)1436 insn_validate (const struct powerpc_opcode *op)
1437 {
1438 const unsigned char *o;
1439 unsigned long omask = op->mask;
1440
1441 /* The mask had better not trim off opcode bits. */
1442 if ((op->opcode & omask) != op->opcode)
1443 {
1444 as_bad (_("mask trims opcode bits for %s"), op->name);
1445 return TRUE;
1446 }
1447
1448 /* The operands must not overlap the opcode or each other. */
1449 for (o = op->operands; *o; ++o)
1450 {
1451 if (*o >= num_powerpc_operands)
1452 {
1453 as_bad (_("operand index error for %s"), op->name);
1454 return TRUE;
1455 }
1456 else
1457 {
1458 const struct powerpc_operand *operand = &powerpc_operands[*o];
1459 if (operand->shift != PPC_OPSHIFT_INV)
1460 {
1461 unsigned long mask;
1462
1463 if (operand->shift >= 0)
1464 mask = operand->bitm << operand->shift;
1465 else
1466 mask = operand->bitm >> -operand->shift;
1467 if (omask & mask)
1468 {
1469 as_bad (_("operand %d overlap in %s"),
1470 (int) (o - op->operands), op->name);
1471 return TRUE;
1472 }
1473 omask |= mask;
1474 }
1475 }
1476 }
1477 return FALSE;
1478 }
1479
1480 /* Insert opcodes and macros into hash tables. Called at startup and
1481 for .machine pseudo. */
1482
1483 static void
ppc_setup_opcodes(void)1484 ppc_setup_opcodes (void)
1485 {
1486 const struct powerpc_opcode *op;
1487 const struct powerpc_opcode *op_end;
1488 const struct powerpc_macro *macro;
1489 const struct powerpc_macro *macro_end;
1490 bfd_boolean bad_insn = FALSE;
1491
1492 if (ppc_hash != NULL)
1493 hash_die (ppc_hash);
1494 if (ppc_macro_hash != NULL)
1495 hash_die (ppc_macro_hash);
1496
1497 /* Insert the opcodes into a hash table. */
1498 ppc_hash = hash_new ();
1499
1500 if (ENABLE_CHECKING)
1501 {
1502 unsigned int i;
1503
1504 /* An index into powerpc_operands is stored in struct fix
1505 fx_pcrel_adjust which is 8 bits wide. */
1506 gas_assert (num_powerpc_operands < 256);
1507
1508 /* Check operand masks. Code here and in the disassembler assumes
1509 all the 1's in the mask are contiguous. */
1510 for (i = 0; i < num_powerpc_operands; ++i)
1511 {
1512 unsigned long mask = powerpc_operands[i].bitm;
1513 unsigned long right_bit;
1514 unsigned int j;
1515
1516 right_bit = mask & -mask;
1517 mask += right_bit;
1518 right_bit = mask & -mask;
1519 if (mask != right_bit)
1520 {
1521 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1522 bad_insn = TRUE;
1523 }
1524 for (j = i + 1; j < num_powerpc_operands; ++j)
1525 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1526 sizeof (powerpc_operands[0])) == 0)
1527 {
1528 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1529 j, i);
1530 bad_insn = TRUE;
1531 }
1532 }
1533 }
1534
1535 op_end = powerpc_opcodes + powerpc_num_opcodes;
1536 for (op = powerpc_opcodes; op < op_end; op++)
1537 {
1538 if (ENABLE_CHECKING)
1539 {
1540 if (op != powerpc_opcodes)
1541 {
1542 int old_opcode = PPC_OP (op[-1].opcode);
1543 int new_opcode = PPC_OP (op[0].opcode);
1544
1545 #ifdef PRINT_OPCODE_TABLE
1546 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
1547 op->name, (unsigned int) (op - powerpc_opcodes),
1548 (unsigned int) new_opcode, (unsigned int) op->opcode,
1549 (unsigned int) op->mask, (unsigned long long) op->flags);
1550 #endif
1551
1552 /* The major opcodes had better be sorted. Code in the
1553 disassembler assumes the insns are sorted according to
1554 major opcode. */
1555 if (new_opcode < old_opcode)
1556 {
1557 as_bad (_("major opcode is not sorted for %s"),
1558 op->name);
1559 bad_insn = TRUE;
1560 }
1561 }
1562 bad_insn |= insn_validate (op);
1563 }
1564
1565 if ((ppc_cpu & op->flags) != 0
1566 && !(ppc_cpu & op->deprecated))
1567 {
1568 const char *retval;
1569
1570 retval = hash_insert (ppc_hash, op->name, (void *) op);
1571 if (retval != NULL)
1572 {
1573 as_bad (_("duplicate instruction %s"),
1574 op->name);
1575 bad_insn = TRUE;
1576 }
1577 }
1578 }
1579
1580 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1581 for (op = powerpc_opcodes; op < op_end; op++)
1582 hash_insert (ppc_hash, op->name, (void *) op);
1583
1584 op_end = vle_opcodes + vle_num_opcodes;
1585 for (op = vle_opcodes; op < op_end; op++)
1586 {
1587 if (ENABLE_CHECKING)
1588 {
1589 if (op != vle_opcodes)
1590 {
1591 unsigned old_seg, new_seg;
1592
1593 old_seg = VLE_OP (op[-1].opcode, op[-1].mask);
1594 old_seg = VLE_OP_TO_SEG (old_seg);
1595 new_seg = VLE_OP (op[0].opcode, op[0].mask);
1596 new_seg = VLE_OP_TO_SEG (new_seg);
1597
1598 #ifdef PRINT_OPCODE_TABLE
1599 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
1600 op->name, (unsigned int) (op - powerpc_opcodes),
1601 (unsigned int) new_seg, (unsigned int) op->opcode,
1602 (unsigned int) op->mask, (unsigned long long) op->flags);
1603 #endif
1604 /* The major opcodes had better be sorted. Code in the
1605 disassembler assumes the insns are sorted according to
1606 major opcode. */
1607 if (new_seg < old_seg)
1608 {
1609 as_bad (_("major opcode is not sorted for %s"),
1610 op->name);
1611 bad_insn = TRUE;
1612 }
1613 }
1614
1615 bad_insn |= insn_validate (op);
1616 }
1617
1618 if ((ppc_cpu & op->flags) != 0
1619 && !(ppc_cpu & op->deprecated))
1620 {
1621 const char *retval;
1622
1623 retval = hash_insert (ppc_hash, op->name, (void *) op);
1624 if (retval != NULL)
1625 {
1626 as_bad (_("duplicate instruction %s"),
1627 op->name);
1628 bad_insn = TRUE;
1629 }
1630 }
1631 }
1632
1633 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
1634 for (op = vle_opcodes; op < op_end; op++)
1635 hash_insert (ppc_hash, op->name, (void *) op);
1636
1637 /* Insert the macros into a hash table. */
1638 ppc_macro_hash = hash_new ();
1639
1640 macro_end = powerpc_macros + powerpc_num_macros;
1641 for (macro = powerpc_macros; macro < macro_end; macro++)
1642 {
1643 if ((macro->flags & ppc_cpu) != 0 || (ppc_cpu & PPC_OPCODE_ANY) != 0)
1644 {
1645 const char *retval;
1646
1647 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
1648 if (retval != (const char *) NULL)
1649 {
1650 as_bad (_("duplicate macro %s"), macro->name);
1651 bad_insn = TRUE;
1652 }
1653 }
1654 }
1655
1656 if (bad_insn)
1657 abort ();
1658 }
1659
1660 /* This function is called when the assembler starts up. It is called
1661 after the options have been parsed and the output file has been
1662 opened. */
1663
1664 void
md_begin(void)1665 md_begin (void)
1666 {
1667 ppc_set_cpu ();
1668
1669 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1670 ppc_dwarf2_line_min_insn_length = (ppc_cpu & PPC_OPCODE_VLE) ? 2 : 4;
1671
1672 #ifdef OBJ_ELF
1673 /* Set the ELF flags if desired. */
1674 if (ppc_flags && !msolaris)
1675 bfd_set_private_flags (stdoutput, ppc_flags);
1676 #endif
1677
1678 ppc_setup_opcodes ();
1679
1680 /* Tell the main code what the endianness is if it is not overridden
1681 by the user. */
1682 if (!set_target_endian)
1683 {
1684 set_target_endian = 1;
1685 target_big_endian = PPC_BIG_ENDIAN;
1686 }
1687
1688 #ifdef OBJ_XCOFF
1689 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1690
1691 /* Create dummy symbols to serve as initial csects. This forces the
1692 text csects to precede the data csects. These symbols will not
1693 be output. */
1694 ppc_text_csects = symbol_make ("dummy\001");
1695 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
1696 ppc_data_csects = symbol_make ("dummy\001");
1697 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
1698 #endif
1699
1700 #ifdef TE_PE
1701
1702 ppc_current_section = text_section;
1703 ppc_previous_section = 0;
1704
1705 #endif
1706 }
1707
1708 void
ppc_cleanup(void)1709 ppc_cleanup (void)
1710 {
1711 #ifdef OBJ_ELF
1712 if (ppc_apuinfo_list == NULL)
1713 return;
1714
1715 /* Ok, so write the section info out. We have this layout:
1716
1717 byte data what
1718 ---- ---- ----
1719 0 8 length of "APUinfo\0"
1720 4 (n*4) number of APU's (4 bytes each)
1721 8 2 note type 2
1722 12 "APUinfo\0" name
1723 20 APU#1 first APU's info
1724 24 APU#2 second APU's info
1725 ... ...
1726 */
1727 {
1728 char *p;
1729 asection *seg = now_seg;
1730 subsegT subseg = now_subseg;
1731 asection *apuinfo_secp = (asection *) NULL;
1732 unsigned int i;
1733
1734 /* Create the .PPC.EMB.apuinfo section. */
1735 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1736 bfd_set_section_flags (stdoutput,
1737 apuinfo_secp,
1738 SEC_HAS_CONTENTS | SEC_READONLY);
1739
1740 p = frag_more (4);
1741 md_number_to_chars (p, (valueT) 8, 4);
1742
1743 p = frag_more (4);
1744 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
1745
1746 p = frag_more (4);
1747 md_number_to_chars (p, (valueT) 2, 4);
1748
1749 p = frag_more (8);
1750 strcpy (p, "APUinfo");
1751
1752 for (i = 0; i < ppc_apuinfo_num; i++)
1753 {
1754 p = frag_more (4);
1755 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
1756 }
1757
1758 frag_align (2, 0, 0);
1759
1760 /* We probably can't restore the current segment, for there likely
1761 isn't one yet... */
1762 if (seg && subseg)
1763 subseg_set (seg, subseg);
1764 }
1765 #endif
1766 }
1767
1768 /* Insert an operand value into an instruction. */
1769
1770 static unsigned long
ppc_insert_operand(unsigned long insn,const struct powerpc_operand * operand,offsetT val,ppc_cpu_t cpu,char * file,unsigned int line)1771 ppc_insert_operand (unsigned long insn,
1772 const struct powerpc_operand *operand,
1773 offsetT val,
1774 ppc_cpu_t cpu,
1775 char *file,
1776 unsigned int line)
1777 {
1778 long min, max, right;
1779
1780 max = operand->bitm;
1781 right = max & -max;
1782 min = 0;
1783
1784 if ((operand->flags & PPC_OPERAND_SIGNOPT) != 0)
1785 {
1786 /* Extend the allowed range for addis to [-65536, 65535].
1787 Similarly for some VLE high part insns. For 64-bit it
1788 would be good to disable this for signed fields since the
1789 value is sign extended into the high 32 bits of the register.
1790 If the value is, say, an address, then we might care about
1791 the high bits. However, gcc as of 2014-06 uses unsigned
1792 values when loading the high part of 64-bit constants using
1793 lis.
1794 Use the same extended range for cmpli, to allow at least
1795 [-32768, 65535]. */
1796 min = ~max & -right;
1797 }
1798 else if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
1799 {
1800 max = (max >> 1) & -right;
1801 min = ~max & -right;
1802 }
1803
1804 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
1805 max++;
1806
1807 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
1808 {
1809 long tmp = min;
1810 min = -max;
1811 max = -tmp;
1812 }
1813
1814 if (min <= max)
1815 {
1816 /* Some people write constants with the sign extension done by
1817 hand but only up to 32 bits. This shouldn't really be valid,
1818 but, to permit this code to assemble on a 64-bit host, we
1819 sign extend the 32-bit value to 64 bits if so doing makes the
1820 value valid. */
1821 if (val > max
1822 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1823 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1824 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1825 val = val - 0x80000000 - 0x80000000;
1826
1827 /* Similarly, people write expressions like ~(1<<15), and expect
1828 this to be OK for a 32-bit unsigned value. */
1829 else if (val < min
1830 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1831 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1832 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1833 val = val + 0x80000000 + 0x80000000;
1834
1835 else if (val < min
1836 || val > max
1837 || (val & (right - 1)) != 0)
1838 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1839 }
1840
1841 if (operand->insert)
1842 {
1843 const char *errmsg;
1844
1845 errmsg = NULL;
1846 insn = (*operand->insert) (insn, (long) val, cpu, &errmsg);
1847 if (errmsg != (const char *) NULL)
1848 as_bad_where (file, line, "%s", errmsg);
1849 }
1850 else if (operand->shift >= 0)
1851 insn |= ((long) val & operand->bitm) << operand->shift;
1852 else
1853 insn |= ((long) val & operand->bitm) >> -operand->shift;
1854
1855 return insn;
1856 }
1857
1858
1859 #ifdef OBJ_ELF
1860 /* Parse @got, etc. and return the desired relocation. */
1861 static bfd_reloc_code_real_type
ppc_elf_suffix(char ** str_p,expressionS * exp_p)1862 ppc_elf_suffix (char **str_p, expressionS *exp_p)
1863 {
1864 struct map_bfd {
1865 char *string;
1866 unsigned int length : 8;
1867 unsigned int valid32 : 1;
1868 unsigned int valid64 : 1;
1869 unsigned int reloc;
1870 };
1871
1872 char ident[20];
1873 char *str = *str_p;
1874 char *str2;
1875 int ch;
1876 int len;
1877 const struct map_bfd *ptr;
1878
1879 #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1880 #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1881 #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
1882
1883 static const struct map_bfd mapping[] = {
1884 MAP ("l", BFD_RELOC_LO16),
1885 MAP ("h", BFD_RELOC_HI16),
1886 MAP ("ha", BFD_RELOC_HI16_S),
1887 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1888 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1889 MAP ("got", BFD_RELOC_16_GOTOFF),
1890 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1891 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1892 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1893 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1894 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1895 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1896 MAP ("copy", BFD_RELOC_PPC_COPY),
1897 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1898 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1899 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1900 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1901 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1902 MAP ("tls", BFD_RELOC_PPC_TLS),
1903 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1904 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1905 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1906 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1907 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1908 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1909 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1910 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1911 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1912 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1913 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1914 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1915 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1916 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1917 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1918 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1919 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1920 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1921 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1922 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1923 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1924 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1925 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1926 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1927 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1928 MAP32 ("fixup", BFD_RELOC_CTOR),
1929 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1930 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1931 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1932 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1933 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1934 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1935 MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A),
1936 MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A),
1937 MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A),
1938 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1939 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1940 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1941 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1942 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1943 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1944 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1945 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1946 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1947 MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO),
1948 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1949 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1950 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1951 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1952 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1953 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1954 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1955 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1956 MAP64 ("high", BFD_RELOC_PPC64_ADDR16_HIGH),
1957 MAP64 ("higha", BFD_RELOC_PPC64_ADDR16_HIGHA),
1958 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1959 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1960 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1961 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1962 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1963 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1964 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1965 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1966 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1967 MAP64 ("dtprel@high", BFD_RELOC_PPC64_DTPREL16_HIGH),
1968 MAP64 ("dtprel@higha", BFD_RELOC_PPC64_DTPREL16_HIGHA),
1969 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1970 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1971 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1972 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1973 MAP64 ("localentry", BFD_RELOC_PPC64_ADDR64_LOCAL),
1974 MAP64 ("tprel@high", BFD_RELOC_PPC64_TPREL16_HIGH),
1975 MAP64 ("tprel@higha", BFD_RELOC_PPC64_TPREL16_HIGHA),
1976 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1977 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1978 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1979 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1980 { (char *) 0, 0, 0, 0, BFD_RELOC_NONE }
1981 };
1982
1983 if (*str++ != '@')
1984 return BFD_RELOC_NONE;
1985
1986 for (ch = *str, str2 = ident;
1987 (str2 < ident + sizeof (ident) - 1
1988 && (ISALNUM (ch) || ch == '@'));
1989 ch = *++str)
1990 {
1991 *str2++ = TOLOWER (ch);
1992 }
1993
1994 *str2 = '\0';
1995 len = str2 - ident;
1996
1997 ch = ident[0];
1998 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1999 if (ch == ptr->string[0]
2000 && len == ptr->length
2001 && memcmp (ident, ptr->string, ptr->length) == 0
2002 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
2003 {
2004 int reloc = ptr->reloc;
2005
2006 if (!ppc_obj64 && exp_p->X_add_number != 0)
2007 {
2008 switch (reloc)
2009 {
2010 case BFD_RELOC_16_GOTOFF:
2011 case BFD_RELOC_LO16_GOTOFF:
2012 case BFD_RELOC_HI16_GOTOFF:
2013 case BFD_RELOC_HI16_S_GOTOFF:
2014 as_warn (_("identifier+constant@got means "
2015 "identifier@got+constant"));
2016 break;
2017
2018 case BFD_RELOC_PPC_GOT_TLSGD16:
2019 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
2020 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
2021 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
2022 case BFD_RELOC_PPC_GOT_TLSLD16:
2023 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
2024 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
2025 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
2026 case BFD_RELOC_PPC_GOT_DTPREL16:
2027 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2028 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
2029 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
2030 case BFD_RELOC_PPC_GOT_TPREL16:
2031 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2032 case BFD_RELOC_PPC_GOT_TPREL16_HI:
2033 case BFD_RELOC_PPC_GOT_TPREL16_HA:
2034 as_bad (_("symbol+offset not supported for got tls"));
2035 break;
2036 }
2037 }
2038
2039 /* Now check for identifier@suffix+constant. */
2040 if (*str == '-' || *str == '+')
2041 {
2042 char *orig_line = input_line_pointer;
2043 expressionS new_exp;
2044
2045 input_line_pointer = str;
2046 expression (&new_exp);
2047 if (new_exp.X_op == O_constant)
2048 {
2049 exp_p->X_add_number += new_exp.X_add_number;
2050 str = input_line_pointer;
2051 }
2052
2053 if (&input_line_pointer != str_p)
2054 input_line_pointer = orig_line;
2055 }
2056 *str_p = str;
2057
2058 if (reloc == (int) BFD_RELOC_PPC64_TOC
2059 && exp_p->X_op == O_symbol
2060 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
2061 {
2062 /* Change the symbol so that the dummy .TOC. symbol can be
2063 omitted from the object file. */
2064 exp_p->X_add_symbol = &abs_symbol;
2065 }
2066
2067 return (bfd_reloc_code_real_type) reloc;
2068 }
2069
2070 return BFD_RELOC_NONE;
2071 }
2072
2073 /* Support @got, etc. on constants emitted via .short, .int etc. */
2074
2075 bfd_reloc_code_real_type
ppc_elf_parse_cons(expressionS * exp,unsigned int nbytes)2076 ppc_elf_parse_cons (expressionS *exp, unsigned int nbytes)
2077 {
2078 expression (exp);
2079 if (nbytes >= 2 && *input_line_pointer == '@')
2080 return ppc_elf_suffix (&input_line_pointer, exp);
2081 return BFD_RELOC_NONE;
2082 }
2083
2084 /* Warn when emitting data to code sections, unless we are emitting
2085 a relocation that ld --ppc476-workaround uses to recognise data
2086 *and* there was an unconditional branch prior to the data. */
2087
2088 void
ppc_elf_cons_fix_check(expressionS * exp ATTRIBUTE_UNUSED,unsigned int nbytes,fixS * fix)2089 ppc_elf_cons_fix_check (expressionS *exp ATTRIBUTE_UNUSED,
2090 unsigned int nbytes, fixS *fix)
2091 {
2092 if (warn_476
2093 && (now_seg->flags & SEC_CODE) != 0
2094 && (nbytes != 4
2095 || fix == NULL
2096 || !(fix->fx_r_type == BFD_RELOC_32
2097 || fix->fx_r_type == BFD_RELOC_CTOR
2098 || fix->fx_r_type == BFD_RELOC_32_PCREL)
2099 || !(last_seg == now_seg && last_subseg == now_subseg)
2100 || !((last_insn & (0x3f << 26)) == (18u << 26)
2101 || ((last_insn & (0x3f << 26)) == (16u << 26)
2102 && (last_insn & (0x14 << 21)) == (0x14 << 21))
2103 || ((last_insn & (0x3f << 26)) == (19u << 26)
2104 && (last_insn & (0x3ff << 1)) == (16u << 1)
2105 && (last_insn & (0x14 << 21)) == (0x14 << 21)))))
2106 {
2107 /* Flag that we've warned. */
2108 if (fix != NULL)
2109 fix->fx_tcbit = 1;
2110
2111 as_warn (_("data in executable section"));
2112 }
2113 }
2114
2115 /* Solaris pseduo op to change to the .rodata section. */
2116 static void
ppc_elf_rdata(int xxx)2117 ppc_elf_rdata (int xxx)
2118 {
2119 char *save_line = input_line_pointer;
2120 static char section[] = ".rodata\n";
2121
2122 /* Just pretend this is .section .rodata */
2123 input_line_pointer = section;
2124 obj_elf_section (xxx);
2125
2126 input_line_pointer = save_line;
2127 }
2128
2129 /* Pseudo op to make file scope bss items. */
2130 static void
ppc_elf_lcomm(int xxx ATTRIBUTE_UNUSED)2131 ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
2132 {
2133 char *name;
2134 char c;
2135 char *p;
2136 offsetT size;
2137 symbolS *symbolP;
2138 offsetT align;
2139 segT old_sec;
2140 int old_subsec;
2141 char *pfrag;
2142 int align2;
2143
2144 name = input_line_pointer;
2145 c = get_symbol_end ();
2146
2147 /* just after name is now '\0'. */
2148 p = input_line_pointer;
2149 *p = c;
2150 SKIP_WHITESPACE ();
2151 if (*input_line_pointer != ',')
2152 {
2153 as_bad (_("expected comma after symbol-name: rest of line ignored."));
2154 ignore_rest_of_line ();
2155 return;
2156 }
2157
2158 input_line_pointer++; /* skip ',' */
2159 if ((size = get_absolute_expression ()) < 0)
2160 {
2161 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
2162 ignore_rest_of_line ();
2163 return;
2164 }
2165
2166 /* The third argument to .lcomm is the alignment. */
2167 if (*input_line_pointer != ',')
2168 align = 8;
2169 else
2170 {
2171 ++input_line_pointer;
2172 align = get_absolute_expression ();
2173 if (align <= 0)
2174 {
2175 as_warn (_("ignoring bad alignment"));
2176 align = 8;
2177 }
2178 }
2179
2180 *p = 0;
2181 symbolP = symbol_find_or_make (name);
2182 *p = c;
2183
2184 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
2185 {
2186 as_bad (_("ignoring attempt to re-define symbol `%s'."),
2187 S_GET_NAME (symbolP));
2188 ignore_rest_of_line ();
2189 return;
2190 }
2191
2192 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
2193 {
2194 as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
2195 S_GET_NAME (symbolP),
2196 (long) S_GET_VALUE (symbolP),
2197 (long) size);
2198
2199 ignore_rest_of_line ();
2200 return;
2201 }
2202
2203 /* Allocate_bss. */
2204 old_sec = now_seg;
2205 old_subsec = now_subseg;
2206 if (align)
2207 {
2208 /* Convert to a power of 2 alignment. */
2209 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
2210 if (align != 1)
2211 {
2212 as_bad (_("common alignment not a power of 2"));
2213 ignore_rest_of_line ();
2214 return;
2215 }
2216 }
2217 else
2218 align2 = 0;
2219
2220 record_alignment (bss_section, align2);
2221 subseg_set (bss_section, 1);
2222 if (align2)
2223 frag_align (align2, 0, 0);
2224 if (S_GET_SEGMENT (symbolP) == bss_section)
2225 symbol_get_frag (symbolP)->fr_symbol = 0;
2226 symbol_set_frag (symbolP, frag_now);
2227 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
2228 (char *) 0);
2229 *pfrag = 0;
2230 S_SET_SIZE (symbolP, size);
2231 S_SET_SEGMENT (symbolP, bss_section);
2232 subseg_set (old_sec, old_subsec);
2233 demand_empty_rest_of_line ();
2234 }
2235
2236 /* Pseudo op to set symbol local entry point. */
2237 static void
ppc_elf_localentry(int ignore ATTRIBUTE_UNUSED)2238 ppc_elf_localentry (int ignore ATTRIBUTE_UNUSED)
2239 {
2240 char *name = input_line_pointer;
2241 char c = get_symbol_end ();
2242 char *p;
2243 expressionS exp;
2244 symbolS *sym;
2245 asymbol *bfdsym;
2246 elf_symbol_type *elfsym;
2247
2248 p = input_line_pointer;
2249 *p = c;
2250 SKIP_WHITESPACE ();
2251 if (*input_line_pointer != ',')
2252 {
2253 *p = 0;
2254 as_bad (_("expected comma after name `%s' in .localentry directive"),
2255 name);
2256 *p = c;
2257 ignore_rest_of_line ();
2258 return;
2259 }
2260 input_line_pointer++;
2261 expression (&exp);
2262 if (exp.X_op == O_absent)
2263 {
2264 as_bad (_("missing expression in .localentry directive"));
2265 exp.X_op = O_constant;
2266 exp.X_add_number = 0;
2267 }
2268 *p = 0;
2269 sym = symbol_find_or_make (name);
2270 *p = c;
2271
2272 if (resolve_expression (&exp)
2273 && exp.X_op == O_constant)
2274 {
2275 unsigned char encoded = PPC64_SET_LOCAL_ENTRY_OFFSET (exp.X_add_number);
2276
2277 if (exp.X_add_number != (offsetT) PPC64_LOCAL_ENTRY_OFFSET (encoded))
2278 as_bad (_(".localentry expression for `%s' "
2279 "is not a valid power of 2"), S_GET_NAME (sym));
2280 else
2281 {
2282 bfdsym = symbol_get_bfdsym (sym);
2283 elfsym = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
2284 gas_assert (elfsym);
2285 elfsym->internal_elf_sym.st_other &= ~STO_PPC64_LOCAL_MASK;
2286 elfsym->internal_elf_sym.st_other |= encoded;
2287 if (ppc_abiversion == 0)
2288 ppc_abiversion = 2;
2289 }
2290 }
2291 else
2292 as_bad (_(".localentry expression for `%s' "
2293 "does not evaluate to a constant"), S_GET_NAME (sym));
2294
2295 demand_empty_rest_of_line ();
2296 }
2297
2298 /* Pseudo op to set ABI version. */
2299 static void
ppc_elf_abiversion(int ignore ATTRIBUTE_UNUSED)2300 ppc_elf_abiversion (int ignore ATTRIBUTE_UNUSED)
2301 {
2302 expressionS exp;
2303
2304 expression (&exp);
2305 if (exp.X_op == O_absent)
2306 {
2307 as_bad (_("missing expression in .abiversion directive"));
2308 exp.X_op = O_constant;
2309 exp.X_add_number = 0;
2310 }
2311
2312 if (resolve_expression (&exp)
2313 && exp.X_op == O_constant)
2314 ppc_abiversion = exp.X_add_number;
2315 else
2316 as_bad (_(".abiversion expression does not evaluate to a constant"));
2317 demand_empty_rest_of_line ();
2318 }
2319
2320 /* Set ABI version in output file. */
2321 void
ppc_elf_end(void)2322 ppc_elf_end (void)
2323 {
2324 if (ppc_obj64 && ppc_abiversion != 0)
2325 {
2326 elf_elfheader (stdoutput)->e_flags &= ~EF_PPC64_ABI;
2327 elf_elfheader (stdoutput)->e_flags |= ppc_abiversion & EF_PPC64_ABI;
2328 }
2329 }
2330
2331 /* Validate any relocations emitted for -mrelocatable, possibly adding
2332 fixups for word relocations in writable segments, so we can adjust
2333 them at runtime. */
2334 static void
ppc_elf_validate_fix(fixS * fixp,segT seg)2335 ppc_elf_validate_fix (fixS *fixp, segT seg)
2336 {
2337 if (fixp->fx_done || fixp->fx_pcrel)
2338 return;
2339
2340 switch (shlib)
2341 {
2342 case SHLIB_NONE:
2343 case SHLIB_PIC:
2344 return;
2345
2346 case SHLIB_MRELOCATABLE:
2347 if (fixp->fx_r_type != BFD_RELOC_16_GOTOFF
2348 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2349 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2350 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
2351 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
2352 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2353 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2354 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
2355 && (seg->flags & SEC_LOAD) != 0
2356 && strcmp (segment_name (seg), ".got2") != 0
2357 && strcmp (segment_name (seg), ".dtors") != 0
2358 && strcmp (segment_name (seg), ".ctors") != 0
2359 && strcmp (segment_name (seg), ".fixup") != 0
2360 && strcmp (segment_name (seg), ".gcc_except_table") != 0
2361 && strcmp (segment_name (seg), ".eh_frame") != 0
2362 && strcmp (segment_name (seg), ".ex_shared") != 0)
2363 {
2364 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2365 || fixp->fx_r_type != BFD_RELOC_CTOR)
2366 {
2367 as_bad_where (fixp->fx_file, fixp->fx_line,
2368 _("relocation cannot be done when using -mrelocatable"));
2369 }
2370 }
2371 return;
2372 }
2373 }
2374
2375 /* Prevent elf_frob_file_before_adjust removing a weak undefined
2376 function descriptor sym if the corresponding code sym is used. */
2377
2378 void
ppc_frob_file_before_adjust(void)2379 ppc_frob_file_before_adjust (void)
2380 {
2381 symbolS *symp;
2382 asection *toc;
2383
2384 if (!ppc_obj64)
2385 return;
2386
2387 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
2388 {
2389 const char *name;
2390 char *dotname;
2391 symbolS *dotsym;
2392 size_t len;
2393
2394 name = S_GET_NAME (symp);
2395 if (name[0] == '.')
2396 continue;
2397
2398 if (! S_IS_WEAK (symp)
2399 || S_IS_DEFINED (symp))
2400 continue;
2401
2402 len = strlen (name) + 1;
2403 dotname = xmalloc (len + 1);
2404 dotname[0] = '.';
2405 memcpy (dotname + 1, name, len);
2406 dotsym = symbol_find_noref (dotname, 1);
2407 free (dotname);
2408 if (dotsym != NULL && (symbol_used_p (dotsym)
2409 || symbol_used_in_reloc_p (dotsym)))
2410 symbol_mark_used (symp);
2411
2412 }
2413
2414 toc = bfd_get_section_by_name (stdoutput, ".toc");
2415 if (toc != NULL
2416 && toc_reloc_types != has_large_toc_reloc
2417 && bfd_section_size (stdoutput, toc) > 0x10000)
2418 as_warn (_("TOC section size exceeds 64k"));
2419 }
2420
2421 /* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be
2422 emitted. Other uses of .TOC. will cause the symbol to be marked
2423 with BSF_KEEP in md_apply_fix. */
2424
2425 void
ppc_elf_adjust_symtab(void)2426 ppc_elf_adjust_symtab (void)
2427 {
2428 if (ppc_obj64)
2429 {
2430 symbolS *symp;
2431 symp = symbol_find (".TOC.");
2432 if (symp != NULL)
2433 {
2434 asymbol *bsym = symbol_get_bfdsym (symp);
2435 if ((bsym->flags & BSF_KEEP) == 0)
2436 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
2437 }
2438 }
2439 }
2440 #endif /* OBJ_ELF */
2441
2442 #ifdef TE_PE
2443
2444 /*
2445 * Summary of parse_toc_entry.
2446 *
2447 * in: Input_line_pointer points to the '[' in one of:
2448 *
2449 * [toc] [tocv] [toc32] [toc64]
2450 *
2451 * Anything else is an error of one kind or another.
2452 *
2453 * out:
2454 * return value: success or failure
2455 * toc_kind: kind of toc reference
2456 * input_line_pointer:
2457 * success: first char after the ']'
2458 * failure: unchanged
2459 *
2460 * settings:
2461 *
2462 * [toc] - rv == success, toc_kind = default_toc
2463 * [tocv] - rv == success, toc_kind = data_in_toc
2464 * [toc32] - rv == success, toc_kind = must_be_32
2465 * [toc64] - rv == success, toc_kind = must_be_64
2466 *
2467 */
2468
2469 enum toc_size_qualifier
2470 {
2471 default_toc, /* The toc cell constructed should be the system default size */
2472 data_in_toc, /* This is a direct reference to a toc cell */
2473 must_be_32, /* The toc cell constructed must be 32 bits wide */
2474 must_be_64 /* The toc cell constructed must be 64 bits wide */
2475 };
2476
2477 static int
parse_toc_entry(enum toc_size_qualifier * toc_kind)2478 parse_toc_entry (enum toc_size_qualifier *toc_kind)
2479 {
2480 char *start;
2481 char *toc_spec;
2482 char c;
2483 enum toc_size_qualifier t;
2484
2485 /* Save the input_line_pointer. */
2486 start = input_line_pointer;
2487
2488 /* Skip over the '[' , and whitespace. */
2489 ++input_line_pointer;
2490 SKIP_WHITESPACE ();
2491
2492 /* Find the spelling of the operand. */
2493 toc_spec = input_line_pointer;
2494 c = get_symbol_end ();
2495
2496 if (strcmp (toc_spec, "toc") == 0)
2497 {
2498 t = default_toc;
2499 }
2500 else if (strcmp (toc_spec, "tocv") == 0)
2501 {
2502 t = data_in_toc;
2503 }
2504 else if (strcmp (toc_spec, "toc32") == 0)
2505 {
2506 t = must_be_32;
2507 }
2508 else if (strcmp (toc_spec, "toc64") == 0)
2509 {
2510 t = must_be_64;
2511 }
2512 else
2513 {
2514 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
2515 *input_line_pointer = c;
2516 input_line_pointer = start;
2517 return 0;
2518 }
2519
2520 /* Now find the ']'. */
2521 *input_line_pointer = c;
2522
2523 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2524 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
2525
2526 if (c != ']')
2527 {
2528 as_bad (_("syntax error: expected `]', found `%c'"), c);
2529 input_line_pointer = start;
2530 return 0;
2531 }
2532
2533 *toc_kind = t;
2534 return 1;
2535 }
2536 #endif
2537
2538 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
2539 /* See whether a symbol is in the TOC section. */
2540
2541 static int
ppc_is_toc_sym(symbolS * sym)2542 ppc_is_toc_sym (symbolS *sym)
2543 {
2544 #ifdef OBJ_XCOFF
2545 return (symbol_get_tc (sym)->symbol_class == XMC_TC
2546 || symbol_get_tc (sym)->symbol_class == XMC_TC0);
2547 #endif
2548 #ifdef OBJ_ELF
2549 const char *sname = segment_name (S_GET_SEGMENT (sym));
2550 if (ppc_obj64)
2551 return strcmp (sname, ".toc") == 0;
2552 else
2553 return strcmp (sname, ".got") == 0;
2554 #endif
2555 }
2556 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
2557
2558
2559 #ifdef OBJ_ELF
2560 #define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2561 static void
ppc_apuinfo_section_add(unsigned int apu,unsigned int version)2562 ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
2563 {
2564 unsigned int i;
2565
2566 /* Check we don't already exist. */
2567 for (i = 0; i < ppc_apuinfo_num; i++)
2568 if (ppc_apuinfo_list[i] == APUID (apu, version))
2569 return;
2570
2571 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2572 {
2573 if (ppc_apuinfo_num_alloc == 0)
2574 {
2575 ppc_apuinfo_num_alloc = 4;
2576 ppc_apuinfo_list = (unsigned long *)
2577 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2578 }
2579 else
2580 {
2581 ppc_apuinfo_num_alloc += 4;
2582 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2583 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2584 }
2585 }
2586 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
2587 }
2588 #undef APUID
2589 #endif
2590
2591
2592 /* We need to keep a list of fixups. We can't simply generate them as
2593 we go, because that would require us to first create the frag, and
2594 that would screw up references to ``.''. */
2595
2596 struct ppc_fixup
2597 {
2598 expressionS exp;
2599 int opindex;
2600 bfd_reloc_code_real_type reloc;
2601 };
2602
2603 #define MAX_INSN_FIXUPS (5)
2604
2605 /* Form I16L. */
2606 #define E_OR2I_INSN 0x7000C000
2607 #define E_AND2I_DOT_INSN 0x7000C800
2608 #define E_OR2IS_INSN 0x7000D000
2609 #define E_LIS_INSN 0x7000E000
2610 #define E_AND2IS_DOT_INSN 0x7000E800
2611
2612 /* Form I16A. */
2613 #define E_ADD2I_DOT_INSN 0x70008800
2614 #define E_ADD2IS_INSN 0x70009000
2615 #define E_CMP16I_INSN 0x70009800
2616 #define E_MULL2I_INSN 0x7000A000
2617 #define E_CMPL16I_INSN 0x7000A800
2618 #define E_CMPH16I_INSN 0x7000B000
2619 #define E_CMPHL16I_INSN 0x7000B800
2620
2621 /* This routine is called for each instruction to be assembled. */
2622
2623 void
md_assemble(char * str)2624 md_assemble (char *str)
2625 {
2626 char *s;
2627 const struct powerpc_opcode *opcode;
2628 unsigned long insn;
2629 const unsigned char *opindex_ptr;
2630 int skip_optional;
2631 int need_paren;
2632 int next_opindex;
2633 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2634 int fc;
2635 char *f;
2636 int addr_mod;
2637 int i;
2638 unsigned int insn_length;
2639
2640 /* Get the opcode. */
2641 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
2642 ;
2643 if (*s != '\0')
2644 *s++ = '\0';
2645
2646 /* Look up the opcode in the hash table. */
2647 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2648 if (opcode == (const struct powerpc_opcode *) NULL)
2649 {
2650 const struct powerpc_macro *macro;
2651
2652 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2653 if (macro == (const struct powerpc_macro *) NULL)
2654 as_bad (_("unrecognized opcode: `%s'"), str);
2655 else
2656 ppc_macro (s, macro);
2657
2658 return;
2659 }
2660
2661 insn = opcode->opcode;
2662
2663 str = s;
2664 while (ISSPACE (*str))
2665 ++str;
2666
2667 /* PowerPC operands are just expressions. The only real issue is
2668 that a few operand types are optional. All cases which might use
2669 an optional operand separate the operands only with commas (in some
2670 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2671 have optional operands). Most instructions with optional operands
2672 have only one. Those that have more than one optional operand can
2673 take either all their operands or none. So, before we start seriously
2674 parsing the operands, we check to see if we have optional operands,
2675 and if we do, we count the number of commas to see which operands
2676 have been omitted. */
2677 skip_optional = 0;
2678 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2679 {
2680 const struct powerpc_operand *operand;
2681
2682 operand = &powerpc_operands[*opindex_ptr];
2683 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2684 {
2685 unsigned int opcount;
2686 unsigned int num_operands_expected;
2687
2688 /* There is an optional operand. Count the number of
2689 commas in the input line. */
2690 if (*str == '\0')
2691 opcount = 0;
2692 else
2693 {
2694 opcount = 1;
2695 s = str;
2696 while ((s = strchr (s, ',')) != (char *) NULL)
2697 {
2698 ++opcount;
2699 ++s;
2700 }
2701 }
2702
2703 /* Compute the number of expected operands.
2704 Do not count fake operands. */
2705 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2706 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2707 ++ num_operands_expected;
2708
2709 /* If there are fewer operands in the line then are called
2710 for by the instruction, we want to skip the optional
2711 operands. */
2712 if (opcount < num_operands_expected)
2713 skip_optional = 1;
2714
2715 break;
2716 }
2717 }
2718
2719 /* Gather the operands. */
2720 need_paren = 0;
2721 next_opindex = 0;
2722 fc = 0;
2723 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2724 {
2725 const struct powerpc_operand *operand;
2726 const char *errmsg;
2727 char *hold;
2728 expressionS ex;
2729 char endc;
2730
2731 if (next_opindex == 0)
2732 operand = &powerpc_operands[*opindex_ptr];
2733 else
2734 {
2735 operand = &powerpc_operands[next_opindex];
2736 next_opindex = 0;
2737 }
2738 errmsg = NULL;
2739
2740 /* If this is a fake operand, then we do not expect anything
2741 from the input. */
2742 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2743 {
2744 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
2745 if (errmsg != (const char *) NULL)
2746 as_bad ("%s", errmsg);
2747 continue;
2748 }
2749
2750 /* If this is an optional operand, and we are skipping it, just
2751 insert a zero. */
2752 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2753 && skip_optional)
2754 {
2755 if (operand->insert)
2756 {
2757 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
2758 if (errmsg != (const char *) NULL)
2759 as_bad ("%s", errmsg);
2760 }
2761 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2762 next_opindex = *opindex_ptr + 1;
2763 continue;
2764 }
2765
2766 /* Gather the operand. */
2767 hold = input_line_pointer;
2768 input_line_pointer = str;
2769
2770 #ifdef TE_PE
2771 if (*input_line_pointer == '[')
2772 {
2773 /* We are expecting something like the second argument here:
2774 *
2775 * lwz r4,[toc].GS.0.static_int(rtoc)
2776 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2777 * The argument following the `]' must be a symbol name, and the
2778 * register must be the toc register: 'rtoc' or '2'
2779 *
2780 * The effect is to 0 as the displacement field
2781 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2782 * the appropriate variation) reloc against it based on the symbol.
2783 * The linker will build the toc, and insert the resolved toc offset.
2784 *
2785 * Note:
2786 * o The size of the toc entry is currently assumed to be
2787 * 32 bits. This should not be assumed to be a hard coded
2788 * number.
2789 * o In an effort to cope with a change from 32 to 64 bits,
2790 * there are also toc entries that are specified to be
2791 * either 32 or 64 bits:
2792 * lwz r4,[toc32].GS.0.static_int(rtoc)
2793 * lwz r4,[toc64].GS.0.static_int(rtoc)
2794 * These demand toc entries of the specified size, and the
2795 * instruction probably requires it.
2796 */
2797
2798 int valid_toc;
2799 enum toc_size_qualifier toc_kind;
2800 bfd_reloc_code_real_type toc_reloc;
2801
2802 /* Go parse off the [tocXX] part. */
2803 valid_toc = parse_toc_entry (&toc_kind);
2804
2805 if (!valid_toc)
2806 {
2807 ignore_rest_of_line ();
2808 break;
2809 }
2810
2811 /* Now get the symbol following the ']'. */
2812 expression (&ex);
2813
2814 switch (toc_kind)
2815 {
2816 case default_toc:
2817 /* In this case, we may not have seen the symbol yet,
2818 since it is allowed to appear on a .extern or .globl
2819 or just be a label in the .data section. */
2820 toc_reloc = BFD_RELOC_PPC_TOC16;
2821 break;
2822 case data_in_toc:
2823 /* 1. The symbol must be defined and either in the toc
2824 section, or a global.
2825 2. The reloc generated must have the TOCDEFN flag set
2826 in upper bit mess of the reloc type.
2827 FIXME: It's a little confusing what the tocv
2828 qualifier can be used for. At the very least, I've
2829 seen three uses, only one of which I'm sure I can
2830 explain. */
2831 if (ex.X_op == O_symbol)
2832 {
2833 gas_assert (ex.X_add_symbol != NULL);
2834 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2835 != tocdata_section)
2836 {
2837 as_bad (_("[tocv] symbol is not a toc symbol"));
2838 }
2839 }
2840
2841 toc_reloc = BFD_RELOC_PPC_TOC16;
2842 break;
2843 case must_be_32:
2844 /* FIXME: these next two specifically specify 32/64 bit
2845 toc entries. We don't support them today. Is this
2846 the right way to say that? */
2847 toc_reloc = BFD_RELOC_NONE;
2848 as_bad (_("unimplemented toc32 expression modifier"));
2849 break;
2850 case must_be_64:
2851 /* FIXME: see above. */
2852 toc_reloc = BFD_RELOC_NONE;
2853 as_bad (_("unimplemented toc64 expression modifier"));
2854 break;
2855 default:
2856 fprintf (stderr,
2857 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2858 toc_kind);
2859 abort ();
2860 break;
2861 }
2862
2863 /* We need to generate a fixup for this expression. */
2864 if (fc >= MAX_INSN_FIXUPS)
2865 as_fatal (_("too many fixups"));
2866
2867 fixups[fc].reloc = toc_reloc;
2868 fixups[fc].exp = ex;
2869 fixups[fc].opindex = *opindex_ptr;
2870 ++fc;
2871
2872 /* Ok. We've set up the fixup for the instruction. Now make it
2873 look like the constant 0 was found here. */
2874 ex.X_unsigned = 1;
2875 ex.X_op = O_constant;
2876 ex.X_add_number = 0;
2877 ex.X_add_symbol = NULL;
2878 ex.X_op_symbol = NULL;
2879 }
2880
2881 else
2882 #endif /* TE_PE */
2883 {
2884 if ((reg_names_p
2885 && (((operand->flags & PPC_OPERAND_CR_BIT) != 0)
2886 || ((operand->flags & PPC_OPERAND_CR_REG) != 0)))
2887 || !register_name (&ex))
2888 {
2889 char save_lex = lex_type['%'];
2890
2891 if (((operand->flags & PPC_OPERAND_CR_REG) != 0)
2892 || (operand->flags & PPC_OPERAND_CR_BIT) != 0)
2893 {
2894 cr_operand = TRUE;
2895 lex_type['%'] |= LEX_BEGIN_NAME;
2896 }
2897 expression (&ex);
2898 cr_operand = FALSE;
2899 lex_type['%'] = save_lex;
2900 }
2901 }
2902
2903 str = input_line_pointer;
2904 input_line_pointer = hold;
2905
2906 if (ex.X_op == O_illegal)
2907 as_bad (_("illegal operand"));
2908 else if (ex.X_op == O_absent)
2909 as_bad (_("missing operand"));
2910 else if (ex.X_op == O_register)
2911 {
2912 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2913 ppc_cpu, (char *) NULL, 0);
2914 }
2915 else if (ex.X_op == O_constant)
2916 {
2917 #ifdef OBJ_ELF
2918 /* Allow @HA, @L, @H on constants. */
2919 bfd_reloc_code_real_type reloc;
2920 char *orig_str = str;
2921
2922 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_NONE)
2923 switch (reloc)
2924 {
2925 default:
2926 str = orig_str;
2927 break;
2928
2929 case BFD_RELOC_LO16:
2930 ex.X_add_number &= 0xffff;
2931 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2932 ex.X_add_number = SEX16 (ex.X_add_number);
2933 break;
2934
2935 case BFD_RELOC_HI16:
2936 if (REPORT_OVERFLOW_HI && ppc_obj64)
2937 {
2938 /* PowerPC64 @h is tested for overflow. */
2939 ex.X_add_number = (addressT) ex.X_add_number >> 16;
2940 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2941 {
2942 addressT sign = (((addressT) -1 >> 16) + 1) >> 1;
2943 ex.X_add_number
2944 = ((addressT) ex.X_add_number ^ sign) - sign;
2945 }
2946 break;
2947 }
2948 /* Fall thru */
2949
2950 case BFD_RELOC_PPC64_ADDR16_HIGH:
2951 ex.X_add_number = PPC_HI (ex.X_add_number);
2952 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2953 ex.X_add_number = SEX16 (ex.X_add_number);
2954 break;
2955
2956 case BFD_RELOC_HI16_S:
2957 if (REPORT_OVERFLOW_HI && ppc_obj64)
2958 {
2959 /* PowerPC64 @ha is tested for overflow. */
2960 ex.X_add_number
2961 = ((addressT) ex.X_add_number + 0x8000) >> 16;
2962 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2963 {
2964 addressT sign = (((addressT) -1 >> 16) + 1) >> 1;
2965 ex.X_add_number
2966 = ((addressT) ex.X_add_number ^ sign) - sign;
2967 }
2968 break;
2969 }
2970 /* Fall thru */
2971
2972 case BFD_RELOC_PPC64_ADDR16_HIGHA:
2973 ex.X_add_number = PPC_HA (ex.X_add_number);
2974 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2975 ex.X_add_number = SEX16 (ex.X_add_number);
2976 break;
2977
2978 case BFD_RELOC_PPC64_HIGHER:
2979 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2980 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2981 ex.X_add_number = SEX16 (ex.X_add_number);
2982 break;
2983
2984 case BFD_RELOC_PPC64_HIGHER_S:
2985 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2986 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2987 ex.X_add_number = SEX16 (ex.X_add_number);
2988 break;
2989
2990 case BFD_RELOC_PPC64_HIGHEST:
2991 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2992 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2993 ex.X_add_number = SEX16 (ex.X_add_number);
2994 break;
2995
2996 case BFD_RELOC_PPC64_HIGHEST_S:
2997 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2998 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2999 ex.X_add_number = SEX16 (ex.X_add_number);
3000 break;
3001 }
3002 #endif /* OBJ_ELF */
3003 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
3004 ppc_cpu, (char *) NULL, 0);
3005 }
3006 else
3007 {
3008 bfd_reloc_code_real_type reloc = BFD_RELOC_NONE;
3009 #ifdef OBJ_ELF
3010 if (ex.X_op == O_symbol && str[0] == '(')
3011 {
3012 const char *sym_name = S_GET_NAME (ex.X_add_symbol);
3013 if (sym_name[0] == '.')
3014 ++sym_name;
3015
3016 if (strcasecmp (sym_name, "__tls_get_addr") == 0)
3017 {
3018 expressionS tls_exp;
3019
3020 hold = input_line_pointer;
3021 input_line_pointer = str + 1;
3022 expression (&tls_exp);
3023 if (tls_exp.X_op == O_symbol)
3024 {
3025 reloc = BFD_RELOC_NONE;
3026 if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0)
3027 {
3028 reloc = BFD_RELOC_PPC_TLSGD;
3029 input_line_pointer += 7;
3030 }
3031 else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0)
3032 {
3033 reloc = BFD_RELOC_PPC_TLSLD;
3034 input_line_pointer += 7;
3035 }
3036 if (reloc != BFD_RELOC_NONE)
3037 {
3038 SKIP_WHITESPACE ();
3039 str = input_line_pointer;
3040
3041 if (fc >= MAX_INSN_FIXUPS)
3042 as_fatal (_("too many fixups"));
3043 fixups[fc].exp = tls_exp;
3044 fixups[fc].opindex = *opindex_ptr;
3045 fixups[fc].reloc = reloc;
3046 ++fc;
3047 }
3048 }
3049 input_line_pointer = hold;
3050 }
3051 }
3052
3053 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_NONE)
3054 {
3055 /* Some TLS tweaks. */
3056 switch (reloc)
3057 {
3058 default:
3059 break;
3060
3061 case BFD_RELOC_PPC_TLS:
3062 if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0))
3063 as_bad (_("@tls may not be used with \"%s\" operands"),
3064 opcode->name);
3065 else if (operand->shift != 11)
3066 as_bad (_("@tls may only be used in last operand"));
3067 else
3068 insn = ppc_insert_operand (insn, operand,
3069 ppc_obj64 ? 13 : 2,
3070 ppc_cpu, (char *) NULL, 0);
3071 break;
3072
3073 /* We'll only use the 32 (or 64) bit form of these relocations
3074 in constants. Instructions get the 16 bit form. */
3075 case BFD_RELOC_PPC_DTPREL:
3076 reloc = BFD_RELOC_PPC_DTPREL16;
3077 break;
3078 case BFD_RELOC_PPC_TPREL:
3079 reloc = BFD_RELOC_PPC_TPREL16;
3080 break;
3081 }
3082
3083 /* If VLE-mode convert LO/HI/HA relocations. */
3084 if (opcode->flags & PPC_OPCODE_VLE)
3085 {
3086 int tmp_insn = insn & opcode->mask;
3087
3088 int use_d_reloc = (tmp_insn == E_OR2I_INSN
3089 || tmp_insn == E_AND2I_DOT_INSN
3090 || tmp_insn == E_OR2IS_INSN
3091 || tmp_insn == E_LIS_INSN
3092 || tmp_insn == E_AND2IS_DOT_INSN);
3093
3094
3095 int use_a_reloc = (tmp_insn == E_ADD2I_DOT_INSN
3096 || tmp_insn == E_ADD2IS_INSN
3097 || tmp_insn == E_CMP16I_INSN
3098 || tmp_insn == E_MULL2I_INSN
3099 || tmp_insn == E_CMPL16I_INSN
3100 || tmp_insn == E_CMPH16I_INSN
3101 || tmp_insn == E_CMPHL16I_INSN);
3102
3103 switch (reloc)
3104 {
3105 default:
3106 break;
3107
3108 case BFD_RELOC_PPC_EMB_SDA21:
3109 reloc = BFD_RELOC_PPC_VLE_SDA21;
3110 break;
3111
3112 case BFD_RELOC_LO16:
3113 if (use_d_reloc)
3114 reloc = BFD_RELOC_PPC_VLE_LO16D;
3115 else if (use_a_reloc)
3116 reloc = BFD_RELOC_PPC_VLE_LO16A;
3117 break;
3118
3119 case BFD_RELOC_HI16:
3120 if (use_d_reloc)
3121 reloc = BFD_RELOC_PPC_VLE_HI16D;
3122 else if (use_a_reloc)
3123 reloc = BFD_RELOC_PPC_VLE_HI16A;
3124 break;
3125
3126 case BFD_RELOC_HI16_S:
3127 if (use_d_reloc)
3128 reloc = BFD_RELOC_PPC_VLE_HA16D;
3129 else if (use_a_reloc)
3130 reloc = BFD_RELOC_PPC_VLE_HA16A;
3131 break;
3132
3133 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
3134 if (use_d_reloc)
3135 reloc = BFD_RELOC_PPC_VLE_SDAREL_LO16D;
3136 break;
3137
3138 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
3139 if (use_d_reloc)
3140 reloc = BFD_RELOC_PPC_VLE_SDAREL_HI16D;
3141 break;
3142
3143 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
3144 if (use_d_reloc)
3145 reloc = BFD_RELOC_PPC_VLE_SDAREL_HA16D;
3146 break;
3147 }
3148 }
3149 }
3150 #endif /* OBJ_ELF */
3151
3152 if (reloc != BFD_RELOC_NONE)
3153 ;
3154 /* Determine a BFD reloc value based on the operand information.
3155 We are only prepared to turn a few of the operands into
3156 relocs. */
3157 else if ((operand->flags & (PPC_OPERAND_RELATIVE
3158 | PPC_OPERAND_ABSOLUTE)) != 0
3159 && operand->bitm == 0x3fffffc
3160 && operand->shift == 0)
3161 reloc = BFD_RELOC_PPC_B26;
3162 else if ((operand->flags & (PPC_OPERAND_RELATIVE
3163 | PPC_OPERAND_ABSOLUTE)) != 0
3164 && operand->bitm == 0xfffc
3165 && operand->shift == 0)
3166 reloc = BFD_RELOC_PPC_B16;
3167 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3168 && operand->bitm == 0x1fe
3169 && operand->shift == -1)
3170 reloc = BFD_RELOC_PPC_VLE_REL8;
3171 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3172 && operand->bitm == 0xfffe
3173 && operand->shift == 0)
3174 reloc = BFD_RELOC_PPC_VLE_REL15;
3175 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3176 && operand->bitm == 0x1fffffe
3177 && operand->shift == 0)
3178 reloc = BFD_RELOC_PPC_VLE_REL24;
3179 else if ((operand->flags & PPC_OPERAND_NEGATIVE) == 0
3180 && (operand->bitm & 0xfff0) == 0xfff0
3181 && operand->shift == 0)
3182 {
3183 reloc = BFD_RELOC_16;
3184 #if defined OBJ_XCOFF || defined OBJ_ELF
3185 /* Note: the symbol may be not yet defined. */
3186 if ((operand->flags & PPC_OPERAND_PARENS) != 0
3187 && ppc_is_toc_sym (ex.X_add_symbol))
3188 {
3189 reloc = BFD_RELOC_PPC_TOC16;
3190 #ifdef OBJ_ELF
3191 as_warn (_("assuming %s on symbol"),
3192 ppc_obj64 ? "@toc" : "@xgot");
3193 #endif
3194 }
3195 #endif
3196 }
3197
3198 /* For the absolute forms of branches, convert the PC
3199 relative form back into the absolute. */
3200 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
3201 {
3202 switch (reloc)
3203 {
3204 case BFD_RELOC_PPC_B26:
3205 reloc = BFD_RELOC_PPC_BA26;
3206 break;
3207 case BFD_RELOC_PPC_B16:
3208 reloc = BFD_RELOC_PPC_BA16;
3209 break;
3210 #ifdef OBJ_ELF
3211 case BFD_RELOC_PPC_B16_BRTAKEN:
3212 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
3213 break;
3214 case BFD_RELOC_PPC_B16_BRNTAKEN:
3215 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
3216 break;
3217 #endif
3218 default:
3219 break;
3220 }
3221 }
3222
3223 #ifdef OBJ_ELF
3224 switch (reloc)
3225 {
3226 case BFD_RELOC_PPC_TOC16:
3227 toc_reloc_types |= has_small_toc_reloc;
3228 break;
3229 case BFD_RELOC_PPC64_TOC16_LO:
3230 case BFD_RELOC_PPC64_TOC16_HI:
3231 case BFD_RELOC_PPC64_TOC16_HA:
3232 toc_reloc_types |= has_large_toc_reloc;
3233 break;
3234 default:
3235 break;
3236 }
3237
3238 if (ppc_obj64
3239 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
3240 {
3241 switch (reloc)
3242 {
3243 case BFD_RELOC_16:
3244 reloc = BFD_RELOC_PPC64_ADDR16_DS;
3245 break;
3246 case BFD_RELOC_LO16:
3247 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
3248 break;
3249 case BFD_RELOC_16_GOTOFF:
3250 reloc = BFD_RELOC_PPC64_GOT16_DS;
3251 break;
3252 case BFD_RELOC_LO16_GOTOFF:
3253 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
3254 break;
3255 case BFD_RELOC_LO16_PLTOFF:
3256 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
3257 break;
3258 case BFD_RELOC_16_BASEREL:
3259 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
3260 break;
3261 case BFD_RELOC_LO16_BASEREL:
3262 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
3263 break;
3264 case BFD_RELOC_PPC_TOC16:
3265 reloc = BFD_RELOC_PPC64_TOC16_DS;
3266 break;
3267 case BFD_RELOC_PPC64_TOC16_LO:
3268 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
3269 break;
3270 case BFD_RELOC_PPC64_PLTGOT16:
3271 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
3272 break;
3273 case BFD_RELOC_PPC64_PLTGOT16_LO:
3274 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
3275 break;
3276 case BFD_RELOC_PPC_DTPREL16:
3277 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
3278 break;
3279 case BFD_RELOC_PPC_DTPREL16_LO:
3280 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
3281 break;
3282 case BFD_RELOC_PPC_TPREL16:
3283 reloc = BFD_RELOC_PPC64_TPREL16_DS;
3284 break;
3285 case BFD_RELOC_PPC_TPREL16_LO:
3286 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
3287 break;
3288 case BFD_RELOC_PPC_GOT_DTPREL16:
3289 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
3290 case BFD_RELOC_PPC_GOT_TPREL16:
3291 case BFD_RELOC_PPC_GOT_TPREL16_LO:
3292 break;
3293 default:
3294 as_bad (_("unsupported relocation for DS offset field"));
3295 break;
3296 }
3297 }
3298 #endif
3299
3300 /* We need to generate a fixup for this expression. */
3301 if (fc >= MAX_INSN_FIXUPS)
3302 as_fatal (_("too many fixups"));
3303 fixups[fc].exp = ex;
3304 fixups[fc].opindex = *opindex_ptr;
3305 fixups[fc].reloc = reloc;
3306 ++fc;
3307 }
3308
3309 if (need_paren)
3310 {
3311 endc = ')';
3312 need_paren = 0;
3313 /* If expecting more operands, then we want to see "),". */
3314 if (*str == endc && opindex_ptr[1] != 0)
3315 {
3316 do
3317 ++str;
3318 while (ISSPACE (*str));
3319 endc = ',';
3320 }
3321 }
3322 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
3323 {
3324 endc = '(';
3325 need_paren = 1;
3326 }
3327 else
3328 endc = ',';
3329
3330 /* The call to expression should have advanced str past any
3331 whitespace. */
3332 if (*str != endc
3333 && (endc != ',' || *str != '\0'))
3334 {
3335 if (*str == '\0')
3336 as_bad (_("syntax error; end of line, expected `%c'"), endc);
3337 else
3338 as_bad (_("syntax error; found `%c', expected `%c'"), *str, endc);
3339 break;
3340 }
3341
3342 if (*str != '\0')
3343 ++str;
3344 }
3345
3346 while (ISSPACE (*str))
3347 ++str;
3348
3349 if (*str != '\0')
3350 as_bad (_("junk at end of line: `%s'"), str);
3351
3352 #ifdef OBJ_ELF
3353 /* Do we need/want an APUinfo section? */
3354 if ((ppc_cpu & (PPC_OPCODE_E500 | PPC_OPCODE_E500MC | PPC_OPCODE_VLE)) != 0
3355 && !ppc_obj64)
3356 {
3357 /* These are all version "1". */
3358 if (opcode->flags & PPC_OPCODE_SPE)
3359 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
3360 if (opcode->flags & PPC_OPCODE_ISEL)
3361 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
3362 if (opcode->flags & PPC_OPCODE_EFS)
3363 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
3364 if (opcode->flags & PPC_OPCODE_BRLOCK)
3365 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
3366 if (opcode->flags & PPC_OPCODE_PMR)
3367 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
3368 if (opcode->flags & PPC_OPCODE_CACHELCK)
3369 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
3370 if (opcode->flags & PPC_OPCODE_RFMCI)
3371 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
3372 /* Only set the VLE flag if the instruction has been pulled via
3373 the VLE instruction set. This way the flag is guaranteed to
3374 be set for VLE-only instructions or for VLE-only processors,
3375 however it'll remain clear for dual-mode instructions on
3376 dual-mode and, more importantly, standard-mode processors. */
3377 if ((ppc_cpu & opcode->flags) == PPC_OPCODE_VLE)
3378 ppc_apuinfo_section_add (PPC_APUINFO_VLE, 1);
3379 }
3380 #endif
3381
3382 /* Write out the instruction. */
3383 /* Differentiate between two and four byte insns. */
3384 if (ppc_mach () == bfd_mach_ppc_vle)
3385 {
3386 if (PPC_OP_SE_VLE (insn))
3387 insn_length = 2;
3388 else
3389 insn_length = 4;
3390 addr_mod = frag_now_fix () & 1;
3391 }
3392 else
3393 {
3394 insn_length = 4;
3395 addr_mod = frag_now_fix () & 3;
3396 }
3397 /* All instructions can start on a 2 byte boundary for VLE. */
3398 f = frag_more (insn_length);
3399 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
3400 {
3401 if (ppc_mach() == bfd_mach_ppc_vle)
3402 as_bad (_("instruction address is not a multiple of 2"));
3403 else
3404 as_bad (_("instruction address is not a multiple of 4"));
3405 }
3406 frag_now->insn_addr = addr_mod;
3407 frag_now->has_code = 1;
3408 md_number_to_chars (f, insn, insn_length);
3409 last_insn = insn;
3410 last_seg = now_seg;
3411 last_subseg = now_subseg;
3412
3413 #ifdef OBJ_ELF
3414 dwarf2_emit_insn (insn_length);
3415 #endif
3416
3417 /* Create any fixups. */
3418 for (i = 0; i < fc; i++)
3419 {
3420 fixS *fixP;
3421 if (fixups[i].reloc != BFD_RELOC_NONE)
3422 {
3423 reloc_howto_type *reloc_howto;
3424 int size;
3425 int offset;
3426
3427 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
3428 if (!reloc_howto)
3429 abort ();
3430
3431 size = bfd_get_reloc_size (reloc_howto);
3432 offset = target_big_endian ? (insn_length - size) : 0;
3433
3434 if (size < 1 || size > 4)
3435 abort ();
3436
3437 fixP = fix_new_exp (frag_now,
3438 f - frag_now->fr_literal + offset,
3439 size,
3440 &fixups[i].exp,
3441 reloc_howto->pc_relative,
3442 fixups[i].reloc);
3443 }
3444 else
3445 {
3446 const struct powerpc_operand *operand;
3447
3448 operand = &powerpc_operands[fixups[i].opindex];
3449 fixP = fix_new_exp (frag_now,
3450 f - frag_now->fr_literal,
3451 insn_length,
3452 &fixups[i].exp,
3453 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
3454 BFD_RELOC_NONE);
3455 }
3456 fixP->fx_pcrel_adjust = fixups[i].opindex;
3457 }
3458 }
3459
3460 /* Handle a macro. Gather all the operands, transform them as
3461 described by the macro, and call md_assemble recursively. All the
3462 operands are separated by commas; we don't accept parentheses
3463 around operands here. */
3464
3465 static void
ppc_macro(char * str,const struct powerpc_macro * macro)3466 ppc_macro (char *str, const struct powerpc_macro *macro)
3467 {
3468 char *operands[10];
3469 unsigned int count;
3470 char *s;
3471 unsigned int len;
3472 const char *format;
3473 unsigned int arg;
3474 char *send;
3475 char *complete;
3476
3477 /* Gather the users operands into the operands array. */
3478 count = 0;
3479 s = str;
3480 while (1)
3481 {
3482 if (count >= sizeof operands / sizeof operands[0])
3483 break;
3484 operands[count++] = s;
3485 s = strchr (s, ',');
3486 if (s == (char *) NULL)
3487 break;
3488 *s++ = '\0';
3489 }
3490
3491 if (count != macro->operands)
3492 {
3493 as_bad (_("wrong number of operands"));
3494 return;
3495 }
3496
3497 /* Work out how large the string must be (the size is unbounded
3498 because it includes user input). */
3499 len = 0;
3500 format = macro->format;
3501 while (*format != '\0')
3502 {
3503 if (*format != '%')
3504 {
3505 ++len;
3506 ++format;
3507 }
3508 else
3509 {
3510 arg = strtol (format + 1, &send, 10);
3511 know (send != format && arg < count);
3512 len += strlen (operands[arg]);
3513 format = send;
3514 }
3515 }
3516
3517 /* Put the string together. */
3518 complete = s = (char *) alloca (len + 1);
3519 format = macro->format;
3520 while (*format != '\0')
3521 {
3522 if (*format != '%')
3523 *s++ = *format++;
3524 else
3525 {
3526 arg = strtol (format + 1, &send, 10);
3527 strcpy (s, operands[arg]);
3528 s += strlen (s);
3529 format = send;
3530 }
3531 }
3532 *s = '\0';
3533
3534 /* Assemble the constructed instruction. */
3535 md_assemble (complete);
3536 }
3537
3538 #ifdef OBJ_ELF
3539 /* For ELF, add support for SHT_ORDERED. */
3540
3541 int
ppc_section_type(char * str,size_t len)3542 ppc_section_type (char *str, size_t len)
3543 {
3544 if (len == 7 && strncmp (str, "ordered", 7) == 0)
3545 return SHT_ORDERED;
3546
3547 return -1;
3548 }
3549
3550 int
ppc_section_flags(flagword flags,bfd_vma attr ATTRIBUTE_UNUSED,int type)3551 ppc_section_flags (flagword flags, bfd_vma attr ATTRIBUTE_UNUSED, int type)
3552 {
3553 if (type == SHT_ORDERED)
3554 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
3555
3556 return flags;
3557 }
3558 #endif /* OBJ_ELF */
3559
3560
3561 /* Pseudo-op handling. */
3562
3563 /* The .byte pseudo-op. This is similar to the normal .byte
3564 pseudo-op, but it can also take a single ASCII string. */
3565
3566 static void
ppc_byte(int ignore ATTRIBUTE_UNUSED)3567 ppc_byte (int ignore ATTRIBUTE_UNUSED)
3568 {
3569 int count = 0;
3570
3571 if (*input_line_pointer != '\"')
3572 {
3573 cons (1);
3574 return;
3575 }
3576
3577 /* Gather characters. A real double quote is doubled. Unusual
3578 characters are not permitted. */
3579 ++input_line_pointer;
3580 while (1)
3581 {
3582 char c;
3583
3584 c = *input_line_pointer++;
3585
3586 if (c == '\"')
3587 {
3588 if (*input_line_pointer != '\"')
3589 break;
3590 ++input_line_pointer;
3591 }
3592
3593 FRAG_APPEND_1_CHAR (c);
3594 ++count;
3595 }
3596
3597 if (warn_476 && count != 0 && (now_seg->flags & SEC_CODE) != 0)
3598 as_warn (_("data in executable section"));
3599 demand_empty_rest_of_line ();
3600 }
3601
3602 #ifdef OBJ_XCOFF
3603
3604 /* XCOFF specific pseudo-op handling. */
3605
3606 /* This is set if we are creating a .stabx symbol, since we don't want
3607 to handle symbol suffixes for such symbols. */
3608 static bfd_boolean ppc_stab_symbol;
3609
3610 /* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3611 symbols in the .bss segment as though they were local common
3612 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
3613 aligns .comm and .lcomm to 4 bytes. */
3614
3615 static void
ppc_comm(int lcomm)3616 ppc_comm (int lcomm)
3617 {
3618 asection *current_seg = now_seg;
3619 subsegT current_subseg = now_subseg;
3620 char *name;
3621 char endc;
3622 char *end_name;
3623 offsetT size;
3624 offsetT align;
3625 symbolS *lcomm_sym = NULL;
3626 symbolS *sym;
3627 char *pfrag;
3628
3629 name = input_line_pointer;
3630 endc = get_symbol_end ();
3631 end_name = input_line_pointer;
3632 *end_name = endc;
3633
3634 if (*input_line_pointer != ',')
3635 {
3636 as_bad (_("missing size"));
3637 ignore_rest_of_line ();
3638 return;
3639 }
3640 ++input_line_pointer;
3641
3642 size = get_absolute_expression ();
3643 if (size < 0)
3644 {
3645 as_bad (_("negative size"));
3646 ignore_rest_of_line ();
3647 return;
3648 }
3649
3650 if (! lcomm)
3651 {
3652 /* The third argument to .comm is the alignment. */
3653 if (*input_line_pointer != ',')
3654 align = 2;
3655 else
3656 {
3657 ++input_line_pointer;
3658 align = get_absolute_expression ();
3659 if (align <= 0)
3660 {
3661 as_warn (_("ignoring bad alignment"));
3662 align = 2;
3663 }
3664 }
3665 }
3666 else
3667 {
3668 char *lcomm_name;
3669 char lcomm_endc;
3670
3671 /* The third argument to .lcomm appears to be the real local
3672 common symbol to create. References to the symbol named in
3673 the first argument are turned into references to the third
3674 argument. */
3675 if (*input_line_pointer != ',')
3676 {
3677 as_bad (_("missing real symbol name"));
3678 ignore_rest_of_line ();
3679 return;
3680 }
3681 ++input_line_pointer;
3682
3683 lcomm_name = input_line_pointer;
3684 lcomm_endc = get_symbol_end ();
3685
3686 lcomm_sym = symbol_find_or_make (lcomm_name);
3687
3688 *input_line_pointer = lcomm_endc;
3689
3690 /* The fourth argument to .lcomm is the alignment. */
3691 if (*input_line_pointer != ',')
3692 {
3693 if (size <= 4)
3694 align = 2;
3695 else
3696 align = 3;
3697 }
3698 else
3699 {
3700 ++input_line_pointer;
3701 align = get_absolute_expression ();
3702 if (align <= 0)
3703 {
3704 as_warn (_("ignoring bad alignment"));
3705 align = 2;
3706 }
3707 }
3708 }
3709
3710 *end_name = '\0';
3711 sym = symbol_find_or_make (name);
3712 *end_name = endc;
3713
3714 if (S_IS_DEFINED (sym)
3715 || S_GET_VALUE (sym) != 0)
3716 {
3717 as_bad (_("attempt to redefine symbol"));
3718 ignore_rest_of_line ();
3719 return;
3720 }
3721
3722 record_alignment (bss_section, align);
3723
3724 if (! lcomm
3725 || ! S_IS_DEFINED (lcomm_sym))
3726 {
3727 symbolS *def_sym;
3728 offsetT def_size;
3729
3730 if (! lcomm)
3731 {
3732 def_sym = sym;
3733 def_size = size;
3734 S_SET_EXTERNAL (sym);
3735 }
3736 else
3737 {
3738 symbol_get_tc (lcomm_sym)->output = 1;
3739 def_sym = lcomm_sym;
3740 def_size = 0;
3741 }
3742
3743 subseg_set (bss_section, 1);
3744 frag_align (align, 0, 0);
3745
3746 symbol_set_frag (def_sym, frag_now);
3747 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3748 def_size, (char *) NULL);
3749 *pfrag = 0;
3750 S_SET_SEGMENT (def_sym, bss_section);
3751 symbol_get_tc (def_sym)->align = align;
3752 }
3753 else if (lcomm)
3754 {
3755 /* Align the size of lcomm_sym. */
3756 symbol_get_frag (lcomm_sym)->fr_offset =
3757 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
3758 &~ ((1 << align) - 1));
3759 if (align > symbol_get_tc (lcomm_sym)->align)
3760 symbol_get_tc (lcomm_sym)->align = align;
3761 }
3762
3763 if (lcomm)
3764 {
3765 /* Make sym an offset from lcomm_sym. */
3766 S_SET_SEGMENT (sym, bss_section);
3767 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3768 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3769 symbol_get_frag (lcomm_sym)->fr_offset += size;
3770 }
3771
3772 subseg_set (current_seg, current_subseg);
3773
3774 demand_empty_rest_of_line ();
3775 }
3776
3777 /* The .csect pseudo-op. This switches us into a different
3778 subsegment. The first argument is a symbol whose value is the
3779 start of the .csect. In COFF, csect symbols get special aux
3780 entries defined by the x_csect field of union internal_auxent. The
3781 optional second argument is the alignment (the default is 2). */
3782
3783 static void
ppc_csect(int ignore ATTRIBUTE_UNUSED)3784 ppc_csect (int ignore ATTRIBUTE_UNUSED)
3785 {
3786 char *name;
3787 char endc;
3788 symbolS *sym;
3789 offsetT align;
3790
3791 name = input_line_pointer;
3792 endc = get_symbol_end ();
3793
3794 sym = symbol_find_or_make (name);
3795
3796 *input_line_pointer = endc;
3797
3798 if (S_GET_NAME (sym)[0] == '\0')
3799 {
3800 /* An unnamed csect is assumed to be [PR]. */
3801 symbol_get_tc (sym)->symbol_class = XMC_PR;
3802 }
3803
3804 align = 2;
3805 if (*input_line_pointer == ',')
3806 {
3807 ++input_line_pointer;
3808 align = get_absolute_expression ();
3809 }
3810
3811 ppc_change_csect (sym, align);
3812
3813 demand_empty_rest_of_line ();
3814 }
3815
3816 /* Change to a different csect. */
3817
3818 static void
ppc_change_csect(symbolS * sym,offsetT align)3819 ppc_change_csect (symbolS *sym, offsetT align)
3820 {
3821 if (S_IS_DEFINED (sym))
3822 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
3823 else
3824 {
3825 symbolS **list_ptr;
3826 int after_toc;
3827 int hold_chunksize;
3828 symbolS *list;
3829 int is_code;
3830 segT sec;
3831
3832 /* This is a new csect. We need to look at the symbol class to
3833 figure out whether it should go in the text section or the
3834 data section. */
3835 after_toc = 0;
3836 is_code = 0;
3837 switch (symbol_get_tc (sym)->symbol_class)
3838 {
3839 case XMC_PR:
3840 case XMC_RO:
3841 case XMC_DB:
3842 case XMC_GL:
3843 case XMC_XO:
3844 case XMC_SV:
3845 case XMC_TI:
3846 case XMC_TB:
3847 S_SET_SEGMENT (sym, text_section);
3848 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
3849 ++ppc_text_subsegment;
3850 list_ptr = &ppc_text_csects;
3851 is_code = 1;
3852 break;
3853 case XMC_RW:
3854 case XMC_TC0:
3855 case XMC_TC:
3856 case XMC_DS:
3857 case XMC_UA:
3858 case XMC_BS:
3859 case XMC_UC:
3860 if (ppc_toc_csect != NULL
3861 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3862 == ppc_data_subsegment))
3863 after_toc = 1;
3864 S_SET_SEGMENT (sym, data_section);
3865 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
3866 ++ppc_data_subsegment;
3867 list_ptr = &ppc_data_csects;
3868 break;
3869 default:
3870 abort ();
3871 }
3872
3873 /* We set the obstack chunk size to a small value before
3874 changing subsegments, so that we don't use a lot of memory
3875 space for what may be a small section. */
3876 hold_chunksize = chunksize;
3877 chunksize = 64;
3878
3879 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3880 symbol_get_tc (sym)->subseg);
3881
3882 chunksize = hold_chunksize;
3883
3884 if (after_toc)
3885 ppc_after_toc_frag = frag_now;
3886
3887 record_alignment (sec, align);
3888 if (is_code)
3889 frag_align_code (align, 0);
3890 else
3891 frag_align (align, 0, 0);
3892
3893 symbol_set_frag (sym, frag_now);
3894 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3895
3896 symbol_get_tc (sym)->align = align;
3897 symbol_get_tc (sym)->output = 1;
3898 symbol_get_tc (sym)->within = sym;
3899
3900 for (list = *list_ptr;
3901 symbol_get_tc (list)->next != (symbolS *) NULL;
3902 list = symbol_get_tc (list)->next)
3903 ;
3904 symbol_get_tc (list)->next = sym;
3905
3906 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3907 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3908 &symbol_lastP);
3909 }
3910
3911 ppc_current_csect = sym;
3912 }
3913
3914 static void
ppc_change_debug_section(unsigned int idx,subsegT subseg)3915 ppc_change_debug_section (unsigned int idx, subsegT subseg)
3916 {
3917 segT sec;
3918 flagword oldflags;
3919 const struct xcoff_dwsect_name *dw = &xcoff_dwsect_names[idx];
3920
3921 sec = subseg_new (dw->name, subseg);
3922 oldflags = bfd_get_section_flags (stdoutput, sec);
3923 if (oldflags == SEC_NO_FLAGS)
3924 {
3925 /* Just created section. */
3926 gas_assert (dw_sections[idx].sect == NULL);
3927
3928 bfd_set_section_flags (stdoutput, sec, SEC_DEBUGGING);
3929 bfd_set_section_alignment (stdoutput, sec, 0);
3930 dw_sections[idx].sect = sec;
3931 }
3932
3933 /* Not anymore in a csect. */
3934 ppc_current_csect = NULL;
3935 }
3936
3937 /* The .dwsect pseudo-op. Defines a DWARF section. Syntax is:
3938 .dwsect flag [, opt-label ]
3939 */
3940
3941 static void
ppc_dwsect(int ignore ATTRIBUTE_UNUSED)3942 ppc_dwsect (int ignore ATTRIBUTE_UNUSED)
3943 {
3944 offsetT flag;
3945 symbolS *opt_label;
3946 const struct xcoff_dwsect_name *dw;
3947 struct dw_subsection *subseg;
3948 struct dw_section *dws;
3949 int i;
3950
3951 /* Find section. */
3952 flag = get_absolute_expression ();
3953 dw = NULL;
3954 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
3955 if (xcoff_dwsect_names[i].flag == flag)
3956 {
3957 dw = &xcoff_dwsect_names[i];
3958 break;
3959 }
3960
3961 /* Parse opt-label. */
3962 if (*input_line_pointer == ',')
3963 {
3964 const char *label;
3965 char c;
3966
3967 ++input_line_pointer;
3968
3969 label = input_line_pointer;
3970 c = get_symbol_end ();
3971 opt_label = symbol_find_or_make (label);
3972 *input_line_pointer = c;
3973 }
3974 else
3975 opt_label = NULL;
3976
3977 demand_empty_rest_of_line ();
3978
3979 /* Return now in case of unknown subsection. */
3980 if (dw == NULL)
3981 {
3982 as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"),
3983 (unsigned)flag);
3984 return;
3985 }
3986
3987 /* Find the subsection. */
3988 dws = &dw_sections[i];
3989 subseg = NULL;
3990 if (opt_label != NULL && S_IS_DEFINED (opt_label))
3991 {
3992 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */
3993 if (dws->sect == NULL || S_GET_SEGMENT (opt_label) != dws->sect)
3994 {
3995 as_bad (_("label %s was not defined in this dwarf section"),
3996 S_GET_NAME (opt_label));
3997 subseg = dws->anon_subseg;
3998 opt_label = NULL;
3999 }
4000 else
4001 subseg = symbol_get_tc (opt_label)->u.dw;
4002 }
4003
4004 if (subseg != NULL)
4005 {
4006 /* Switch to the subsection. */
4007 ppc_change_debug_section (i, subseg->subseg);
4008 }
4009 else
4010 {
4011 /* Create a new dw subsection. */
4012 subseg = (struct dw_subsection *)
4013 xmalloc (sizeof (struct dw_subsection));
4014
4015 if (opt_label == NULL)
4016 {
4017 /* The anonymous one. */
4018 subseg->subseg = 0;
4019 subseg->link = NULL;
4020 dws->anon_subseg = subseg;
4021 }
4022 else
4023 {
4024 /* A named one. */
4025 if (dws->list_subseg != NULL)
4026 subseg->subseg = dws->list_subseg->subseg + 1;
4027 else
4028 subseg->subseg = 1;
4029
4030 subseg->link = dws->list_subseg;
4031 dws->list_subseg = subseg;
4032 symbol_get_tc (opt_label)->u.dw = subseg;
4033 }
4034
4035 ppc_change_debug_section (i, subseg->subseg);
4036
4037 if (dw->def_size)
4038 {
4039 /* Add the length field. */
4040 expressionS *exp = &subseg->end_exp;
4041 int sz;
4042
4043 if (opt_label != NULL)
4044 symbol_set_value_now (opt_label);
4045
4046 /* Add the length field. Note that according to the AIX assembler
4047 manual, the size of the length field is 4 for powerpc32 but
4048 12 for powerpc64. */
4049 if (ppc_obj64)
4050 {
4051 /* Write the 64bit marker. */
4052 md_number_to_chars (frag_more (4), -1, 4);
4053 }
4054
4055 exp->X_op = O_subtract;
4056 exp->X_op_symbol = symbol_temp_new_now ();
4057 exp->X_add_symbol = symbol_temp_make ();
4058
4059 sz = ppc_obj64 ? 8 : 4;
4060 exp->X_add_number = -sz;
4061 emit_expr (exp, sz);
4062 }
4063 }
4064 }
4065
4066 /* This function handles the .text and .data pseudo-ops. These
4067 pseudo-ops aren't really used by XCOFF; we implement them for the
4068 convenience of people who aren't used to XCOFF. */
4069
4070 static void
ppc_section(int type)4071 ppc_section (int type)
4072 {
4073 const char *name;
4074 symbolS *sym;
4075
4076 if (type == 't')
4077 name = ".text[PR]";
4078 else if (type == 'd')
4079 name = ".data[RW]";
4080 else
4081 abort ();
4082
4083 sym = symbol_find_or_make (name);
4084
4085 ppc_change_csect (sym, 2);
4086
4087 demand_empty_rest_of_line ();
4088 }
4089
4090 /* This function handles the .section pseudo-op. This is mostly to
4091 give an error, since XCOFF only supports .text, .data and .bss, but
4092 we do permit the user to name the text or data section. */
4093
4094 static void
ppc_named_section(int ignore ATTRIBUTE_UNUSED)4095 ppc_named_section (int ignore ATTRIBUTE_UNUSED)
4096 {
4097 char *user_name;
4098 const char *real_name;
4099 char c;
4100 symbolS *sym;
4101
4102 user_name = input_line_pointer;
4103 c = get_symbol_end ();
4104
4105 if (strcmp (user_name, ".text") == 0)
4106 real_name = ".text[PR]";
4107 else if (strcmp (user_name, ".data") == 0)
4108 real_name = ".data[RW]";
4109 else
4110 {
4111 as_bad (_("the XCOFF file format does not support arbitrary sections"));
4112 *input_line_pointer = c;
4113 ignore_rest_of_line ();
4114 return;
4115 }
4116
4117 *input_line_pointer = c;
4118
4119 sym = symbol_find_or_make (real_name);
4120
4121 ppc_change_csect (sym, 2);
4122
4123 demand_empty_rest_of_line ();
4124 }
4125
4126 /* The .extern pseudo-op. We create an undefined symbol. */
4127
4128 static void
ppc_extern(int ignore ATTRIBUTE_UNUSED)4129 ppc_extern (int ignore ATTRIBUTE_UNUSED)
4130 {
4131 char *name;
4132 char endc;
4133
4134 name = input_line_pointer;
4135 endc = get_symbol_end ();
4136
4137 (void) symbol_find_or_make (name);
4138
4139 *input_line_pointer = endc;
4140
4141 demand_empty_rest_of_line ();
4142 }
4143
4144 /* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
4145
4146 static void
ppc_lglobl(int ignore ATTRIBUTE_UNUSED)4147 ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
4148 {
4149 char *name;
4150 char endc;
4151 symbolS *sym;
4152
4153 name = input_line_pointer;
4154 endc = get_symbol_end ();
4155
4156 sym = symbol_find_or_make (name);
4157
4158 *input_line_pointer = endc;
4159
4160 symbol_get_tc (sym)->output = 1;
4161
4162 demand_empty_rest_of_line ();
4163 }
4164
4165 /* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
4166 relocations at the beginning of the current csect.
4167
4168 (In principle, there's no reason why the relocations _have_ to be at
4169 the beginning. Anywhere in the csect would do. However, inserting
4170 at the beginning is what the native assmebler does, and it helps to
4171 deal with cases where the .ref statements follow the section contents.)
4172
4173 ??? .refs don't work for empty .csects. However, the native assembler
4174 doesn't report an error in this case, and neither yet do we. */
4175
4176 static void
ppc_ref(int ignore ATTRIBUTE_UNUSED)4177 ppc_ref (int ignore ATTRIBUTE_UNUSED)
4178 {
4179 char *name;
4180 char c;
4181
4182 if (ppc_current_csect == NULL)
4183 {
4184 as_bad (_(".ref outside .csect"));
4185 ignore_rest_of_line ();
4186 return;
4187 }
4188
4189 do
4190 {
4191 name = input_line_pointer;
4192 c = get_symbol_end ();
4193
4194 fix_at_start (symbol_get_frag (ppc_current_csect), 0,
4195 symbol_find_or_make (name), 0, FALSE, BFD_RELOC_NONE);
4196
4197 *input_line_pointer = c;
4198 SKIP_WHITESPACE ();
4199 c = *input_line_pointer;
4200 if (c == ',')
4201 {
4202 input_line_pointer++;
4203 SKIP_WHITESPACE ();
4204 if (is_end_of_line[(unsigned char) *input_line_pointer])
4205 {
4206 as_bad (_("missing symbol name"));
4207 ignore_rest_of_line ();
4208 return;
4209 }
4210 }
4211 }
4212 while (c == ',');
4213
4214 demand_empty_rest_of_line ();
4215 }
4216
4217 /* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
4218 although I don't know why it bothers. */
4219
4220 static void
ppc_rename(int ignore ATTRIBUTE_UNUSED)4221 ppc_rename (int ignore ATTRIBUTE_UNUSED)
4222 {
4223 char *name;
4224 char endc;
4225 symbolS *sym;
4226 int len;
4227
4228 name = input_line_pointer;
4229 endc = get_symbol_end ();
4230
4231 sym = symbol_find_or_make (name);
4232
4233 *input_line_pointer = endc;
4234
4235 if (*input_line_pointer != ',')
4236 {
4237 as_bad (_("missing rename string"));
4238 ignore_rest_of_line ();
4239 return;
4240 }
4241 ++input_line_pointer;
4242
4243 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
4244
4245 demand_empty_rest_of_line ();
4246 }
4247
4248 /* The .stabx pseudo-op. This is similar to a normal .stabs
4249 pseudo-op, but slightly different. A sample is
4250 .stabx "main:F-1",.main,142,0
4251 The first argument is the symbol name to create. The second is the
4252 value, and the third is the storage class. The fourth seems to be
4253 always zero, and I am assuming it is the type. */
4254
4255 static void
ppc_stabx(int ignore ATTRIBUTE_UNUSED)4256 ppc_stabx (int ignore ATTRIBUTE_UNUSED)
4257 {
4258 char *name;
4259 int len;
4260 symbolS *sym;
4261 expressionS exp;
4262
4263 name = demand_copy_C_string (&len);
4264
4265 if (*input_line_pointer != ',')
4266 {
4267 as_bad (_("missing value"));
4268 return;
4269 }
4270 ++input_line_pointer;
4271
4272 ppc_stab_symbol = TRUE;
4273 sym = symbol_make (name);
4274 ppc_stab_symbol = FALSE;
4275
4276 symbol_get_tc (sym)->real_name = name;
4277
4278 (void) expression (&exp);
4279
4280 switch (exp.X_op)
4281 {
4282 case O_illegal:
4283 case O_absent:
4284 case O_big:
4285 as_bad (_("illegal .stabx expression; zero assumed"));
4286 exp.X_add_number = 0;
4287 /* Fall through. */
4288 case O_constant:
4289 S_SET_VALUE (sym, (valueT) exp.X_add_number);
4290 symbol_set_frag (sym, &zero_address_frag);
4291 break;
4292
4293 case O_symbol:
4294 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
4295 symbol_set_value_expression (sym, &exp);
4296 else
4297 {
4298 S_SET_VALUE (sym,
4299 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
4300 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
4301 }
4302 break;
4303
4304 default:
4305 /* The value is some complex expression. This will probably
4306 fail at some later point, but this is probably the right
4307 thing to do here. */
4308 symbol_set_value_expression (sym, &exp);
4309 break;
4310 }
4311
4312 S_SET_SEGMENT (sym, ppc_coff_debug_section);
4313 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4314
4315 if (*input_line_pointer != ',')
4316 {
4317 as_bad (_("missing class"));
4318 return;
4319 }
4320 ++input_line_pointer;
4321
4322 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
4323
4324 if (*input_line_pointer != ',')
4325 {
4326 as_bad (_("missing type"));
4327 return;
4328 }
4329 ++input_line_pointer;
4330
4331 S_SET_DATA_TYPE (sym, get_absolute_expression ());
4332
4333 symbol_get_tc (sym)->output = 1;
4334
4335 if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
4336 {
4337 /* In this case :
4338
4339 .bs name
4340 .stabx "z",arrays_,133,0
4341 .es
4342
4343 .comm arrays_,13768,3
4344
4345 resolve_symbol_value will copy the exp's "within" into sym's when the
4346 offset is 0. Since this seems to be corner case problem,
4347 only do the correction for storage class C_STSYM. A better solution
4348 would be to have the tc field updated in ppc_symbol_new_hook. */
4349
4350 if (exp.X_op == O_symbol)
4351 {
4352 if (ppc_current_block == NULL)
4353 as_bad (_(".stabx of storage class stsym must be within .bs/.es"));
4354
4355 symbol_get_tc (sym)->within = ppc_current_block;
4356 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
4357 }
4358 }
4359
4360 if (exp.X_op != O_symbol
4361 || ! S_IS_EXTERNAL (exp.X_add_symbol)
4362 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
4363 ppc_frob_label (sym);
4364 else
4365 {
4366 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4367 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
4368 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
4369 symbol_get_tc (ppc_current_csect)->within = sym;
4370 }
4371
4372 demand_empty_rest_of_line ();
4373 }
4374
4375 /* The .function pseudo-op. This takes several arguments. The first
4376 argument seems to be the external name of the symbol. The second
4377 argument seems to be the label for the start of the function. gcc
4378 uses the same name for both. I have no idea what the third and
4379 fourth arguments are meant to be. The optional fifth argument is
4380 an expression for the size of the function. In COFF this symbol
4381 gets an aux entry like that used for a csect. */
4382
4383 static void
ppc_function(int ignore ATTRIBUTE_UNUSED)4384 ppc_function (int ignore ATTRIBUTE_UNUSED)
4385 {
4386 char *name;
4387 char endc;
4388 char *s;
4389 symbolS *ext_sym;
4390 symbolS *lab_sym;
4391
4392 name = input_line_pointer;
4393 endc = get_symbol_end ();
4394
4395 /* Ignore any [PR] suffix. */
4396 name = ppc_canonicalize_symbol_name (name);
4397 s = strchr (name, '[');
4398 if (s != (char *) NULL
4399 && strcmp (s + 1, "PR]") == 0)
4400 *s = '\0';
4401
4402 ext_sym = symbol_find_or_make (name);
4403
4404 *input_line_pointer = endc;
4405
4406 if (*input_line_pointer != ',')
4407 {
4408 as_bad (_("missing symbol name"));
4409 ignore_rest_of_line ();
4410 return;
4411 }
4412 ++input_line_pointer;
4413
4414 name = input_line_pointer;
4415 endc = get_symbol_end ();
4416
4417 lab_sym = symbol_find_or_make (name);
4418
4419 *input_line_pointer = endc;
4420
4421 if (ext_sym != lab_sym)
4422 {
4423 expressionS exp;
4424
4425 exp.X_op = O_symbol;
4426 exp.X_add_symbol = lab_sym;
4427 exp.X_op_symbol = NULL;
4428 exp.X_add_number = 0;
4429 exp.X_unsigned = 0;
4430 symbol_set_value_expression (ext_sym, &exp);
4431 }
4432
4433 if (symbol_get_tc (ext_sym)->symbol_class == -1)
4434 symbol_get_tc (ext_sym)->symbol_class = XMC_PR;
4435 symbol_get_tc (ext_sym)->output = 1;
4436
4437 if (*input_line_pointer == ',')
4438 {
4439 expressionS exp;
4440
4441 /* Ignore the third argument. */
4442 ++input_line_pointer;
4443 expression (& exp);
4444 if (*input_line_pointer == ',')
4445 {
4446 /* Ignore the fourth argument. */
4447 ++input_line_pointer;
4448 expression (& exp);
4449 if (*input_line_pointer == ',')
4450 {
4451 /* The fifth argument is the function size. */
4452 ++input_line_pointer;
4453 symbol_get_tc (ext_sym)->u.size = symbol_new
4454 ("L0\001", absolute_section,(valueT) 0, &zero_address_frag);
4455 pseudo_set (symbol_get_tc (ext_sym)->u.size);
4456 }
4457 }
4458 }
4459
4460 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4461 SF_SET_FUNCTION (ext_sym);
4462 SF_SET_PROCESS (ext_sym);
4463 coff_add_linesym (ext_sym);
4464
4465 demand_empty_rest_of_line ();
4466 }
4467
4468 /* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
4469 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
4470 with the correct line number */
4471
4472 static symbolS *saved_bi_sym = 0;
4473
4474 static void
ppc_bf(int ignore ATTRIBUTE_UNUSED)4475 ppc_bf (int ignore ATTRIBUTE_UNUSED)
4476 {
4477 symbolS *sym;
4478
4479 sym = symbol_make (".bf");
4480 S_SET_SEGMENT (sym, text_section);
4481 symbol_set_frag (sym, frag_now);
4482 S_SET_VALUE (sym, frag_now_fix ());
4483 S_SET_STORAGE_CLASS (sym, C_FCN);
4484
4485 coff_line_base = get_absolute_expression ();
4486
4487 S_SET_NUMBER_AUXILIARY (sym, 1);
4488 SA_SET_SYM_LNNO (sym, coff_line_base);
4489
4490 /* Line number for bi. */
4491 if (saved_bi_sym)
4492 {
4493 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
4494 saved_bi_sym = 0;
4495 }
4496
4497
4498 symbol_get_tc (sym)->output = 1;
4499
4500 ppc_frob_label (sym);
4501
4502 demand_empty_rest_of_line ();
4503 }
4504
4505 /* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
4506 ".ef", except that the line number is absolute, not relative to the
4507 most recent ".bf" symbol. */
4508
4509 static void
ppc_ef(int ignore ATTRIBUTE_UNUSED)4510 ppc_ef (int ignore ATTRIBUTE_UNUSED)
4511 {
4512 symbolS *sym;
4513
4514 sym = symbol_make (".ef");
4515 S_SET_SEGMENT (sym, text_section);
4516 symbol_set_frag (sym, frag_now);
4517 S_SET_VALUE (sym, frag_now_fix ());
4518 S_SET_STORAGE_CLASS (sym, C_FCN);
4519 S_SET_NUMBER_AUXILIARY (sym, 1);
4520 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4521 symbol_get_tc (sym)->output = 1;
4522
4523 ppc_frob_label (sym);
4524
4525 demand_empty_rest_of_line ();
4526 }
4527
4528 /* The .bi and .ei pseudo-ops. These take a string argument and
4529 generates a C_BINCL or C_EINCL symbol, which goes at the start of
4530 the symbol list. The value of .bi will be know when the next .bf
4531 is encountered. */
4532
4533 static void
ppc_biei(int ei)4534 ppc_biei (int ei)
4535 {
4536 static symbolS *last_biei;
4537
4538 char *name;
4539 int len;
4540 symbolS *sym;
4541 symbolS *look;
4542
4543 name = demand_copy_C_string (&len);
4544
4545 /* The value of these symbols is actually file offset. Here we set
4546 the value to the index into the line number entries. In
4547 ppc_frob_symbols we set the fix_line field, which will cause BFD
4548 to do the right thing. */
4549
4550 sym = symbol_make (name);
4551 /* obj-coff.c currently only handles line numbers correctly in the
4552 .text section. */
4553 S_SET_SEGMENT (sym, text_section);
4554 S_SET_VALUE (sym, coff_n_line_nos);
4555 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4556
4557 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
4558 symbol_get_tc (sym)->output = 1;
4559
4560 /* Save bi. */
4561 if (ei)
4562 saved_bi_sym = 0;
4563 else
4564 saved_bi_sym = sym;
4565
4566 for (look = last_biei ? last_biei : symbol_rootP;
4567 (look != (symbolS *) NULL
4568 && (S_GET_STORAGE_CLASS (look) == C_FILE
4569 || S_GET_STORAGE_CLASS (look) == C_BINCL
4570 || S_GET_STORAGE_CLASS (look) == C_EINCL));
4571 look = symbol_next (look))
4572 ;
4573 if (look != (symbolS *) NULL)
4574 {
4575 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4576 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
4577 last_biei = sym;
4578 }
4579
4580 demand_empty_rest_of_line ();
4581 }
4582
4583 /* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
4584 There is one argument, which is a csect symbol. The value of the
4585 .bs symbol is the index of this csect symbol. */
4586
4587 static void
ppc_bs(int ignore ATTRIBUTE_UNUSED)4588 ppc_bs (int ignore ATTRIBUTE_UNUSED)
4589 {
4590 char *name;
4591 char endc;
4592 symbolS *csect;
4593 symbolS *sym;
4594
4595 if (ppc_current_block != NULL)
4596 as_bad (_("nested .bs blocks"));
4597
4598 name = input_line_pointer;
4599 endc = get_symbol_end ();
4600
4601 csect = symbol_find_or_make (name);
4602
4603 *input_line_pointer = endc;
4604
4605 sym = symbol_make (".bs");
4606 S_SET_SEGMENT (sym, now_seg);
4607 S_SET_STORAGE_CLASS (sym, C_BSTAT);
4608 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4609 symbol_get_tc (sym)->output = 1;
4610
4611 symbol_get_tc (sym)->within = csect;
4612
4613 ppc_frob_label (sym);
4614
4615 ppc_current_block = sym;
4616
4617 demand_empty_rest_of_line ();
4618 }
4619
4620 /* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
4621
4622 static void
ppc_es(int ignore ATTRIBUTE_UNUSED)4623 ppc_es (int ignore ATTRIBUTE_UNUSED)
4624 {
4625 symbolS *sym;
4626
4627 if (ppc_current_block == NULL)
4628 as_bad (_(".es without preceding .bs"));
4629
4630 sym = symbol_make (".es");
4631 S_SET_SEGMENT (sym, now_seg);
4632 S_SET_STORAGE_CLASS (sym, C_ESTAT);
4633 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4634 symbol_get_tc (sym)->output = 1;
4635
4636 ppc_frob_label (sym);
4637
4638 ppc_current_block = NULL;
4639
4640 demand_empty_rest_of_line ();
4641 }
4642
4643 /* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
4644 line number. */
4645
4646 static void
ppc_bb(int ignore ATTRIBUTE_UNUSED)4647 ppc_bb (int ignore ATTRIBUTE_UNUSED)
4648 {
4649 symbolS *sym;
4650
4651 sym = symbol_make (".bb");
4652 S_SET_SEGMENT (sym, text_section);
4653 symbol_set_frag (sym, frag_now);
4654 S_SET_VALUE (sym, frag_now_fix ());
4655 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4656
4657 S_SET_NUMBER_AUXILIARY (sym, 1);
4658 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4659
4660 symbol_get_tc (sym)->output = 1;
4661
4662 SF_SET_PROCESS (sym);
4663
4664 ppc_frob_label (sym);
4665
4666 demand_empty_rest_of_line ();
4667 }
4668
4669 /* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
4670 line number. */
4671
4672 static void
ppc_eb(int ignore ATTRIBUTE_UNUSED)4673 ppc_eb (int ignore ATTRIBUTE_UNUSED)
4674 {
4675 symbolS *sym;
4676
4677 sym = symbol_make (".eb");
4678 S_SET_SEGMENT (sym, text_section);
4679 symbol_set_frag (sym, frag_now);
4680 S_SET_VALUE (sym, frag_now_fix ());
4681 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4682 S_SET_NUMBER_AUXILIARY (sym, 1);
4683 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4684 symbol_get_tc (sym)->output = 1;
4685
4686 SF_SET_PROCESS (sym);
4687
4688 ppc_frob_label (sym);
4689
4690 demand_empty_rest_of_line ();
4691 }
4692
4693 /* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
4694 specified name. */
4695
4696 static void
ppc_bc(int ignore ATTRIBUTE_UNUSED)4697 ppc_bc (int ignore ATTRIBUTE_UNUSED)
4698 {
4699 char *name;
4700 int len;
4701 symbolS *sym;
4702
4703 name = demand_copy_C_string (&len);
4704 sym = symbol_make (name);
4705 S_SET_SEGMENT (sym, ppc_coff_debug_section);
4706 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4707 S_SET_STORAGE_CLASS (sym, C_BCOMM);
4708 S_SET_VALUE (sym, 0);
4709 symbol_get_tc (sym)->output = 1;
4710
4711 ppc_frob_label (sym);
4712
4713 demand_empty_rest_of_line ();
4714 }
4715
4716 /* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
4717
4718 static void
ppc_ec(int ignore ATTRIBUTE_UNUSED)4719 ppc_ec (int ignore ATTRIBUTE_UNUSED)
4720 {
4721 symbolS *sym;
4722
4723 sym = symbol_make (".ec");
4724 S_SET_SEGMENT (sym, ppc_coff_debug_section);
4725 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4726 S_SET_STORAGE_CLASS (sym, C_ECOMM);
4727 S_SET_VALUE (sym, 0);
4728 symbol_get_tc (sym)->output = 1;
4729
4730 ppc_frob_label (sym);
4731
4732 demand_empty_rest_of_line ();
4733 }
4734
4735 /* The .toc pseudo-op. Switch to the .toc subsegment. */
4736
4737 static void
ppc_toc(int ignore ATTRIBUTE_UNUSED)4738 ppc_toc (int ignore ATTRIBUTE_UNUSED)
4739 {
4740 if (ppc_toc_csect != (symbolS *) NULL)
4741 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
4742 else
4743 {
4744 subsegT subseg;
4745 symbolS *sym;
4746 symbolS *list;
4747
4748 subseg = ppc_data_subsegment;
4749 ++ppc_data_subsegment;
4750
4751 subseg_new (segment_name (data_section), subseg);
4752 ppc_toc_frag = frag_now;
4753
4754 sym = symbol_find_or_make ("TOC[TC0]");
4755 symbol_set_frag (sym, frag_now);
4756 S_SET_SEGMENT (sym, data_section);
4757 S_SET_VALUE (sym, (valueT) frag_now_fix ());
4758 symbol_get_tc (sym)->subseg = subseg;
4759 symbol_get_tc (sym)->output = 1;
4760 symbol_get_tc (sym)->within = sym;
4761
4762 ppc_toc_csect = sym;
4763
4764 for (list = ppc_data_csects;
4765 symbol_get_tc (list)->next != (symbolS *) NULL;
4766 list = symbol_get_tc (list)->next)
4767 ;
4768 symbol_get_tc (list)->next = sym;
4769
4770 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4771 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
4772 &symbol_lastP);
4773 }
4774
4775 ppc_current_csect = ppc_toc_csect;
4776
4777 demand_empty_rest_of_line ();
4778 }
4779
4780 /* The AIX assembler automatically aligns the operands of a .long or
4781 .short pseudo-op, and we want to be compatible. */
4782
4783 static void
ppc_xcoff_cons(int log_size)4784 ppc_xcoff_cons (int log_size)
4785 {
4786 frag_align (log_size, 0, 0);
4787 record_alignment (now_seg, log_size);
4788 cons (1 << log_size);
4789 }
4790
4791 static void
ppc_vbyte(int dummy ATTRIBUTE_UNUSED)4792 ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
4793 {
4794 expressionS exp;
4795 int byte_count;
4796
4797 (void) expression (&exp);
4798
4799 if (exp.X_op != O_constant)
4800 {
4801 as_bad (_("non-constant byte count"));
4802 return;
4803 }
4804
4805 byte_count = exp.X_add_number;
4806
4807 if (*input_line_pointer != ',')
4808 {
4809 as_bad (_("missing value"));
4810 return;
4811 }
4812
4813 ++input_line_pointer;
4814 cons (byte_count);
4815 }
4816
4817 void
ppc_xcoff_end(void)4818 ppc_xcoff_end (void)
4819 {
4820 int i;
4821
4822 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
4823 {
4824 struct dw_section *dws = &dw_sections[i];
4825 struct dw_subsection *dwss;
4826
4827 if (dws->anon_subseg)
4828 {
4829 dwss = dws->anon_subseg;
4830 dwss->link = dws->list_subseg;
4831 }
4832 else
4833 dwss = dws->list_subseg;
4834
4835 for (; dwss != NULL; dwss = dwss->link)
4836 if (dwss->end_exp.X_add_symbol != NULL)
4837 {
4838 subseg_set (dws->sect, dwss->subseg);
4839 symbol_set_value_now (dwss->end_exp.X_add_symbol);
4840 }
4841 }
4842 }
4843
4844 #endif /* OBJ_XCOFF */
4845 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
4846
4847 /* The .tc pseudo-op. This is used when generating either XCOFF or
4848 ELF. This takes two or more arguments.
4849
4850 When generating XCOFF output, the first argument is the name to
4851 give to this location in the toc; this will be a symbol with class
4852 TC. The rest of the arguments are N-byte values to actually put at
4853 this location in the TOC; often there is just one more argument, a
4854 relocatable symbol reference. The size of the value to store
4855 depends on target word size. A 32-bit target uses 4-byte values, a
4856 64-bit target uses 8-byte values.
4857
4858 When not generating XCOFF output, the arguments are the same, but
4859 the first argument is simply ignored. */
4860
4861 static void
ppc_tc(int ignore ATTRIBUTE_UNUSED)4862 ppc_tc (int ignore ATTRIBUTE_UNUSED)
4863 {
4864 #ifdef OBJ_XCOFF
4865
4866 /* Define the TOC symbol name. */
4867 {
4868 char *name;
4869 char endc;
4870 symbolS *sym;
4871
4872 if (ppc_toc_csect == (symbolS *) NULL
4873 || ppc_toc_csect != ppc_current_csect)
4874 {
4875 as_bad (_(".tc not in .toc section"));
4876 ignore_rest_of_line ();
4877 return;
4878 }
4879
4880 name = input_line_pointer;
4881 endc = get_symbol_end ();
4882
4883 sym = symbol_find_or_make (name);
4884
4885 *input_line_pointer = endc;
4886
4887 if (S_IS_DEFINED (sym))
4888 {
4889 symbolS *label;
4890
4891 label = symbol_get_tc (ppc_current_csect)->within;
4892 if (symbol_get_tc (label)->symbol_class != XMC_TC0)
4893 {
4894 as_bad (_(".tc with no label"));
4895 ignore_rest_of_line ();
4896 return;
4897 }
4898
4899 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
4900 symbol_set_frag (label, symbol_get_frag (sym));
4901 S_SET_VALUE (label, S_GET_VALUE (sym));
4902
4903 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4904 ++input_line_pointer;
4905
4906 return;
4907 }
4908
4909 S_SET_SEGMENT (sym, now_seg);
4910 symbol_set_frag (sym, frag_now);
4911 S_SET_VALUE (sym, (valueT) frag_now_fix ());
4912 symbol_get_tc (sym)->symbol_class = XMC_TC;
4913 symbol_get_tc (sym)->output = 1;
4914
4915 ppc_frob_label (sym);
4916 }
4917
4918 #endif /* OBJ_XCOFF */
4919 #ifdef OBJ_ELF
4920 int align;
4921
4922 /* Skip the TOC symbol name. */
4923 while (is_part_of_name (*input_line_pointer)
4924 || *input_line_pointer == ' '
4925 || *input_line_pointer == '['
4926 || *input_line_pointer == ']'
4927 || *input_line_pointer == '{'
4928 || *input_line_pointer == '}')
4929 ++input_line_pointer;
4930
4931 /* Align to a four/eight byte boundary. */
4932 align = ppc_obj64 ? 3 : 2;
4933 frag_align (align, 0, 0);
4934 record_alignment (now_seg, align);
4935 #endif /* OBJ_ELF */
4936
4937 if (*input_line_pointer != ',')
4938 demand_empty_rest_of_line ();
4939 else
4940 {
4941 ++input_line_pointer;
4942 cons (ppc_obj64 ? 8 : 4);
4943 }
4944 }
4945
4946 /* Pseudo-op .machine. */
4947
4948 static void
ppc_machine(int ignore ATTRIBUTE_UNUSED)4949 ppc_machine (int ignore ATTRIBUTE_UNUSED)
4950 {
4951 char *cpu_string;
4952 #define MAX_HISTORY 100
4953 static ppc_cpu_t *cpu_history;
4954 static int curr_hist;
4955
4956 SKIP_WHITESPACE ();
4957
4958 if (*input_line_pointer == '"')
4959 {
4960 int len;
4961 cpu_string = demand_copy_C_string (&len);
4962 }
4963 else
4964 {
4965 char c;
4966 cpu_string = input_line_pointer;
4967 c = get_symbol_end ();
4968 cpu_string = xstrdup (cpu_string);
4969 *input_line_pointer = c;
4970 }
4971
4972 if (cpu_string != NULL)
4973 {
4974 ppc_cpu_t old_cpu = ppc_cpu;
4975 ppc_cpu_t new_cpu;
4976 char *p;
4977
4978 for (p = cpu_string; *p != 0; p++)
4979 *p = TOLOWER (*p);
4980
4981 if (strcmp (cpu_string, "push") == 0)
4982 {
4983 if (cpu_history == NULL)
4984 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4985
4986 if (curr_hist >= MAX_HISTORY)
4987 as_bad (_(".machine stack overflow"));
4988 else
4989 cpu_history[curr_hist++] = ppc_cpu;
4990 }
4991 else if (strcmp (cpu_string, "pop") == 0)
4992 {
4993 if (curr_hist <= 0)
4994 as_bad (_(".machine stack underflow"));
4995 else
4996 ppc_cpu = cpu_history[--curr_hist];
4997 }
4998 else if ((new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, cpu_string)) != 0)
4999 ppc_cpu = new_cpu;
5000 else
5001 as_bad (_("invalid machine `%s'"), cpu_string);
5002
5003 if (ppc_cpu != old_cpu)
5004 ppc_setup_opcodes ();
5005 }
5006
5007 demand_empty_rest_of_line ();
5008 }
5009 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
5010
5011 #ifdef TE_PE
5012
5013 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
5014
5015 /* Set the current section. */
5016 static void
ppc_set_current_section(segT new)5017 ppc_set_current_section (segT new)
5018 {
5019 ppc_previous_section = ppc_current_section;
5020 ppc_current_section = new;
5021 }
5022
5023 /* pseudo-op: .previous
5024 behaviour: toggles the current section with the previous section.
5025 errors: None
5026 warnings: "No previous section" */
5027
5028 static void
ppc_previous(int ignore ATTRIBUTE_UNUSED)5029 ppc_previous (int ignore ATTRIBUTE_UNUSED)
5030 {
5031 if (ppc_previous_section == NULL)
5032 {
5033 as_warn (_("no previous section to return to, ignored."));
5034 return;
5035 }
5036
5037 subseg_set (ppc_previous_section, 0);
5038
5039 ppc_set_current_section (ppc_previous_section);
5040 }
5041
5042 /* pseudo-op: .pdata
5043 behaviour: predefined read only data section
5044 double word aligned
5045 errors: None
5046 warnings: None
5047 initial: .section .pdata "adr3"
5048 a - don't know -- maybe a misprint
5049 d - initialized data
5050 r - readable
5051 3 - double word aligned (that would be 4 byte boundary)
5052
5053 commentary:
5054 Tag index tables (also known as the function table) for exception
5055 handling, debugging, etc. */
5056
5057 static void
ppc_pdata(int ignore ATTRIBUTE_UNUSED)5058 ppc_pdata (int ignore ATTRIBUTE_UNUSED)
5059 {
5060 if (pdata_section == 0)
5061 {
5062 pdata_section = subseg_new (".pdata", 0);
5063
5064 bfd_set_section_flags (stdoutput, pdata_section,
5065 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5066 | SEC_READONLY | SEC_DATA ));
5067
5068 bfd_set_section_alignment (stdoutput, pdata_section, 2);
5069 }
5070 else
5071 {
5072 pdata_section = subseg_new (".pdata", 0);
5073 }
5074 ppc_set_current_section (pdata_section);
5075 }
5076
5077 /* pseudo-op: .ydata
5078 behaviour: predefined read only data section
5079 double word aligned
5080 errors: None
5081 warnings: None
5082 initial: .section .ydata "drw3"
5083 a - don't know -- maybe a misprint
5084 d - initialized data
5085 r - readable
5086 3 - double word aligned (that would be 4 byte boundary)
5087 commentary:
5088 Tag tables (also known as the scope table) for exception handling,
5089 debugging, etc. */
5090
5091 static void
ppc_ydata(int ignore ATTRIBUTE_UNUSED)5092 ppc_ydata (int ignore ATTRIBUTE_UNUSED)
5093 {
5094 if (ydata_section == 0)
5095 {
5096 ydata_section = subseg_new (".ydata", 0);
5097 bfd_set_section_flags (stdoutput, ydata_section,
5098 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5099 | SEC_READONLY | SEC_DATA ));
5100
5101 bfd_set_section_alignment (stdoutput, ydata_section, 3);
5102 }
5103 else
5104 {
5105 ydata_section = subseg_new (".ydata", 0);
5106 }
5107 ppc_set_current_section (ydata_section);
5108 }
5109
5110 /* pseudo-op: .reldata
5111 behaviour: predefined read write data section
5112 double word aligned (4-byte)
5113 FIXME: relocation is applied to it
5114 FIXME: what's the difference between this and .data?
5115 errors: None
5116 warnings: None
5117 initial: .section .reldata "drw3"
5118 d - initialized data
5119 r - readable
5120 w - writeable
5121 3 - double word aligned (that would be 8 byte boundary)
5122
5123 commentary:
5124 Like .data, but intended to hold data subject to relocation, such as
5125 function descriptors, etc. */
5126
5127 static void
ppc_reldata(int ignore ATTRIBUTE_UNUSED)5128 ppc_reldata (int ignore ATTRIBUTE_UNUSED)
5129 {
5130 if (reldata_section == 0)
5131 {
5132 reldata_section = subseg_new (".reldata", 0);
5133
5134 bfd_set_section_flags (stdoutput, reldata_section,
5135 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5136 | SEC_DATA));
5137
5138 bfd_set_section_alignment (stdoutput, reldata_section, 2);
5139 }
5140 else
5141 {
5142 reldata_section = subseg_new (".reldata", 0);
5143 }
5144 ppc_set_current_section (reldata_section);
5145 }
5146
5147 /* pseudo-op: .rdata
5148 behaviour: predefined read only data section
5149 double word aligned
5150 errors: None
5151 warnings: None
5152 initial: .section .rdata "dr3"
5153 d - initialized data
5154 r - readable
5155 3 - double word aligned (that would be 4 byte boundary) */
5156
5157 static void
ppc_rdata(int ignore ATTRIBUTE_UNUSED)5158 ppc_rdata (int ignore ATTRIBUTE_UNUSED)
5159 {
5160 if (rdata_section == 0)
5161 {
5162 rdata_section = subseg_new (".rdata", 0);
5163 bfd_set_section_flags (stdoutput, rdata_section,
5164 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5165 | SEC_READONLY | SEC_DATA ));
5166
5167 bfd_set_section_alignment (stdoutput, rdata_section, 2);
5168 }
5169 else
5170 {
5171 rdata_section = subseg_new (".rdata", 0);
5172 }
5173 ppc_set_current_section (rdata_section);
5174 }
5175
5176 /* pseudo-op: .ualong
5177 behaviour: much like .int, with the exception that no alignment is
5178 performed.
5179 FIXME: test the alignment statement
5180 errors: None
5181 warnings: None */
5182
5183 static void
ppc_ualong(int ignore ATTRIBUTE_UNUSED)5184 ppc_ualong (int ignore ATTRIBUTE_UNUSED)
5185 {
5186 /* Try for long. */
5187 cons (4);
5188 }
5189
5190 /* pseudo-op: .znop <symbol name>
5191 behaviour: Issue a nop instruction
5192 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
5193 the supplied symbol name.
5194 errors: None
5195 warnings: Missing symbol name */
5196
5197 static void
ppc_znop(int ignore ATTRIBUTE_UNUSED)5198 ppc_znop (int ignore ATTRIBUTE_UNUSED)
5199 {
5200 unsigned long insn;
5201 const struct powerpc_opcode *opcode;
5202 char *f;
5203 symbolS *sym;
5204 char *symbol_name;
5205 char c;
5206 char *name;
5207
5208 /* Strip out the symbol name. */
5209 symbol_name = input_line_pointer;
5210 c = get_symbol_end ();
5211
5212 name = xmalloc (input_line_pointer - symbol_name + 1);
5213 strcpy (name, symbol_name);
5214
5215 sym = symbol_find_or_make (name);
5216
5217 *input_line_pointer = c;
5218
5219 SKIP_WHITESPACE ();
5220
5221 /* Look up the opcode in the hash table. */
5222 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
5223
5224 /* Stick in the nop. */
5225 insn = opcode->opcode;
5226
5227 /* Write out the instruction. */
5228 f = frag_more (4);
5229 md_number_to_chars (f, insn, 4);
5230 fix_new (frag_now,
5231 f - frag_now->fr_literal,
5232 4,
5233 sym,
5234 0,
5235 0,
5236 BFD_RELOC_16_GOT_PCREL);
5237
5238 }
5239
5240 /* pseudo-op:
5241 behaviour:
5242 errors:
5243 warnings: */
5244
5245 static void
ppc_pe_comm(int lcomm)5246 ppc_pe_comm (int lcomm)
5247 {
5248 char *name;
5249 char c;
5250 char *p;
5251 offsetT temp;
5252 symbolS *symbolP;
5253 offsetT align;
5254
5255 name = input_line_pointer;
5256 c = get_symbol_end ();
5257
5258 /* just after name is now '\0'. */
5259 p = input_line_pointer;
5260 *p = c;
5261 SKIP_WHITESPACE ();
5262 if (*input_line_pointer != ',')
5263 {
5264 as_bad (_("expected comma after symbol-name: rest of line ignored."));
5265 ignore_rest_of_line ();
5266 return;
5267 }
5268
5269 input_line_pointer++; /* skip ',' */
5270 if ((temp = get_absolute_expression ()) < 0)
5271 {
5272 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
5273 ignore_rest_of_line ();
5274 return;
5275 }
5276
5277 if (! lcomm)
5278 {
5279 /* The third argument to .comm is the alignment. */
5280 if (*input_line_pointer != ',')
5281 align = 3;
5282 else
5283 {
5284 ++input_line_pointer;
5285 align = get_absolute_expression ();
5286 if (align <= 0)
5287 {
5288 as_warn (_("ignoring bad alignment"));
5289 align = 3;
5290 }
5291 }
5292 }
5293
5294 *p = 0;
5295 symbolP = symbol_find_or_make (name);
5296
5297 *p = c;
5298 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
5299 {
5300 as_bad (_("ignoring attempt to re-define symbol `%s'."),
5301 S_GET_NAME (symbolP));
5302 ignore_rest_of_line ();
5303 return;
5304 }
5305
5306 if (S_GET_VALUE (symbolP))
5307 {
5308 if (S_GET_VALUE (symbolP) != (valueT) temp)
5309 as_bad (_("length of .comm \"%s\" is already %ld. Not changed to %ld."),
5310 S_GET_NAME (symbolP),
5311 (long) S_GET_VALUE (symbolP),
5312 (long) temp);
5313 }
5314 else
5315 {
5316 S_SET_VALUE (symbolP, (valueT) temp);
5317 S_SET_EXTERNAL (symbolP);
5318 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
5319 }
5320
5321 demand_empty_rest_of_line ();
5322 }
5323
5324 /*
5325 * implement the .section pseudo op:
5326 * .section name {, "flags"}
5327 * ^ ^
5328 * | +--- optional flags: 'b' for bss
5329 * | 'i' for info
5330 * +-- section name 'l' for lib
5331 * 'n' for noload
5332 * 'o' for over
5333 * 'w' for data
5334 * 'd' (apparently m88k for data)
5335 * 'x' for text
5336 * But if the argument is not a quoted string, treat it as a
5337 * subsegment number.
5338 *
5339 * FIXME: this is a copy of the section processing from obj-coff.c, with
5340 * additions/changes for the moto-pas assembler support. There are three
5341 * categories:
5342 *
5343 * FIXME: I just noticed this. This doesn't work at all really. It it
5344 * setting bits that bfd probably neither understands or uses. The
5345 * correct approach (?) will have to incorporate extra fields attached
5346 * to the section to hold the system specific stuff. (krk)
5347 *
5348 * Section Contents:
5349 * 'a' - unknown - referred to in documentation, but no definition supplied
5350 * 'c' - section has code
5351 * 'd' - section has initialized data
5352 * 'u' - section has uninitialized data
5353 * 'i' - section contains directives (info)
5354 * 'n' - section can be discarded
5355 * 'R' - remove section at link time
5356 *
5357 * Section Protection:
5358 * 'r' - section is readable
5359 * 'w' - section is writeable
5360 * 'x' - section is executable
5361 * 's' - section is sharable
5362 *
5363 * Section Alignment:
5364 * '0' - align to byte boundary
5365 * '1' - align to halfword undary
5366 * '2' - align to word boundary
5367 * '3' - align to doubleword boundary
5368 * '4' - align to quadword boundary
5369 * '5' - align to 32 byte boundary
5370 * '6' - align to 64 byte boundary
5371 *
5372 */
5373
5374 void
ppc_pe_section(int ignore ATTRIBUTE_UNUSED)5375 ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
5376 {
5377 /* Strip out the section name. */
5378 char *section_name;
5379 char c;
5380 char *name;
5381 unsigned int exp;
5382 flagword flags;
5383 segT sec;
5384 int align;
5385
5386 section_name = input_line_pointer;
5387 c = get_symbol_end ();
5388
5389 name = xmalloc (input_line_pointer - section_name + 1);
5390 strcpy (name, section_name);
5391
5392 *input_line_pointer = c;
5393
5394 SKIP_WHITESPACE ();
5395
5396 exp = 0;
5397 flags = SEC_NO_FLAGS;
5398
5399 if (strcmp (name, ".idata$2") == 0)
5400 {
5401 align = 0;
5402 }
5403 else if (strcmp (name, ".idata$3") == 0)
5404 {
5405 align = 0;
5406 }
5407 else if (strcmp (name, ".idata$4") == 0)
5408 {
5409 align = 2;
5410 }
5411 else if (strcmp (name, ".idata$5") == 0)
5412 {
5413 align = 2;
5414 }
5415 else if (strcmp (name, ".idata$6") == 0)
5416 {
5417 align = 1;
5418 }
5419 else
5420 /* Default alignment to 16 byte boundary. */
5421 align = 4;
5422
5423 if (*input_line_pointer == ',')
5424 {
5425 ++input_line_pointer;
5426 SKIP_WHITESPACE ();
5427 if (*input_line_pointer != '"')
5428 exp = get_absolute_expression ();
5429 else
5430 {
5431 ++input_line_pointer;
5432 while (*input_line_pointer != '"'
5433 && ! is_end_of_line[(unsigned char) *input_line_pointer])
5434 {
5435 switch (*input_line_pointer)
5436 {
5437 /* Section Contents */
5438 case 'a': /* unknown */
5439 as_bad (_("unsupported section attribute -- 'a'"));
5440 break;
5441 case 'c': /* code section */
5442 flags |= SEC_CODE;
5443 break;
5444 case 'd': /* section has initialized data */
5445 flags |= SEC_DATA;
5446 break;
5447 case 'u': /* section has uninitialized data */
5448 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
5449 in winnt.h */
5450 flags |= SEC_ROM;
5451 break;
5452 case 'i': /* section contains directives (info) */
5453 /* FIXME: This is IMAGE_SCN_LNK_INFO
5454 in winnt.h */
5455 flags |= SEC_HAS_CONTENTS;
5456 break;
5457 case 'n': /* section can be discarded */
5458 flags &=~ SEC_LOAD;
5459 break;
5460 case 'R': /* Remove section at link time */
5461 flags |= SEC_NEVER_LOAD;
5462 break;
5463 #if IFLICT_BRAIN_DAMAGE
5464 /* Section Protection */
5465 case 'r': /* section is readable */
5466 flags |= IMAGE_SCN_MEM_READ;
5467 break;
5468 case 'w': /* section is writeable */
5469 flags |= IMAGE_SCN_MEM_WRITE;
5470 break;
5471 case 'x': /* section is executable */
5472 flags |= IMAGE_SCN_MEM_EXECUTE;
5473 break;
5474 case 's': /* section is sharable */
5475 flags |= IMAGE_SCN_MEM_SHARED;
5476 break;
5477
5478 /* Section Alignment */
5479 case '0': /* align to byte boundary */
5480 flags |= IMAGE_SCN_ALIGN_1BYTES;
5481 align = 0;
5482 break;
5483 case '1': /* align to halfword boundary */
5484 flags |= IMAGE_SCN_ALIGN_2BYTES;
5485 align = 1;
5486 break;
5487 case '2': /* align to word boundary */
5488 flags |= IMAGE_SCN_ALIGN_4BYTES;
5489 align = 2;
5490 break;
5491 case '3': /* align to doubleword boundary */
5492 flags |= IMAGE_SCN_ALIGN_8BYTES;
5493 align = 3;
5494 break;
5495 case '4': /* align to quadword boundary */
5496 flags |= IMAGE_SCN_ALIGN_16BYTES;
5497 align = 4;
5498 break;
5499 case '5': /* align to 32 byte boundary */
5500 flags |= IMAGE_SCN_ALIGN_32BYTES;
5501 align = 5;
5502 break;
5503 case '6': /* align to 64 byte boundary */
5504 flags |= IMAGE_SCN_ALIGN_64BYTES;
5505 align = 6;
5506 break;
5507 #endif
5508 default:
5509 as_bad (_("unknown section attribute '%c'"),
5510 *input_line_pointer);
5511 break;
5512 }
5513 ++input_line_pointer;
5514 }
5515 if (*input_line_pointer == '"')
5516 ++input_line_pointer;
5517 }
5518 }
5519
5520 sec = subseg_new (name, (subsegT) exp);
5521
5522 ppc_set_current_section (sec);
5523
5524 if (flags != SEC_NO_FLAGS)
5525 {
5526 if (! bfd_set_section_flags (stdoutput, sec, flags))
5527 as_bad (_("error setting flags for \"%s\": %s"),
5528 bfd_section_name (stdoutput, sec),
5529 bfd_errmsg (bfd_get_error ()));
5530 }
5531
5532 bfd_set_section_alignment (stdoutput, sec, align);
5533 }
5534
5535 static void
ppc_pe_function(int ignore ATTRIBUTE_UNUSED)5536 ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
5537 {
5538 char *name;
5539 char endc;
5540 symbolS *ext_sym;
5541
5542 name = input_line_pointer;
5543 endc = get_symbol_end ();
5544
5545 ext_sym = symbol_find_or_make (name);
5546
5547 *input_line_pointer = endc;
5548
5549 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
5550 SF_SET_FUNCTION (ext_sym);
5551 SF_SET_PROCESS (ext_sym);
5552 coff_add_linesym (ext_sym);
5553
5554 demand_empty_rest_of_line ();
5555 }
5556
5557 static void
ppc_pe_tocd(int ignore ATTRIBUTE_UNUSED)5558 ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
5559 {
5560 if (tocdata_section == 0)
5561 {
5562 tocdata_section = subseg_new (".tocd", 0);
5563 /* FIXME: section flags won't work. */
5564 bfd_set_section_flags (stdoutput, tocdata_section,
5565 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5566 | SEC_READONLY | SEC_DATA));
5567
5568 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
5569 }
5570 else
5571 {
5572 rdata_section = subseg_new (".tocd", 0);
5573 }
5574
5575 ppc_set_current_section (tocdata_section);
5576
5577 demand_empty_rest_of_line ();
5578 }
5579
5580 /* Don't adjust TOC relocs to use the section symbol. */
5581
5582 int
ppc_pe_fix_adjustable(fixS * fix)5583 ppc_pe_fix_adjustable (fixS *fix)
5584 {
5585 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
5586 }
5587
5588 #endif
5589
5590 #ifdef OBJ_XCOFF
5591
5592 /* XCOFF specific symbol and file handling. */
5593
5594 /* Canonicalize the symbol name. We use the to force the suffix, if
5595 any, to use square brackets, and to be in upper case. */
5596
5597 char *
ppc_canonicalize_symbol_name(char * name)5598 ppc_canonicalize_symbol_name (char *name)
5599 {
5600 char *s;
5601
5602 if (ppc_stab_symbol)
5603 return name;
5604
5605 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
5606 ;
5607 if (*s != '\0')
5608 {
5609 char brac;
5610
5611 if (*s == '[')
5612 brac = ']';
5613 else
5614 {
5615 *s = '[';
5616 brac = '}';
5617 }
5618
5619 for (s++; *s != '\0' && *s != brac; s++)
5620 *s = TOUPPER (*s);
5621
5622 if (*s == '\0' || s[1] != '\0')
5623 as_bad (_("bad symbol suffix"));
5624
5625 *s = ']';
5626 }
5627
5628 return name;
5629 }
5630
5631 /* Set the class of a symbol based on the suffix, if any. This is
5632 called whenever a new symbol is created. */
5633
5634 void
ppc_symbol_new_hook(symbolS * sym)5635 ppc_symbol_new_hook (symbolS *sym)
5636 {
5637 struct ppc_tc_sy *tc;
5638 const char *s;
5639
5640 tc = symbol_get_tc (sym);
5641 tc->next = NULL;
5642 tc->output = 0;
5643 tc->symbol_class = -1;
5644 tc->real_name = NULL;
5645 tc->subseg = 0;
5646 tc->align = 0;
5647 tc->u.size = NULL;
5648 tc->u.dw = NULL;
5649 tc->within = NULL;
5650
5651 if (ppc_stab_symbol)
5652 return;
5653
5654 s = strchr (S_GET_NAME (sym), '[');
5655 if (s == (const char *) NULL)
5656 {
5657 /* There is no suffix. */
5658 return;
5659 }
5660
5661 ++s;
5662
5663 switch (s[0])
5664 {
5665 case 'B':
5666 if (strcmp (s, "BS]") == 0)
5667 tc->symbol_class = XMC_BS;
5668 break;
5669 case 'D':
5670 if (strcmp (s, "DB]") == 0)
5671 tc->symbol_class = XMC_DB;
5672 else if (strcmp (s, "DS]") == 0)
5673 tc->symbol_class = XMC_DS;
5674 break;
5675 case 'G':
5676 if (strcmp (s, "GL]") == 0)
5677 tc->symbol_class = XMC_GL;
5678 break;
5679 case 'P':
5680 if (strcmp (s, "PR]") == 0)
5681 tc->symbol_class = XMC_PR;
5682 break;
5683 case 'R':
5684 if (strcmp (s, "RO]") == 0)
5685 tc->symbol_class = XMC_RO;
5686 else if (strcmp (s, "RW]") == 0)
5687 tc->symbol_class = XMC_RW;
5688 break;
5689 case 'S':
5690 if (strcmp (s, "SV]") == 0)
5691 tc->symbol_class = XMC_SV;
5692 break;
5693 case 'T':
5694 if (strcmp (s, "TC]") == 0)
5695 tc->symbol_class = XMC_TC;
5696 else if (strcmp (s, "TI]") == 0)
5697 tc->symbol_class = XMC_TI;
5698 else if (strcmp (s, "TB]") == 0)
5699 tc->symbol_class = XMC_TB;
5700 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
5701 tc->symbol_class = XMC_TC0;
5702 break;
5703 case 'U':
5704 if (strcmp (s, "UA]") == 0)
5705 tc->symbol_class = XMC_UA;
5706 else if (strcmp (s, "UC]") == 0)
5707 tc->symbol_class = XMC_UC;
5708 break;
5709 case 'X':
5710 if (strcmp (s, "XO]") == 0)
5711 tc->symbol_class = XMC_XO;
5712 break;
5713 }
5714
5715 if (tc->symbol_class == -1)
5716 as_bad (_("unrecognized symbol suffix"));
5717 }
5718
5719 /* Set the class of a label based on where it is defined. This
5720 handles symbols without suffixes. Also, move the symbol so that it
5721 follows the csect symbol. */
5722
5723 void
ppc_frob_label(symbolS * sym)5724 ppc_frob_label (symbolS *sym)
5725 {
5726 if (ppc_current_csect != (symbolS *) NULL)
5727 {
5728 if (symbol_get_tc (sym)->symbol_class == -1)
5729 symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class;
5730
5731 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
5732 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
5733 &symbol_rootP, &symbol_lastP);
5734 symbol_get_tc (ppc_current_csect)->within = sym;
5735 symbol_get_tc (sym)->within = ppc_current_csect;
5736 }
5737
5738 #ifdef OBJ_ELF
5739 dwarf2_emit_label (sym);
5740 #endif
5741 }
5742
5743 /* This variable is set by ppc_frob_symbol if any absolute symbols are
5744 seen. It tells ppc_adjust_symtab whether it needs to look through
5745 the symbols. */
5746
5747 static bfd_boolean ppc_saw_abs;
5748
5749 /* Change the name of a symbol just before writing it out. Set the
5750 real name if the .rename pseudo-op was used. Otherwise, remove any
5751 class suffix. Return 1 if the symbol should not be included in the
5752 symbol table. */
5753
5754 int
ppc_frob_symbol(symbolS * sym)5755 ppc_frob_symbol (symbolS *sym)
5756 {
5757 static symbolS *ppc_last_function;
5758 static symbolS *set_end;
5759
5760 /* Discard symbols that should not be included in the output symbol
5761 table. */
5762 if (! symbol_used_in_reloc_p (sym)
5763 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
5764 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
5765 && ! symbol_get_tc (sym)->output
5766 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
5767 return 1;
5768
5769 /* This one will disappear anyway. Don't make a csect sym for it. */
5770 if (sym == abs_section_sym)
5771 return 1;
5772
5773 if (symbol_get_tc (sym)->real_name != (char *) NULL)
5774 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
5775 else
5776 {
5777 const char *name;
5778 const char *s;
5779
5780 name = S_GET_NAME (sym);
5781 s = strchr (name, '[');
5782 if (s != (char *) NULL)
5783 {
5784 unsigned int len;
5785 char *snew;
5786
5787 len = s - name;
5788 snew = xmalloc (len + 1);
5789 memcpy (snew, name, len);
5790 snew[len] = '\0';
5791
5792 S_SET_NAME (sym, snew);
5793 }
5794 }
5795
5796 if (set_end != (symbolS *) NULL)
5797 {
5798 SA_SET_SYM_ENDNDX (set_end, sym);
5799 set_end = NULL;
5800 }
5801
5802 if (SF_GET_FUNCTION (sym))
5803 {
5804 if (ppc_last_function != (symbolS *) NULL)
5805 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5806 ppc_last_function = sym;
5807 if (symbol_get_tc (sym)->u.size != (symbolS *) NULL)
5808 {
5809 resolve_symbol_value (symbol_get_tc (sym)->u.size);
5810 SA_SET_SYM_FSIZE (sym,
5811 (long) S_GET_VALUE (symbol_get_tc (sym)->u.size));
5812 }
5813 }
5814 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5815 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5816 {
5817 if (ppc_last_function == (symbolS *) NULL)
5818 as_bad (_(".ef with no preceding .function"));
5819 else
5820 {
5821 set_end = ppc_last_function;
5822 ppc_last_function = NULL;
5823
5824 /* We don't have a C_EFCN symbol, but we need to force the
5825 COFF backend to believe that it has seen one. */
5826 coff_last_function = NULL;
5827 }
5828 }
5829
5830 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
5831 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
5832 && S_GET_STORAGE_CLASS (sym) != C_FILE
5833 && S_GET_STORAGE_CLASS (sym) != C_FCN
5834 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5835 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5836 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5837 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5838 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5839 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5840 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5841
5842 if (S_GET_STORAGE_CLASS (sym) == C_EXT
5843 || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT
5844 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5845 {
5846 int i;
5847 union internal_auxent *a;
5848
5849 /* Create a csect aux. */
5850 i = S_GET_NUMBER_AUXILIARY (sym);
5851 S_SET_NUMBER_AUXILIARY (sym, i + 1);
5852 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
5853 if (symbol_get_tc (sym)->symbol_class == XMC_TC0)
5854 {
5855 /* This is the TOC table. */
5856 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5857 a->x_csect.x_scnlen.l = 0;
5858 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5859 }
5860 else if (symbol_get_tc (sym)->subseg != 0)
5861 {
5862 /* This is a csect symbol. x_scnlen is the size of the
5863 csect. */
5864 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
5865 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5866 S_GET_SEGMENT (sym))
5867 - S_GET_VALUE (sym));
5868 else
5869 {
5870 resolve_symbol_value (symbol_get_tc (sym)->next);
5871 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
5872 - S_GET_VALUE (sym));
5873 }
5874 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
5875 }
5876 else if (S_GET_SEGMENT (sym) == bss_section)
5877 {
5878 /* This is a common symbol. */
5879 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5880 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
5881 if (S_IS_EXTERNAL (sym))
5882 symbol_get_tc (sym)->symbol_class = XMC_RW;
5883 else
5884 symbol_get_tc (sym)->symbol_class = XMC_BS;
5885 }
5886 else if (S_GET_SEGMENT (sym) == absolute_section)
5887 {
5888 /* This is an absolute symbol. The csect will be created by
5889 ppc_adjust_symtab. */
5890 ppc_saw_abs = TRUE;
5891 a->x_csect.x_smtyp = XTY_LD;
5892 if (symbol_get_tc (sym)->symbol_class == -1)
5893 symbol_get_tc (sym)->symbol_class = XMC_XO;
5894 }
5895 else if (! S_IS_DEFINED (sym))
5896 {
5897 /* This is an external symbol. */
5898 a->x_csect.x_scnlen.l = 0;
5899 a->x_csect.x_smtyp = XTY_ER;
5900 }
5901 else if (symbol_get_tc (sym)->symbol_class == XMC_TC)
5902 {
5903 symbolS *next;
5904
5905 /* This is a TOC definition. x_scnlen is the size of the
5906 TOC entry. */
5907 next = symbol_next (sym);
5908 while (symbol_get_tc (next)->symbol_class == XMC_TC0)
5909 next = symbol_next (next);
5910 if (next == (symbolS *) NULL
5911 || symbol_get_tc (next)->symbol_class != XMC_TC)
5912 {
5913 if (ppc_after_toc_frag == (fragS *) NULL)
5914 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5915 data_section)
5916 - S_GET_VALUE (sym));
5917 else
5918 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5919 - S_GET_VALUE (sym));
5920 }
5921 else
5922 {
5923 resolve_symbol_value (next);
5924 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5925 - S_GET_VALUE (sym));
5926 }
5927 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5928 }
5929 else
5930 {
5931 symbolS *csect;
5932
5933 /* This is a normal symbol definition. x_scnlen is the
5934 symbol index of the containing csect. */
5935 if (S_GET_SEGMENT (sym) == text_section)
5936 csect = ppc_text_csects;
5937 else if (S_GET_SEGMENT (sym) == data_section)
5938 csect = ppc_data_csects;
5939 else
5940 abort ();
5941
5942 /* Skip the initial dummy symbol. */
5943 csect = symbol_get_tc (csect)->next;
5944
5945 if (csect == (symbolS *) NULL)
5946 {
5947 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5948 a->x_csect.x_scnlen.l = 0;
5949 }
5950 else
5951 {
5952 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
5953 {
5954 resolve_symbol_value (symbol_get_tc (csect)->next);
5955 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5956 > S_GET_VALUE (sym))
5957 break;
5958 csect = symbol_get_tc (csect)->next;
5959 }
5960
5961 a->x_csect.x_scnlen.p =
5962 coffsymbol (symbol_get_bfdsym (csect))->native;
5963 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5964 1;
5965 }
5966 a->x_csect.x_smtyp = XTY_LD;
5967 }
5968
5969 a->x_csect.x_parmhash = 0;
5970 a->x_csect.x_snhash = 0;
5971 if (symbol_get_tc (sym)->symbol_class == -1)
5972 a->x_csect.x_smclas = XMC_PR;
5973 else
5974 a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class;
5975 a->x_csect.x_stab = 0;
5976 a->x_csect.x_snstab = 0;
5977
5978 /* Don't let the COFF backend resort these symbols. */
5979 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
5980 }
5981 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5982 {
5983 /* We want the value to be the symbol index of the referenced
5984 csect symbol. BFD will do that for us if we set the right
5985 flags. */
5986 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5987 combined_entry_type *c = coffsymbol (bsym)->native;
5988
5989 S_SET_VALUE (sym, (valueT) (size_t) c);
5990 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
5991 }
5992 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5993 {
5994 symbolS *block;
5995 valueT base;
5996
5997 block = symbol_get_tc (sym)->within;
5998 if (block)
5999 {
6000 /* The value is the offset from the enclosing csect. */
6001 symbolS *csect;
6002
6003 csect = symbol_get_tc (block)->within;
6004 resolve_symbol_value (csect);
6005 base = S_GET_VALUE (csect);
6006 }
6007 else
6008 base = 0;
6009
6010 S_SET_VALUE (sym, S_GET_VALUE (sym) - base);
6011 }
6012 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
6013 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
6014 {
6015 /* We want the value to be a file offset into the line numbers.
6016 BFD will do that for us if we set the right flags. We have
6017 already set the value correctly. */
6018 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
6019 }
6020
6021 return 0;
6022 }
6023
6024 /* Adjust the symbol table. This creates csect symbols for all
6025 absolute symbols. */
6026
6027 void
ppc_adjust_symtab(void)6028 ppc_adjust_symtab (void)
6029 {
6030 symbolS *sym;
6031
6032 if (! ppc_saw_abs)
6033 return;
6034
6035 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
6036 {
6037 symbolS *csect;
6038 int i;
6039 union internal_auxent *a;
6040
6041 if (S_GET_SEGMENT (sym) != absolute_section)
6042 continue;
6043
6044 csect = symbol_create (".abs[XO]", absolute_section,
6045 S_GET_VALUE (sym), &zero_address_frag);
6046 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
6047 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
6048 i = S_GET_NUMBER_AUXILIARY (csect);
6049 S_SET_NUMBER_AUXILIARY (csect, i + 1);
6050 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
6051 a->x_csect.x_scnlen.l = 0;
6052 a->x_csect.x_smtyp = XTY_SD;
6053 a->x_csect.x_parmhash = 0;
6054 a->x_csect.x_snhash = 0;
6055 a->x_csect.x_smclas = XMC_XO;
6056 a->x_csect.x_stab = 0;
6057 a->x_csect.x_snstab = 0;
6058
6059 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
6060
6061 i = S_GET_NUMBER_AUXILIARY (sym);
6062 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
6063 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
6064 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
6065 }
6066
6067 ppc_saw_abs = FALSE;
6068 }
6069
6070 /* Set the VMA for a section. This is called on all the sections in
6071 turn. */
6072
6073 void
ppc_frob_section(asection * sec)6074 ppc_frob_section (asection *sec)
6075 {
6076 static bfd_vma vma = 0;
6077
6078 /* Dwarf sections start at 0. */
6079 if (bfd_get_section_flags (NULL, sec) & SEC_DEBUGGING)
6080 return;
6081
6082 vma = md_section_align (sec, vma);
6083 bfd_set_section_vma (stdoutput, sec, vma);
6084 vma += bfd_section_size (stdoutput, sec);
6085 }
6086
6087 #endif /* OBJ_XCOFF */
6088
6089 char *
md_atof(int type,char * litp,int * sizep)6090 md_atof (int type, char *litp, int *sizep)
6091 {
6092 return ieee_md_atof (type, litp, sizep, target_big_endian);
6093 }
6094
6095 /* Write a value out to the object file, using the appropriate
6096 endianness. */
6097
6098 void
md_number_to_chars(char * buf,valueT val,int n)6099 md_number_to_chars (char *buf, valueT val, int n)
6100 {
6101 if (target_big_endian)
6102 number_to_chars_bigendian (buf, val, n);
6103 else
6104 number_to_chars_littleendian (buf, val, n);
6105 }
6106
6107 /* Align a section (I don't know why this is machine dependent). */
6108
6109 valueT
md_section_align(asection * seg ATTRIBUTE_UNUSED,valueT addr)6110 md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
6111 {
6112 #ifdef OBJ_ELF
6113 return addr;
6114 #else
6115 int align = bfd_get_section_alignment (stdoutput, seg);
6116
6117 return ((addr + (1 << align) - 1) & (-1 << align));
6118 #endif
6119 }
6120
6121 /* We don't have any form of relaxing. */
6122
6123 int
md_estimate_size_before_relax(fragS * fragp ATTRIBUTE_UNUSED,asection * seg ATTRIBUTE_UNUSED)6124 md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
6125 asection *seg ATTRIBUTE_UNUSED)
6126 {
6127 abort ();
6128 return 0;
6129 }
6130
6131 /* Convert a machine dependent frag. We never generate these. */
6132
6133 void
md_convert_frag(bfd * abfd ATTRIBUTE_UNUSED,asection * sec ATTRIBUTE_UNUSED,fragS * fragp ATTRIBUTE_UNUSED)6134 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
6135 asection *sec ATTRIBUTE_UNUSED,
6136 fragS *fragp ATTRIBUTE_UNUSED)
6137 {
6138 abort ();
6139 }
6140
6141 /* We have no need to default values of symbols. */
6142
6143 symbolS *
md_undefined_symbol(char * name ATTRIBUTE_UNUSED)6144 md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
6145 {
6146 return 0;
6147 }
6148
6149 /* Functions concerning relocs. */
6150
6151 /* The location from which a PC relative jump should be calculated,
6152 given a PC relative reloc. */
6153
6154 long
md_pcrel_from_section(fixS * fixp,segT sec ATTRIBUTE_UNUSED)6155 md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
6156 {
6157 return fixp->fx_frag->fr_address + fixp->fx_where;
6158 }
6159
6160 #ifdef OBJ_XCOFF
6161
6162 /* This is called to see whether a fixup should be adjusted to use a
6163 section symbol. We take the opportunity to change a fixup against
6164 a symbol in the TOC subsegment into a reloc against the
6165 corresponding .tc symbol. */
6166
6167 int
ppc_fix_adjustable(fixS * fix)6168 ppc_fix_adjustable (fixS *fix)
6169 {
6170 valueT val = resolve_symbol_value (fix->fx_addsy);
6171 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
6172 TC_SYMFIELD_TYPE *tc;
6173
6174 if (symseg == absolute_section)
6175 return 0;
6176
6177 /* Always adjust symbols in debugging sections. */
6178 if (bfd_get_section_flags (stdoutput, symseg) & SEC_DEBUGGING)
6179 return 1;
6180
6181 if (ppc_toc_csect != (symbolS *) NULL
6182 && fix->fx_addsy != ppc_toc_csect
6183 && symseg == data_section
6184 && val >= ppc_toc_frag->fr_address
6185 && (ppc_after_toc_frag == (fragS *) NULL
6186 || val < ppc_after_toc_frag->fr_address))
6187 {
6188 symbolS *sy;
6189
6190 for (sy = symbol_next (ppc_toc_csect);
6191 sy != (symbolS *) NULL;
6192 sy = symbol_next (sy))
6193 {
6194 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
6195
6196 if (sy_tc->symbol_class == XMC_TC0)
6197 continue;
6198 if (sy_tc->symbol_class != XMC_TC)
6199 break;
6200 if (val == resolve_symbol_value (sy))
6201 {
6202 fix->fx_addsy = sy;
6203 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
6204 return 0;
6205 }
6206 }
6207
6208 as_bad_where (fix->fx_file, fix->fx_line,
6209 _("symbol in .toc does not match any .tc"));
6210 }
6211
6212 /* Possibly adjust the reloc to be against the csect. */
6213 tc = symbol_get_tc (fix->fx_addsy);
6214 if (tc->subseg == 0
6215 && tc->symbol_class != XMC_TC0
6216 && tc->symbol_class != XMC_TC
6217 && symseg != bss_section
6218 /* Don't adjust if this is a reloc in the toc section. */
6219 && (symseg != data_section
6220 || ppc_toc_csect == NULL
6221 || val < ppc_toc_frag->fr_address
6222 || (ppc_after_toc_frag != NULL
6223 && val >= ppc_after_toc_frag->fr_address)))
6224 {
6225 symbolS *csect = tc->within;
6226
6227 /* If the symbol was not declared by a label (eg: a section symbol),
6228 use the section instead of the csect. This doesn't happen in
6229 normal AIX assembly code. */
6230 if (csect == NULL)
6231 csect = seg_info (symseg)->sym;
6232
6233 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
6234 fix->fx_addsy = csect;
6235
6236 return 0;
6237 }
6238
6239 /* Adjust a reloc against a .lcomm symbol to be against the base
6240 .lcomm. */
6241 if (symseg == bss_section
6242 && ! S_IS_EXTERNAL (fix->fx_addsy))
6243 {
6244 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
6245
6246 fix->fx_offset += val - resolve_symbol_value (sy);
6247 fix->fx_addsy = sy;
6248 }
6249
6250 return 0;
6251 }
6252
6253 /* A reloc from one csect to another must be kept. The assembler
6254 will, of course, keep relocs between sections, and it will keep
6255 absolute relocs, but we need to force it to keep PC relative relocs
6256 between two csects in the same section. */
6257
6258 int
ppc_force_relocation(fixS * fix)6259 ppc_force_relocation (fixS *fix)
6260 {
6261 /* At this point fix->fx_addsy should already have been converted to
6262 a csect symbol. If the csect does not include the fragment, then
6263 we need to force the relocation. */
6264 if (fix->fx_pcrel
6265 && fix->fx_addsy != NULL
6266 && symbol_get_tc (fix->fx_addsy)->subseg != 0
6267 && ((symbol_get_frag (fix->fx_addsy)->fr_address
6268 > fix->fx_frag->fr_address)
6269 || (symbol_get_tc (fix->fx_addsy)->next != NULL
6270 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
6271 <= fix->fx_frag->fr_address))))
6272 return 1;
6273
6274 return generic_force_reloc (fix);
6275 }
6276
6277 void
ppc_new_dot_label(symbolS * sym)6278 ppc_new_dot_label (symbolS *sym)
6279 {
6280 /* Anchor this label to the current csect for relocations. */
6281 symbol_get_tc (sym)->within = ppc_current_csect;
6282 }
6283
6284 #endif /* OBJ_XCOFF */
6285
6286 #ifdef OBJ_ELF
6287 /* If this function returns non-zero, it guarantees that a relocation
6288 will be emitted for a fixup. */
6289
6290 int
ppc_force_relocation(fixS * fix)6291 ppc_force_relocation (fixS *fix)
6292 {
6293 /* Branch prediction relocations must force a relocation, as must
6294 the vtable description relocs. */
6295 switch (fix->fx_r_type)
6296 {
6297 case BFD_RELOC_PPC_B16_BRTAKEN:
6298 case BFD_RELOC_PPC_B16_BRNTAKEN:
6299 case BFD_RELOC_PPC_BA16_BRTAKEN:
6300 case BFD_RELOC_PPC_BA16_BRNTAKEN:
6301 case BFD_RELOC_24_PLT_PCREL:
6302 case BFD_RELOC_PPC64_TOC:
6303 return 1;
6304 case BFD_RELOC_PPC_B26:
6305 case BFD_RELOC_PPC_BA26:
6306 case BFD_RELOC_PPC_B16:
6307 case BFD_RELOC_PPC_BA16:
6308 /* All branch fixups targeting a localentry symbol must
6309 force a relocation. */
6310 if (fix->fx_addsy)
6311 {
6312 asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy);
6313 elf_symbol_type *elfsym
6314 = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
6315 gas_assert (elfsym);
6316 if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0)
6317 return 1;
6318 }
6319 break;
6320 default:
6321 break;
6322 }
6323
6324 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
6325 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
6326 return 1;
6327
6328 return generic_force_reloc (fix);
6329 }
6330
6331 int
ppc_fix_adjustable(fixS * fix)6332 ppc_fix_adjustable (fixS *fix)
6333 {
6334 switch (fix->fx_r_type)
6335 {
6336 /* All branch fixups targeting a localentry symbol must
6337 continue using the symbol. */
6338 case BFD_RELOC_PPC_B26:
6339 case BFD_RELOC_PPC_BA26:
6340 case BFD_RELOC_PPC_B16:
6341 case BFD_RELOC_PPC_BA16:
6342 case BFD_RELOC_PPC_B16_BRTAKEN:
6343 case BFD_RELOC_PPC_B16_BRNTAKEN:
6344 case BFD_RELOC_PPC_BA16_BRTAKEN:
6345 case BFD_RELOC_PPC_BA16_BRNTAKEN:
6346 if (fix->fx_addsy)
6347 {
6348 asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy);
6349 elf_symbol_type *elfsym
6350 = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
6351 gas_assert (elfsym);
6352 if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0)
6353 return 0;
6354 }
6355 break;
6356 default:
6357 break;
6358 }
6359
6360 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
6361 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
6362 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
6363 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
6364 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_DS
6365 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_LO_DS
6366 && fix->fx_r_type != BFD_RELOC_GPREL16
6367 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
6368 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
6369 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
6370 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
6371 }
6372 #endif
6373
6374 void
ppc_frag_check(struct frag * fragP)6375 ppc_frag_check (struct frag *fragP)
6376 {
6377 if (!fragP->has_code)
6378 return;
6379
6380 if (ppc_mach() == bfd_mach_ppc_vle)
6381 {
6382 if (((fragP->fr_address + fragP->insn_addr) & 1) != 0)
6383 as_bad (_("instruction address is not a multiple of 2"));
6384 }
6385 else
6386 {
6387 if (((fragP->fr_address + fragP->insn_addr) & 3) != 0)
6388 as_bad (_("instruction address is not a multiple of 4"));
6389 }
6390 }
6391
6392 /* Implement HANDLE_ALIGN. This writes the NOP pattern into an
6393 rs_align_code frag. */
6394
6395 void
ppc_handle_align(struct frag * fragP)6396 ppc_handle_align (struct frag *fragP)
6397 {
6398 valueT count = (fragP->fr_next->fr_address
6399 - (fragP->fr_address + fragP->fr_fix));
6400
6401 if (ppc_mach() == bfd_mach_ppc_vle && count != 0 && (count & 1) == 0)
6402 {
6403 char *dest = fragP->fr_literal + fragP->fr_fix;
6404
6405 fragP->fr_var = 2;
6406 md_number_to_chars (dest, 0x4400, 2);
6407 }
6408 else if (count != 0 && (count & 3) == 0)
6409 {
6410 char *dest = fragP->fr_literal + fragP->fr_fix;
6411
6412 fragP->fr_var = 4;
6413
6414 if (count > 4 * nop_limit && count < 0x2000000)
6415 {
6416 struct frag *rest;
6417
6418 /* Make a branch, then follow with nops. Insert another
6419 frag to handle the nops. */
6420 md_number_to_chars (dest, 0x48000000 + count, 4);
6421 count -= 4;
6422 if (count == 0)
6423 return;
6424
6425 rest = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6426 memcpy (rest, fragP, SIZEOF_STRUCT_FRAG);
6427 fragP->fr_next = rest;
6428 fragP = rest;
6429 rest->fr_address += rest->fr_fix + 4;
6430 rest->fr_fix = 0;
6431 /* If we leave the next frag as rs_align_code we'll come here
6432 again, resulting in a bunch of branches rather than a
6433 branch followed by nops. */
6434 rest->fr_type = rs_align;
6435 dest = rest->fr_literal;
6436 }
6437
6438 md_number_to_chars (dest, 0x60000000, 4);
6439
6440 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0
6441 || (ppc_cpu & PPC_OPCODE_POWER7) != 0
6442 || (ppc_cpu & PPC_OPCODE_POWER8) != 0)
6443 {
6444 /* For power6, power7 and power8, we want the last nop to be a group
6445 terminating one. Do this by inserting an rs_fill frag immediately
6446 after this one, with its address set to the last nop location.
6447 This will automatically reduce the number of nops in the current
6448 frag by one. */
6449 if (count > 4)
6450 {
6451 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6452
6453 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
6454 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
6455 group_nop->fr_fix = 0;
6456 group_nop->fr_offset = 1;
6457 group_nop->fr_type = rs_fill;
6458 fragP->fr_next = group_nop;
6459 dest = group_nop->fr_literal;
6460 }
6461
6462 if ((ppc_cpu & PPC_OPCODE_POWER7) != 0
6463 || (ppc_cpu & PPC_OPCODE_POWER8) != 0)
6464 {
6465 if (ppc_cpu & PPC_OPCODE_E500MC)
6466 /* e500mc group terminating nop: "ori 0,0,0". */
6467 md_number_to_chars (dest, 0x60000000, 4);
6468 else
6469 /* power7/power8 group terminating nop: "ori 2,2,0". */
6470 md_number_to_chars (dest, 0x60420000, 4);
6471 }
6472 else
6473 /* power6 group terminating nop: "ori 1,1,0". */
6474 md_number_to_chars (dest, 0x60210000, 4);
6475 }
6476 }
6477 }
6478
6479 /* Apply a fixup to the object code. This is called for all the
6480 fixups we generated by the calls to fix_new_exp, above. */
6481
6482 void
md_apply_fix(fixS * fixP,valueT * valP,segT seg)6483 md_apply_fix (fixS *fixP, valueT *valP, segT seg)
6484 {
6485 valueT value = * valP;
6486 offsetT fieldval;
6487 const struct powerpc_operand *operand;
6488
6489 #ifdef OBJ_ELF
6490 if (fixP->fx_addsy != NULL)
6491 {
6492 /* Hack around bfd_install_relocation brain damage. */
6493 if (fixP->fx_pcrel)
6494 value += fixP->fx_frag->fr_address + fixP->fx_where;
6495 }
6496 else
6497 fixP->fx_done = 1;
6498 #else
6499 /* FIXME FIXME FIXME: The value we are passed in *valP includes
6500 the symbol values. If we are doing this relocation the code in
6501 write.c is going to call bfd_install_relocation, which is also
6502 going to use the symbol value. That means that if the reloc is
6503 fully resolved we want to use *valP since bfd_install_relocation is
6504 not being used.
6505 However, if the reloc is not fully resolved we do not want to
6506 use *valP, and must use fx_offset instead. If the relocation
6507 is PC-relative, we then need to re-apply md_pcrel_from_section
6508 to this new relocation value. */
6509 if (fixP->fx_addsy == (symbolS *) NULL)
6510 fixP->fx_done = 1;
6511
6512 else
6513 {
6514 value = fixP->fx_offset;
6515 if (fixP->fx_pcrel)
6516 value -= md_pcrel_from_section (fixP, seg);
6517 }
6518 #endif
6519
6520 if (fixP->fx_subsy != (symbolS *) NULL)
6521 {
6522 /* We can't actually support subtracting a symbol. */
6523 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
6524 }
6525
6526 operand = NULL;
6527 if (fixP->fx_pcrel_adjust != 0)
6528 {
6529 /* This is a fixup on an instruction. */
6530 int opindex = fixP->fx_pcrel_adjust & 0xff;
6531
6532 operand = &powerpc_operands[opindex];
6533 #ifdef OBJ_XCOFF
6534 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
6535 does not generate a reloc. It uses the offset of `sym' within its
6536 csect. Other usages, such as `.long sym', generate relocs. This
6537 is the documented behaviour of non-TOC symbols. */
6538 if ((operand->flags & PPC_OPERAND_PARENS) != 0
6539 && (operand->bitm & 0xfff0) == 0xfff0
6540 && operand->shift == 0
6541 && (operand->insert == NULL || ppc_obj64)
6542 && fixP->fx_addsy != NULL
6543 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
6544 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC
6545 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0
6546 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
6547 {
6548 value = fixP->fx_offset;
6549 fixP->fx_done = 1;
6550 }
6551
6552 /* During parsing of instructions, a TOC16 reloc is generated for
6553 instructions such as 'lwz RT,SYM(RB)' if SYM is a symbol defined
6554 in the toc. But at parse time, SYM may be not yet defined, so
6555 check again here. */
6556 if (fixP->fx_r_type == BFD_RELOC_16
6557 && fixP->fx_addsy != NULL
6558 && ppc_is_toc_sym (fixP->fx_addsy))
6559 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
6560 #endif
6561 }
6562
6563 /* Calculate value to be stored in field. */
6564 fieldval = value;
6565 switch (fixP->fx_r_type)
6566 {
6567 #ifdef OBJ_ELF
6568 case BFD_RELOC_PPC64_ADDR16_LO_DS:
6569 case BFD_RELOC_PPC_VLE_LO16A:
6570 case BFD_RELOC_PPC_VLE_LO16D:
6571 #endif
6572 case BFD_RELOC_LO16:
6573 case BFD_RELOC_LO16_PCREL:
6574 fieldval = value & 0xffff;
6575 sign_extend_16:
6576 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
6577 fieldval = SEX16 (fieldval);
6578 fixP->fx_no_overflow = 1;
6579 break;
6580
6581 case BFD_RELOC_HI16:
6582 case BFD_RELOC_HI16_PCREL:
6583 #ifdef OBJ_ELF
6584 if (REPORT_OVERFLOW_HI && ppc_obj64)
6585 {
6586 fieldval = value >> 16;
6587 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
6588 {
6589 valueT sign = (((valueT) -1 >> 16) + 1) >> 1;
6590 fieldval = ((valueT) fieldval ^ sign) - sign;
6591 }
6592 break;
6593 }
6594 /* Fall thru */
6595
6596 case BFD_RELOC_PPC_VLE_HI16A:
6597 case BFD_RELOC_PPC_VLE_HI16D:
6598 case BFD_RELOC_PPC64_ADDR16_HIGH:
6599 #endif
6600 fieldval = PPC_HI (value);
6601 goto sign_extend_16;
6602
6603 case BFD_RELOC_HI16_S:
6604 case BFD_RELOC_HI16_S_PCREL:
6605 #ifdef OBJ_ELF
6606 if (REPORT_OVERFLOW_HI && ppc_obj64)
6607 {
6608 fieldval = (value + 0x8000) >> 16;
6609 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
6610 {
6611 valueT sign = (((valueT) -1 >> 16) + 1) >> 1;
6612 fieldval = ((valueT) fieldval ^ sign) - sign;
6613 }
6614 break;
6615 }
6616 /* Fall thru */
6617
6618 case BFD_RELOC_PPC_VLE_HA16A:
6619 case BFD_RELOC_PPC_VLE_HA16D:
6620 case BFD_RELOC_PPC64_ADDR16_HIGHA:
6621 #endif
6622 fieldval = PPC_HA (value);
6623 goto sign_extend_16;
6624
6625 #ifdef OBJ_ELF
6626 case BFD_RELOC_PPC64_HIGHER:
6627 fieldval = PPC_HIGHER (value);
6628 goto sign_extend_16;
6629
6630 case BFD_RELOC_PPC64_HIGHER_S:
6631 fieldval = PPC_HIGHERA (value);
6632 goto sign_extend_16;
6633
6634 case BFD_RELOC_PPC64_HIGHEST:
6635 fieldval = PPC_HIGHEST (value);
6636 goto sign_extend_16;
6637
6638 case BFD_RELOC_PPC64_HIGHEST_S:
6639 fieldval = PPC_HIGHESTA (value);
6640 goto sign_extend_16;
6641 #endif
6642
6643 default:
6644 break;
6645 }
6646
6647 if (operand != NULL)
6648 {
6649 /* Handle relocs in an insn. */
6650 char *where;
6651 unsigned long insn;
6652
6653 switch (fixP->fx_r_type)
6654 {
6655 #ifdef OBJ_ELF
6656 /* The following relocs can't be calculated by the assembler.
6657 Leave the field zero. */
6658 case BFD_RELOC_PPC_TPREL16:
6659 case BFD_RELOC_PPC_TPREL16_LO:
6660 case BFD_RELOC_PPC_TPREL16_HI:
6661 case BFD_RELOC_PPC_TPREL16_HA:
6662 case BFD_RELOC_PPC_DTPREL16:
6663 case BFD_RELOC_PPC_DTPREL16_LO:
6664 case BFD_RELOC_PPC_DTPREL16_HI:
6665 case BFD_RELOC_PPC_DTPREL16_HA:
6666 case BFD_RELOC_PPC_GOT_TLSGD16:
6667 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6668 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6669 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6670 case BFD_RELOC_PPC_GOT_TLSLD16:
6671 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6672 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6673 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6674 case BFD_RELOC_PPC_GOT_TPREL16:
6675 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6676 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6677 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6678 case BFD_RELOC_PPC_GOT_DTPREL16:
6679 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6680 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6681 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6682 case BFD_RELOC_PPC64_TPREL16_DS:
6683 case BFD_RELOC_PPC64_TPREL16_LO_DS:
6684 case BFD_RELOC_PPC64_TPREL16_HIGH:
6685 case BFD_RELOC_PPC64_TPREL16_HIGHA:
6686 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6687 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6688 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6689 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6690 case BFD_RELOC_PPC64_DTPREL16_HIGH:
6691 case BFD_RELOC_PPC64_DTPREL16_HIGHA:
6692 case BFD_RELOC_PPC64_DTPREL16_DS:
6693 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6694 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6695 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6696 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6697 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
6698 gas_assert (fixP->fx_addsy != NULL);
6699 S_SET_THREAD_LOCAL (fixP->fx_addsy);
6700 fieldval = 0;
6701 break;
6702
6703 /* These also should leave the field zero for the same
6704 reason. Note that older versions of gas wrote values
6705 here. If we want to go back to the old behaviour, then
6706 all _LO and _LO_DS cases will need to be treated like
6707 BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */
6708 case BFD_RELOC_16_GOTOFF:
6709 case BFD_RELOC_LO16_GOTOFF:
6710 case BFD_RELOC_HI16_GOTOFF:
6711 case BFD_RELOC_HI16_S_GOTOFF:
6712 case BFD_RELOC_LO16_PLTOFF:
6713 case BFD_RELOC_HI16_PLTOFF:
6714 case BFD_RELOC_HI16_S_PLTOFF:
6715 case BFD_RELOC_GPREL16:
6716 case BFD_RELOC_16_BASEREL:
6717 case BFD_RELOC_LO16_BASEREL:
6718 case BFD_RELOC_HI16_BASEREL:
6719 case BFD_RELOC_HI16_S_BASEREL:
6720 case BFD_RELOC_PPC_TOC16:
6721 case BFD_RELOC_PPC64_TOC16_LO:
6722 case BFD_RELOC_PPC64_TOC16_HI:
6723 case BFD_RELOC_PPC64_TOC16_HA:
6724 case BFD_RELOC_PPC64_PLTGOT16:
6725 case BFD_RELOC_PPC64_PLTGOT16_LO:
6726 case BFD_RELOC_PPC64_PLTGOT16_HI:
6727 case BFD_RELOC_PPC64_PLTGOT16_HA:
6728 case BFD_RELOC_PPC64_GOT16_DS:
6729 case BFD_RELOC_PPC64_GOT16_LO_DS:
6730 case BFD_RELOC_PPC64_PLT16_LO_DS:
6731 case BFD_RELOC_PPC64_SECTOFF_DS:
6732 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
6733 case BFD_RELOC_PPC64_TOC16_DS:
6734 case BFD_RELOC_PPC64_TOC16_LO_DS:
6735 case BFD_RELOC_PPC64_PLTGOT16_DS:
6736 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
6737 case BFD_RELOC_PPC_EMB_NADDR16:
6738 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6739 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6740 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6741 case BFD_RELOC_PPC_EMB_SDAI16:
6742 case BFD_RELOC_PPC_EMB_SDA2I16:
6743 case BFD_RELOC_PPC_EMB_SDA2REL:
6744 case BFD_RELOC_PPC_EMB_SDA21:
6745 case BFD_RELOC_PPC_EMB_MRKREF:
6746 case BFD_RELOC_PPC_EMB_RELSEC16:
6747 case BFD_RELOC_PPC_EMB_RELST_LO:
6748 case BFD_RELOC_PPC_EMB_RELST_HI:
6749 case BFD_RELOC_PPC_EMB_RELST_HA:
6750 case BFD_RELOC_PPC_EMB_BIT_FLD:
6751 case BFD_RELOC_PPC_EMB_RELSDA:
6752 case BFD_RELOC_PPC_VLE_SDA21:
6753 case BFD_RELOC_PPC_VLE_SDA21_LO:
6754 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
6755 case BFD_RELOC_PPC_VLE_SDAREL_LO16D:
6756 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
6757 case BFD_RELOC_PPC_VLE_SDAREL_HI16D:
6758 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
6759 case BFD_RELOC_PPC_VLE_SDAREL_HA16D:
6760 gas_assert (fixP->fx_addsy != NULL);
6761 /* Fall thru */
6762
6763 case BFD_RELOC_PPC_TLS:
6764 case BFD_RELOC_PPC_TLSGD:
6765 case BFD_RELOC_PPC_TLSLD:
6766 fieldval = 0;
6767 break;
6768 #endif
6769
6770 #ifdef OBJ_XCOFF
6771 case BFD_RELOC_PPC_B16:
6772 /* Adjust the offset to the instruction boundary. */
6773 fieldval += 2;
6774 break;
6775 #endif
6776
6777 default:
6778 break;
6779 }
6780
6781 #ifdef OBJ_ELF
6782 /* powerpc uses RELA style relocs, so if emitting a reloc the field
6783 contents can stay at zero. */
6784 #define APPLY_RELOC fixP->fx_done
6785 #else
6786 #define APPLY_RELOC 1
6787 #endif
6788 if ((fieldval != 0 && APPLY_RELOC) || operand->insert != NULL)
6789 {
6790 /* Fetch the instruction, insert the fully resolved operand
6791 value, and stuff the instruction back again. */
6792 where = fixP->fx_frag->fr_literal + fixP->fx_where;
6793 if (target_big_endian)
6794 {
6795 if (fixP->fx_size == 4)
6796 insn = bfd_getb32 ((unsigned char *) where);
6797 else
6798 insn = bfd_getb16 ((unsigned char *) where);
6799 }
6800 else
6801 {
6802 if (fixP->fx_size == 4)
6803 insn = bfd_getl32 ((unsigned char *) where);
6804 else
6805 insn = bfd_getl16 ((unsigned char *) where);
6806 }
6807 insn = ppc_insert_operand (insn, operand, fieldval,
6808 fixP->tc_fix_data.ppc_cpu,
6809 fixP->fx_file, fixP->fx_line);
6810 if (target_big_endian)
6811 {
6812 if (fixP->fx_size == 4)
6813 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6814 else
6815 bfd_putb16 ((bfd_vma) insn, (unsigned char *) where);
6816 }
6817 else
6818 {
6819 if (fixP->fx_size == 4)
6820 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6821 else
6822 bfd_putl16 ((bfd_vma) insn, (unsigned char *) where);
6823 }
6824 }
6825
6826 if (fixP->fx_done)
6827 /* Nothing else to do here. */
6828 return;
6829
6830 gas_assert (fixP->fx_addsy != NULL);
6831 if (fixP->fx_r_type == BFD_RELOC_NONE)
6832 {
6833 char *sfile;
6834 unsigned int sline;
6835
6836 /* Use expr_symbol_where to see if this is an expression
6837 symbol. */
6838 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
6839 as_bad_where (fixP->fx_file, fixP->fx_line,
6840 _("unresolved expression that must be resolved"));
6841 else
6842 as_bad_where (fixP->fx_file, fixP->fx_line,
6843 _("unsupported relocation against %s"),
6844 S_GET_NAME (fixP->fx_addsy));
6845 fixP->fx_done = 1;
6846 return;
6847 }
6848 }
6849 else
6850 {
6851 /* Handle relocs in data. */
6852 switch (fixP->fx_r_type)
6853 {
6854 case BFD_RELOC_VTABLE_INHERIT:
6855 if (fixP->fx_addsy
6856 && !S_IS_DEFINED (fixP->fx_addsy)
6857 && !S_IS_WEAK (fixP->fx_addsy))
6858 S_SET_WEAK (fixP->fx_addsy);
6859 /* Fall thru */
6860
6861 case BFD_RELOC_VTABLE_ENTRY:
6862 fixP->fx_done = 0;
6863 break;
6864
6865 #ifdef OBJ_ELF
6866 /* These can appear with @l etc. in data. */
6867 case BFD_RELOC_LO16:
6868 case BFD_RELOC_LO16_PCREL:
6869 case BFD_RELOC_HI16:
6870 case BFD_RELOC_HI16_PCREL:
6871 case BFD_RELOC_HI16_S:
6872 case BFD_RELOC_HI16_S_PCREL:
6873 case BFD_RELOC_PPC64_HIGHER:
6874 case BFD_RELOC_PPC64_HIGHER_S:
6875 case BFD_RELOC_PPC64_HIGHEST:
6876 case BFD_RELOC_PPC64_HIGHEST_S:
6877 case BFD_RELOC_PPC64_ADDR16_HIGH:
6878 case BFD_RELOC_PPC64_ADDR16_HIGHA:
6879 case BFD_RELOC_PPC64_ADDR64_LOCAL:
6880 break;
6881
6882 case BFD_RELOC_PPC_DTPMOD:
6883 case BFD_RELOC_PPC_TPREL:
6884 case BFD_RELOC_PPC_DTPREL:
6885 S_SET_THREAD_LOCAL (fixP->fx_addsy);
6886 break;
6887
6888 /* Just punt all of these to the linker. */
6889 case BFD_RELOC_PPC_B16_BRTAKEN:
6890 case BFD_RELOC_PPC_B16_BRNTAKEN:
6891 case BFD_RELOC_16_GOTOFF:
6892 case BFD_RELOC_LO16_GOTOFF:
6893 case BFD_RELOC_HI16_GOTOFF:
6894 case BFD_RELOC_HI16_S_GOTOFF:
6895 case BFD_RELOC_LO16_PLTOFF:
6896 case BFD_RELOC_HI16_PLTOFF:
6897 case BFD_RELOC_HI16_S_PLTOFF:
6898 case BFD_RELOC_PPC_COPY:
6899 case BFD_RELOC_PPC_GLOB_DAT:
6900 case BFD_RELOC_16_BASEREL:
6901 case BFD_RELOC_LO16_BASEREL:
6902 case BFD_RELOC_HI16_BASEREL:
6903 case BFD_RELOC_HI16_S_BASEREL:
6904 case BFD_RELOC_PPC_TLS:
6905 case BFD_RELOC_PPC_DTPREL16_LO:
6906 case BFD_RELOC_PPC_DTPREL16_HI:
6907 case BFD_RELOC_PPC_DTPREL16_HA:
6908 case BFD_RELOC_PPC_TPREL16_LO:
6909 case BFD_RELOC_PPC_TPREL16_HI:
6910 case BFD_RELOC_PPC_TPREL16_HA:
6911 case BFD_RELOC_PPC_GOT_TLSGD16:
6912 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6913 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6914 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6915 case BFD_RELOC_PPC_GOT_TLSLD16:
6916 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6917 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6918 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6919 case BFD_RELOC_PPC_GOT_DTPREL16:
6920 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6921 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6922 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6923 case BFD_RELOC_PPC_GOT_TPREL16:
6924 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6925 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6926 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6927 case BFD_RELOC_24_PLT_PCREL:
6928 case BFD_RELOC_PPC_LOCAL24PC:
6929 case BFD_RELOC_32_PLT_PCREL:
6930 case BFD_RELOC_GPREL16:
6931 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
6932 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
6933 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
6934 case BFD_RELOC_PPC_EMB_NADDR32:
6935 case BFD_RELOC_PPC_EMB_NADDR16:
6936 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6937 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6938 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6939 case BFD_RELOC_PPC_EMB_SDAI16:
6940 case BFD_RELOC_PPC_EMB_SDA2REL:
6941 case BFD_RELOC_PPC_EMB_SDA2I16:
6942 case BFD_RELOC_PPC_EMB_SDA21:
6943 case BFD_RELOC_PPC_VLE_SDA21_LO:
6944 case BFD_RELOC_PPC_EMB_MRKREF:
6945 case BFD_RELOC_PPC_EMB_RELSEC16:
6946 case BFD_RELOC_PPC_EMB_RELST_LO:
6947 case BFD_RELOC_PPC_EMB_RELST_HI:
6948 case BFD_RELOC_PPC_EMB_RELST_HA:
6949 case BFD_RELOC_PPC_EMB_BIT_FLD:
6950 case BFD_RELOC_PPC_EMB_RELSDA:
6951 case BFD_RELOC_PPC64_TOC:
6952 case BFD_RELOC_PPC_TOC16:
6953 case BFD_RELOC_PPC64_TOC16_LO:
6954 case BFD_RELOC_PPC64_TOC16_HI:
6955 case BFD_RELOC_PPC64_TOC16_HA:
6956 case BFD_RELOC_PPC64_DTPREL16_HIGH:
6957 case BFD_RELOC_PPC64_DTPREL16_HIGHA:
6958 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6959 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6960 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6961 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
6962 case BFD_RELOC_PPC64_TPREL16_HIGH:
6963 case BFD_RELOC_PPC64_TPREL16_HIGHA:
6964 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6965 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6966 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6967 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6968 fixP->fx_done = 0;
6969 break;
6970 #endif
6971
6972 #ifdef OBJ_XCOFF
6973 case BFD_RELOC_NONE:
6974 #endif
6975 case BFD_RELOC_CTOR:
6976 case BFD_RELOC_32:
6977 case BFD_RELOC_32_PCREL:
6978 case BFD_RELOC_RVA:
6979 case BFD_RELOC_64:
6980 case BFD_RELOC_64_PCREL:
6981 case BFD_RELOC_16:
6982 case BFD_RELOC_16_PCREL:
6983 case BFD_RELOC_8:
6984 break;
6985
6986 default:
6987 fprintf (stderr,
6988 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
6989 fflush (stderr);
6990 abort ();
6991 }
6992
6993 if (fixP->fx_size && APPLY_RELOC)
6994 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6995 fieldval, fixP->fx_size);
6996 if (warn_476
6997 && (seg->flags & SEC_CODE) != 0
6998 && fixP->fx_size == 4
6999 && fixP->fx_done
7000 && !fixP->fx_tcbit
7001 && (fixP->fx_r_type == BFD_RELOC_32
7002 || fixP->fx_r_type == BFD_RELOC_CTOR
7003 || fixP->fx_r_type == BFD_RELOC_32_PCREL))
7004 as_warn_where (fixP->fx_file, fixP->fx_line,
7005 _("data in executable section"));
7006 }
7007
7008 /* We are only able to convert some relocs to pc-relative. */
7009 if (!fixP->fx_done && fixP->fx_pcrel)
7010 {
7011 switch (fixP->fx_r_type)
7012 {
7013 case BFD_RELOC_LO16:
7014 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
7015 break;
7016
7017 case BFD_RELOC_HI16:
7018 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
7019 break;
7020
7021 case BFD_RELOC_HI16_S:
7022 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
7023 break;
7024
7025 case BFD_RELOC_64:
7026 fixP->fx_r_type = BFD_RELOC_64_PCREL;
7027 break;
7028
7029 case BFD_RELOC_32:
7030 fixP->fx_r_type = BFD_RELOC_32_PCREL;
7031 break;
7032
7033 case BFD_RELOC_16:
7034 fixP->fx_r_type = BFD_RELOC_16_PCREL;
7035 break;
7036
7037 /* Some of course are already pc-relative. */
7038 case BFD_RELOC_LO16_PCREL:
7039 case BFD_RELOC_HI16_PCREL:
7040 case BFD_RELOC_HI16_S_PCREL:
7041 case BFD_RELOC_64_PCREL:
7042 case BFD_RELOC_32_PCREL:
7043 case BFD_RELOC_16_PCREL:
7044 case BFD_RELOC_PPC_B16:
7045 case BFD_RELOC_PPC_B16_BRTAKEN:
7046 case BFD_RELOC_PPC_B16_BRNTAKEN:
7047 case BFD_RELOC_PPC_B26:
7048 case BFD_RELOC_PPC_LOCAL24PC:
7049 case BFD_RELOC_24_PLT_PCREL:
7050 case BFD_RELOC_32_PLT_PCREL:
7051 case BFD_RELOC_64_PLT_PCREL:
7052 case BFD_RELOC_PPC_VLE_REL8:
7053 case BFD_RELOC_PPC_VLE_REL15:
7054 case BFD_RELOC_PPC_VLE_REL24:
7055 break;
7056
7057 default:
7058 if (fixP->fx_addsy)
7059 {
7060 char *sfile;
7061 unsigned int sline;
7062
7063 /* Use expr_symbol_where to see if this is an
7064 expression symbol. */
7065 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
7066 as_bad_where (fixP->fx_file, fixP->fx_line,
7067 _("unresolved expression that must"
7068 " be resolved"));
7069 else
7070 as_bad_where (fixP->fx_file, fixP->fx_line,
7071 _("cannot emit PC relative %s relocation"
7072 " against %s"),
7073 bfd_get_reloc_code_name (fixP->fx_r_type),
7074 S_GET_NAME (fixP->fx_addsy));
7075 }
7076 else
7077 as_bad_where (fixP->fx_file, fixP->fx_line,
7078 _("unable to resolve expression"));
7079 fixP->fx_done = 1;
7080 break;
7081 }
7082 }
7083
7084 #ifdef OBJ_ELF
7085 ppc_elf_validate_fix (fixP, seg);
7086 fixP->fx_addnumber = value;
7087
7088 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
7089 from the section contents. If we are going to be emitting a reloc
7090 then the section contents are immaterial, so don't warn if they
7091 happen to overflow. Leave such warnings to ld. */
7092 if (!fixP->fx_done)
7093 {
7094 fixP->fx_no_overflow = 1;
7095
7096 /* Arrange to emit .TOC. as a normal symbol if used in anything
7097 but .TOC.@tocbase. */
7098 if (ppc_obj64
7099 && fixP->fx_r_type != BFD_RELOC_PPC64_TOC
7100 && fixP->fx_addsy != NULL
7101 && strcmp (S_GET_NAME (fixP->fx_addsy), ".TOC.") == 0)
7102 symbol_get_bfdsym (fixP->fx_addsy)->flags |= BSF_KEEP;
7103 }
7104 #else
7105 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
7106 fixP->fx_addnumber = 0;
7107 else
7108 {
7109 #ifdef TE_PE
7110 fixP->fx_addnumber = 0;
7111 #else
7112 /* We want to use the offset within the toc, not the actual VMA
7113 of the symbol. */
7114 fixP->fx_addnumber =
7115 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
7116 - S_GET_VALUE (ppc_toc_csect);
7117 /* Set *valP to avoid errors. */
7118 *valP = value;
7119 #endif
7120 }
7121 #endif
7122 }
7123
7124 /* Generate a reloc for a fixup. */
7125
7126 arelent *
tc_gen_reloc(asection * seg ATTRIBUTE_UNUSED,fixS * fixp)7127 tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
7128 {
7129 arelent *reloc;
7130
7131 reloc = (arelent *) xmalloc (sizeof (arelent));
7132
7133 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
7134 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
7135 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
7136 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
7137 if (reloc->howto == (reloc_howto_type *) NULL)
7138 {
7139 as_bad_where (fixp->fx_file, fixp->fx_line,
7140 _("reloc %d not supported by object file format"),
7141 (int) fixp->fx_r_type);
7142 return NULL;
7143 }
7144 reloc->addend = fixp->fx_addnumber;
7145
7146 return reloc;
7147 }
7148
7149 void
ppc_cfi_frame_initial_instructions(void)7150 ppc_cfi_frame_initial_instructions (void)
7151 {
7152 cfi_add_CFA_def_cfa (1, 0);
7153 }
7154
7155 int
tc_ppc_regname_to_dw2regnum(char * regname)7156 tc_ppc_regname_to_dw2regnum (char *regname)
7157 {
7158 unsigned int regnum = -1;
7159 unsigned int i;
7160 const char *p;
7161 char *q;
7162 static struct { char *name; int dw2regnum; } regnames[] =
7163 {
7164 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
7165 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
7166 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
7167 { "spe_acc", 111 }, { "spefscr", 112 }
7168 };
7169
7170 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
7171 if (strcmp (regnames[i].name, regname) == 0)
7172 return regnames[i].dw2regnum;
7173
7174 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
7175 {
7176 p = regname + 1 + (regname[1] == '.');
7177 regnum = strtoul (p, &q, 10);
7178 if (p == q || *q || regnum >= 32)
7179 return -1;
7180 if (regname[0] == 'f')
7181 regnum += 32;
7182 else if (regname[0] == 'v')
7183 regnum += 77;
7184 }
7185 else if (regname[0] == 'c' && regname[1] == 'r')
7186 {
7187 p = regname + 2 + (regname[2] == '.');
7188 if (p[0] < '0' || p[0] > '7' || p[1])
7189 return -1;
7190 regnum = p[0] - '0' + 68;
7191 }
7192 return regnum;
7193 }
7194