1 /******************************************************************************
2 *
3 * Copyright (C) 2015 The Android Open Source Project
4 *
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at:
8 *
9 * http://www.apache.org/licenses/LICENSE-2.0
10 *
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
16 *
17 *****************************************************************************
18 * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore
19 */
20
21 /**
22 *******************************************************************************
23 * @file
24 * ih264e_utils.c
25 *
26 * @brief
27 * Contains miscellaneous utility functions used by the encoder
28 *
29 * @author
30 * ittiam
31 *
32 * @par List of Functions:
33 * - ih264e_get_min_level()
34 * - ih264e_get_lvl_idx()
35 * - ih264e_get_dpb_size()
36 * - ih264e_get_total_pic_buf_size()
37 * - ih264e_get_pic_mv_bank_size()
38 * - ih264e_pic_buf_mgr_add_bufs()
39 * - ih264e_mv_buf_mgr_add_bufs()
40 * - ih264e_init_quant_params()
41 * - ih264e_init_air_map()
42 * - ih264e_codec_init()
43 * - ih264e_pic_init()
44 *
45 * @remarks
46 * None
47 *
48 *******************************************************************************
49 */
50
51 /*****************************************************************************/
52 /* File Includes */
53 /*****************************************************************************/
54
55 /* system include files */
56 #include <stdio.h>
57 #include <stddef.h>
58 #include <stdlib.h>
59 #include <string.h>
60 #include <assert.h>
61
62 /* user include files */
63 #include "ih264_typedefs.h"
64 #include "iv2.h"
65 #include "ive2.h"
66 #include "ih264e.h"
67 #include "ithread.h"
68 #include "ih264_defs.h"
69 #include "ih264_size_defs.h"
70 #include "ime_distortion_metrics.h"
71 #include "ime_defs.h"
72 #include "ime_structs.h"
73 #include "ih264_error.h"
74 #include "ih264_structs.h"
75 #include "ih264_trans_quant_itrans_iquant.h"
76 #include "ih264_inter_pred_filters.h"
77 #include "ih264_mem_fns.h"
78 #include "ih264_padding.h"
79 #include "ih264_intra_pred_filters.h"
80 #include "ih264_deblk_edge_filters.h"
81 #include "ih264_cabac_tables.h"
82 #include "ih264_macros.h"
83 #include "ih264_common_tables.h"
84 #include "ih264_debug.h"
85 #include "ih264_trans_data.h"
86 #include "ih264e_defs.h"
87 #include "ih264e_globals.h"
88 #include "ih264_buf_mgr.h"
89 #include "ih264_dpb_mgr.h"
90 #include "ih264e_error.h"
91 #include "ih264e_bitstream.h"
92 #include "irc_cntrl_param.h"
93 #include "irc_frame_info_collector.h"
94 #include "ih264e_rate_control.h"
95 #include "ih264e_cabac_structs.h"
96 #include "ih264e_structs.h"
97 #include "ih264e_cabac.h"
98 #include "ih264e_utils.h"
99 #include "ih264e_config.h"
100 #include "ih264e_statistics.h"
101 #include "ih264e_trace.h"
102 #include "ih264_list.h"
103 #include "ih264e_encode_header.h"
104 #include "ih264e_me.h"
105 #include "ime.h"
106 #include "ih264e_core_coding.h"
107 #include "ih264e_rc_mem_interface.h"
108 #include "ih264e_time_stamp.h"
109 #include "ih264e_debug.h"
110 #include "ih264e_process.h"
111 #include "ih264e_master.h"
112 #include "irc_rate_control_api.h"
113 #include "ime_statistics.h"
114
115 /*****************************************************************************/
116 /* Function Definitions */
117 /*****************************************************************************/
118
119 /**
120 *******************************************************************************
121 *
122 * @brief
123 * Queues the current buffer, gets back a another buffer for encoding with corrent
124 * picture type
125 *
126 * @par Description:
127 * This function performs 3 distinct but related functions.
128 * 1) Maintains an input queue [Note the the term queue donot imply a
129 * first-in first-out logic here] that queues input and dequeues them so
130 * that input frames can be encoded at any predetermined encoding order
131 * 2) Uses RC library to decide which frame must be encoded in current pass
132 * and which picture type it must be encoded to.
133 * 3) Uses RC library to decide the QP at which current frame has to be
134 * encoded
135 * 4) Determines if the current picture must be encoded or not based on
136 * PRE-ENC skip
137 *
138 * Input queue is used for storing input buffers till they are used for
139 * encoding. This queue is maintained at ps_codec->as_inp_list. Whenever a
140 * valid input comes, it is added to the end of queue. This same input is
141 * added to RC queue using the identifier as ps_codec->i4_pic_cnt. Hence any
142 * pic from RC can be located in the input queue easily.
143 *
144 * The dequeue operation does not start till we have ps_codec->s_cfg.u4_max_num_bframes
145 * frames in the queue. THis is done in order to ensure that once output starts
146 * we will have a constant stream of output with no gaps.
147 *
148 * THe output frame order is governed by RC library. When ever we dequeue a
149 * buffer from RC library, it ensures that we will get them in encoding order
150 * With the output of RC library, we can use the picture id to dequeue the
151 * corresponding buffer from input queue and encode it.
152 *
153 * Condition at the end of stream.
154 * -------------------------------
155 * At the last valid buffer from the app, we will get ps_ive_ip->u4_is_last
156 * to be set. This will the given to lib when appropriate input buffer is
157 * given to encoding.
158 *
159 * Since we have to output is not in sync with input, we will have frames to
160 * encode even after we recive the last vaild input buffer. Hence we have to
161 * make sure that we donot queue any new buffers once we get the flag [It may
162 * mess up GOP ?]. This is acheived by setting ps_codec->i4_last_inp_buff_received
163 * to act as a permenent marker for last frame recived [This may not be needed,
164 * because in our current app, all buffers after the last are marked as last.
165 * But can we rely on that?] . Hence after this flgag is set no new buffers are
166 * queued.
167 *
168 * @param[in] ps_codec
169 * Pointer to codec descriptor
170 *
171 * @param[in] ps_ive_ip
172 * Current input buffer to the encoder
173 *
174 * @param[out] ps_inp
175 * Buffer to be encoded in the current pass
176 *
177 * @returns
178 * Flag indicating if we have a pre-enc skip or not
179 *
180 * @remarks
181 * TODO (bpic)
182 * The check for null ans is last is redudent.
183 * Need to see if we can remove it
184 *
185 *******************************************************************************
186 */
ih264e_input_queue_update(codec_t * ps_codec,ive_video_encode_ip_t * ps_ive_ip,inp_buf_t * ps_enc_buff)187 WORD32 ih264e_input_queue_update(codec_t *ps_codec,
188 ive_video_encode_ip_t *ps_ive_ip,
189 inp_buf_t *ps_enc_buff)
190 {
191
192 inp_buf_t *ps_inp_buf;
193 picture_type_e e_pictype;
194 WORD32 i4_skip;
195 UWORD32 ctxt_sel, u4_pic_id, u4_pic_disp_id;
196 UWORD8 u1_frame_qp;
197 UWORD32 max_frame_bits = 0x7FFFFFFF;
198
199 /* Mark that the last input frame has been received */
200 if (ps_ive_ip->u4_is_last == 1)
201 {
202 ps_codec->i4_last_inp_buff_received = 1;
203 }
204
205 if (ps_ive_ip->s_inp_buf.apv_bufs[0] == NULL
206 && !ps_codec->i4_last_inp_buff_received)
207 {
208 ps_enc_buff->s_raw_buf.apv_bufs[0] = NULL;
209 ps_enc_buff->u4_is_last = ps_ive_ip->u4_is_last;
210 return 0;
211 }
212
213 /***************************************************************************
214 * Check for pre enc skip
215 * When src and target frame rates donot match, we skip some frames to
216 * maintain the relation ship between them
217 **************************************************************************/
218 {
219 WORD32 skip_src;
220
221 skip_src = ih264e_update_rc_framerates(
222 ps_codec->s_rate_control.pps_rate_control_api,
223 ps_codec->s_rate_control.pps_pd_frm_rate,
224 ps_codec->s_rate_control.pps_time_stamp,
225 ps_codec->s_rate_control.pps_frame_time);
226
227 if (skip_src)
228 {
229 ps_enc_buff->u4_is_last = ps_ive_ip->u4_is_last;
230 return 1;
231 }
232 }
233
234 /***************************************************************************
235 *Queue the input to the queue
236 **************************************************************************/
237 ps_inp_buf = &(ps_codec->as_inp_list[ps_codec->i4_pic_cnt
238 % MAX_NUM_BFRAMES]);
239
240 /* copy input info. to internal structure */
241 ps_inp_buf->s_raw_buf = ps_ive_ip->s_inp_buf;
242 ps_inp_buf->u4_timestamp_low = ps_ive_ip->u4_timestamp_low;
243 ps_inp_buf->u4_timestamp_high = ps_ive_ip->u4_timestamp_high;
244 ps_inp_buf->u4_is_last = ps_ive_ip->u4_is_last;
245 ps_inp_buf->pv_mb_info = ps_ive_ip->pv_mb_info;
246 ps_inp_buf->u4_mb_info_type = ps_ive_ip->u4_mb_info_type;
247 ps_inp_buf->pv_pic_info = ps_ive_ip->pv_pic_info;
248 ps_inp_buf->u4_pic_info_type = ps_ive_ip->u4_pic_info_type;
249
250 /***************************************************************************
251 * Now we should add the picture to RC stack here
252 **************************************************************************/
253 /*
254 * If an I frame has been requested, ask RC to force it
255 * For IDR requests, we have to ask RC to force I and set IDR by our selves
256 * since RC Donot know about IDR. For forcing an IDR at dequeue stage we
257 * should record that an IDR has been requested some where. Hence we will
258 * store it in the u4_idr_inp_list at a position same as that of input frame
259 */
260 {
261 WORD32 i4_force_idr, i4_force_i;
262
263 i4_force_idr = (ps_codec->force_curr_frame_type == IV_IDR_FRAME);
264 i4_force_idr |= !(ps_codec->i4_pic_cnt % ps_codec->s_cfg.u4_idr_frm_interval);
265
266 i4_force_i = (ps_codec->force_curr_frame_type == IV_I_FRAME);
267
268 ps_codec->i4_pending_idr_flag |= i4_force_idr;
269
270 if ((ps_codec->i4_pic_cnt > 0) && (i4_force_idr || i4_force_i))
271 {
272 irc_force_I_frame(ps_codec->s_rate_control.pps_rate_control_api);
273 }
274 ps_codec->force_curr_frame_type = IV_NA_FRAME;
275 }
276
277 irc_add_picture_to_stack(ps_codec->s_rate_control.pps_rate_control_api,
278 ps_codec->i4_pic_cnt);
279
280
281 /* Delay */
282 if (ps_codec->i4_encode_api_call_cnt
283 < (WORD32)(ps_codec->s_cfg.u4_num_bframes))
284 {
285 ps_enc_buff->s_raw_buf.apv_bufs[0] = NULL;
286 ps_enc_buff->u4_is_last = 0;
287 return 0;
288 }
289
290 /***************************************************************************
291 * Get a new pic to encode
292 **************************************************************************/
293 /* Query the picture_type */
294 e_pictype = ih264e_rc_get_picture_details(
295 ps_codec->s_rate_control.pps_rate_control_api, (WORD32 *)(&u4_pic_id),
296 (WORD32 *)(&u4_pic_disp_id));
297
298 switch (e_pictype)
299 {
300 case I_PIC:
301 ps_codec->pic_type = PIC_I;
302 break;
303 case P_PIC:
304 ps_codec->pic_type = PIC_P;
305 break;
306 case B_PIC:
307 ps_codec->pic_type = PIC_B;
308 break;
309 default:
310 ps_codec->pic_type = PIC_NA;
311 ps_enc_buff->s_raw_buf.apv_bufs[0] = NULL;
312 return 0;
313 }
314
315 /* Set IDR if it has been requested */
316 if (ps_codec->pic_type == PIC_I)
317 {
318 ps_codec->pic_type = ps_codec->i4_pending_idr_flag ?
319 PIC_IDR : ps_codec->pic_type;
320 ps_codec->i4_pending_idr_flag = 0;
321 }
322
323 /* Get current frame Qp */
324 u1_frame_qp = (UWORD8)irc_get_frame_level_qp(
325 ps_codec->s_rate_control.pps_rate_control_api, e_pictype,
326 max_frame_bits);
327 ps_codec->u4_frame_qp = gau1_mpeg2_to_h264_qmap[u1_frame_qp];
328
329 /*
330 * copy the pic id to poc because the display order is assumed to be same
331 * as input order
332 */
333 ps_codec->i4_poc = u4_pic_id;
334
335 /***************************************************************************
336 * Now retrieve the correct picture from the queue
337 **************************************************************************/
338
339 /* Mark the skip flag */
340 i4_skip = 0;
341 ctxt_sel = ps_codec->i4_encode_api_call_cnt % MAX_CTXT_SETS;
342 ps_codec->s_rate_control.pre_encode_skip[ctxt_sel] = i4_skip;
343
344 /* Get a buffer to encode */
345 ps_inp_buf = &(ps_codec->as_inp_list[u4_pic_id % MAX_NUM_BFRAMES]);
346
347 /* copy dequeued input to output */
348 ps_enc_buff->s_raw_buf = ps_inp_buf->s_raw_buf;
349 ps_enc_buff->u4_timestamp_low = ps_inp_buf->u4_timestamp_low;
350 ps_enc_buff->u4_timestamp_high = ps_inp_buf->u4_timestamp_high;
351 ps_enc_buff->u4_is_last = ps_inp_buf->u4_is_last;
352 ps_enc_buff->pv_mb_info = ps_inp_buf->pv_mb_info;
353 ps_enc_buff->u4_mb_info_type = ps_inp_buf->u4_mb_info_type;
354 ps_enc_buff->pv_pic_info = ps_inp_buf->pv_pic_info;
355 ps_enc_buff->u4_pic_info_type = ps_inp_buf->u4_pic_info_type;
356
357 /* Special case for encoding trailing B frames
358 *
359 * In encoding streams with B frames it may happen that we have a B frame
360 * at the end without a P/I frame after it. Hence when we are dequeing from
361 * the RC, it will return the P frame [next in display order but before in
362 * encoding order] first. Since the dequeue happens for an invalid frame we
363 * will get a frame with null buff and set u4_is_last. Hence lib with return
364 * last frame flag at this point and will stop encoding.
365 *
366 * Since for the last B frame, we does not have the forward ref frame
367 * it makes sense to force it into P.
368 *
369 * To solve this, in case the current frame is P and if the last frame flag
370 * is set, we need to see if there is and pending B frames. If there are any,
371 * we should just encode that picture as the current P frame and set
372 * that B frame as the last frame. Hence the encoder will terminate naturally
373 * once that B-frame is encoded after all the in between frames.
374 *
375 * Since we cannot touch RC stack directly, the option of actually swapping
376 * frames in RC is ruled out. We have to modify the as_inp_list to simulate
377 * such a behavior by RC. We can do that by
378 * 1) Search through as_inp_list to locate the largest u4_timestamp_low less
379 * than current u4_timestamp_low. This will give us the last B frame before
380 * the current P frame. Note that this will handle pre encode skip too since
381 * queue happens after pre enc skip.
382 * 2) Swap the position in as_inp_list. Hence now the last B frame is
383 * encoded as P frame. And the new last B frame will have u4_is_last
384 * set so that encoder will end naturally once we reached that B frame
385 * or any subsequent frame. Also the current GOP will have 1 less B frame
386 * Since we are swapping, the poc will also be in-order.
387 * 3) In case we have an IPP stream, the result of our search will be an
388 * I/P frame which is already encoded. Thus swap and encode will result
389 * in encoding of duplicate frames. Hence to avoid this we will only
390 * have this work around in case of u4_num_bframes > 0.
391 *
392 * In case we have forced an I/IDR frame In between this P frame and
393 * the last B frame -> This cannot happen as the current P frame is
394 * supposed to have u4_is_last set. Thus forcing an I/ IDR after this
395 * is illogical.
396 *
397 * In cae if we have forced an I such that the frame just before last frame
398 * in is I/P -> This case will never arise. Since we have a closed GOP now,
399 * once we force an I, the gop gets reset, hence there will be a B between
400 * I/P and I/P.
401 */
402 if (ps_enc_buff->u4_is_last && (ps_codec->pic_type == PIC_P)
403 && ps_codec->s_cfg.u4_num_bframes && (ps_codec->i4_poc > 1))
404 {
405 UWORD32 u4_cntr, u4_lst_bframe;
406 inp_buf_t *ps_swap_buff, *ps_inp_list, *ps_cur_pic;
407
408 u4_cntr = (u4_pic_id + 1) % MAX_NUM_BFRAMES;
409 u4_lst_bframe = u4_pic_id ? ((u4_pic_id - 1) % MAX_NUM_BFRAMES) : (MAX_NUM_BFRAMES - 1);
410
411 ps_inp_list = &ps_codec->as_inp_list[0];
412 ps_cur_pic = &ps_inp_list[u4_pic_id % MAX_NUM_BFRAMES];
413
414 /* Now search the pic in most recent past to current frame */
415 for(; u4_cntr != (u4_pic_id % MAX_NUM_BFRAMES);
416 u4_cntr = ((u4_cntr + 1) % MAX_NUM_BFRAMES))
417 {
418 if ( (ps_inp_list[u4_cntr].u4_timestamp_low <= ps_cur_pic->u4_timestamp_low) &&
419 (ps_inp_list[u4_cntr].u4_timestamp_high <= ps_cur_pic->u4_timestamp_high) &&
420 (ps_inp_list[u4_cntr].u4_timestamp_low >= ps_inp_list[u4_lst_bframe].u4_timestamp_low) &&
421 (ps_inp_list[u4_cntr].u4_timestamp_high >= ps_inp_list[u4_lst_bframe].u4_timestamp_high))
422 {
423 u4_lst_bframe = u4_cntr;
424 }
425 }
426
427 ps_swap_buff = &(ps_codec->as_inp_list[u4_lst_bframe]);
428
429 /* copy the last B buffer to output */
430 *ps_enc_buff = *ps_swap_buff;
431
432 /* Store the current buf into the queue in place of last B buf */
433 *ps_swap_buff = *ps_inp_buf;
434
435 }
436
437 if (ps_enc_buff->u4_is_last)
438 {
439 ps_codec->pic_type = PIC_NA;
440 }
441
442 /* Return the buffer status */
443 return (0);
444 }
445
446 /**
447 *******************************************************************************
448 *
449 * @brief
450 * Used to get minimum level index for a given picture size
451 *
452 * @par Description:
453 * Gets the minimum level index and then gets corresponding level.
454 * Also used to ignore invalid levels like 2.3, 3.3 etc
455 *
456 * @param[in] level
457 * Level of the stream
458 *
459 * @returns Level index for a given level
460 *
461 * @remarks
462 *
463 *******************************************************************************
464 */
ih264e_get_min_level(WORD32 wd,WORD32 ht)465 WORD32 ih264e_get_min_level(WORD32 wd, WORD32 ht)
466 {
467 WORD32 lvl_idx = MAX_LEVEL, i;
468 WORD32 pic_size = wd * ht;
469 WORD32 max = MAX(wd, ht);
470 for (i = 0; i < MAX_LEVEL; i++)
471 {
472 if ((pic_size <= gai4_ih264_max_luma_pic_size[i]) &&
473 (max <= gai4_ih264_max_wd_ht[i]))
474 {
475 lvl_idx = i;
476 break;
477 }
478 }
479
480 return gai4_ih264_levels[lvl_idx];
481 }
482
483 /**
484 *******************************************************************************
485 *
486 * @brief
487 * Used to get level index for a given level
488 *
489 * @par Description:
490 * Converts from level_idc (which is multiplied by 30) to an index that can be
491 * used as a lookup. Also used to ignore invalid levels like 2.2 , 3.2 etc
492 *
493 * @param[in] level
494 * Level of the stream
495 *
496 * @returns Level index for a given level
497 *
498 * @remarks
499 *
500 *******************************************************************************
501 */
ih264e_get_lvl_idx(WORD32 level)502 WORD32 ih264e_get_lvl_idx(WORD32 level)
503 {
504 WORD32 lvl_idx = 0;
505
506 if (level < IH264_LEVEL_11)
507 {
508 lvl_idx = 0;
509 }
510 else if (level < IH264_LEVEL_12)
511 {
512 lvl_idx = 1;
513 }
514 else if (level < IH264_LEVEL_13)
515 {
516 lvl_idx = 2;
517 }
518 else if (level < IH264_LEVEL_20)
519 {
520 lvl_idx = 3;
521 }
522 else if (level < IH264_LEVEL_21)
523 {
524 lvl_idx = 4;
525 }
526 else if (level < IH264_LEVEL_22)
527 {
528 lvl_idx = 5;
529 }
530 else if (level < IH264_LEVEL_30)
531 {
532 lvl_idx = 6;
533 }
534 else if (level < IH264_LEVEL_31)
535 {
536 lvl_idx = 7;
537 }
538 else if (level < IH264_LEVEL_32)
539 {
540 lvl_idx = 8;
541 }
542 else if (level < IH264_LEVEL_40)
543 {
544 lvl_idx = 9;
545 }
546 else if (level < IH264_LEVEL_41)
547 {
548 lvl_idx = 10;
549 }
550 else if (level < IH264_LEVEL_42)
551 {
552 lvl_idx = 11;
553 }
554 else if (level < IH264_LEVEL_50)
555 {
556 lvl_idx = 12;
557 }
558 else if (level < IH264_LEVEL_51)
559 {
560 lvl_idx = 13;
561 }
562 else
563 {
564 lvl_idx = 14;
565 }
566
567 return (lvl_idx);
568 }
569
570 /**
571 *******************************************************************************
572 *
573 * @brief returns maximum number of pictures allowed in dpb for a given level
574 *
575 * @par Description:
576 * For given width, height and level, number of pictures allowed in decoder
577 * picture buffer is computed as per Annex A.3.1
578 *
579 * @param[in] level
580 * level of the bit-stream
581 *
582 * @param[in] pic_size
583 * width * height
584 *
585 * @returns Number of buffers in DPB
586 *
587 * @remarks
588 * From annexure A.3.1 of H264 specification,
589 * max_dec_frame_buffering <= MaxDpbSize, where MaxDpbSize is equal to
590 * Min( 1024 * MaxDPB / ( PicWidthInMbs * FrameHeightInMbs * 384 ), 16 ) and
591 * MaxDPB is given in Table A-1 in units of 1024 bytes. However the MaxDPB size
592 * presented in the look up table gas_ih264_lvl_tbl is in units of 512
593 * bytes. Hence the expression is modified accordingly.
594 *
595 *******************************************************************************
596 */
ih264e_get_dpb_size(WORD32 level,WORD32 pic_size)597 WORD32 ih264e_get_dpb_size(WORD32 level, WORD32 pic_size)
598 {
599 /* dpb size */
600 WORD32 max_dpb_size_bytes = 0;
601
602 /* dec frame buffering */
603 WORD32 max_dpb_size_frames = 0;
604
605 /* temp var */
606 WORD32 i;
607
608 /* determine max luma samples */
609 for (i = 0; i < 16; i++)
610 if (level == (WORD32)gas_ih264_lvl_tbl[i].u4_level_idc)
611 max_dpb_size_bytes = gas_ih264_lvl_tbl[i].u4_max_dpb_size;
612
613 /* from Annexure A.3.1 h264 specification */
614 max_dpb_size_frames =
615 MIN( 1024 * max_dpb_size_bytes / ( pic_size * 3 ), MAX_DPB_SIZE );
616
617 return max_dpb_size_frames;
618 }
619
620 /**
621 *******************************************************************************
622 *
623 * @brief
624 * Used to get reference picture buffer size for a given level and
625 * and padding used
626 *
627 * @par Description:
628 * Used to get reference picture buffer size for a given level and padding used
629 * Each picture is padded on all four sides
630 *
631 * @param[in] pic_size
632 * Number of luma samples (Width * Height)
633 *
634 * @param[in] level
635 * Level
636 *
637 * @param[in] horz_pad
638 * Total padding used in horizontal direction
639 *
640 * @param[in] vert_pad
641 * Total padding used in vertical direction
642 *
643 * @returns Total picture buffer size
644 *
645 * @remarks
646 *
647 *
648 *******************************************************************************
649 */
ih264e_get_total_pic_buf_size(WORD32 pic_size,WORD32 level,WORD32 horz_pad,WORD32 vert_pad,WORD32 num_ref_frames,WORD32 num_reorder_frames)650 WORD32 ih264e_get_total_pic_buf_size(WORD32 pic_size,
651 WORD32 level,
652 WORD32 horz_pad,
653 WORD32 vert_pad,
654 WORD32 num_ref_frames,
655 WORD32 num_reorder_frames)
656 {
657 WORD32 size;
658 WORD32 num_luma_samples;
659 WORD32 lvl_idx;
660 WORD32 max_wd, min_ht;
661 WORD32 num_samples;
662 WORD32 max_num_bufs;
663 WORD32 pad = MAX(horz_pad, vert_pad);
664
665 /*
666 * If num_ref_frames and num_reorder_frmaes is specified
667 * Use minimum value
668 */
669 max_num_bufs = (num_ref_frames + num_reorder_frames + MAX_CTXT_SETS);
670
671 /* Get level index */
672 lvl_idx = ih264e_get_lvl_idx(level);
673
674 /* Maximum number of luma samples in a picture at given level */
675 num_luma_samples = gai4_ih264_max_luma_pic_size[lvl_idx];
676 num_luma_samples = MAX(num_luma_samples, pic_size);
677
678 /* Account for chroma */
679 num_samples = num_luma_samples * 3 / 2;
680
681 /* Maximum width of luma samples in a picture at given level */
682 max_wd = gai4_ih264_max_wd_ht[lvl_idx];
683
684 /* Minimum height of luma samples in a picture at given level */
685 min_ht = gai4_ih264_min_wd_ht[lvl_idx];
686
687 /* Allocation is required for
688 * (Wd + horz_pad) * (Ht + vert_pad) * (2 * max_dpb_size + 1)
689 *
690 * Above expanded as
691 * ((Wd * Ht) + (horz_pad * vert_pad) + Wd * vert_pad + Ht * horz_pad) * (2 * max_dpb_size + 1)
692 * (Wd * Ht) * (2 * max_dpb_size + 1) + ((horz_pad * vert_pad) + Wd * vert_pad + Ht * horz_pad) * (2 * max_dpb_size + 1)
693 * Now max_dpb_size increases with smaller Wd and Ht, but Wd * ht * max_dpb_size will still be lesser or equal to max_wd * max_ht * dpb_size
694 *
695 * In the above equation (Wd * Ht) * (2 * max_dpb_size + 1) is accounted by using num_samples * (2 * max_dpb_size + 1) below
696 *
697 * For the padded area use MAX(horz_pad, vert_pad) as pad
698 * ((pad * pad) + pad * (Wd + Ht)) * (2 * max_dpb_size + 1) has to accounted from the above for padding
699 *
700 * Since Width and Height can change worst Wd + Ht is when One of the dimensions is max and other is min
701 * So use max_wd and min_ht
702 */
703
704 /* Number of bytes in reference pictures */
705 size = num_samples * max_num_bufs;
706
707 /* Account for padding area */
708 size += ((pad * pad) + pad * (max_wd + min_ht)) * 3 / 2 * max_num_bufs;
709
710 return size;
711 }
712
713 /**
714 *******************************************************************************
715 *
716 * @brief Returns MV bank buffer size for a given number of luma samples
717 *
718 * @par Description:
719 * For given number of luma samples one MV bank size is computed.
720 * Each MV bank includes pu_map and enc_pu_t for all the min PUs(4x4) in a picture
721 *
722 * @param[in] num_luma_samples
723 * Max number of luma pixels in the frame
724 *
725 * @returns Total MV Bank size
726 *
727 * @remarks
728 *
729 *******************************************************************************
730 */
ih264e_get_pic_mv_bank_size(WORD32 num_luma_samples)731 WORD32 ih264e_get_pic_mv_bank_size(WORD32 num_luma_samples)
732 {
733 /* mv bank buffer size */
734 WORD32 mv_bank_size = 0;
735
736 /* number of sub mb partitions possible */
737 WORD32 num_pu = num_luma_samples / (ENC_MIN_PU_SIZE * ENC_MIN_PU_SIZE);
738
739 /* number of mbs */
740 WORD32 num_mb = num_luma_samples / (MB_SIZE * MB_SIZE);
741
742 /* Size for storing enc_pu_t start index each MB */
743 /* One extra entry is needed to compute number of PUs in the last MB */
744 mv_bank_size += num_mb * sizeof(WORD32);
745
746 /* Size for pu_map */
747 mv_bank_size += ALIGN4(num_pu);
748
749 /* Size for storing enc_pu_t for each PU */
750 mv_bank_size += ALIGN4(num_pu * sizeof(enc_pu_t));
751
752 return mv_bank_size;
753 }
754
755 /**
756 *******************************************************************************
757 *
758 * @brief
759 * Function to initialize ps_pic_buf structs add pic buffers to
760 * buffer manager in case of non-shared mode
761 *
762 * @par Description:
763 * Function to initialize ps_pic_buf structs add pic buffers to
764 * buffer manager in case of non-shared mode
765 * To be called once per stream or for every reset
766 *
767 * @param[in] ps_codec
768 * Pointer to codec context
769 *
770 * @returns error status
771 *
772 * @remarks
773 *
774 *******************************************************************************
775 */
ih264e_pic_buf_mgr_add_bufs(codec_t * ps_codec)776 IH264E_ERROR_T ih264e_pic_buf_mgr_add_bufs(codec_t *ps_codec)
777 {
778 /* error status */
779 IH264E_ERROR_T ret = IH264E_SUCCESS;
780
781 /* max ref buffer cnt */
782 WORD32 max_num_bufs = ps_codec->i4_ref_buf_cnt;
783
784 /* total size for pic buffers */
785 WORD32 pic_buf_size_allocated = ps_codec->i4_total_pic_buf_size
786 - BUF_MGR_MAX_CNT * sizeof(pic_buf_t);
787
788 /* temp var */
789 UWORD8 *pu1_buf = (UWORD8 *) ps_codec->ps_pic_buf;
790 pic_buf_t *ps_pic_buf = (pic_buf_t *) ps_codec->ps_pic_buf;
791 WORD32 i;
792
793 pu1_buf += BUF_MGR_MAX_CNT * sizeof(pic_buf_t);
794
795 /* In case of non-shared mode, add picture buffers to buffer manager
796 * In case of shared mode, buffers are added in the run-time
797 */
798 {
799 WORD32 buf_ret;
800
801 WORD32 luma_samples = (ps_codec->i4_rec_strd)
802 * (ps_codec->s_cfg.u4_ht + PAD_HT);
803
804 WORD32 chroma_samples = luma_samples >> 1;
805
806 /* Try and add as many buffers as possible for the memory that is allocated */
807 /* If the number of buffers that can be added is less than max_num_bufs
808 * return with an error */
809 for (i = 0; i < max_num_bufs; i++)
810 {
811 pic_buf_size_allocated -= (luma_samples + chroma_samples);
812
813 if (pic_buf_size_allocated < 0)
814 {
815 ps_codec->i4_error_code = IH264E_INSUFFICIENT_MEM_PICBUF;
816 return IH264E_INSUFFICIENT_MEM_PICBUF;
817 }
818
819 ps_pic_buf->pu1_luma = pu1_buf + ps_codec->i4_rec_strd * PAD_TOP
820 + PAD_LEFT;
821 pu1_buf += luma_samples;
822
823 ps_pic_buf->pu1_chroma = pu1_buf
824 + ps_codec->i4_rec_strd * (PAD_TOP / 2)+ PAD_LEFT;
825 pu1_buf += chroma_samples;
826
827 buf_ret = ih264_buf_mgr_add((buf_mgr_t *) ps_codec->pv_ref_buf_mgr,
828 ps_pic_buf, i);
829
830 if (0 != buf_ret)
831 {
832 ps_codec->i4_error_code = IH264E_BUF_MGR_ERROR;
833 return IH264E_BUF_MGR_ERROR;
834 }
835 pu1_buf += (HPEL_PLANES_CNT - 1) * (chroma_samples + luma_samples);
836 ps_pic_buf++;
837 }
838 }
839
840 return ret;
841 }
842
843 /**
844 *******************************************************************************
845 *
846 * @brief Function to add buffers to MV Bank buffer manager
847 *
848 * @par Description:
849 * Function to add buffers to MV Bank buffer manager. To be called once per
850 * stream or for every reset
851 *
852 * @param[in] ps_codec
853 * Pointer to codec context
854 *
855 * @returns error status
856 *
857 * @remarks
858 *
859 *******************************************************************************
860 */
ih264e_mv_buf_mgr_add_bufs(codec_t * ps_codec)861 IH264E_ERROR_T ih264e_mv_buf_mgr_add_bufs(codec_t *ps_codec)
862 {
863 /* error status */
864 IH264E_ERROR_T error_status = IH264E_SUCCESS;
865 IH264_ERROR_T ret;
866
867 /* max dpb size in frames */
868 WORD32 max_dpb_size = 0;
869
870 /* mv bank size for the entire dpb */
871 WORD32 mv_bank_size_allocated = 0;
872
873 /* mv bank size per pic */
874 WORD32 pic_mv_bank_size = 0;
875
876 /* mv buffer ptr */
877 mv_buf_t *ps_mv_buf = NULL;
878
879 /* num of luma samples */
880 WORD32 num_luma_samples = ALIGN16(ps_codec->s_cfg.u4_wd)
881 * ALIGN16(ps_codec->s_cfg.u4_ht);
882
883 /* number of mb's & frame partitions */
884 WORD32 num_pu, num_mb;
885
886 /* temp var */
887 UWORD8 *pu1_buf = NULL;
888 WORD32 i;
889
890 /* Compute the number of MB Bank buffers needed */
891 max_dpb_size = ps_codec->i4_ref_buf_cnt;
892
893 /* allocate memory for mv buffer array */
894 ps_codec->ps_mv_buf = ps_codec->pv_mv_bank_buf_base;
895 pu1_buf = ps_codec->pv_mv_bank_buf_base;
896 pu1_buf += BUF_MGR_MAX_CNT * sizeof(mv_buf_t);
897
898 /********************************************************************/
899 /* allocate memory for individual elements of mv buffer ptr */
900 /********************************************************************/
901 mv_bank_size_allocated = ps_codec->i4_total_mv_bank_size
902 - (BUF_MGR_MAX_CNT * sizeof(mv_buf_t));
903
904 /* compute MV bank size per picture */
905 pic_mv_bank_size = ih264e_get_pic_mv_bank_size(num_luma_samples);
906
907 num_pu = num_luma_samples / (ENC_MIN_PU_SIZE * ENC_MIN_PU_SIZE);
908 num_mb = num_luma_samples / (MB_SIZE * MB_SIZE);
909 i = 0;
910 ps_mv_buf = ps_codec->pv_mv_bank_buf_base;
911
912 while (i < max_dpb_size)
913 {
914 mv_bank_size_allocated -= pic_mv_bank_size;
915
916 if (mv_bank_size_allocated < 0)
917 {
918 ps_codec->i4_error_code = IH264E_INSUFFICIENT_MEM_MVBANK;
919
920 error_status = IH264E_INSUFFICIENT_MEM_MVBANK;
921
922 return error_status;
923 }
924
925 ps_mv_buf->pu4_mb_pu_cnt = (UWORD32 *) pu1_buf;
926 pu1_buf += num_mb * sizeof(WORD32);
927
928 ps_mv_buf->pu1_pic_pu_map = pu1_buf;
929 pu1_buf += ALIGN4(num_pu);
930
931 ps_mv_buf->ps_pic_pu = (enc_pu_t *) (pu1_buf);
932 pu1_buf += ALIGN4(num_pu * sizeof(enc_pu_t));
933
934 ret = ih264_buf_mgr_add((buf_mgr_t *) ps_codec->pv_mv_buf_mgr,
935 ps_mv_buf, i);
936
937 if (IH264_SUCCESS != ret)
938 {
939 ps_codec->i4_error_code = IH264E_BUF_MGR_ERROR;
940 error_status = IH264E_BUF_MGR_ERROR;
941 return error_status;
942 }
943
944 ps_mv_buf++;
945 i++;
946 }
947
948 return error_status;
949 }
950
951 /**
952 *******************************************************************************
953 *
954 * @brief Function to initialize quant params structure
955 *
956 * @par Description:
957 * The forward quantization modules depends on qp/6, qp mod 6, forward scale
958 * matrix, forward threshold matrix, weight list. The inverse quantization
959 * modules depends on qp/6, qp mod 6, inverse scale matrix, weight list.
960 * These params are initialized in this function.
961 *
962 * @param[in] ps_proc
963 * pointer to process context
964 *
965 * @param[in] qp
966 * quantization parameter
967 *
968 * @returns none
969 *
970 * @remarks
971 *
972 *******************************************************************************
973 */
ih264e_init_quant_params(process_ctxt_t * ps_proc,int qp)974 void ih264e_init_quant_params(process_ctxt_t *ps_proc, int qp)
975 {
976 /* quant params */
977 quant_params_t *ps_qp_params;
978
979 /* ptr to forward quant threshold matrix */
980 const UWORD16 *pu2_thres_mat = NULL;
981
982 /* ptr to forward scale matrix */
983 const UWORD16 *pu2_scale_mat = gu2_quant_scale_matrix_4x4;
984
985 /* ptr to inverse scale matrix */
986 const UWORD16 *pu2_iscale_mat = gau2_ih264_iquant_scale_matrix_4x4;
987
988 /* temp var */
989 UWORD32 u4_qp[3], u4_qp_div6, u4_qp_mod6;
990 COMPONENT_TYPE plane;
991 WORD32 i;
992 UWORD32 u4_satdq_t;
993 const UWORD16 *pu2_smat;
994
995 /********************************************************************/
996 /* init quant params for all planes Y, U and V */
997 /********************************************************************/
998 /* luma qp */
999 u4_qp[Y] = qp;
1000
1001 /* chroma qp
1002 * TODO_LATER : just in case if the chroma planes use different qp's this
1003 * needs to be corrected accordingly.
1004 */
1005 u4_qp[U] = gu1_qpc_fqpi[qp];
1006 u4_qp[V] = gu1_qpc_fqpi[qp];
1007
1008 plane = Y;
1009 while (plane <= V)
1010 {
1011 u4_qp_div6 = (u4_qp[plane] / 6);
1012 u4_qp_mod6 = (u4_qp[plane] % 6);
1013
1014 ps_qp_params = ps_proc->ps_qp_params[plane];
1015
1016 /* mb qp */
1017 ps_qp_params->u1_mb_qp = u4_qp[plane];
1018
1019 /* mb qp / 6 */
1020 ps_qp_params->u1_qp_div = u4_qp_div6;
1021
1022 /* mb qp % 6 */
1023 ps_qp_params->u1_qp_rem = u4_qp_mod6;
1024
1025 /* QP bits */
1026 ps_qp_params->u1_qbits = QP_BITS_h264_4x4 + u4_qp_div6;
1027
1028 /* forward scale matrix */
1029 ps_qp_params->pu2_scale_mat = pu2_scale_mat + (u4_qp_mod6 * 16);
1030
1031 /* threshold matrix & weight for quantization */
1032 pu2_thres_mat = gu2_forward_quant_threshold_4x4 + (u4_qp_mod6 * 16);
1033 for (i = 0; i < 16; i++)
1034 {
1035 ps_qp_params->pu2_thres_mat[i] = pu2_thres_mat[i]
1036 >> (8 - u4_qp_div6);
1037 ps_qp_params->pu2_weigh_mat[i] = 16;
1038 }
1039
1040 /* qp dependent rounding constant */
1041 ps_qp_params->u4_dead_zone =
1042 gu4_forward_quant_round_factor_4x4[u4_qp_div6];
1043
1044 /* slice dependent rounding constant */
1045 if (ps_proc->i4_slice_type != ISLICE
1046 && ps_proc->i4_slice_type != SISLICE)
1047 {
1048 ps_qp_params->u4_dead_zone >>= 1;
1049 }
1050
1051 /* SATQD threshold for zero block prediction */
1052 if (ps_proc->ps_codec->s_cfg.u4_enable_satqd)
1053 {
1054 pu2_smat = ps_qp_params->pu2_scale_mat;
1055
1056 u4_satdq_t = ((1 << (ps_qp_params->u1_qbits)) - ps_qp_params->u4_dead_zone);
1057
1058 ps_qp_params->pu2_sad_thrsh[0] = u4_satdq_t / MAX(pu2_smat[3], pu2_smat[11]);
1059 ps_qp_params->pu2_sad_thrsh[1] = u4_satdq_t / MAX(pu2_smat[1], pu2_smat[9]);
1060 ps_qp_params->pu2_sad_thrsh[2] = u4_satdq_t / pu2_smat[15];
1061 ps_qp_params->pu2_sad_thrsh[3] = u4_satdq_t / pu2_smat[7];
1062 ps_qp_params->pu2_sad_thrsh[4] = u4_satdq_t / MAX(pu2_smat[12], pu2_smat[14]);
1063 ps_qp_params->pu2_sad_thrsh[5] = u4_satdq_t / MAX(pu2_smat[4], pu2_smat[6]);
1064 ps_qp_params->pu2_sad_thrsh[6] = u4_satdq_t / pu2_smat[13];
1065 ps_qp_params->pu2_sad_thrsh[7] = u4_satdq_t / pu2_smat[5];
1066 ps_qp_params->pu2_sad_thrsh[8] = u4_satdq_t / MAX(MAX3(pu2_smat[0], pu2_smat[2], pu2_smat[8]), pu2_smat[10]);
1067 }
1068
1069 /* inverse scale matrix */
1070 ps_qp_params->pu2_iscale_mat = pu2_iscale_mat + (u4_qp_mod6 * 16);
1071
1072 plane += 1;
1073 }
1074 return ;
1075 }
1076
1077 /**
1078 *******************************************************************************
1079 *
1080 * @brief
1081 * Initialize AIR mb frame Map
1082 *
1083 * @par Description:
1084 * Initialize AIR mb frame map
1085 * MB frame map indicates which frame an Mb should be coded as intra according to AIR
1086 *
1087 * @param[in] ps_codec
1088 * Pointer to codec context
1089 *
1090 * @returns error_status
1091 *
1092 * @remarks
1093 *
1094 *
1095 *******************************************************************************
1096 */
ih264e_init_air_map(codec_t * ps_codec)1097 IH264E_ERROR_T ih264e_init_air_map(codec_t *ps_codec)
1098 {
1099 /* intra refresh map */
1100 UWORD16 *pu2_intr_rfrsh_map = ps_codec->pu2_intr_rfrsh_map;
1101
1102 /* air mode */
1103 IVE_AIR_MODE_T air_mode = ps_codec->s_cfg.e_air_mode;
1104
1105 /* refresh period */
1106 UWORD32 air_period = ps_codec->s_cfg.u4_air_refresh_period;
1107
1108 /* mb cnt */
1109 UWORD32 u4_mb_cnt = ps_codec->s_cfg.i4_wd_mbs * ps_codec->s_cfg.i4_ht_mbs;
1110
1111 /* temp var */
1112 UWORD32 curr_mb, seed_rand = 1;
1113
1114 switch (air_mode)
1115 {
1116 case IVE_AIR_MODE_CYCLIC:
1117
1118 for (curr_mb = 0; curr_mb < u4_mb_cnt; curr_mb++)
1119 {
1120 pu2_intr_rfrsh_map[curr_mb] = curr_mb % air_period;
1121 }
1122 break;
1123
1124 case IVE_AIR_MODE_RANDOM:
1125
1126 for (curr_mb = 0; curr_mb < u4_mb_cnt; curr_mb++)
1127 {
1128 seed_rand = (seed_rand * 32719 + 3) % 32749;
1129 pu2_intr_rfrsh_map[curr_mb] = seed_rand % air_period;
1130 }
1131 break;
1132
1133 default:
1134
1135 break;
1136 }
1137
1138 return IH264E_SUCCESS;
1139 }
1140
1141 /**
1142 *******************************************************************************
1143 *
1144 * @brief
1145 * Codec level initializations
1146 *
1147 * @par Description:
1148 * Initializes the codec with parameters that needs to be set before encoding
1149 * first frame
1150 *
1151 * @param[in] ps_codec
1152 * Pointer to codec context
1153 *
1154 * @param[in] ps_inp_buf
1155 * Pointer to input buffer context
1156 *
1157 * @returns error_status
1158 *
1159 * @remarks
1160 *
1161 *
1162 *******************************************************************************
1163 */
ih264e_codec_init(codec_t * ps_codec)1164 IH264E_ERROR_T ih264e_codec_init(codec_t *ps_codec)
1165 {
1166 /********************************************************************
1167 * INITIALIZE CODEC CONTEXT *
1168 ********************************************************************/
1169 /* encoder presets */
1170 if (ps_codec->s_cfg.u4_enc_speed_preset != IVE_CONFIG)
1171 {
1172 if (ps_codec->s_cfg.u4_enc_speed_preset == IVE_SLOWEST)
1173 {/* high quality */
1174 /* enable diamond search */
1175 ps_codec->s_cfg.u4_me_speed_preset = DMND_SRCH;
1176 ps_codec->s_cfg.u4_enable_fast_sad = 0;
1177
1178 /* disable intra 4x4 */
1179 ps_codec->s_cfg.u4_enable_intra_4x4 = 1;
1180 ps_codec->luma_energy_compaction[1] =
1181 ih264e_code_luma_intra_macroblock_4x4_rdopt_on;
1182
1183 /* sub pel off */
1184 ps_codec->s_cfg.u4_enable_hpel = 1;
1185
1186 /* deblocking off */
1187 ps_codec->s_cfg.u4_disable_deblock_level = DISABLE_DEBLK_LEVEL_0;
1188
1189 /* disabled intra inter gating in Inter slices */
1190 ps_codec->u4_inter_gate = 0;
1191 }
1192 else if (ps_codec->s_cfg.u4_enc_speed_preset == IVE_NORMAL)
1193 {/* normal */
1194 /* enable diamond search */
1195 ps_codec->s_cfg.u4_me_speed_preset = DMND_SRCH;
1196 ps_codec->s_cfg.u4_enable_fast_sad = 0;
1197
1198 /* disable intra 4x4 */
1199 ps_codec->s_cfg.u4_enable_intra_4x4 = 1;
1200
1201 /* sub pel off */
1202 ps_codec->s_cfg.u4_enable_hpel = 1;
1203
1204 /* deblocking off */
1205 ps_codec->s_cfg.u4_disable_deblock_level = DISABLE_DEBLK_LEVEL_0;
1206
1207 /* disabled intra inter gating in Inter slices */
1208 ps_codec->u4_inter_gate = 0;
1209 }
1210 else if (ps_codec->s_cfg.u4_enc_speed_preset == IVE_FAST)
1211 {/* normal */
1212 /* enable diamond search */
1213 ps_codec->s_cfg.u4_me_speed_preset = DMND_SRCH;
1214 ps_codec->s_cfg.u4_enable_fast_sad = 0;
1215
1216 /* disable intra 4x4 */
1217 ps_codec->s_cfg.u4_enable_intra_4x4 = 0;
1218
1219 /* sub pel off */
1220 ps_codec->s_cfg.u4_enable_hpel = 1;
1221
1222 /* deblocking off */
1223 ps_codec->s_cfg.u4_disable_deblock_level = DISABLE_DEBLK_LEVEL_0;
1224
1225 /* disabled intra inter gating in Inter slices */
1226 ps_codec->u4_inter_gate = 1;
1227 }
1228 else if (ps_codec->s_cfg.u4_enc_speed_preset == IVE_HIGH_SPEED)
1229 {/* fast */
1230 /* enable diamond search */
1231 ps_codec->s_cfg.u4_me_speed_preset = DMND_SRCH;
1232 ps_codec->s_cfg.u4_enable_fast_sad = 0;
1233
1234 /* disable intra 4x4 */
1235 ps_codec->s_cfg.u4_enable_intra_4x4 = 0;
1236
1237 /* sub pel off */
1238 ps_codec->s_cfg.u4_enable_hpel = 0;
1239
1240 /* deblocking off */
1241 ps_codec->s_cfg.u4_disable_deblock_level = DISABLE_DEBLK_LEVEL_4;
1242
1243 /* disabled intra inter gating in Inter slices */
1244 ps_codec->u4_inter_gate = 0;
1245 }
1246 else if (ps_codec->s_cfg.u4_enc_speed_preset == IVE_FASTEST)
1247 {/* fastest */
1248 /* enable diamond search */
1249 ps_codec->s_cfg.u4_me_speed_preset = DMND_SRCH;
1250
1251 /* disable intra 4x4 */
1252 ps_codec->s_cfg.u4_enable_intra_4x4 = 0;
1253
1254 /* sub pel off */
1255 ps_codec->s_cfg.u4_enable_hpel = 0;
1256
1257 /* deblocking off */
1258 ps_codec->s_cfg.u4_disable_deblock_level = DISABLE_DEBLK_LEVEL_4;
1259
1260 /* disabled intra inter gating in Inter slices */
1261 ps_codec->u4_inter_gate = 1;
1262 }
1263 }
1264
1265 /*****************************************************************
1266 * Initialize AIR inside codec
1267 *****************************************************************/
1268 if (IVE_AIR_MODE_NONE != ps_codec->s_cfg.e_air_mode)
1269 {
1270 ih264e_init_air_map(ps_codec);
1271
1272 ps_codec->i4_air_pic_cnt = -1;
1273 }
1274
1275 /****************************************************/
1276 /* INITIALIZE RATE CONTROL */
1277 /****************************************************/
1278 {
1279 /* init qp */
1280 UWORD8 au1_init_qp[MAX_PIC_TYPE];
1281
1282 /* min max qp */
1283 UWORD8 au1_min_max_qp[2 * MAX_PIC_TYPE];
1284
1285 /* init i,p,b qp */
1286 au1_init_qp[0] = gau1_h264_to_mpeg2_qmap[ps_codec->s_cfg.u4_i_qp];
1287 au1_init_qp[1] = gau1_h264_to_mpeg2_qmap[ps_codec->s_cfg.u4_p_qp];
1288 au1_init_qp[2] = gau1_h264_to_mpeg2_qmap[ps_codec->s_cfg.u4_b_qp];
1289
1290 /* init min max qp */
1291 au1_min_max_qp[2 * I_PIC] =
1292 gau1_h264_to_mpeg2_qmap[ps_codec->s_cfg.u4_i_qp_min];
1293 au1_min_max_qp[2 * I_PIC + 1] =
1294 gau1_h264_to_mpeg2_qmap[ps_codec->s_cfg.u4_i_qp_max];
1295
1296 au1_min_max_qp[2 * P_PIC] =
1297 gau1_h264_to_mpeg2_qmap[ps_codec->s_cfg.u4_p_qp_min];
1298 au1_min_max_qp[2 * P_PIC + 1] =
1299 gau1_h264_to_mpeg2_qmap[ps_codec->s_cfg.u4_p_qp_max];
1300
1301 au1_min_max_qp[2 * B_PIC] =
1302 gau1_h264_to_mpeg2_qmap[ps_codec->s_cfg.u4_b_qp_min];
1303 au1_min_max_qp[2 * B_PIC + 1] =
1304 gau1_h264_to_mpeg2_qmap[ps_codec->s_cfg.u4_b_qp_max];
1305
1306 /* get rc mode */
1307 switch (ps_codec->s_cfg.e_rc_mode)
1308 {
1309 case IVE_RC_STORAGE:
1310 ps_codec->s_rate_control.e_rc_type = VBR_STORAGE;
1311 break;
1312 case IVE_RC_CBR_NON_LOW_DELAY:
1313 ps_codec->s_rate_control.e_rc_type = CBR_NLDRC;
1314 break;
1315 case IVE_RC_CBR_LOW_DELAY:
1316 ps_codec->s_rate_control.e_rc_type = CBR_LDRC;
1317 break;
1318 case IVE_RC_NONE:
1319 ps_codec->s_rate_control.e_rc_type = CONST_QP;
1320 break;
1321 default:
1322 break;
1323 }
1324
1325 /* init rate control */
1326 ih264e_rc_init(ps_codec->s_rate_control.pps_rate_control_api,
1327 ps_codec->s_rate_control.pps_frame_time,
1328 ps_codec->s_rate_control.pps_time_stamp,
1329 ps_codec->s_rate_control.pps_pd_frm_rate,
1330 ps_codec->s_cfg.u4_max_framerate,
1331 ps_codec->s_cfg.u4_src_frame_rate,
1332 ps_codec->s_cfg.u4_tgt_frame_rate,
1333 ps_codec->s_rate_control.e_rc_type,
1334 ps_codec->s_cfg.u4_target_bitrate,
1335 ps_codec->s_cfg.u4_max_bitrate,
1336 ps_codec->s_cfg.u4_vbv_buffer_delay,
1337 ps_codec->s_cfg.u4_i_frm_interval,
1338 ps_codec->s_cfg.u4_num_bframes + 1, au1_init_qp,
1339 ps_codec->s_cfg.u4_num_bframes + 2 , au1_min_max_qp,
1340 MAX(ps_codec->s_cfg.u4_max_level,
1341 (UWORD32)ih264e_get_min_level(ps_codec->s_cfg.u4_max_wd, ps_codec->s_cfg.u4_max_ht)));
1342 }
1343
1344 /* recon stride */
1345 ps_codec->i4_rec_strd = ALIGN16(ps_codec->s_cfg.u4_max_wd) + PAD_WD;
1346
1347 /* max ref and reorder cnt */
1348 ps_codec->i4_ref_buf_cnt = ps_codec->s_cfg.u4_max_ref_cnt
1349 + ps_codec->s_cfg.u4_max_reorder_cnt;
1350 ps_codec->i4_ref_buf_cnt += MAX_CTXT_SETS;
1351
1352 DEBUG_HISTOGRAM_INIT();
1353
1354
1355 /* Init dependecy vars */
1356 ps_codec->i4_last_inp_buff_received = 0;
1357
1358 /* At codec start no IDR is pending */
1359 ps_codec->i4_pending_idr_flag = 0;
1360
1361 return IH264E_SUCCESS;
1362 }
1363
1364 /**
1365 *******************************************************************************
1366 *
1367 * @brief
1368 * Picture level initializations
1369 *
1370 * @par Description:
1371 * Before beginning to encode the frame, the current function initializes all
1372 * the ctxts (proc, entropy, me, ...) basing on the input configured params.
1373 * It locates space for storing recon in the encoder picture buffer set, fetches
1374 * reference frame from encoder picture buffer set. Calls RC pre-enc to get
1375 * qp and pic type for the current frame. Queues proc jobs so that
1376 * the other threads can begin encoding. In brief, this function sets up the
1377 * tone for the entire encoder.
1378 *
1379 * @param[in] ps_codec
1380 * Pointer to codec context
1381 *
1382 * @param[in] ps_inp_buf
1383 * Pointer to input buffer context
1384 *
1385 * @returns error_status
1386 *
1387 * @remarks
1388 *
1389 *
1390 *******************************************************************************
1391 */
ih264e_pic_init(codec_t * ps_codec,inp_buf_t * ps_inp_buf)1392 IH264E_ERROR_T ih264e_pic_init(codec_t *ps_codec, inp_buf_t *ps_inp_buf)
1393 {
1394 /* error status */
1395 IH264E_ERROR_T error_status = IH264E_SUCCESS;
1396 IH264_ERROR_T ret = IH264_SUCCESS;
1397
1398 /* mv buff bank */
1399 mv_buf_t *ps_mv_buf = NULL;
1400 WORD32 cur_mv_bank_buf_id;
1401
1402 /* recon buffer set */
1403 pic_buf_t *ps_cur_pic;
1404 WORD32 cur_pic_buf_id;
1405 UWORD8 *pu1_cur_pic_luma, *pu1_cur_pic_chroma;
1406
1407 /* ref buffer set */
1408 pic_buf_t *aps_ref_pic[MAX_REF_PIC_CNT] = {NULL, NULL};
1409 mv_buf_t *aps_mv_buf[MAX_REF_PIC_CNT] = {NULL, NULL};
1410 WORD32 ref_set_id;
1411
1412 /* pic time stamp */
1413 UWORD32 u4_timestamp_high = ps_inp_buf->u4_timestamp_high;
1414 UWORD32 u4_timestamp_low = ps_inp_buf->u4_timestamp_low;
1415
1416 /* indices to access curr/prev frame info */
1417 WORD32 ctxt_sel = ps_codec->i4_encode_api_call_cnt % MAX_CTXT_SETS;
1418
1419 /* curr pic type */
1420 PIC_TYPE_T *pic_type = &ps_codec->pic_type;
1421
1422 /* Diamond search Iteration Max Cnt */
1423 UWORD32 u4_num_layers =
1424 (ps_codec->s_cfg.u4_enc_speed_preset == IVE_FASTEST) ?
1425 (NUM_LAYERS >> 2) : NUM_LAYERS;
1426
1427 /* enable fast sad */
1428 UWORD32 u4_enable_fast_sad = ps_codec->s_cfg.u4_enable_fast_sad;
1429
1430 /********************************************************************/
1431 /* INITIALIZE CODEC CONTEXT */
1432 /********************************************************************/
1433 /* slice_type */
1434 if ((PIC_I == *pic_type) || (PIC_IDR == *pic_type))
1435 {
1436 ps_codec->i4_slice_type = ISLICE;
1437 }
1438 else if (PIC_P == *pic_type)
1439 {
1440 ps_codec->i4_slice_type = PSLICE;
1441 }
1442 else if(PIC_B == *pic_type)
1443 {
1444 ps_codec->i4_slice_type = BSLICE;
1445 }
1446
1447
1448 /***************************************************************************
1449 * Set up variables for sending frame number, poc and reference
1450 * a) Set up alt ref too
1451 **************************************************************************/
1452
1453 /* Check and set if the current frame is reference or not */
1454 ps_codec->u4_is_curr_frm_ref = 0;
1455
1456 /* This frame is reference if its not a B pic, pending approval from alt ref */
1457 ps_codec->u4_is_curr_frm_ref = (*pic_type != PIC_B);
1458
1459 /* In case if its a P pic, we will decide according to alt ref also */
1460 if (ps_codec->s_cfg.u4_enable_alt_ref && (*pic_type == PIC_P)
1461 && (ps_codec->i4_pic_cnt
1462 % (ps_codec->s_cfg.u4_enable_alt_ref + 1)))
1463 {
1464 ps_codec->u4_is_curr_frm_ref = 0;
1465 }
1466
1467 /*
1468 * Override everything in case of IDR
1469 * Note that in case of IDR, at this point ps_codec->u4_is_curr_frm_ref must
1470 * be 1
1471 */
1472
1473 /* is this an IDR pic */
1474 ps_codec->u4_is_idr = 0;
1475
1476 if (PIC_IDR == *pic_type)
1477 {
1478 /* set idr flag */
1479 ps_codec->u4_is_idr = 1;
1480
1481 /* reset frame num */
1482 ps_codec->i4_frame_num = 0;
1483
1484 /* idr_pic_id */
1485 ps_codec->i4_idr_pic_id++;
1486 }
1487
1488 /***************************************************************************
1489 * Set up Deblock
1490 **************************************************************************/
1491
1492 /* set deblock disable flags based on disable deblock level */
1493 ps_codec->i4_disable_deblk_pic = 1;
1494
1495 if (ps_codec->s_cfg.u4_disable_deblock_level == DISABLE_DEBLK_LEVEL_0)
1496 {
1497 /* enable deblocking */
1498 ps_codec->i4_disable_deblk_pic = 0;
1499 }
1500 else if (ps_codec->s_cfg.u4_disable_deblock_level == DISABLE_DEBLK_LEVEL_2)
1501 {
1502 /* enable deblocking after a period of frames */
1503 if (ps_codec->i4_disable_deblk_pic_cnt == DISABLE_DEBLOCK_INTERVAL
1504 || ps_codec->i4_slice_type == ISLICE)
1505 {
1506 ps_codec->i4_disable_deblk_pic = 0;
1507 }
1508 }
1509 else if (ps_codec->s_cfg.u4_disable_deblock_level == DISABLE_DEBLK_LEVEL_3)
1510 {
1511 if (ps_codec->i4_slice_type == ISLICE)
1512 {
1513 ps_codec->i4_disable_deblk_pic = 0;
1514 }
1515 }
1516
1517 if (ps_codec->i4_disable_deblk_pic)
1518 {
1519 ps_codec->i4_disable_deblk_pic_cnt++;
1520 }
1521 else
1522 {
1523 ps_codec->i4_disable_deblk_pic_cnt = 0;
1524 }
1525
1526 /* In slice mode - lets not deblk mb edges that lie along slice boundaries */
1527 if (ps_codec->i4_disable_deblk_pic == 0)
1528 {
1529 if (ps_codec->s_cfg.e_slice_mode != IVE_SLICE_MODE_NONE)
1530 {
1531 ps_codec->i4_disable_deblk_pic = 2;
1532 }
1533 }
1534
1535 /* error status */
1536 ps_codec->i4_error_code = IH264E_SUCCESS;
1537
1538 /* populate header */
1539 if (ps_codec->i4_gen_header)
1540 {
1541 /* sps */
1542 sps_t *ps_sps = NULL;
1543
1544 /* pps */
1545 pps_t *ps_pps = NULL;
1546
1547 /*ps_codec->i4_pps_id ++;*/
1548 ps_codec->i4_pps_id %= MAX_PPS_CNT;
1549
1550 /*ps_codec->i4_sps_id ++;*/
1551 ps_codec->i4_sps_id %= MAX_SPS_CNT;
1552
1553 /* populate sps header */
1554 ps_sps = ps_codec->ps_sps_base + ps_codec->i4_sps_id;
1555 ih264e_populate_sps(ps_codec, ps_sps);
1556
1557 /* populate pps header */
1558 ps_pps = ps_codec->ps_pps_base + ps_codec->i4_pps_id;
1559 ih264e_populate_pps(ps_codec, ps_pps);
1560 }
1561
1562 /***************************************************************************
1563 * Reference and MV bank Buffer Manager
1564 * Here we will
1565 * 1) Find the correct ref pics for the current frame
1566 * 2) Free the ref pic that is not going to be used anywhere
1567 * 3) Find a free buff from the list and assign it as the recon of
1568 * current frame
1569 *
1570 * 1) Finding correct ref pic
1571 * All pics needed for future are arranged in a picture list called
1572 * ps_codec->as_ref_set. Each picture in this will have a pic buffer and
1573 * MV buffer that is marked appropriately as BUF_MGR_REF, BUF_MGR_IO or
1574 * BUF_MGR_CODEC. Also the pic_cnt and poc will also be present.
1575 * Hence to find the ref pic we will loop through the list and find
1576 * 2 pictures with maximum i4_pic_cnt .
1577 *
1578 * note that i4_pic_cnt == -1 is used to filter uninit ref pics.
1579 * Now since we only have max two ref pics, we will always find max 2
1580 * ref pics.
1581
1582 *
1583 * 2) 3) Self explanatory
1584 ***************************************************************************/
1585 {
1586 /* Search for buffs with maximum pic cnt */
1587
1588 WORD32 max_pic_cnt[] = { -1, -1 };
1589
1590 mv_buf_t *ps_mv_buf_to_free[] = { NULL, NULL };
1591
1592 /* temp var */
1593 WORD32 i, buf_status;
1594
1595 for (i = 0; i < ps_codec->i4_ref_buf_cnt; i++)
1596 {
1597 if (ps_codec->as_ref_set[i].i4_pic_cnt == -1)
1598 continue;
1599
1600 buf_status = ih264_buf_mgr_get_status(
1601 ps_codec->pv_ref_buf_mgr,
1602 ps_codec->as_ref_set[i].ps_pic_buf->i4_buf_id);
1603
1604 /* Ideally we should look for buffer status of MV BUFF also. But since
1605 * the correponding MV buffs also will be at the same state. It dosent
1606 * matter as of now. But the check will make the logic better */
1607 if ((max_pic_cnt[0] < ps_codec->as_ref_set[i].i4_pic_cnt)
1608 && (buf_status & BUF_MGR_REF))
1609 {
1610 if (max_pic_cnt[1] < ps_codec->as_ref_set[i].i4_pic_cnt)
1611 {
1612 max_pic_cnt[0] = max_pic_cnt[1];
1613 aps_ref_pic[0] = aps_ref_pic[1];
1614 aps_mv_buf[0] = aps_mv_buf[1];
1615
1616 ps_mv_buf_to_free[0] = ps_mv_buf_to_free[1];
1617
1618 max_pic_cnt[1] = ps_codec->as_ref_set[i].i4_pic_cnt;
1619 aps_ref_pic[1] = ps_codec->as_ref_set[i].ps_pic_buf;
1620 aps_mv_buf[1] = ps_codec->as_ref_set[i].ps_mv_buf;
1621 ps_mv_buf_to_free[1] = ps_codec->as_ref_set[i].ps_mv_buf;
1622
1623 }
1624 else
1625 {
1626 max_pic_cnt[0] = ps_codec->as_ref_set[i].i4_pic_cnt;
1627 aps_ref_pic[0] = ps_codec->as_ref_set[i].ps_pic_buf;
1628 aps_mv_buf[0] = ps_codec->as_ref_set[i].ps_mv_buf;
1629 ps_mv_buf_to_free[0] = ps_codec->as_ref_set[i].ps_mv_buf;
1630 }
1631 }
1632 }
1633
1634 /*
1635 * Now if the current picture is I or P, we discard the back ref pic and
1636 * assign forward ref as backward ref
1637 */
1638 if (*pic_type != PIC_B)
1639 {
1640 if (ps_mv_buf_to_free[0])
1641 {
1642 /* release this frame from reference list */
1643 ih264_buf_mgr_release(ps_codec->pv_mv_buf_mgr,
1644 ps_mv_buf_to_free[0]->i4_buf_id,
1645 BUF_MGR_REF);
1646
1647 ih264_buf_mgr_release(ps_codec->pv_ref_buf_mgr,
1648 aps_ref_pic[0]->i4_buf_id, BUF_MGR_REF);
1649 }
1650
1651 max_pic_cnt[0] = max_pic_cnt[1];
1652 aps_ref_pic[0] = aps_ref_pic[1];
1653 aps_mv_buf[0] = aps_mv_buf[1];
1654
1655 /* Dummy */
1656 max_pic_cnt[1] = -1;
1657 }
1658
1659 /*
1660 * Mark all reference pic with unused buffers to be free
1661 * We need this step since each one, ie ref, recon io etc only unset their
1662 * respective flags. Hence we need to combine togather and mark the ref set
1663 * accordingly
1664 */
1665 ref_set_id = -1;
1666 for (i = 0; i < ps_codec->i4_ref_buf_cnt; i++)
1667 {
1668 if (ps_codec->as_ref_set[i].i4_pic_cnt == -1)
1669 {
1670 ref_set_id = i;
1671 continue;
1672 }
1673
1674 buf_status = ih264_buf_mgr_get_status(
1675 ps_codec->pv_ref_buf_mgr,
1676 ps_codec->as_ref_set[i].ps_pic_buf->i4_buf_id);
1677
1678 if ((buf_status & (BUF_MGR_REF | BUF_MGR_CODEC | BUF_MGR_IO)) == 0)
1679 {
1680 ps_codec->as_ref_set[i].i4_pic_cnt = -1;
1681 ps_codec->as_ref_set[i].i4_poc = 32768;
1682
1683 ref_set_id = i;
1684 }
1685 }
1686 /* An asssert failure here means we donot have any free buffs */
1687 ASSERT(ref_set_id >= 0);
1688 }
1689
1690 {
1691 /*****************************************************************/
1692 /* Get free MV Bank to hold current picture's motion vector data */
1693 /* If there are no free buffers then return with an error code. */
1694 /* If the buffer is to be freed by another thread, change the */
1695 /* following to call thread yield and wait for buffer to be freed*/
1696 /*****************************************************************/
1697 ps_mv_buf = (mv_buf_t *) ih264_buf_mgr_get_next_free(
1698 (buf_mgr_t *) ps_codec->pv_mv_buf_mgr,
1699 &cur_mv_bank_buf_id);
1700
1701 if (NULL == ps_mv_buf)
1702 {
1703 ps_codec->i4_error_code = IH264E_NO_FREE_MVBANK;
1704 return IH264E_NO_FREE_MVBANK;
1705 }
1706
1707 /* mark the buffer as needed for reference if the curr pic is available for ref */
1708 if (ps_codec->u4_is_curr_frm_ref)
1709 {
1710 ih264_buf_mgr_set_status(ps_codec->pv_mv_buf_mgr,
1711 cur_mv_bank_buf_id, BUF_MGR_REF);
1712 }
1713
1714 /* Set current ABS poc to ps_mv_buf, so that while freeing a reference buffer
1715 * corresponding mv buffer can be found by looping through ps_codec->ps_mv_buf array
1716 * and getting a buffer id to free
1717 */
1718 ps_mv_buf->i4_abs_poc = ps_codec->i4_abs_pic_order_cnt;
1719 ps_mv_buf->i4_buf_id = cur_mv_bank_buf_id;
1720 }
1721
1722 {
1723 /*****************************************************************/
1724 /* Get free pic buf to hold current picture's recon data */
1725 /* If there are no free buffers then return with an error code. */
1726 /* If the buffer is to be freed by another thread, change the */
1727 /* following to call thread yield and wait for buffer to be freed*/
1728 /*****************************************************************/
1729 ps_cur_pic = (pic_buf_t *) ih264_buf_mgr_get_next_free(
1730 (buf_mgr_t *) ps_codec->pv_ref_buf_mgr,
1731 &cur_pic_buf_id);
1732
1733 if (NULL == ps_cur_pic)
1734 {
1735 ps_codec->i4_error_code = IH264E_NO_FREE_PICBUF;
1736 return IH264E_NO_FREE_PICBUF;
1737 }
1738
1739 /* mark the buffer as needed for reference if the curr pic is available for ref */
1740 if (ps_codec->u4_is_curr_frm_ref)
1741 {
1742 ih264_buf_mgr_set_status(ps_codec->pv_ref_buf_mgr, cur_pic_buf_id,
1743 BUF_MGR_REF);
1744 }
1745
1746 /* Mark the current buffer as needed for IO if recon is enabled */
1747 if (1 == ps_codec->s_cfg.u4_enable_recon)
1748 {
1749 ih264_buf_mgr_set_status(ps_codec->pv_ref_buf_mgr, cur_pic_buf_id,
1750 BUF_MGR_IO);
1751 }
1752
1753 /* Associate input timestamp with current buffer */
1754 ps_cur_pic->u4_timestamp_high = ps_inp_buf->u4_timestamp_high;
1755 ps_cur_pic->u4_timestamp_low = ps_inp_buf->u4_timestamp_low;
1756
1757 ps_cur_pic->i4_abs_poc = ps_codec->i4_poc;
1758 ps_cur_pic->i4_poc_lsb = ps_codec->i4_pic_order_cnt_lsb;
1759
1760 ps_cur_pic->i4_buf_id = cur_pic_buf_id;
1761
1762 pu1_cur_pic_luma = ps_cur_pic->pu1_luma;
1763 pu1_cur_pic_chroma = ps_cur_pic->pu1_chroma;
1764 }
1765
1766 /*
1767 * Add the current picture to ref list independent of the fact that it is used
1768 * as reference or not. This is because, now recon is not in sync with output
1769 * hence we may need the current recon after some delay. By adding it to ref list
1770 * we can retrieve the recon any time we want. The information that it is used
1771 * for ref can still be found by checking the buffer status of pic buf.
1772 */
1773 {
1774 ps_codec->as_ref_set[ref_set_id].i4_pic_cnt = ps_codec->i4_pic_cnt;
1775 ps_codec->as_ref_set[ref_set_id].i4_poc = ps_codec->i4_poc;
1776 ps_codec->as_ref_set[ref_set_id].ps_mv_buf = ps_mv_buf;
1777 ps_codec->as_ref_set[ref_set_id].ps_pic_buf = ps_cur_pic;
1778 }
1779
1780 /********************************************************************/
1781 /* INITIALIZE PROCESS CONTEXT */
1782 /********************************************************************/
1783 {
1784 /* temp var */
1785 WORD32 i, j = 0;
1786
1787 /* curr proc ctxt */
1788 process_ctxt_t *ps_proc = NULL;
1789
1790 j = ctxt_sel * MAX_PROCESS_THREADS;
1791
1792 /* begin init */
1793 for (i = j; i < (j + MAX_PROCESS_THREADS); i++)
1794 {
1795 ps_proc = &ps_codec->as_process[i];
1796
1797 /* luma src buffer */
1798 if (ps_codec->s_cfg.e_inp_color_fmt == IV_YUV_422ILE)
1799 {
1800 ps_proc->pu1_src_buf_luma_base = ps_codec->pu1_y_csc_buf_base;
1801 }
1802 else
1803 {
1804 ps_proc->pu1_src_buf_luma_base =
1805 ps_inp_buf->s_raw_buf.apv_bufs[0];
1806 }
1807
1808 /* chroma src buffer */
1809 if (ps_codec->s_cfg.e_inp_color_fmt == IV_YUV_422ILE
1810 || ps_codec->s_cfg.e_inp_color_fmt == IV_YUV_420P)
1811 {
1812 ps_proc->pu1_src_buf_chroma_base =
1813 ps_codec->pu1_uv_csc_buf_base;
1814 }
1815 else
1816 {
1817 ps_proc->pu1_src_buf_chroma_base =
1818 ps_inp_buf->s_raw_buf.apv_bufs[1];
1819 }
1820
1821 /* luma rec buffer */
1822 ps_proc->pu1_rec_buf_luma_base = pu1_cur_pic_luma;
1823
1824 /* chroma rec buffer */
1825 ps_proc->pu1_rec_buf_chroma_base = pu1_cur_pic_chroma;
1826
1827 /* rec stride */
1828 ps_proc->i4_rec_strd = ps_codec->i4_rec_strd;
1829
1830 /* frame num */
1831 ps_proc->i4_frame_num = ps_codec->i4_frame_num;
1832
1833 /* is idr */
1834 ps_proc->u4_is_idr = ps_codec->u4_is_idr;
1835
1836 /* idr pic id */
1837 ps_proc->u4_idr_pic_id = ps_codec->i4_idr_pic_id;
1838
1839 /* slice_type */
1840 ps_proc->i4_slice_type = ps_codec->i4_slice_type;
1841
1842 /* Input width in mbs */
1843 ps_proc->i4_wd_mbs = ps_codec->s_cfg.i4_wd_mbs;
1844
1845 /* Input height in mbs */
1846 ps_proc->i4_ht_mbs = ps_codec->s_cfg.i4_ht_mbs;
1847
1848 /* Half x plane offset from pic buf */
1849 ps_proc->u4_half_x_offset = 0;
1850
1851 /* Half y plane offset from half x plane */
1852 ps_proc->u4_half_y_offset = 0;
1853
1854 /* Half x plane offset from half y plane */
1855 ps_proc->u4_half_xy_offset = 0;
1856
1857 /* top row syntax elements */
1858 ps_proc->ps_top_row_mb_syntax_ele =
1859 ps_proc->ps_top_row_mb_syntax_ele_base;
1860
1861 ps_proc->pu1_top_mb_intra_modes =
1862 ps_proc->pu1_top_mb_intra_modes_base;
1863
1864 ps_proc->ps_top_row_pu = ps_proc->ps_top_row_pu_base;
1865
1866 /* initialize quant params */
1867 ps_proc->u4_frame_qp = ps_codec->u4_frame_qp;
1868 ps_proc->u4_mb_qp = ps_codec->u4_frame_qp;
1869 ih264e_init_quant_params(ps_proc, ps_proc->u4_frame_qp);
1870
1871 /* previous mb qp*/
1872 ps_proc->u4_mb_qp_prev = ps_proc->u4_frame_qp;
1873
1874 /* Reset frame info */
1875 memset(&ps_proc->s_frame_info, 0, sizeof(frame_info_t));
1876
1877 /* initialize proc, deblk and ME map */
1878 if (i == j)
1879 {
1880 /* row '-1' */
1881 memset(ps_proc->pu1_proc_map - ps_proc->i4_wd_mbs, 1, ps_proc->i4_wd_mbs);
1882 /* row 0 to ht in mbs */
1883 memset(ps_proc->pu1_proc_map, 0, ps_proc->i4_wd_mbs * ps_proc->i4_ht_mbs);
1884
1885 /* row '-1' */
1886 memset(ps_proc->pu1_deblk_map - ps_proc->i4_wd_mbs, 1, ps_proc->i4_wd_mbs);
1887 /* row 0 to ht in mbs */
1888 memset(ps_proc->pu1_deblk_map, 0, ps_proc->i4_wd_mbs * ps_proc->i4_ht_mbs);
1889
1890 /* row '-1' */
1891 memset(ps_proc->pu1_me_map - ps_proc->i4_wd_mbs, 1, ps_proc->i4_wd_mbs);
1892 /* row 0 to ht in mbs */
1893 memset(ps_proc->pu1_me_map, 0, ps_proc->i4_wd_mbs * ps_proc->i4_ht_mbs);
1894
1895 /* at the start of air refresh period, reset intra coded map */
1896 if (IVE_AIR_MODE_NONE != ps_codec->s_cfg.e_air_mode)
1897 {
1898 ps_codec->i4_air_pic_cnt = (ps_codec->i4_air_pic_cnt + 1)
1899 % ps_codec->s_cfg.u4_air_refresh_period;
1900
1901 if (!ps_codec->i4_air_pic_cnt)
1902 {
1903 memset(ps_proc->pu1_is_intra_coded, 0, ps_proc->i4_wd_mbs * ps_proc->i4_ht_mbs);
1904 }
1905 }
1906 }
1907
1908 /* deblock level */
1909 ps_proc->u4_disable_deblock_level = ps_codec->i4_disable_deblk_pic;
1910
1911 /* slice index map */
1912 /* no slice */
1913 if (ps_codec->s_cfg.e_slice_mode == IVE_SLICE_MODE_NONE)
1914 {
1915 memset(ps_proc->pu1_slice_idx, 0, ps_proc->i4_wd_mbs * ps_proc->i4_ht_mbs);
1916 }
1917 /* generate slices for every 'n' rows, 'n' is given through slice param */
1918 else if (ps_codec->s_cfg.e_slice_mode == IVE_SLICE_MODE_BLOCKS)
1919 {
1920 /* slice idx map */
1921 UWORD8 *pu1_slice_idx = ps_proc->pu1_slice_idx;
1922
1923 /* temp var */
1924 WORD32 i4_mb_y = 0, slice_idx = 0, cnt;
1925
1926 while (i4_mb_y < ps_proc->i4_ht_mbs)
1927 {
1928 if (i4_mb_y +(WORD32)ps_codec->s_cfg.u4_slice_param < ps_proc->i4_ht_mbs)
1929 {
1930 cnt = ps_codec->s_cfg.u4_slice_param * ps_proc->i4_wd_mbs;
1931 i4_mb_y += ps_codec->s_cfg.u4_slice_param;
1932 }
1933 else
1934 {
1935 cnt = (ps_proc->i4_ht_mbs - i4_mb_y) * ps_proc->i4_wd_mbs;
1936 i4_mb_y += (ps_proc->i4_ht_mbs - i4_mb_y);
1937 }
1938 memset(pu1_slice_idx, slice_idx, cnt);
1939 slice_idx++;
1940 pu1_slice_idx += cnt;
1941 }
1942 }
1943
1944 /* Current MV Bank's buffer ID */
1945 ps_proc->i4_cur_mv_bank_buf_id = cur_mv_bank_buf_id;
1946
1947 /* Pointer to current picture buffer structure */
1948 ps_proc->ps_cur_pic = ps_cur_pic;
1949
1950 /* Pointer to current pictures mv buffers */
1951 ps_proc->ps_cur_mv_buf = ps_mv_buf;
1952
1953 /*
1954 * pointer to ref picture
1955 * 0 : Temporal back reference
1956 * 1 : Temporal forward reference
1957 */
1958 ps_proc->aps_ref_pic[PRED_L0] = aps_ref_pic[PRED_L0];
1959 ps_proc->aps_ref_pic[PRED_L1] = aps_ref_pic[PRED_L1];
1960 if (ps_codec->pic_type == PIC_B)
1961 {
1962 ps_proc->aps_mv_buf[PRED_L0] = aps_mv_buf[PRED_L0];
1963 ps_proc->aps_mv_buf[PRED_L1] = aps_mv_buf[PRED_L1];
1964 }
1965 else
1966 {
1967 /*
1968 * Else is dummy since for non B pic we does not need this
1969 * But an assignment here will help in not having a segfault
1970 * when we calcualte colpic in P slices
1971 */
1972 ps_proc->aps_mv_buf[PRED_L0] = ps_mv_buf;
1973 ps_proc->aps_mv_buf[PRED_L1] = ps_mv_buf;
1974 }
1975
1976 if ((*pic_type != PIC_IDR) && (*pic_type != PIC_I))
1977 {
1978 /* temporal back an forward ref pointer luma and chroma */
1979 ps_proc->apu1_ref_buf_luma_base[PRED_L0] = aps_ref_pic[PRED_L0]->pu1_luma;
1980 ps_proc->apu1_ref_buf_chroma_base[PRED_L0] = aps_ref_pic[PRED_L0]->pu1_chroma;
1981
1982 ps_proc->apu1_ref_buf_luma_base[PRED_L1] = aps_ref_pic[PRED_L1]->pu1_luma;
1983 ps_proc->apu1_ref_buf_chroma_base[PRED_L1] = aps_ref_pic[PRED_L1]->pu1_chroma;
1984 }
1985
1986 /* Structure for current input buffer */
1987 ps_proc->s_inp_buf = *ps_inp_buf;
1988
1989 /* Number of encode frame API calls made */
1990 ps_proc->i4_encode_api_call_cnt = ps_codec->i4_encode_api_call_cnt;
1991
1992 /* Current Picture count */
1993 ps_proc->i4_pic_cnt = ps_codec->i4_pic_cnt;
1994
1995 /* error status */
1996 ps_proc->i4_error_code = 0;
1997
1998 /********************************************************************/
1999 /* INITIALIZE ENTROPY CONTEXT */
2000 /********************************************************************/
2001 {
2002 entropy_ctxt_t *ps_entropy = &ps_proc->s_entropy;
2003
2004 /* start of frame */
2005 ps_entropy->i4_sof = 0;
2006
2007 /* end of frame */
2008 ps_entropy->i4_eof = 0;
2009
2010 /* generate header */
2011 ps_entropy->i4_gen_header = ps_codec->i4_gen_header;
2012
2013 /* sps ref_set_id */
2014 ps_entropy->u4_sps_id = ps_codec->i4_sps_id;
2015
2016 /* sps base */
2017 ps_entropy->ps_sps_base = ps_codec->ps_sps_base;
2018
2019 /* sps id */
2020 ps_entropy->u4_pps_id = ps_codec->i4_pps_id;
2021
2022 /* sps base */
2023 ps_entropy->ps_pps_base = ps_codec->ps_pps_base;
2024
2025 /* slice map */
2026 ps_entropy->pu1_slice_idx = ps_proc->pu1_slice_idx;
2027
2028 /* slice hdr base */
2029 ps_entropy->ps_slice_hdr_base = ps_proc->ps_slice_hdr_base;
2030
2031 /* Abs poc */
2032 ps_entropy->i4_abs_pic_order_cnt = ps_proc->ps_codec->i4_poc;
2033
2034 /* initialize entropy map */
2035 if (i == j)
2036 {
2037 /* row '-1' */
2038 memset(ps_entropy->pu1_entropy_map - ps_proc->i4_wd_mbs, 1, ps_proc->i4_wd_mbs);
2039 /* row 0 to ht in mbs */
2040 memset(ps_entropy->pu1_entropy_map, 0, ps_proc->i4_wd_mbs * ps_proc->i4_ht_mbs);
2041
2042 /* intialize cabac tables */
2043 ih264e_init_cabac_table(ps_entropy);
2044 }
2045
2046 /* wd in mbs */
2047 ps_entropy->i4_wd_mbs = ps_proc->i4_wd_mbs;
2048
2049 /* ht in mbs */
2050 ps_entropy->i4_ht_mbs = ps_proc->i4_ht_mbs;
2051
2052 /* transform_8x8_mode_flag */
2053 ps_entropy->i1_transform_8x8_mode_flag = 0;
2054
2055 /* entropy_coding_mode_flag */
2056 ps_entropy->u1_entropy_coding_mode_flag =
2057 ps_codec->s_cfg.u4_entropy_coding_mode;
2058
2059 /* error code */
2060 ps_entropy->i4_error_code = IH264E_SUCCESS;
2061
2062 /* mb skip run */
2063 *(ps_proc->s_entropy.pi4_mb_skip_run) = 0;
2064
2065 /* last frame to encode */
2066 ps_proc->s_entropy.u4_is_last = ps_inp_buf->u4_is_last;
2067
2068 /* Current Picture count */
2069 ps_proc->s_entropy.i4_pic_cnt = ps_codec->i4_pic_cnt;
2070
2071 /* time stamps */
2072 ps_entropy->u4_timestamp_low = u4_timestamp_low;
2073 ps_entropy->u4_timestamp_high = u4_timestamp_high;
2074
2075 /* init frame statistics */
2076 ps_entropy->u4_header_bits[MB_TYPE_INTRA] = 0;
2077 ps_entropy->u4_header_bits[MB_TYPE_INTER] = 0;
2078 ps_entropy->u4_residue_bits[MB_TYPE_INTRA] = 0;
2079 ps_entropy->u4_residue_bits[MB_TYPE_INTER] = 0;
2080 }
2081
2082 /********************************************************************/
2083 /* INITIALIZE DEBLOCK CONTEXT */
2084 /********************************************************************/
2085 {
2086 /* deblk ctxt */
2087 deblk_ctxt_t *ps_deblk = &ps_proc->s_deblk_ctxt;
2088
2089 /* slice idx map */
2090 ps_deblk->pu1_slice_idx = ps_proc->pu1_slice_idx;
2091 }
2092
2093 /********************************************************************/
2094 /* INITIALIZE ME CONTEXT */
2095 /********************************************************************/
2096 {
2097 /* me ctxt */
2098 me_ctxt_t *ps_me_ctxt = &ps_proc->s_me_ctxt;
2099
2100 /* srch range x */
2101 ps_me_ctxt->ai2_srch_boundaries[0] =
2102 ps_codec->s_cfg.u4_srch_rng_x;
2103
2104 /* srch range y */
2105 ps_me_ctxt->ai2_srch_boundaries[1] =
2106 ps_codec->s_cfg.u4_srch_rng_y;
2107
2108 /* rec stride */
2109 ps_me_ctxt->i4_rec_strd = ps_codec->i4_rec_strd;
2110
2111 /* Half x plane offset from pic buf */
2112 ps_me_ctxt->u4_half_x_offset = ps_proc->u4_half_x_offset;
2113
2114 /* Half y plane offset from half x plane */
2115 ps_me_ctxt->u4_half_y_offset = ps_proc->u4_half_y_offset;
2116
2117 /* Half x plane offset from half y plane */
2118 ps_me_ctxt->u4_half_xy_offset = ps_proc->u4_half_xy_offset;
2119
2120 /* enable fast sad */
2121 ps_me_ctxt->u4_enable_fast_sad = u4_enable_fast_sad;
2122
2123 /* half pel */
2124 ps_me_ctxt->u4_enable_hpel = ps_codec->s_cfg.u4_enable_hpel;
2125
2126 /* Diamond search Iteration Max Cnt */
2127 ps_me_ctxt->u4_num_layers = u4_num_layers;
2128
2129 /* me speed preset */
2130 ps_me_ctxt->u4_me_speed_preset =
2131 ps_codec->s_cfg.u4_me_speed_preset;
2132
2133 /* qp */
2134 ps_me_ctxt->u1_mb_qp = ps_codec->u4_frame_qp;
2135
2136 if ((i == j) && (0 == ps_codec->i4_poc))
2137 {
2138 /* init mv bits tables */
2139 ih264e_init_mv_bits(ps_me_ctxt);
2140 }
2141 }
2142
2143 ps_proc->ps_ngbr_avbl = &(ps_proc->s_ngbr_avbl);
2144
2145 }
2146
2147 /* reset encoder header */
2148 ps_codec->i4_gen_header = 0;
2149 }
2150
2151 /********************************************************************/
2152 /* ADD JOBS TO THE QUEUE */
2153 /********************************************************************/
2154 {
2155 /* job structures */
2156 job_t s_job;
2157
2158 /* temp var */
2159 WORD32 i;
2160
2161 /* job class */
2162 s_job.i4_cmd = CMD_PROCESS;
2163
2164 /* number of mbs to be processed in the current job */
2165 s_job.i2_mb_cnt = ps_codec->s_cfg.i4_wd_mbs;
2166
2167 /* job start index x */
2168 s_job.i2_mb_x = 0;
2169
2170 /* proc base idx */
2171 s_job.i2_proc_base_idx = ctxt_sel ? (MAX_PROCESS_CTXT / 2) : 0;
2172
2173 for (i = 0; i < (WORD32)ps_codec->s_cfg.i4_ht_mbs; i++)
2174 {
2175 /* job start index y */
2176 s_job.i2_mb_y = i;
2177
2178 /* queue the job */
2179 ret = ih264_list_queue(ps_codec->pv_proc_jobq, &s_job, 1);
2180 if (ret != IH264_SUCCESS)
2181 {
2182 ps_codec->i4_error_code = ret;
2183 return IH264E_FAIL;
2184 }
2185 }
2186
2187 /* Once all the jobs are queued, terminate the queue */
2188 /* Since the threads are created and deleted in each call, terminating
2189 here is not an issue */
2190 ih264_list_terminate(ps_codec->pv_proc_jobq);
2191 }
2192
2193 return error_status;
2194 }
2195