1 /*-------------------------------------------------------------------------- 2 Copyright (c) 2013-2014, The Linux Foundation. All rights reserved. 3 4 Redistribution and use in source and binary forms, with or without 5 modification, are permitted provided that the following conditions 6 are met: 7 8 * Redistributions of source code must retain the above copyright 9 notice, this list of conditions and the following disclaimer. 10 * Redistributions in binary form must reproduce the above 11 copyright notice, this list of conditions and the following 12 disclaimer in the documentation and/or other materials provided 13 with the distribution. 14 * Neither the name of The Linux Foundation nor the names of its 15 contributors may be used to endorse or promote products derived 16 from this software without specific prior written permission. 17 18 THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED 19 WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT 21 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS 22 BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 25 BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 26 WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE 27 OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN 28 IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 29 --------------------------------------------------------------------------*/ 30 #ifndef __OMX_VDEC_HEVC_H__ 31 #define __OMX_VDEC_HEVC_H__ 32 /*============================================================================ 33 O p e n M A X Component 34 Video Decoder 35 36 *//** @file comx_vdec_hevc.h 37 This module contains the class definition for openMAX decoder component. 38 39 *//*========================================================================*/ 40 41 ////////////////////////////////////////////////////////////////////////////// 42 // Include Files 43 ////////////////////////////////////////////////////////////////////////////// 44 45 #include <stdlib.h> 46 #include <stdio.h> 47 #include <string.h> 48 #include <inttypes.h> 49 #include <cstddef> 50 51 #include "SwVdecTypes.h" 52 #include "SwVdecAPI.h" 53 54 static ptrdiff_t x; 55 56 #ifdef _ANDROID_ 57 #ifdef MAX_RES_720P 58 #define LOG_TAG "OMX-VDEC-720P" 59 #elif MAX_RES_1080P 60 #define LOG_TAG "OMX-VDEC-1080P" 61 #else 62 #define LOG_TAG "OMX-VDEC" 63 #endif 64 65 #ifdef USE_ION 66 #include <linux/msm_ion.h> 67 #endif 68 #include <binder/MemoryHeapBase.h> 69 #include <ui/ANativeObjectBase.h> 70 extern "C"{ 71 #include <utils/Log.h> 72 } 73 #include <linux/videodev2.h> 74 #include <poll.h> 75 #include "hevc_utils.h" 76 #define TIMEOUT 5000 77 78 #else //_ANDROID_ 79 #define DEBUG_PRINT_LOW(fmt, ...) printf(fmt "\n", ##__VA_ARGS__) 80 #define DEBUG_PRINT_HIGH(fmt, ...) printf(fmt "\n", ##__VA_ARGS__) 81 #define DEBUG_PRINT_ERROR(fmt, ...) printf(fmt "\n", ##__VA_ARGS__) 82 #endif // _ANDROID_ 83 84 85 #if defined (_ANDROID_HONEYCOMB_) || defined (_ANDROID_ICS_) 86 #include <media/hardware/HardwareAPI.h> 87 #endif 88 89 #include <unistd.h> 90 91 #if defined (_ANDROID_ICS_) 92 #include <gralloc_priv.h> 93 #endif 94 95 #include <pthread.h> 96 #ifndef PC_DEBUG 97 #include <semaphore.h> 98 #endif 99 #include "OMX_Core.h" 100 #include "OMX_QCOMExtns.h" 101 #include "OMX_Video.h" 102 #include "qc_omx_component.h" 103 #include <linux/msm_vidc_dec.h> 104 #include <media/msm_vidc.h> 105 #include "frameparser.h" 106 #ifdef MAX_RES_1080P 107 #include "mp4_utils.h" 108 #endif 109 #include <linux/android_pmem.h> 110 #include "extra_data_handler.h" 111 #include "ts_parser.h" 112 #include "vidc_color_converter.h" 113 #include "vidc_debug.h" 114 #ifdef _ANDROID_ 115 #include <cutils/properties.h> 116 #else 117 #define PROPERTY_VALUE_MAX 92 118 #endif 119 extern "C" { 120 OMX_API void * get_omx_component_factory_fn(void); 121 } 122 123 #ifdef _ANDROID_ 124 using namespace android; 125 #ifdef USE_ION 126 class VideoHeap : public MemoryHeapBase 127 { 128 public: 129 VideoHeap(int devicefd, size_t size, void* base,ion_user_handle_t handle,int mapfd); ~VideoHeap()130 virtual ~VideoHeap() {} 131 private: 132 int m_ion_device_fd; 133 ion_user_handle_t m_ion_handle; 134 }; 135 #else 136 // local pmem heap object 137 class VideoHeap : public MemoryHeapBase 138 { 139 public: 140 VideoHeap(int fd, size_t size, void* base); ~VideoHeap()141 virtual ~VideoHeap() {} 142 }; 143 #endif 144 #endif // _ANDROID_ 145 ////////////////////////////////////////////////////////////////////////////// 146 // Module specific globals 147 ////////////////////////////////////////////////////////////////////////////// 148 #define OMX_SPEC_VERSION 0x00000101 149 150 151 ////////////////////////////////////////////////////////////////////////////// 152 // Macros 153 ////////////////////////////////////////////////////////////////////////////// 154 #define PrintFrameHdr(bufHdr) DEBUG_PRINT("bufHdr %x buf %x size %d TS %d\n",\ 155 (unsigned) bufHdr,\ 156 (unsigned)((OMX_BUFFERHEADERTYPE *)bufHdr)->pBuffer,\ 157 (unsigned)((OMX_BUFFERHEADERTYPE *)bufHdr)->nFilledLen,\ 158 (unsigned)((OMX_BUFFERHEADERTYPE *)bufHdr)->nTimeStamp) 159 160 // BitMask Management logic 161 #define BITS_PER_BYTE 32 162 #define BITMASK_SIZE(mIndex) (((mIndex) + BITS_PER_BYTE - 1)/BITS_PER_BYTE) 163 #define BITMASK_OFFSET(mIndex) ((mIndex)/BITS_PER_BYTE) 164 #define BITMASK_FLAG(mIndex) (1 << ((mIndex) % BITS_PER_BYTE)) 165 #define BITMASK_CLEAR(mArray,mIndex) (mArray)[BITMASK_OFFSET(mIndex)] \ 166 &= ~(BITMASK_FLAG(mIndex)) 167 #define BITMASK_SET(mArray,mIndex) (mArray)[BITMASK_OFFSET(mIndex)] \ 168 |= BITMASK_FLAG(mIndex) 169 #define BITMASK_PRESENT(mArray,mIndex) ((mArray)[BITMASK_OFFSET(mIndex)] \ 170 & BITMASK_FLAG(mIndex)) 171 #define BITMASK_ABSENT(mArray,mIndex) (((mArray)[BITMASK_OFFSET(mIndex)] \ 172 & BITMASK_FLAG(mIndex)) == 0x0) 173 #define BITMASK_PRESENT(mArray,mIndex) ((mArray)[BITMASK_OFFSET(mIndex)] \ 174 & BITMASK_FLAG(mIndex)) 175 #define BITMASK_ABSENT(mArray,mIndex) (((mArray)[BITMASK_OFFSET(mIndex)] \ 176 & BITMASK_FLAG(mIndex)) == 0x0) 177 178 #define OMX_CORE_CONTROL_CMDQ_SIZE 100 179 #define OMX_CORE_QCIF_HEIGHT 144 180 #define OMX_CORE_QCIF_WIDTH 176 181 #define OMX_CORE_VGA_HEIGHT 480 182 #define OMX_CORE_VGA_WIDTH 640 183 #define OMX_CORE_WVGA_HEIGHT 480 184 #define OMX_CORE_WVGA_WIDTH 800 185 186 #define DESC_BUFFER_SIZE (8192 * 16) 187 188 #ifdef _ANDROID_ 189 #define MAX_NUM_INPUT_OUTPUT_BUFFERS 32 190 #endif 191 192 #define OMX_FRAMEINFO_EXTRADATA 0x00010000 193 #define OMX_INTERLACE_EXTRADATA 0x00020000 194 #define OMX_TIMEINFO_EXTRADATA 0x00040000 195 #define OMX_PORTDEF_EXTRADATA 0x00080000 196 #define OMX_EXTNUSER_EXTRADATA 0x00100000 197 #define DRIVER_EXTRADATA_MASK 0x0000FFFF 198 199 #define OMX_INTERLACE_EXTRADATA_SIZE ((sizeof(OMX_OTHER_EXTRADATATYPE) +\ 200 sizeof(OMX_STREAMINTERLACEFORMAT) + 3)&(~3)) 201 #define OMX_FRAMEINFO_EXTRADATA_SIZE ((sizeof(OMX_OTHER_EXTRADATATYPE) +\ 202 sizeof(OMX_QCOM_EXTRADATA_FRAMEINFO) + 3)&(~3)) 203 #define OMX_PORTDEF_EXTRADATA_SIZE ((sizeof(OMX_OTHER_EXTRADATATYPE) +\ 204 sizeof(OMX_PARAM_PORTDEFINITIONTYPE) + 3)&(~3)) 205 206 // Define next macro with required values to enable default extradata, 207 // VDEC_EXTRADATA_MB_ERROR_MAP 208 // OMX_INTERLACE_EXTRADATA 209 // OMX_FRAMEINFO_EXTRADATA 210 // OMX_TIMEINFO_EXTRADATA 211 212 //#define DEFAULT_EXTRADATA (OMX_FRAMEINFO_EXTRADATA|OMX_INTERLACE_EXTRADATA) 213 214 enum port_indexes 215 { 216 OMX_CORE_INPUT_PORT_INDEX =0, 217 OMX_CORE_OUTPUT_PORT_INDEX =1 218 }; 219 220 enum interm_buffer_state 221 { 222 WITH_COMPONENT = 0, 223 WITH_SWVDEC, 224 WITH_DSP 225 }; 226 227 #ifdef USE_ION 228 struct vdec_ion 229 { 230 int ion_device_fd; 231 struct ion_fd_data fd_ion_data; 232 struct ion_allocation_data ion_alloc_data; 233 }; 234 #endif 235 236 #ifdef _MSM8974_ 237 struct extradata_buffer_info { 238 int buffer_size; 239 char* uaddr; 240 int count; 241 int size; 242 #ifdef USE_ION 243 struct vdec_ion ion; 244 #endif 245 }; 246 #endif 247 248 struct video_driver_context 249 { 250 int video_driver_fd; 251 enum vdec_codec decoder_format; 252 enum vdec_output_fromat output_format; 253 enum vdec_interlaced_format interlace; 254 enum vdec_output_order picture_order; 255 struct vdec_picsize video_resolution; 256 struct vdec_allocatorproperty ip_buf; 257 struct vdec_allocatorproperty op_buf; 258 struct vdec_bufferpayload *ptr_inputbuffer; 259 struct vdec_bufferpayload *ptr_outputbuffer; 260 struct vdec_output_frameinfo *ptr_respbuffer; 261 262 struct vdec_allocatorproperty interm_op_buf; 263 struct vdec_bufferpayload *ptr_interm_outputbuffer; 264 struct vdec_output_frameinfo *ptr_interm_respbuffer; 265 266 #ifdef USE_ION 267 struct vdec_ion *ip_buf_ion_info; 268 struct vdec_ion *op_buf_ion_info; 269 struct vdec_ion *interm_op_buf_ion_info; 270 struct vdec_ion h264_mv; 271 struct vdec_ion meta_buffer; 272 struct vdec_ion meta_buffer_iommu; 273 #endif 274 struct vdec_framerate frame_rate; 275 unsigned extradata; 276 bool timestamp_adjust; 277 char kind[128]; 278 bool idr_only_decoding; 279 unsigned disable_dmx; 280 #ifdef _MSM8974_ 281 struct extradata_buffer_info extradata_info; 282 int num_planes; 283 #endif 284 }; 285 286 struct video_decoder_capability { 287 unsigned int min_width; 288 unsigned int max_width; 289 unsigned int min_height; 290 unsigned int max_height; 291 }; 292 293 struct debug_cap { 294 bool in_buffer_log; 295 bool out_buffer_log; 296 bool im_buffer_log; 297 char infile_name[PROPERTY_VALUE_MAX + 36]; 298 char outfile_name[PROPERTY_VALUE_MAX + 36]; 299 char imbfile_name[PROPERTY_VALUE_MAX + 36]; 300 char log_loc[PROPERTY_VALUE_MAX]; 301 FILE *infile; 302 FILE *outfile; 303 FILE *imbfile; 304 }; 305 306 struct dynamic_buf_list { 307 OMX_U32 fd; 308 OMX_U32 dup_fd; 309 OMX_U32 offset; 310 OMX_U32 ref_count; 311 }; 312 313 // OMX video decoder class 314 class omx_vdec: public qc_omx_component 315 { 316 317 public: 318 omx_vdec(); // constructor 319 virtual ~omx_vdec(); // destructor 320 321 static int async_message_process (void *context, void* message); 322 static void process_event_cb(void *ctxt,unsigned char id); 323 324 OMX_ERRORTYPE allocate_buffer( 325 OMX_HANDLETYPE hComp, 326 OMX_BUFFERHEADERTYPE **bufferHdr, 327 OMX_U32 port, 328 OMX_PTR appData, 329 OMX_U32 bytes 330 ); 331 332 333 OMX_ERRORTYPE component_deinit(OMX_HANDLETYPE hComp); 334 335 OMX_ERRORTYPE component_init(OMX_STRING role); 336 337 OMX_ERRORTYPE component_role_enum( 338 OMX_HANDLETYPE hComp, 339 OMX_U8 *role, 340 OMX_U32 index 341 ); 342 343 OMX_ERRORTYPE component_tunnel_request( 344 OMX_HANDLETYPE hComp, 345 OMX_U32 port, 346 OMX_HANDLETYPE peerComponent, 347 OMX_U32 peerPort, 348 OMX_TUNNELSETUPTYPE *tunnelSetup 349 ); 350 351 OMX_ERRORTYPE empty_this_buffer( 352 OMX_HANDLETYPE hComp, 353 OMX_BUFFERHEADERTYPE *buffer 354 ); 355 356 357 358 OMX_ERRORTYPE fill_this_buffer( 359 OMX_HANDLETYPE hComp, 360 OMX_BUFFERHEADERTYPE *buffer 361 ); 362 363 364 OMX_ERRORTYPE free_buffer( 365 OMX_HANDLETYPE hComp, 366 OMX_U32 port, 367 OMX_BUFFERHEADERTYPE *buffer 368 ); 369 370 OMX_ERRORTYPE get_component_version( 371 OMX_HANDLETYPE hComp, 372 OMX_STRING componentName, 373 OMX_VERSIONTYPE *componentVersion, 374 OMX_VERSIONTYPE *specVersion, 375 OMX_UUIDTYPE *componentUUID 376 ); 377 378 OMX_ERRORTYPE get_config( 379 OMX_HANDLETYPE hComp, 380 OMX_INDEXTYPE configIndex, 381 OMX_PTR configData 382 ); 383 384 OMX_ERRORTYPE get_extension_index( 385 OMX_HANDLETYPE hComp, 386 OMX_STRING paramName, 387 OMX_INDEXTYPE *indexType 388 ); 389 390 OMX_ERRORTYPE get_parameter(OMX_HANDLETYPE hComp, 391 OMX_INDEXTYPE paramIndex, 392 OMX_PTR paramData); 393 394 OMX_ERRORTYPE get_state(OMX_HANDLETYPE hComp, 395 OMX_STATETYPE *state); 396 397 398 399 OMX_ERRORTYPE send_command(OMX_HANDLETYPE hComp, 400 OMX_COMMANDTYPE cmd, 401 OMX_U32 param1, 402 OMX_PTR cmdData); 403 404 405 OMX_ERRORTYPE set_callbacks(OMX_HANDLETYPE hComp, 406 OMX_CALLBACKTYPE *callbacks, 407 OMX_PTR appData); 408 409 OMX_ERRORTYPE set_config(OMX_HANDLETYPE hComp, 410 OMX_INDEXTYPE configIndex, 411 OMX_PTR configData); 412 413 OMX_ERRORTYPE set_parameter(OMX_HANDLETYPE hComp, 414 OMX_INDEXTYPE paramIndex, 415 OMX_PTR paramData); 416 417 OMX_ERRORTYPE use_buffer(OMX_HANDLETYPE hComp, 418 OMX_BUFFERHEADERTYPE **bufferHdr, 419 OMX_U32 port, 420 OMX_PTR appData, 421 OMX_U32 bytes, 422 OMX_U8 *buffer); 423 424 OMX_ERRORTYPE use_input_heap_buffers( 425 OMX_HANDLETYPE hComp, 426 OMX_BUFFERHEADERTYPE** bufferHdr, 427 OMX_U32 port, 428 OMX_PTR appData, 429 OMX_U32 bytes, 430 OMX_U8* buffer); 431 432 OMX_ERRORTYPE use_EGL_image(OMX_HANDLETYPE hComp, 433 OMX_BUFFERHEADERTYPE **bufferHdr, 434 OMX_U32 port, 435 OMX_PTR appData, 436 void * eglImage); 437 void complete_pending_buffer_done_cbs(); 438 struct video_driver_context drv_ctx; 439 #ifdef _MSM8974_ 440 OMX_ERRORTYPE allocate_extradata(); 441 void free_extradata(); 442 int update_resolution(int width, int height, int stride, int scan_lines); 443 OMX_ERRORTYPE is_video_session_supported(); 444 #endif 445 int m_pipe_in; 446 int m_pipe_out; 447 pthread_t msg_thread_id; 448 pthread_t async_thread_id; 449 bool is_component_secure(); 450 451 void buf_ref_add(int index, OMX_U32 fd, OMX_U32 offset); 452 void buf_ref_remove(OMX_U32 fd, OMX_U32 offset); 453 454 static SWVDEC_STATUS swvdec_input_buffer_done_cb(SWVDEC_HANDLE pSwDec, SWVDEC_IPBUFFER *pIpBuffer, void *pClientHandle); 455 static SWVDEC_STATUS swvdec_fill_buffer_done_cb(SWVDEC_HANDLE pSwDec, SWVDEC_OPBUFFER *pOpBuffer, void *pClientHandle); 456 static SWVDEC_STATUS swvdec_handle_event_cb (SWVDEC_HANDLE pSwDec, SWVDEC_EVENTHANDLER* pEventHandler, void *pClientHandle); 457 void swvdec_input_buffer_done(SWVDEC_IPBUFFER *pIpBuffer); 458 void swvdec_fill_buffer_done(SWVDEC_OPBUFFER *pOpBuffer); 459 void swvdec_handle_event(SWVDEC_EVENTHANDLER *pEvent); 460 461 private: 462 // Bit Positions 463 enum flags_bit_positions 464 { 465 // Defer transition to IDLE 466 OMX_COMPONENT_IDLE_PENDING =0x1, 467 // Defer transition to LOADING 468 OMX_COMPONENT_LOADING_PENDING =0x2, 469 // First Buffer Pending 470 OMX_COMPONENT_FIRST_BUFFER_PENDING =0x3, 471 // Second Buffer Pending 472 OMX_COMPONENT_SECOND_BUFFER_PENDING =0x4, 473 // Defer transition to Enable 474 OMX_COMPONENT_INPUT_ENABLE_PENDING =0x5, 475 // Defer transition to Enable 476 OMX_COMPONENT_OUTPUT_ENABLE_PENDING =0x6, 477 // Defer transition to Disable 478 OMX_COMPONENT_INPUT_DISABLE_PENDING =0x7, 479 // Defer transition to Disable 480 OMX_COMPONENT_OUTPUT_DISABLE_PENDING =0x8, 481 //defer flush notification 482 OMX_COMPONENT_OUTPUT_FLUSH_PENDING =0x9, 483 OMX_COMPONENT_INPUT_FLUSH_PENDING =0xA, 484 OMX_COMPONENT_PAUSE_PENDING =0xB, 485 OMX_COMPONENT_EXECUTE_PENDING =0xC, 486 OMX_COMPONENT_OUTPUT_FLUSH_IN_DISABLE_PENDING =0xD, 487 OMX_COMPONENT_DISABLE_OUTPUT_DEFERRED=0xE 488 }; 489 490 // Deferred callback identifiers 491 enum 492 { 493 //Event Callbacks from the vdec component thread context 494 OMX_COMPONENT_GENERATE_EVENT = 0x1, 495 //Buffer Done callbacks from the vdec component thread context 496 OMX_COMPONENT_GENERATE_BUFFER_DONE = 0x2, 497 //Frame Done callbacks from the vdec component thread context 498 OMX_COMPONENT_GENERATE_FRAME_DONE = 0x3, 499 //Buffer Done callbacks from the vdec component thread context 500 OMX_COMPONENT_GENERATE_FTB = 0x4, 501 //Frame Done callbacks from the vdec component thread context 502 OMX_COMPONENT_GENERATE_ETB = 0x5, 503 //Command 504 OMX_COMPONENT_GENERATE_COMMAND = 0x6, 505 //Push-Pending Buffers 506 OMX_COMPONENT_PUSH_PENDING_BUFS = 0x7, 507 // Empty Buffer Done callbacks 508 OMX_COMPONENT_GENERATE_EBD = 0x8, 509 //Flush Event Callbacks from the vdec component thread context 510 OMX_COMPONENT_GENERATE_EVENT_FLUSH = 0x9, 511 OMX_COMPONENT_GENERATE_EVENT_INPUT_FLUSH = 0x0A, 512 OMX_COMPONENT_GENERATE_EVENT_OUTPUT_FLUSH = 0x0B, 513 OMX_COMPONENT_GENERATE_FBD = 0xc, 514 OMX_COMPONENT_GENERATE_START_DONE = 0xD, 515 OMX_COMPONENT_GENERATE_PAUSE_DONE = 0xE, 516 OMX_COMPONENT_GENERATE_RESUME_DONE = 0xF, 517 OMX_COMPONENT_GENERATE_STOP_DONE = 0x10, 518 OMX_COMPONENT_GENERATE_HARDWARE_ERROR = 0x11, 519 OMX_COMPONENT_GENERATE_ETB_ARBITRARY = 0x12, 520 OMX_COMPONENT_GENERATE_PORT_RECONFIG = 0x13, 521 OMX_COMPONENT_GENERATE_EOS_DONE = 0x14, 522 OMX_COMPONENT_GENERATE_INFO_PORT_RECONFIG = 0x15, 523 OMX_COMPONENT_GENERATE_INFO_FIELD_DROPPED = 0x16, 524 525 // SWVDEC events 526 OMX_COMPONENT_GENERATE_ETB_SWVDEC = 0x17, 527 OMX_COMPONENT_GENERATE_EBD_SWVDEC = 0x18, 528 OMX_COMPONENT_GENERATE_FTB_DSP = 0x19, 529 OMX_COMPONENT_GENERATE_FBD_DSP = 0x1A, 530 OMX_COMPONENT_GENERATE_EVENT_OUTPUT_FLUSH_DSP = 0x1C, 531 OMX_COMPONENT_GENERATE_STOP_DONE_SWVDEC = 0x1D, 532 OMX_COMPONENT_GENERATE_UNSUPPORTED_SETTING = 0x1E, 533 }; 534 535 enum vc1_profile_type 536 { 537 VC1_SP_MP_RCV = 1, 538 VC1_AP = 2 539 }; 540 541 #ifdef _MSM8974_ 542 enum v4l2_ports 543 { 544 CAPTURE_PORT, 545 OUTPUT_PORT, 546 MAX_PORT 547 }; 548 #endif 549 550 struct omx_event 551 { 552 unsigned long param1; 553 unsigned long param2; 554 unsigned id; 555 }; 556 557 struct omx_cmd_queue 558 { 559 omx_event m_q[OMX_CORE_CONTROL_CMDQ_SIZE]; 560 unsigned m_read; 561 unsigned m_write; 562 unsigned m_size; 563 564 omx_cmd_queue(); 565 ~omx_cmd_queue(); 566 bool insert_entry(unsigned long p1, unsigned long p2, unsigned long id); 567 bool pop_entry(unsigned long*p1,unsigned long*p2, unsigned long*id); 568 // get msgtype of the first ele from the queue 569 unsigned get_q_msg_type(); 570 571 }; 572 573 #ifdef _ANDROID_ 574 struct ts_entry 575 { 576 OMX_TICKS timestamp; 577 bool valid; 578 }; 579 580 struct ts_arr_list 581 { 582 ts_entry m_ts_arr_list[MAX_NUM_INPUT_OUTPUT_BUFFERS]; 583 584 ts_arr_list(); 585 ~ts_arr_list(); 586 587 bool insert_ts(OMX_TICKS ts); 588 bool pop_min_ts(OMX_TICKS &ts); 589 bool reset_ts_list(); 590 }; 591 #endif 592 593 struct desc_buffer_hdr 594 { 595 OMX_U8 *buf_addr; 596 OMX_U32 desc_data_size; 597 }; 598 bool allocate_done(void); 599 bool allocate_input_done(void); 600 bool allocate_output_done(void); 601 602 OMX_ERRORTYPE free_input_buffer(OMX_BUFFERHEADERTYPE *bufferHdr); 603 OMX_ERRORTYPE free_input_buffer(unsigned int bufferindex, 604 OMX_BUFFERHEADERTYPE *pmem_bufferHdr); 605 OMX_ERRORTYPE free_output_buffer(OMX_BUFFERHEADERTYPE *bufferHdr); 606 void free_output_buffer_header(); 607 void free_input_buffer_header(); 608 609 OMX_ERRORTYPE allocate_input_heap_buffer(OMX_HANDLETYPE hComp, 610 OMX_BUFFERHEADERTYPE **bufferHdr, 611 OMX_U32 port, 612 OMX_PTR appData, 613 OMX_U32 bytes); 614 615 616 OMX_ERRORTYPE allocate_input_buffer(OMX_HANDLETYPE hComp, 617 OMX_BUFFERHEADERTYPE **bufferHdr, 618 OMX_U32 port, 619 OMX_PTR appData, 620 OMX_U32 bytes); 621 622 OMX_ERRORTYPE allocate_output_buffer(OMX_HANDLETYPE hComp, 623 OMX_BUFFERHEADERTYPE **bufferHdr, 624 OMX_U32 port,OMX_PTR appData, 625 OMX_U32 bytes); 626 OMX_ERRORTYPE use_output_buffer(OMX_HANDLETYPE hComp, 627 OMX_BUFFERHEADERTYPE **bufferHdr, 628 OMX_U32 port, 629 OMX_PTR appData, 630 OMX_U32 bytes, 631 OMX_U8 *buffer); 632 #ifdef MAX_RES_720P 633 OMX_ERRORTYPE get_supported_profile_level_for_720p(OMX_VIDEO_PARAM_PROFILELEVELTYPE *profileLevelType); 634 #endif 635 #ifdef MAX_RES_1080P 636 OMX_ERRORTYPE get_supported_profile_level_for_1080p(OMX_VIDEO_PARAM_PROFILELEVELTYPE *profileLevelType); 637 #endif 638 639 OMX_ERRORTYPE allocate_desc_buffer(OMX_U32 index); 640 OMX_ERRORTYPE allocate_output_headers(); 641 bool execute_omx_flush(OMX_U32); 642 bool execute_output_flush(); 643 bool execute_input_flush(); 644 bool execute_input_flush_swvdec(); 645 bool execute_output_flush_dsp(); 646 647 OMX_ERRORTYPE empty_buffer_done(OMX_HANDLETYPE hComp, 648 OMX_BUFFERHEADERTYPE * buffer); 649 650 OMX_ERRORTYPE fill_buffer_done(OMX_HANDLETYPE hComp, 651 OMX_BUFFERHEADERTYPE * buffer); 652 OMX_ERRORTYPE empty_this_buffer_proxy(OMX_HANDLETYPE hComp, 653 OMX_BUFFERHEADERTYPE *buffer); 654 655 OMX_ERRORTYPE empty_this_buffer_proxy_arbitrary(OMX_HANDLETYPE hComp, 656 OMX_BUFFERHEADERTYPE *buffer 657 ); 658 659 OMX_ERRORTYPE push_input_buffer (OMX_HANDLETYPE hComp); 660 OMX_ERRORTYPE push_input_hevc (OMX_HANDLETYPE hComp); 661 662 OMX_ERRORTYPE fill_this_buffer_proxy(OMX_HANDLETYPE hComp, 663 OMX_BUFFERHEADERTYPE *buffer); 664 665 OMX_ERRORTYPE empty_this_buffer_proxy_swvdec(OMX_IN OMX_HANDLETYPE hComp, 666 OMX_IN OMX_BUFFERHEADERTYPE* buffer); 667 668 OMX_ERRORTYPE empty_buffer_done_swvdec(OMX_HANDLETYPE hComp, 669 OMX_BUFFERHEADERTYPE* buffer); 670 671 OMX_ERRORTYPE fill_all_buffers_proxy_dsp(OMX_HANDLETYPE hComp); 672 673 OMX_ERRORTYPE fill_this_buffer_proxy_dsp( 674 OMX_IN OMX_HANDLETYPE hComp, 675 OMX_IN OMX_BUFFERHEADERTYPE* bufferAdd); 676 677 OMX_ERRORTYPE fill_buffer_done_dsp(OMX_HANDLETYPE hComp, 678 OMX_BUFFERHEADERTYPE * buffer); 679 680 681 OMX_ERRORTYPE fill_this_buffer_proxy_swvdec( 682 OMX_IN OMX_HANDLETYPE hComp, 683 OMX_IN OMX_BUFFERHEADERTYPE* bufferAdd); 684 685 // OMX_ERRORTYPE allocate_intermediate_buffer(OMX_HANDLETYPE, OMX_PTR, OMX_U32); 686 OMX_ERRORTYPE allocate_interm_buffer(OMX_IN OMX_U32 bytes); 687 688 OMX_ERRORTYPE free_interm_buffers(); 689 690 bool release_done(); 691 692 bool release_output_done(); 693 bool release_input_done(); 694 bool release_interm_done(); 695 696 OMX_ERRORTYPE get_buffer_req(vdec_allocatorproperty *buffer_prop); 697 OMX_ERRORTYPE get_buffer_req_swvdec(); 698 OMX_ERRORTYPE set_buffer_req(vdec_allocatorproperty *buffer_prop); 699 OMX_ERRORTYPE set_buffer_req_swvdec(vdec_allocatorproperty *buffer_prop); 700 701 OMX_ERRORTYPE start_port_reconfig(); 702 OMX_ERRORTYPE update_picture_resolution(); 703 int stream_off(OMX_U32 port); 704 void adjust_timestamp(OMX_S64 &act_timestamp); 705 void set_frame_rate(OMX_S64 act_timestamp); 706 void handle_extradata_secure(OMX_BUFFERHEADERTYPE *p_buf_hdr); 707 void handle_extradata(OMX_BUFFERHEADERTYPE *p_buf_hdr); 708 void print_debug_extradata(OMX_OTHER_EXTRADATATYPE *extra); 709 #ifdef _MSM8974_ 710 void append_interlace_extradata(OMX_OTHER_EXTRADATATYPE *extra, 711 OMX_U32 interlaced_format_type); 712 OMX_ERRORTYPE enable_extradata(OMX_U32 requested_extradata, bool is_internal, 713 bool enable = true); 714 void append_frame_info_extradata(OMX_OTHER_EXTRADATATYPE *extra, 715 OMX_U32 num_conceal_mb, 716 OMX_U32 picture_type, 717 OMX_U32 frame_rate, 718 struct msm_vidc_panscan_window_payload *panscan_payload, 719 struct vdec_aspectratioinfo *aspect_ratio_info); 720 #else 721 void append_interlace_extradata(OMX_OTHER_EXTRADATATYPE *extra, 722 OMX_U32 interlaced_format_type, OMX_U32 buf_index); 723 OMX_ERRORTYPE enable_extradata(OMX_U32 requested_extradata, bool enable = true); 724 #endif 725 void append_frame_info_extradata(OMX_OTHER_EXTRADATATYPE *extra, 726 OMX_U32 num_conceal_mb, 727 OMX_U32 picture_type, 728 OMX_S64 timestamp, 729 OMX_U32 frame_rate, 730 struct vdec_aspectratioinfo *aspect_ratio_info); 731 void fill_aspect_ratio_info(struct vdec_aspectratioinfo *aspect_ratio_info, 732 OMX_QCOM_EXTRADATA_FRAMEINFO *frame_info); 733 void append_terminator_extradata(OMX_OTHER_EXTRADATATYPE *extra); 734 OMX_ERRORTYPE update_portdef(OMX_PARAM_PORTDEFINITIONTYPE *portDefn); 735 void append_portdef_extradata(OMX_OTHER_EXTRADATATYPE *extra); 736 void append_extn_extradata(OMX_OTHER_EXTRADATATYPE *extra, OMX_OTHER_EXTRADATATYPE *p_extn); 737 void append_user_extradata(OMX_OTHER_EXTRADATATYPE *extra, OMX_OTHER_EXTRADATATYPE *p_user); 738 void insert_demux_addr_offset(OMX_U32 address_offset); 739 void extract_demux_addr_offsets(OMX_BUFFERHEADERTYPE *buf_hdr); 740 OMX_ERRORTYPE handle_demux_data(OMX_BUFFERHEADERTYPE *buf_hdr); 741 OMX_U32 count_MB_in_extradata(OMX_OTHER_EXTRADATATYPE *extra); 742 743 bool align_pmem_buffers(int pmem_fd, OMX_U32 buffer_size, 744 OMX_U32 alignment); 745 #ifdef USE_ION 746 int alloc_map_ion_memory(OMX_U32 buffer_size, 747 OMX_U32 alignment, struct ion_allocation_data *alloc_data, 748 struct ion_fd_data *fd_data,int flag, int heap_id = 0); 749 void free_ion_memory(struct vdec_ion *buf_ion_info); 750 #endif 751 752 753 OMX_ERRORTYPE send_command_proxy(OMX_HANDLETYPE hComp, 754 OMX_COMMANDTYPE cmd, 755 OMX_U32 param1, 756 OMX_PTR cmdData); 757 bool post_event( unsigned long p1, 758 unsigned long p2, 759 unsigned long id 760 ); clip2(int x)761 inline int clip2(int x) 762 { 763 x = x -1; 764 x = x | x >> 1; 765 x = x | x >> 2; 766 x = x | x >> 4; 767 x = x | x >> 16; 768 x = x + 1; 769 return x; 770 } 771 772 #ifdef MAX_RES_1080P 773 OMX_ERRORTYPE vdec_alloc_h264_mv(); 774 void vdec_dealloc_h264_mv(); 775 OMX_ERRORTYPE vdec_alloc_meta_buffers(); 776 void vdec_dealloc_meta_buffers(); 777 #endif 778 omx_report_error()779 inline void omx_report_error () 780 { 781 if (m_cb.EventHandler && !m_error_propogated) 782 { 783 DEBUG_PRINT_ERROR("\nERROR: Sending OMX_EventError to Client"); 784 m_error_propogated = true; 785 m_cb.EventHandler(&m_cmp,m_app_data, 786 OMX_EventError,OMX_ErrorHardware,0,NULL); 787 } 788 } 789 omx_report_unsupported_setting()790 inline void omx_report_unsupported_setting () 791 { 792 if (m_cb.EventHandler && !m_error_propogated) 793 { 794 DEBUG_PRINT_ERROR("ERROR: Sending OMX_ErrorUnsupportedSetting to Client"); 795 m_error_propogated = true; 796 m_cb.EventHandler(&m_cmp,m_app_data, 797 OMX_EventError,OMX_ErrorUnsupportedSetting,0,NULL); 798 } 799 } 800 #if defined (_ANDROID_HONEYCOMB_) || defined (_ANDROID_ICS_) 801 OMX_ERRORTYPE use_android_native_buffer(OMX_IN OMX_HANDLETYPE hComp, OMX_PTR data); 802 #endif 803 #if defined (_ANDROID_ICS_) 804 struct nativebuffer{ 805 native_handle_t *nativehandle; 806 private_handle_t *privatehandle; 807 int inuse; 808 }; 809 nativebuffer native_buffer[MAX_NUM_INPUT_OUTPUT_BUFFERS]; 810 #endif 811 812 813 //************************************************************* 814 //*******************MEMBER VARIABLES ************************* 815 //************************************************************* 816 pthread_mutex_t m_lock; 817 pthread_mutex_t c_lock; 818 //sem to handle the minimum procesing of commands 819 sem_t m_cmd_lock; 820 bool m_error_propogated; 821 // compression format 822 OMX_VIDEO_CODINGTYPE eCompressionFormat; 823 // OMX State 824 OMX_STATETYPE m_state; 825 // Application data 826 OMX_PTR m_app_data; 827 // Application callbacks 828 OMX_CALLBACKTYPE m_cb; 829 OMX_PRIORITYMGMTTYPE m_priority_mgm ; 830 OMX_PARAM_BUFFERSUPPLIERTYPE m_buffer_supplier; 831 // fill this buffer queue 832 omx_cmd_queue m_ftb_q; 833 // Command Q for rest of the events 834 omx_cmd_queue m_cmd_q; 835 omx_cmd_queue m_etb_q; 836 837 omx_cmd_queue m_ftb_q_dsp; // ftb for dsp 838 omx_cmd_queue m_etb_q_swvdec; // etbs for swvdec 839 840 // Input memory pointer 841 OMX_BUFFERHEADERTYPE *m_inp_mem_ptr; 842 // Output memory pointer 843 OMX_BUFFERHEADERTYPE *m_out_mem_ptr; 844 // number of input bitstream error frame count 845 unsigned int m_inp_err_count; 846 #ifdef _ANDROID_ 847 // Timestamp list 848 ts_arr_list m_timestamp_list; 849 #endif 850 851 bool input_flush_progress; 852 bool output_flush_progress; 853 bool input_use_buffer; 854 bool output_use_buffer; 855 bool ouput_egl_buffers; 856 OMX_BOOL m_use_output_pmem; 857 OMX_BOOL m_out_mem_region_smi; 858 OMX_BOOL m_out_pvt_entry_pmem; 859 860 int pending_input_buffers; 861 int pending_output_buffers; 862 // bitmask array size for output side 863 unsigned int m_out_bm_count; 864 // bitmask array size for input side 865 unsigned int m_inp_bm_count; 866 //Input port Populated 867 OMX_BOOL m_inp_bPopulated; 868 //Output port Populated 869 OMX_BOOL m_out_bPopulated; 870 // encapsulate the waiting states. 871 unsigned int m_flags; 872 873 #ifdef _ANDROID_ 874 // Heap pointer to frame buffers 875 struct vidc_heap 876 { 877 sp<MemoryHeapBase> video_heap_ptr; 878 }; 879 struct vidc_heap *m_heap_ptr; 880 unsigned int m_heap_count; 881 #endif //_ANDROID_ 882 // store I/P PORT state 883 OMX_BOOL m_inp_bEnabled; 884 // store O/P PORT state 885 OMX_BOOL m_out_bEnabled; 886 OMX_U32 m_in_alloc_cnt; 887 OMX_U8 m_cRole[OMX_MAX_STRINGNAME_SIZE]; 888 // Platform specific details 889 OMX_QCOM_PLATFORM_PRIVATE_LIST *m_platform_list; 890 OMX_QCOM_PLATFORM_PRIVATE_ENTRY *m_platform_entry; 891 OMX_QCOM_PLATFORM_PRIVATE_PMEM_INFO *m_pmem_info; 892 893 // for soft ARM codec 894 SWVDEC_INITPARAMS sSwVdecParameter; 895 SWVDEC_HANDLE m_pSwVdec; 896 SWVDEC_CALLBACK m_callBackInfo; 897 SWVDEC_IPBUFFER *m_pSwVdecIpBuffer; 898 SWVDEC_OPBUFFER *m_pSwVdecOpBuffer; 899 OMX_U32 m_nInputBuffer; 900 OMX_U32 m_nOutputBuffer; 901 902 interm_buffer_state m_interm_buf_state[32]; 903 OMX_BUFFERHEADERTYPE* m_interm_mem_ptr; 904 bool m_interm_flush_dsp_progress; 905 bool m_interm_flush_swvdec_progress; 906 OMX_BOOL m_interm_bPopulated; 907 OMX_BOOL m_interm_bEnabled; 908 int m_swvdec_mode; 909 OMX_BOOL m_fill_internal_bufers; 910 911 // SPS+PPS sent as part of set_config 912 OMX_VENDOR_EXTRADATATYPE m_vendor_config; 913 914 /*Variables for arbitrary Byte parsing support*/ 915 frame_parse m_frame_parser; 916 omx_cmd_queue m_input_pending_q; 917 omx_cmd_queue m_input_free_q; 918 bool arbitrary_bytes; 919 OMX_BUFFERHEADERTYPE h264_scratch; 920 OMX_BUFFERHEADERTYPE *psource_frame; 921 OMX_BUFFERHEADERTYPE *pdest_frame; 922 OMX_BUFFERHEADERTYPE *m_inp_heap_ptr; 923 OMX_BUFFERHEADERTYPE **m_phdr_pmem_ptr; 924 unsigned int m_heap_inp_bm_count; 925 codec_type codec_type_parse; 926 bool first_frame_meta; 927 unsigned frame_count; 928 unsigned nal_count; 929 unsigned nal_length; 930 bool look_ahead_nal; 931 int first_frame; 932 unsigned char *first_buffer; 933 int first_frame_size; 934 unsigned char m_hwdevice_name[80]; 935 FILE *m_device_file_ptr; 936 enum vc1_profile_type m_vc1_profile; 937 OMX_S64 h264_last_au_ts; 938 OMX_U32 h264_last_au_flags; 939 OMX_U32 m_demux_offsets[8192]; 940 OMX_U32 m_demux_entries; 941 OMX_U32 m_disp_hor_size; 942 OMX_U32 m_disp_vert_size; 943 944 OMX_S64 prev_ts; 945 bool rst_prev_ts; 946 OMX_U32 frm_int; 947 948 struct vdec_allocatorproperty op_buf_rcnfg; 949 bool in_reconfig; 950 OMX_NATIVE_WINDOWTYPE m_display_id; 951 h264_stream_parser *h264_parser; 952 OMX_U32 client_extradata; 953 #ifdef _ANDROID_ 954 bool m_debug_timestamp; 955 bool perf_flag; 956 OMX_U32 proc_frms, latency; 957 perf_metrics fps_metrics; 958 perf_metrics dec_time; 959 bool m_enable_android_native_buffers; 960 bool m_use_android_native_buffers; 961 bool m_debug_extradata; 962 bool m_debug_concealedmb; 963 bool m_disable_dynamic_buf_mode; 964 #endif 965 #ifdef MAX_RES_1080P 966 MP4_Utils mp4_headerparser; 967 #endif 968 969 struct h264_mv_buffer{ 970 unsigned char* buffer; 971 int size; 972 int count; 973 int pmem_fd; 974 int offset; 975 }; 976 h264_mv_buffer h264_mv_buff; 977 978 struct meta_buffer{ 979 unsigned char* buffer; 980 int size; 981 int count; 982 int pmem_fd; 983 int pmem_fd_iommu; 984 int offset; 985 }; 986 meta_buffer meta_buff; 987 extra_data_handler extra_data_handle; 988 OMX_PARAM_PORTDEFINITIONTYPE m_port_def; 989 omx_time_stamp_reorder time_stamp_dts; 990 desc_buffer_hdr *m_desc_buffer_ptr; 991 bool secure_mode; 992 bool external_meta_buffer; 993 bool external_meta_buffer_iommu; 994 OMX_QCOM_EXTRADATA_FRAMEINFO *m_extradata; 995 bool codec_config_flag; 996 #ifdef _MSM8974_ 997 int capture_capability; 998 int output_capability; 999 bool streaming[MAX_PORT]; 1000 OMX_CONFIG_RECTTYPE rectangle; 1001 int prev_n_filled_len; 1002 #endif 1003 bool m_power_hinted; 1004 OMX_ERRORTYPE power_module_register(); 1005 OMX_ERRORTYPE power_module_deregister(); 1006 bool msg_thread_created; 1007 bool async_thread_created; 1008 1009 bool dynamic_buf_mode; 1010 struct dynamic_buf_list *out_dynamic_list; 1011 1012 bool m_smoothstreaming_mode; 1013 OMX_U32 m_smoothstreaming_width; 1014 OMX_U32 m_smoothstreaming_height; 1015 OMX_ERRORTYPE enable_smoothstreaming(); 1016 1017 unsigned int m_fill_output_msg; 1018 class allocate_color_convert_buf { 1019 public: 1020 allocate_color_convert_buf(); 1021 ~allocate_color_convert_buf(); 1022 void set_vdec_client(void *); 1023 void update_client(); 1024 bool set_color_format(OMX_COLOR_FORMATTYPE dest_color_format); 1025 bool get_color_format(OMX_COLOR_FORMATTYPE &dest_color_format); 1026 bool update_buffer_req(); 1027 bool get_buffer_req(unsigned int &buffer_size); 1028 OMX_BUFFERHEADERTYPE* get_il_buf_hdr(); 1029 OMX_BUFFERHEADERTYPE* get_il_buf_hdr(OMX_BUFFERHEADERTYPE *input_hdr); 1030 OMX_BUFFERHEADERTYPE* get_dr_buf_hdr(OMX_BUFFERHEADERTYPE *input_hdr); 1031 OMX_BUFFERHEADERTYPE* convert(OMX_BUFFERHEADERTYPE *header); 1032 OMX_BUFFERHEADERTYPE* queue_buffer(OMX_BUFFERHEADERTYPE *header); 1033 OMX_ERRORTYPE allocate_buffers_color_convert(OMX_HANDLETYPE hComp, 1034 OMX_BUFFERHEADERTYPE **bufferHdr,OMX_U32 port,OMX_PTR appData, 1035 OMX_U32 bytes); 1036 OMX_ERRORTYPE free_output_buffer(OMX_BUFFERHEADERTYPE *bufferHdr); 1037 private: 1038 #define MAX_COUNT 32 1039 omx_vdec *omx; 1040 bool enabled; 1041 OMX_COLOR_FORMATTYPE ColorFormat; 1042 void init_members(); 1043 bool color_convert_mode; 1044 ColorConvertFormat dest_format; 1045 class omx_c2d_conv c2d; 1046 unsigned int allocated_count; 1047 unsigned int buffer_size_req; 1048 unsigned int buffer_alignment_req; 1049 OMX_QCOM_PLATFORM_PRIVATE_LIST m_platform_list_client[MAX_COUNT]; 1050 OMX_QCOM_PLATFORM_PRIVATE_ENTRY m_platform_entry_client[MAX_COUNT]; 1051 OMX_QCOM_PLATFORM_PRIVATE_PMEM_INFO m_pmem_info_client[MAX_COUNT]; 1052 OMX_BUFFERHEADERTYPE m_out_mem_ptr_client[MAX_COUNT]; 1053 #ifdef USE_ION 1054 struct vdec_ion op_buf_ion_info[MAX_COUNT]; 1055 #endif 1056 unsigned char *pmem_baseaddress[MAX_COUNT]; 1057 int pmem_fd[MAX_COUNT]; 1058 struct vidc_heap 1059 { 1060 sp<MemoryHeapBase> video_heap_ptr; 1061 }; 1062 struct vidc_heap m_heap_ptr[MAX_COUNT]; 1063 }; 1064 #if defined (_MSM8960_) || defined (_MSM8974_) 1065 allocate_color_convert_buf client_buffers; 1066 #endif 1067 HEVC_Utils mHEVCutils; 1068 struct video_decoder_capability m_decoder_capability; 1069 struct debug_cap m_debug; 1070 int log_input_buffers(const char *, int); 1071 int log_output_buffers(OMX_BUFFERHEADERTYPE *); 1072 int log_im_buffer(OMX_BUFFERHEADERTYPE * buffer); 1073 }; 1074 1075 #ifdef _MSM8974_ 1076 enum instance_state { 1077 MSM_VIDC_CORE_UNINIT_DONE = 0x0001, 1078 MSM_VIDC_CORE_INIT, 1079 MSM_VIDC_CORE_INIT_DONE, 1080 MSM_VIDC_OPEN, 1081 MSM_VIDC_OPEN_DONE, 1082 MSM_VIDC_LOAD_RESOURCES, 1083 MSM_VIDC_LOAD_RESOURCES_DONE, 1084 MSM_VIDC_START, 1085 MSM_VIDC_START_DONE, 1086 MSM_VIDC_STOP, 1087 MSM_VIDC_STOP_DONE, 1088 MSM_VIDC_RELEASE_RESOURCES, 1089 MSM_VIDC_RELEASE_RESOURCES_DONE, 1090 MSM_VIDC_CLOSE, 1091 MSM_VIDC_CLOSE_DONE, 1092 MSM_VIDC_CORE_UNINIT, 1093 }; 1094 1095 enum vidc_resposes_id { 1096 MSM_VIDC_DECODER_FLUSH_DONE = 0x11, 1097 MSM_VIDC_DECODER_EVENT_CHANGE, 1098 }; 1099 1100 #endif // _MSM8974_ 1101 1102 #endif // __OMX_VDEC_H__ 1103