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/external/llvm/test/MC/AArch64/
Dbasic-a64-diagnostics.s2 // RUN: FileCheck --check-prefix=CHECK-ERROR --check-prefix=CHECK-ERROR-ARM64 < %t %s
12 // CHECK-ERROR: error: expected 'sxtx' 'uxtx' or 'lsl' with optional integer in range [0, 4]
13 // CHECK-ERROR: add x2, x3, x5, sxtb
14 // CHECK-ERROR: ^
15 // CHECK-ERROR: error: expected '[su]xt[bhw]' or 'lsl' with optional integer in range [0, 4]
16 // CHECK-ERROR: add x2, x4, w2, uxtx
17 // CHECK-ERROR: ^
18 // CHECK-ERROR: error: expected compatible register, symbol or integer in range [0, 4095]
19 // CHECK-ERROR: add w5, w7, x9, sxtx
20 // CHECK-ERROR: ^
[all …]
Dneon-diagnostics.s2 // RUN: FileCheck --check-prefix=CHECK-ERROR < %t %s
12 // CHECK-ERROR: error: invalid operand for instruction
13 // CHECK-ERROR: add v0.16b, v1.8b, v2.8b
14 // CHECK-ERROR: ^
15 // CHECK-ERROR: error: invalid operand for instruction
16 // CHECK-ERROR: sub v0.2d, v1.2d, v2.2s
17 // CHECK-ERROR: ^
28 // CHECK-ERROR: error: invalid operand for instruction
29 // CHECK-ERROR: fadd v0.2d, v1.2s, v2.2s
30 // CHECK-ERROR: ^
[all …]
Darmv8.1a-rdma.s2 // RUN: FileCheck --check-prefix=CHECK-ERROR < %t %s
29 // CHECK-ERROR: error: invalid operand for instruction
30 // CHECK-ERROR: sqrdmlah v0.2h, v1.2h, v2.2h
31 // CHECK-ERROR: ^
32 // CHECK-ERROR: error: invalid operand for instruction
33 // CHECK-ERROR: sqrdmlsh v0.2h, v1.2h, v2.2h
34 // CHECK-ERROR: ^
35 // CHECK-ERROR: error: invalid vector kind qualifier
36 // CHECK-ERROR: sqrdmlah v0.8s, v1.8s, v2.8s
37 // CHECK-ERROR: ^
[all …]
/external/libcxx/test/std/input.output/file.streams/c.files/
Dcinttypes.pass.cpp16 #error INT8_MIN not defined
20 #error INT16_MIN not defined
24 #error INT32_MIN not defined
28 #error INT64_MIN not defined
32 #error INT8_MAX not defined
36 #error INT16_MAX not defined
40 #error INT32_MAX not defined
44 #error INT64_MAX not defined
48 #error UINT8_MAX not defined
52 #error UINT16_MAX not defined
[all …]
/external/doclava/src/com/google/doclava/
DErrors.java28 Error error; field in Errors.ErrorMessage
32 ErrorMessage(Error e, SourcePositionInfo p, String m) { in ErrorMessage()
33 error = e; in ErrorMessage()
51 public Error error() { in error() method in Errors.ErrorMessage
52 return error; in error()
56 public static void error(Error error, SourcePositionInfo where, String text) { in error() method in Errors
57 if (error.level == HIDDEN) { in error()
61 int level = (!warningsAreErrors && error.level == WARNING) ? WARNING : ERROR; in error()
62 String which = level == WARNING ? " warning " : " error "; in error()
63 String message = which + error.code + ": " + text; in error()
[all …]
/external/libcxx/test/std/depr/depr.c.headers/
Dinttypes_h.pass.cpp16 #error PRId8 not defined
20 #error PRId16 not defined
24 #error PRId32 not defined
28 #error PRId64 not defined
32 #error PRIdLEAST8 not defined
36 #error PRIdLEAST16 not defined
40 #error PRIdLEAST32 not defined
44 #error PRIdLEAST64 not defined
48 #error PRIdFAST8 not defined
52 #error PRIdFAST16 not defined
[all …]
/external/llvm/test/MC/SystemZ/
Dinsn-bad.s5 #CHECK: error: invalid operand
7 #CHECK: error: invalid operand
13 #CHECK: error: invalid operand
15 #CHECK: error: invalid operand
21 #CHECK: error: invalid operand
23 #CHECK: error: invalid operand
29 #CHECK: error: invalid operand
31 #CHECK: error: invalid operand
37 #CHECK: error: invalid operand
39 #CHECK: error: invalid operand
[all …]
Dinsn-bad-z13.s5 #CHECK: error: invalid operand
7 #CHECK: error: invalid operand
9 #CHECK: error: invalid operand
11 #CHECK: error: invalid operand
13 #CHECK: error: invalid use of vector addressing
22 #CHECK: error: invalid operand
24 #CHECK: error: invalid operand
26 #CHECK: error: invalid operand
28 #CHECK: error: invalid operand
36 #CHECK: error: invalid operand
[all …]
Dinsn-bad-z196.s5 #CHECK: error: invalid operand
7 #CHECK: error: invalid operand
9 #CHECK: error: invalid operand
16 #CHECK: error: invalid operand
18 #CHECK: error: invalid operand
20 #CHECK: error: invalid operand
27 #CHECK: error: invalid operand
29 #CHECK: error: invalid operand
35 #CHECK: error: invalid operand
37 #CHECK: error: invalid operand
[all …]
Dinsn-bad-zEC12.s5 #CHECK: error: {{(instruction requires: vector)?}}
10 #CHECK: error: invalid operand
12 #CHECK: error: invalid operand
18 #CHECK: error: invalid operand
20 #CHECK: error: invalid operand
26 #CHECK: error: invalid operand
28 #CHECK: error: invalid operand
30 #CHECK: error: invalid operand
32 #CHECK: error: invalid operand
34 #CHECK: error: invalid operand
[all …]
Dregs-bad.s6 #CHECK: error: invalid operand for instruction
8 #CHECK: error: invalid operand for instruction
10 #CHECK: error: invalid operand for instruction
12 #CHECK: error: invalid operand for instruction
14 #CHECK: error: invalid operand for instruction
16 #CHECK: error: invalid operand for instruction
28 #CHECK: error: invalid operand for instruction
30 #CHECK: error: invalid operand for instruction
32 #CHECK: error: invalid operand for instruction
34 #CHECK: error: invalid operand for instruction
[all …]
/external/valgrind/memcheck/tests/
Derr_disable4.stderr.exp4 WARNING: exiting thread has error reporting disabled.
7 WARNING: exiting thread has error reporting disabled.
10 WARNING: exiting thread has error reporting disabled.
13 WARNING: exiting thread has error reporting disabled.
16 WARNING: exiting thread has error reporting disabled.
19 WARNING: exiting thread has error reporting disabled.
22 WARNING: exiting thread has error reporting disabled.
25 WARNING: exiting thread has error reporting disabled.
28 WARNING: exiting thread has error reporting disabled.
31 WARNING: exiting thread has error reporting disabled.
[all …]
/external/llvm/test/MC/ARM/
Dfullfp16-neon-neg.s8 @ CHECK: error: instruction requires:
9 @ CHECK: error: instruction requires:
13 @ CHECK: error: instruction requires:
14 @ CHECK: error: instruction requires:
18 @ CHECK: error: instruction requires:
19 @ CHECK: error: instruction requires:
23 @ CHECK: error: instruction requires:
24 @ CHECK: error: instruction requires:
28 @ CHECK: error: instruction requires:
29 @ CHECK: error: instruction requires:
[all …]
Ddirective-arch_extension-fp.s13 @ CHECK-V7: error: architectural extension 'fp' is not allowed for the current base architecture
20 @ CHECK-V7: error: instruction requires: FPARMv8
23 @ CHECK-V7: error: instruction requires: FPARMv8
25 @ CHECK-V7: error: instruction requires: FPARMv8
27 @ CHECK-V7: error: instruction requires: FPARMv8
29 @ CHECK-V7: error: instruction requires: FPARMv8
31 @ CHECK-V7: error: instruction requires: FPARMv8
33 @ CHECK-V7: error: instruction requires: FPARMv8
36 @ CHECK-V7: error: instruction requires: FPARMv8
38 @ CHECK-V7: error: instruction requires: FPARMv8
[all …]
Ddirective-arch_extension-simd.s13 @ CHECK-V7: error: architectural extension 'simd' is not allowed for the current base architecture
20 @ CHECK-V7: error: instruction requires: FPARMv8
22 @ CHECK-V7: error: instruction requires: FPARMv8
25 @ CHECK-V7: error: instruction requires: FPARMv8
27 @ CHECK-V7: error: instruction requires: FPARMv8
30 @ CHECK-V7: error: instruction requires: FPARMv8
32 @ CHECK-V7: error: instruction requires: FPARMv8
34 @ CHECK-V7: error: instruction requires: FPARMv8
36 @ CHECK-V7: error: instruction requires: FPARMv8
38 @ CHECK-V7: error: instruction requires: FPARMv8
[all …]
Ddiagnostics.s10 @ CHECK-ERRORS: error: instruction 'mls' can not set flags,
25 @ CHECK-ERRORS: error: invalid immediate shift value
28 @ CHECK-ERRORS: error: immediate shift value out of range
31 @ CHECK-ERRORS: error: immediate shift value out of range
34 @ CHECK-ERRORS: error: immediate shift value out of range
37 @ CHECK-ERRORS: error: immediate shift value out of range
40 @ CHECK-ERRORS: error: immediate shift value out of range
43 @ CHECK-ERRORS: error: immediate shift value out of range
46 @ CHECK-ERRORS: error: immediate shift value out of range
49 @ CHECK-ERRORS: error: immediate shift value out of range
[all …]
/external/dbus/dbus/
Ddbus-errors.c2 /* dbus-errors.c Error reporting
34 * @defgroup DBusErrorInternals Error reporting internals
36 * @brief Error reporting internals
47 * DBusError error = DBUS_ERROR_INIT;
49 * do_things_with (&error);
55 * DBusError error;
57 * dbus_error_init (&error);
58 * do_things_with (&error);
67 char *name; /**< error name */
68 char *message; /**< error message */
[all …]
/external/libcxx/test/std/diagnostics/errno/
Dcerrno.pass.cpp16 #error _LIBCPP_VERSION not defined
20 #error E2BIG not defined
24 #error EACCES not defined
28 #error EACCES not defined
32 #error EADDRINUSE not defined
36 #error EADDRNOTAVAIL not defined
40 #error EAFNOSUPPORT not defined
44 #error EAGAIN not defined
48 #error EALREADY not defined
52 #error EBADF not defined
[all …]
/external/llvm/test/MC/Mips/
Dmips-bad-branches.s3 # CHECK: error: branch to misaligned address
5 # CHECK: error: branch to misaligned address
7 # CHECK: error: branch to misaligned address
9 # CHECK: error: branch target out of range
11 # CHECK: error: branch to misaligned address
13 # CHECK: error: branch to misaligned address
15 # CHECK: error: branch to misaligned address
17 # CHECK: error: branch target out of range
20 # CHECK: error: branch to misaligned address
22 # CHECK: error: branch to misaligned address
[all …]
Dtarget-soft-float.s12 # 64: :[[@LINE-1]]:3: error: instruction requires a CPU feature not currently enabled
14 # 64: :[[@LINE-1]]:3: error: instruction requires a CPU feature not currently enabled
17 # R2: :[[@LINE-1]]:3: error: instruction requires a CPU feature not currently enabled
19 # R2: :[[@LINE-1]]:3: error: instruction requires a CPU feature not currently enabled
21 # R2: :[[@LINE-1]]:3: error: instruction requires a CPU feature not currently enabled
23 # R2: :[[@LINE-1]]:3: error: instruction requires a CPU feature not currently enabled
25 # R2: :[[@LINE-1]]:3: error: instruction requires a CPU feature not currently enabled
27 # R2: :[[@LINE-1]]:3: error: instruction requires a CPU feature not currently enabled
29 # R2: :[[@LINE-1]]:3: error: instruction requires a CPU feature not currently enabled
31 # R2: :[[@LINE-1]]:3: error: instruction requires a CPU feature not currently enabled
[all …]
/external/clang/include/clang/Basic/
DDiagnosticParseKinds.td22 def err_asm_empty : Error<"__asm used with no assembly instructions">;
23 def err_inline_ms_asm_parsing : Error<"%0">;
24 def err_msasm_unsupported_arch : Error<
26 def err_msasm_unable_to_create_target : Error<
28 def err_gnu_inline_asm_disabled : Error<
64 def error_empty_enum : Error<"use of empty enum">;
81 def err_enumerator_list_missing_comma : Error<
83 def err_enumerator_unnamed_no_def : Error<
109 def err_duplicate_default_assoc : Error<
119 def err_c11_noreturn_misplaced : Error<
[all …]
DDiagnosticSemaKinds.td79 def err_expr_not_ice : Error<
84 def err_typecheck_converted_constant_expression : Error<
86 def err_typecheck_converted_constant_expression_disallowed : Error<
88 def err_typecheck_converted_constant_expression_indirect : Error<
91 def err_expr_not_cce : Error<
99 def err_ice_not_integral : Error<
102 def err_ice_incomplete_type : Error<
104 def err_ice_explicit_conversion : Error<
108 def err_ice_ambiguous_conversion : Error<
111 def err_ice_too_large : Error<
[all …]
/external/clang/test/CodeGen/
Dbuiltins-systemz-vector-error.c30 __builtin_s390_lcbb(cptr, -1); // expected-error {{argument should be a value from 0 to 15}} in test_core()
31 __builtin_s390_lcbb(cptr, 16); // expected-error {{argument should be a value from 0 to 15}} in test_core()
32 __builtin_s390_lcbb(cptr, len); // expected-error {{must be a constant integer}} in test_core()
34 __builtin_s390_vlbb(cptr, -1); // expected-error {{argument should be a value from 0 to 15}} in test_core()
35 __builtin_s390_vlbb(cptr, 16); // expected-error {{argument should be a value from 0 to 15}} in test_core()
36 __builtin_s390_vlbb(cptr, len); // expected-error {{must be a constant integer}} in test_core()
38 __builtin_s390_vpdi(vul, vul, -1); // expected-error {{argument should be a value from 0 to 15}} in test_core()
39 __builtin_s390_vpdi(vul, vul, 16); // expected-error {{argument should be a value from 0 to 15}} in test_core()
40 __builtin_s390_vpdi(vul, vul, len); // expected-error {{must be a constant integer}} in test_core()
44 …__builtin_s390_verimb(vuc, vuc, vuc, -1); // expected-error {{argument should be a value from 0… in test_integer()
[all …]
/external/llvm/test/MC/Mips/micromips64r6/
Dinvalid.s4 …addiur1sp $7, 260 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of ran…
5 addiur1sp $7, 241 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: misaligned immediate operand value
6 addiur1sp $8, 240 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
7 addiur2 $9, $7, -1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
8 …addiur2 $6, $7, 10 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of ran…
9 …addius5 $7, 9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of ran…
10 …addiusp 1032 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of ran…
11 align $4, $2, $3, -1 # CHECK: :[[@LINE]]:21: error: expected 2-bit unsigned immediate
12 align $4, $2, $3, 4 # CHECK: :[[@LINE]]:21: error: expected 2-bit unsigned immediate
13 beqzc16 $9, 20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
[all …]
/external/e2fsprogs/lib/et/test_cases/
Dheimdal.c18 N_("Kerberos error: byte order unknown"),
22 N_("Reserved krb error (11)"),
23 N_("Reserved krb error (12)"),
24 N_("Reserved krb error (13)"),
25 N_("Reserved krb error (14)"),
26 N_("Reserved krb error (15)"),
27 N_("Reserved krb error (16)"),
28 N_("Reserved krb error (17)"),
29 N_("Reserved krb error (18)"),
30 N_("Reserved krb error (19)"),
[all …]

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