| /external/webrtc/webrtc/modules/audio_processing/ns/ |
| D | windows_private.h | 15 static const float kHanning64w128[128] = {
64 static const float kBlocks80w128[128] = {
65 (float)0.00000000, (float)0.03271908, (float)0.06540313, (float)0.09801714, (float)0.13052619,
66 (float)0.16289547, (float)0.19509032, (float)0.22707626, (float)0.25881905, (float)0.29028468,
67 (float)0.32143947, (float)0.35225005, (float)0.38268343, (float)0.41270703, (float)0.44228869,
68 (float)0.47139674, (float)0.50000000, (float)0.52806785, (float)0.55557023, (float)0.58247770,
69 (float)0.60876143, (float)0.63439328, (float)0.65934582, (float)0.68359230, (float)0.70710678,
70 (float)0.72986407, (float)0.75183981, (float)0.77301045, (float)0.79335334, (float)0.81284668,
71 (float)0.83146961, (float)0.84920218, (float)0.86602540, (float)0.88192126, (float)0.89687274,
72 (float)0.91086382, (float)0.92387953, (float)0.93590593, (float)0.94693013, (float)0.95694034,
[all …]
|
| /external/llvm/test/CodeGen/X86/ |
| D | large-gep-chain.ll | 4 %0 = type { i32, float* }
24 %tmp = getelementptr inbounds float, float* null, i64 1
25 %tmp3 = getelementptr inbounds float, float* %tmp, i64 1
26 %tmp4 = getelementptr inbounds float, float* %tmp3, i64 1
27 %tmp5 = getelementptr inbounds float, float* %tmp4, i64 1
28 %tmp6 = getelementptr inbounds float, float* %tmp5, i64 1
29 %tmp7 = getelementptr inbounds float, float* %tmp6, i64 1
30 %tmp8 = getelementptr inbounds float, float* %tmp7, i64 1
31 %tmp9 = getelementptr inbounds float, float* %tmp8, i64 1
32 %tmp10 = getelementptr inbounds float, float* %tmp9, i64 1
[all …]
|
| D | 2008-07-19-movups-spills.ll | 7 external global <4 x float>, align 1 ; <<4 x float>*>:0 [#uses=2]
8 external global <4 x float>, align 1 ; <<4 x float>*>:1 [#uses=1]
9 external global <4 x float>, align 1 ; <<4 x float>*>:2 [#uses=1]
10 external global <4 x float>, align 1 ; <<4 x float>*>:3 [#uses=1]
11 external global <4 x float>, align 1 ; <<4 x float>*>:4 [#uses=1]
12 external global <4 x float>, align 1 ; <<4 x float>*>:5 [#uses=1]
13 external global <4 x float>, align 1 ; <<4 x float>*>:6 [#uses=1]
14 external global <4 x float>, align 1 ; <<4 x float>*>:7 [#uses=1]
15 external global <4 x float>, align 1 ; <<4 x float>*>:8 [#uses=1]
16 external global <4 x float>, align 1 ; <<4 x float>*>:9 [#uses=1]
[all …]
|
| D | fmul-combines.ll | 5 define float @fmul2_f32(float %x) {
6 %y = fmul float %x, 2.0
7 ret float %y
15 define <4 x float> @fmul2_v4f32(<4 x float> %x) {
16 %y = fmul <4 x float> %x, <float 2.0, float 2.0, float 2.0, float 2.0>
17 ret <4 x float> %y
23 define <4 x float> @constant_fold_fmul_v4f32(<4 x float> %x) {
24 …%y = fmul <4 x float> <float 4.0, float 4.0, float 4.0, float 4.0>, <float 2.0, float 2.0, float 2…
25 ret <4 x float> %y
31 define <4 x float> @fmul0_v4f32(<4 x float> %x) #0 {
[all …]
|
| D | pr24139.ll | 11 %tmp = bitcast <2 x double> %arg to <4 x float>
12 …%tmp3 = fmul <4 x float> %tmp, <float 0x3FE45F3060000000, float 0x3FE45F3060000000, float 0x3FE45F…
16 %tmp7 = bitcast <4 x i32> %tmp6 to <4 x float>
17 %tmp8 = fadd <4 x float> %tmp3, %tmp7
18 %tmp9 = tail call <4 x i32> @llvm.x86.sse2.cvttps2dq(<4 x float> %tmp8) #2
20 %tmp11 = tail call <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32> %tmp9) #2
21 …%tmp12 = fmul <4 x float> %tmp11, <float 0x3FF921FB40000000, float 0x3FF921FB40000000, float 0x3FF…
22 %tmp13 = fsub <4 x float> %tmp, %tmp12
23 …%tmp14 = fmul <4 x float> %tmp11, <float 0x3E74442D00000000, float 0x3E74442D00000000, float 0x3E7…
24 %tmp15 = fsub <4 x float> %tmp13, %tmp14
[all …]
|
| /external/llvm/test/CodeGen/AMDGPU/ |
| D | big_alu.ll | 6 …float> inreg %reg0, <4 x float> inreg %reg1, <4 x float> inreg %reg2, <4 x float> inreg %reg3, <4 …
8 %0 = extractelement <4 x float> %reg0, i32 0
9 %1 = extractelement <4 x float> %reg0, i32 1
10 %2 = extractelement <4 x float> %reg0, i32 2
11 %3 = extractelement <4 x float> %reg0, i32 3
12 %4 = extractelement <4 x float> %reg1, i32 0
13 %5 = extractelement <4 x float> %reg9, i32 0
14 %6 = extractelement <4 x float> %reg8, i32 0
15 %7 = fcmp ugt float %6, 0.000000e+00
16 %8 = select i1 %7, float %4, float %5
[all …]
|
| D | vgpr-spill-emergency-stack-slot-compute.ll | 37 …void @spill_vgpr_compute(<4 x float> %arg6, float addrspace(1)* %arg, i32 %arg1, i32 %arg2, float …
40 %tmp7 = extractelement <4 x float> %arg6, i32 0
41 %tmp8 = extractelement <4 x float> %arg6, i32 1
42 %tmp9 = extractelement <4 x float> %arg6, i32 2
43 %tmp10 = extractelement <4 x float> %arg6, i32 3
44 %tmp11 = bitcast float %arg5 to i32
48 %tmp13 = phi float [ 0.000000e+00, %bb ], [ %tmp338, %bb145 ]
49 %tmp14 = phi float [ 0.000000e+00, %bb ], [ %tmp337, %bb145 ]
50 %tmp15 = phi float [ 0.000000e+00, %bb ], [ %tmp336, %bb145 ]
51 %tmp16 = phi float [ 0.000000e+00, %bb ], [ %tmp339, %bb145 ]
[all …]
|
| D | pv.ll | 6 …float> inreg %reg0, <4 x float> inreg %reg1, <4 x float> inreg %reg2, <4 x float> inreg %reg3, <4 …
8 %0 = extractelement <4 x float> %reg1, i32 0
9 %1 = extractelement <4 x float> %reg1, i32 1
10 %2 = extractelement <4 x float> %reg1, i32 2
11 %3 = extractelement <4 x float> %reg1, i32 3
12 %4 = extractelement <4 x float> %reg2, i32 0
13 %5 = extractelement <4 x float> %reg2, i32 1
14 %6 = extractelement <4 x float> %reg2, i32 2
15 %7 = extractelement <4 x float> %reg2, i32 3
16 %8 = extractelement <4 x float> %reg3, i32 0
[all …]
|
| D | si-spill-cf.ll | 11 %0 = call float @llvm.SI.load.const(<16 x i8> undef, i32 16)
12 %1 = call float @llvm.SI.load.const(<16 x i8> undef, i32 32)
13 %2 = call float @llvm.SI.load.const(<16 x i8> undef, i32 80)
14 %3 = call float @llvm.SI.load.const(<16 x i8> undef, i32 84)
15 %4 = call float @llvm.SI.load.const(<16 x i8> undef, i32 88)
16 %5 = call float @llvm.SI.load.const(<16 x i8> undef, i32 96)
17 %6 = call float @llvm.SI.load.const(<16 x i8> undef, i32 100)
18 %7 = call float @llvm.SI.load.const(<16 x i8> undef, i32 104)
19 %8 = call float @llvm.SI.load.const(<16 x i8> undef, i32 112)
20 %9 = call float @llvm.SI.load.const(<16 x i8> undef, i32 116)
[all …]
|
| D | vgpr-spill-emergency-stack-slot.ll | 30 %tmp12 = call float @llvm.SI.load.const(<16 x i8> %tmp11, i32 0)
31 %tmp13 = call float @llvm.SI.load.const(<16 x i8> %tmp11, i32 16)
32 %tmp14 = call float @llvm.SI.load.const(<16 x i8> %tmp11, i32 32)
36 %tmp18 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %tmp16, i32 0, i32 %tmp17)
37 %tmp19 = extractelement <4 x float> %tmp18, i32 0
38 %tmp20 = extractelement <4 x float> %tmp18, i32 1
39 %tmp21 = extractelement <4 x float> %tmp18, i32 2
40 %tmp22 = extractelement <4 x float> %tmp18, i32 3
41 %tmp23 = bitcast float %tmp14 to i32
45 %tmp25 = phi float [ 0.000000e+00, %bb ], [ %tmp350, %bb157 ]
[all …]
|
| D | si-sgpr-spill.ll | 24 …float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32…
28 %23 = call float @llvm.SI.load.const(<16 x i8> %22, i32 96)
29 %24 = call float @llvm.SI.load.const(<16 x i8> %22, i32 100)
30 %25 = call float @llvm.SI.load.const(<16 x i8> %22, i32 104)
31 %26 = call float @llvm.SI.load.const(<16 x i8> %22, i32 112)
32 %27 = call float @llvm.SI.load.const(<16 x i8> %22, i32 116)
33 %28 = call float @llvm.SI.load.const(<16 x i8> %22, i32 120)
34 %29 = call float @llvm.SI.load.const(<16 x i8> %22, i32 128)
35 %30 = call float @llvm.SI.load.const(<16 x i8> %22, i32 132)
36 %31 = call float @llvm.SI.load.const(<16 x i8> %22, i32 140)
[all …]
|
| /external/llvm/test/CodeGen/Generic/ |
| D | 2003-05-28-ManyArgs.ll | 21 %struct..s_annealing_sched = type { i32, float, float, float, float }
22 %struct..s_chan = type { i32, float, float, float, float }
23 …%struct..s_det_routing_arch = type { i32, float, float, float, i32, i32, i16, i16, i16, float, flo…
24 %struct..s_placer_opts = type { i32, float, i32, i32, i8*, i32, i32 }
25 %struct..s_router_opts = type { float, float, float, float, float, i32, i32, i32, i32 }
26 %struct..s_segment_inf = type { float, i32, i16, i16, float, float, i32, float, float }
27 %struct..s_switch_inf = type { i32, float, float, float, float }
44 … float, float, float, float, float, float, float, float, float, float } ; <{ i32, float, float, f…
50 …2, float, float, float, float, float, float, float, float, float, float }, { i32, float, float, fl…
56 …tr %struct..s_placer_opts, %struct..s_placer_opts* %placer_opts, i64 0, i32 1 ; <float*> [#uses=1]
[all …]
|
| /external/llvm/test/Transforms/InstCombine/ |
| D | minnum.ll | 3 declare float @llvm.minnum.f32(float, float) #0
4 declare float @llvm.minnum.v2f32(<2 x float>, <2 x float>) #0
5 declare <4 x float> @llvm.minnum.v4f32(<4 x float>, <4 x float>) #0
10 declare float @llvm.maxnum.f32(float, float) #0
13 ; CHECK-NEXT: ret float 1.000000e+00
14 define float @constant_fold_minnum_f32() #0 {
15 %x = call float @llvm.minnum.f32(float 1.0, float 2.0) #0
16 ret float %x
20 ; CHECK-NEXT: ret float 1.000000e+00
21 define float @constant_fold_minnum_f32_inv() #0 {
[all …]
|
| D | maxnum.ll | 3 declare float @llvm.maxnum.f32(float, float) #0
4 declare float @llvm.maxnum.v2f32(<2 x float>, <2 x float>) #0
5 declare <4 x float> @llvm.maxnum.v4f32(<4 x float>, <4 x float>) #0
11 ; CHECK-NEXT: ret float 2.000000e+00
12 define float @constant_fold_maxnum_f32() #0 {
13 %x = call float @llvm.maxnum.f32(float 1.0, float 2.0) #0
14 ret float %x
18 ; CHECK-NEXT: ret float 2.000000e+00
19 define float @constant_fold_maxnum_f32_inv() #0 {
20 %x = call float @llvm.maxnum.f32(float 2.0, float 1.0) #0
[all …]
|
| /external/llvm/test/CodeGen/SystemZ/ |
| D | fp-sqrt-01.ll | 5 declare float @llvm.sqrt.f32(float)
6 declare float @sqrtf(float)
9 define float @f1(float %val) {
13 %res = call float @llvm.sqrt.f32(float %val)
14 ret float %res
18 define float @f2(float *%ptr) {
22 %val = load float , float *%ptr
23 %res = call float @llvm.sqrt.f32(float %val)
24 ret float %res
28 define float @f3(float *%base) {
[all …]
|
| D | frame-02.ll | 9 define void @f1(float *%ptr) {
40 %l0 = load volatile float , float *%ptr
41 %l1 = load volatile float , float *%ptr
42 %l2 = load volatile float , float *%ptr
43 %l3 = load volatile float , float *%ptr
44 %l4 = load volatile float , float *%ptr
45 %l5 = load volatile float , float *%ptr
46 %l6 = load volatile float , float *%ptr
47 %l7 = load volatile float , float *%ptr
48 %l8 = load volatile float , float *%ptr
[all …]
|
| /external/deqp/data/gles3/shaders/ |
| D | qualification_order.test | 14 precision mediump float;
17 invariant smooth centroid out lowp float x0;
19 flat out mediump float x1;
21 uniform highp float x2;
33 precision mediump float;
36 smooth centroid in lowp float x0;
38 flat in mediump float x1;
40 uniform highp float x2;
44 float result = (x0 + x1 + x2) / 3.0;
55 precision mediump float;
[all …]
|
| /external/llvm/test/Transforms/Reassociate/ |
| D | fast-basictest.ll | 4 define float @test1(float %arg) {
6 ; CHECK-NEXT: fsub fast float -0.000000e+00, %arg
7 ; CHECK-NEXT: ret float
9 %tmp1 = fsub fast float -1.200000e+01, %arg
10 %tmp2 = fadd fast float %tmp1, 1.200000e+01
11 ret float %tmp2
14 define float @test2(float %reg109, float %reg1111) {
16 ; CHECK-NEXT: fadd float %reg109, -3.000000e+01
17 ; CHECK-NEXT: fadd float %reg115, %reg1111
18 ; CHECK-NEXT: fadd float %reg116, 3.000000e+01
[all …]
|
| /external/llvm/test/CodeGen/PowerPC/ |
| D | unal-altivec2.ll | 6 define void @foo(float* noalias nocapture %x, float* noalias nocapture readonly %y) #0 {
15 %0 = getelementptr inbounds float, float* %y, i64 %index
16 %1 = bitcast float* %0 to <4 x float>*
17 %wide.load = load <4 x float>, <4 x float>* %1, align 4
18 %2 = call <4 x float> @llvm_cos_v4f32(<4 x float> %wide.load)
19 %3 = getelementptr inbounds float, float* %x, i64 %index
20 %4 = bitcast float* %3 to <4 x float>*
21 store <4 x float> %2, <4 x float>* %4, align 4
23 %5 = getelementptr inbounds float, float* %y, i64 %index.next
24 %6 = bitcast float* %5 to <4 x float>*
[all …]
|
| D | floatPSA.ll | 10 …ne float @bar(float %a, float %b, float %c, float %d, float %e, float %f, float %g, float %h, floa…
12 %a.addr = alloca float, align 4
13 %b.addr = alloca float, align 4
14 %c.addr = alloca float, align 4
15 %d.addr = alloca float, align 4
16 %e.addr = alloca float, align 4
17 %f.addr = alloca float, align 4
18 %g.addr = alloca float, align 4
19 %h.addr = alloca float, align 4
20 %i.addr = alloca float, align 4
[all …]
|
| D | 2011-12-05-NoSpillDupCR.ll | 8 @a = common global [32000 x float] zeroinitializer, align 16
9 @b = common global [32000 x float] zeroinitializer, align 16
10 @c = common global [32000 x float] zeroinitializer, align 16
11 @d = common global [32000 x float] zeroinitializer, align 16
12 @e = common global [32000 x float] zeroinitializer, align 16
13 @aa = common global [256 x [256 x float]] zeroinitializer, align 16
14 @bb = common global [256 x [256 x float]] zeroinitializer, align 16
15 @cc = common global [256 x [256 x float]] zeroinitializer, align 16
23 declare i32 @dummy(float*, float*, float*, float*, float*, [256 x float]*, [256 x float]*, [256 x f…
49 %arrayidx.us = getelementptr inbounds [32000 x float], [32000 x float]* @b, i64 0, i64 %idxprom.us
[all …]
|
| /external/llvm/test/CodeGen/ARM/ |
| D | vminmaxnm-safe.ll | 5 define <4 x float> @vmaxnmq(<4 x float>* %A, <4 x float>* %B) nounwind {
8 %tmp1 = load <4 x float>, <4 x float>* %A
9 %tmp2 = load <4 x float>, <4 x float>* %B
10 %tmp3 = call <4 x float> @llvm.arm.neon.vmaxnm.v4f32(<4 x float> %tmp1, <4 x float> %tmp2)
11 ret <4 x float> %tmp3
14 define <2 x float> @vmaxnmd(<2 x float>* %A, <2 x float>* %B) nounwind {
17 %tmp1 = load <2 x float>, <2 x float>* %A
18 %tmp2 = load <2 x float>, <2 x float>* %B
19 %tmp3 = call <2 x float> @llvm.arm.neon.vmaxnm.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
20 ret <2 x float> %tmp3
[all …]
|
| D | 2009-11-13-ScavengerAssert2.ll | 4 %bar = type { %quad, float, float, [3 x %quuz*], [3 x %bar*], [2 x %bar*], [3 x i8], i8 }
6 %foo = type { i8, %quux, %quad, float, [64 x %quuz], [128 x %bar], i32, %baz, %baz }
7 %quad = type { [4 x float] }
8 %quux = type { [4 x %quuz*], [4 x float], i32 }
22 %0 = getelementptr inbounds %quuz, %quuz* %a, i32 0, i32 1, i32 0, i32 0 ; <float*> [#uses=0]
23 %1 = fsub float 0.000000e+00, undef ; <float> [#uses=1]
24 %2 = getelementptr inbounds %quuz, %quuz* %b, i32 0, i32 1, i32 0, i32 1 ; <float*> [#uses=2]
25 %3 = load float, float* %2, align 4 ; <float> [#uses=1]
26 %4 = getelementptr inbounds %quuz, %quuz* %a, i32 0, i32 1, i32 0, i32 1 ; <float*> [#uses=1]
27 %5 = fsub float %3, undef ; <float> [#uses=2]
[all …]
|
| D | vminmaxnm.ll | 5 define float @fp-armv8_vminnm_o(float %a, float %b) {
9 %cmp = fcmp fast olt float %a, %b
10 %cond = select i1 %cmp, float %a, float %b
11 ret float %cond
23 define float @fp-armv8_vminnm_o_rev(float %a, float %b) {
27 %cmp = fcmp fast ogt float %a, %b
28 %cond = select i1 %cmp, float %b, float %a
29 ret float %cond
41 define float @fp-armv8_vminnm_u(float %a, float %b) {
45 %cmp = fcmp fast ult float %a, %b
[all …]
|
| /external/llvm/test/CodeGen/AArch64/ |
| D | callee-save.ll | 3 @var = global float 0.0
15 %val1 = load volatile float, float* @var
16 %val2 = load volatile float, float* @var
17 %val3 = load volatile float, float* @var
18 %val4 = load volatile float, float* @var
19 %val5 = load volatile float, float* @var
20 %val6 = load volatile float, float* @var
21 %val7 = load volatile float, float* @var
22 %val8 = load volatile float, float* @var
23 %val9 = load volatile float, float* @var
[all …]
|