1 /*
2  * Author: Thomas Ingleby <thomas.c.ingleby@intel.com>
3  * Author: Michael Ring <mail@michael-ring.org>
4  * Copyright (c) 2014 Intel Corporation.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining
7  * a copy of this software and associated documentation files (the
8  * "Software"), to deal in the Software without restriction, including
9  * without limitation the rights to use, copy, modify, merge, publish,
10  * distribute, sublicense, and/or sell copies of the Software, and to
11  * permit persons to whom the Software is furnished to do so, subject to
12  * the following conditions:
13  *
14  * The above copyright notice and this permission notice shall be
15  * included in all copies or substantial portions of the Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
20  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
21  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24  */
25 
26 #include <stdlib.h>
27 #include <string.h>
28 #include <sys/mman.h>
29 #include <mraa/types.h>
30 
31 #include "common.h"
32 #include "arm/beaglebone.h"
33 
34 #define NUM2STR(x) #x
35 
36 #define PLATFORM_NAME_BEAGLEBONE_BLACK_REV_B "Beaglebone Black Rev. B"
37 #define PLATFORM_NAME_BEAGLEBONE_BLACK_REV_C "Beaglebone Black Rev. C"
38 
39 #define SYSFS_DEVICES_CAPEMGR_SLOTS "/sys/devices/bone_capemgr.*/slots"
40 #define SYSFS_CLASS_PWM "/sys/class/pwm/"
41 #define SYSFS_CLASS_MMC "/sys/class/mmc_host/"
42 #define SYSFS_PWM_OVERLAY "am33xx_pwm"
43 #define UART_OVERLAY(x) "ADAFRUIT-UART" NUM2STR(x)
44 //#define ADAFRUIT_SPI_OVERLAY "ADAFRUIT-SPI%d"
45 #define SPI_OVERLAY(x) "BB-SPI" NUM2STR(x) "-01"
46 #define I2C_OVERLAY(x) "ADAFRUIT-I2C" NUM2STR(x)
47 #define MAX_SIZE 64
48 
49 #define MMAP_PATH "/dev/mem"
50 #define AM335X_GPIO0_BASE 0x44e07000
51 #define AM335X_GPIO1_BASE 0x4804c000
52 #define AM335X_GPIO2_BASE 0x481AC000
53 #define AM335X_GPIO3_BASE 0x481AE000
54 #define AM335X_GPIO_SIZE (4 * 1024)
55 #define AM335X_IN 0x138
56 #define AM335X_CLR 0x190
57 #define AM335X_SET 0x194
58 
59 // MMAP
60 static uint8_t* mmap_gpio[4] = { NULL, NULL, NULL, NULL };
61 static int mmap_fd = 0;
62 static unsigned int mmap_count = 0;
63 
64 mraa_result_t
mraa_beaglebone_mmap_write(mraa_gpio_context dev,int value)65 mraa_beaglebone_mmap_write(mraa_gpio_context dev, int value)
66 {
67     volatile uint32_t* addr;
68     if (value) {
69         *(volatile uint32_t*) (mmap_gpio[dev->pin / 32] + AM335X_SET) = (uint32_t)(1 << (dev->pin % 32));
70     } else {
71         *(volatile uint32_t*) (mmap_gpio[dev->pin / 32] + AM335X_CLR) = (uint32_t)(1 << (dev->pin % 32));
72     }
73     return MRAA_SUCCESS;
74 }
75 
76 static mraa_result_t
mraa_beaglebone_mmap_unsetup()77 mraa_beaglebone_mmap_unsetup()
78 {
79     if (mmap_gpio[0] == NULL) {
80         syslog(LOG_ERR, "beaglebone mmap: null register cant unsetup");
81         return MRAA_ERROR_INVALID_RESOURCE;
82     }
83     munmap(mmap_gpio[0], AM335X_GPIO_SIZE);
84     mmap_gpio[0] = NULL;
85     munmap(mmap_gpio[1], AM335X_GPIO_SIZE);
86     mmap_gpio[1] = NULL;
87     munmap(mmap_gpio[2], AM335X_GPIO_SIZE);
88     mmap_gpio[2] = NULL;
89     munmap(mmap_gpio[3], AM335X_GPIO_SIZE);
90     mmap_gpio[3] = NULL;
91     if (close(mmap_fd) != 0) {
92         return MRAA_ERROR_INVALID_RESOURCE;
93     }
94     return MRAA_SUCCESS;
95 }
96 
97 int
mraa_beaglebone_mmap_read(mraa_gpio_context dev)98 mraa_beaglebone_mmap_read(mraa_gpio_context dev)
99 {
100     uint32_t value = *(volatile uint32_t*) (mmap_gpio[dev->pin / 32] + AM335X_IN);
101     if (value & (uint32_t)(1 << (dev->pin % 32))) {
102         return 1;
103     }
104     return 0;
105 }
106 
107 mraa_result_t
mraa_beaglebone_mmap_setup(mraa_gpio_context dev,mraa_boolean_t en)108 mraa_beaglebone_mmap_setup(mraa_gpio_context dev, mraa_boolean_t en)
109 {
110     if (dev == NULL) {
111         syslog(LOG_ERR, "beaglebone mmap: context not valid");
112         return MRAA_ERROR_INVALID_HANDLE;
113     }
114 
115     if (en == 0) {
116         if (dev->mmap_write == NULL && dev->mmap_read == NULL) {
117             syslog(LOG_ERR, "beaglebone mmap: can't disable disabled mmap gpio");
118             return MRAA_ERROR_INVALID_PARAMETER;
119         }
120         dev->mmap_write = NULL;
121         dev->mmap_read = NULL;
122         mmap_count--;
123         if (mmap_count == 0) {
124             return mraa_beaglebone_mmap_unsetup();
125         }
126         return MRAA_SUCCESS;
127     }
128 
129     if (dev->mmap_write != NULL && dev->mmap_read != NULL) {
130         syslog(LOG_ERR, "beaglebone mmap: can't enable enabled mmap gpio");
131         return MRAA_ERROR_INVALID_PARAMETER;
132     }
133 
134     // Might need to make some elements of this thread safe.
135     // For example only allow one thread to enter the following block
136     // to prevent mmap'ing twice.
137     if (mmap_gpio[0] == NULL) {
138         if ((mmap_fd = open(MMAP_PATH, O_RDWR)) < 0) {
139             syslog(LOG_ERR, "beaglebone map: unable to open resource0 file");
140             return MRAA_ERROR_INVALID_HANDLE;
141         }
142 
143         mmap_gpio[0] = (uint8_t*) mmap(NULL, AM335X_GPIO_SIZE, PROT_READ | PROT_WRITE,
144                                        MAP_FILE | MAP_SHARED, mmap_fd, AM335X_GPIO0_BASE);
145         if (mmap_gpio[0] == MAP_FAILED) {
146             syslog(LOG_ERR, "beaglebone mmap: failed to mmap");
147             mmap_gpio[0] = NULL;
148             close(mmap_fd);
149             return MRAA_ERROR_NO_RESOURCES;
150         }
151         mmap_gpio[1] = (uint8_t*) mmap(NULL, AM335X_GPIO_SIZE, PROT_READ | PROT_WRITE,
152                                        MAP_FILE | MAP_SHARED, mmap_fd, AM335X_GPIO1_BASE);
153         if (mmap_gpio[1] == MAP_FAILED) {
154             syslog(LOG_ERR, "beaglebone mmap: failed to mmap");
155             mmap_gpio[1] = NULL;
156             close(mmap_fd);
157             return MRAA_ERROR_NO_RESOURCES;
158         }
159         mmap_gpio[2] = (uint8_t*) mmap(NULL, AM335X_GPIO_SIZE, PROT_READ | PROT_WRITE,
160                                        MAP_FILE | MAP_SHARED, mmap_fd, AM335X_GPIO2_BASE);
161         if (mmap_gpio[2] == MAP_FAILED) {
162             syslog(LOG_ERR, "beaglebone mmap: failed to mmap");
163             mmap_gpio[2] = NULL;
164             close(mmap_fd);
165             return MRAA_ERROR_NO_RESOURCES;
166         }
167         mmap_gpio[3] = (uint8_t*) mmap(NULL, AM335X_GPIO_SIZE, PROT_READ | PROT_WRITE,
168                                        MAP_FILE | MAP_SHARED, mmap_fd, AM335X_GPIO3_BASE);
169         if (mmap_gpio[3] == MAP_FAILED) {
170             syslog(LOG_ERR, "beaglebone mmap: failed to mmap");
171             mmap_gpio[3] = NULL;
172             close(mmap_fd);
173             return MRAA_ERROR_NO_RESOURCES;
174         }
175     }
176     dev->mmap_write = &mraa_beaglebone_mmap_write;
177     dev->mmap_read = &mraa_beaglebone_mmap_read;
178     mmap_count++;
179 
180     return MRAA_SUCCESS;
181 }
182 
183 mraa_result_t
mraa_beaglebone_uart_init_pre(int index)184 mraa_beaglebone_uart_init_pre(int index)
185 {
186     mraa_result_t ret = MRAA_ERROR_NO_RESOURCES;
187     char devpath[MAX_SIZE];
188     char overlay[MAX_SIZE];
189     char* capepath = NULL;
190     sprintf(devpath, "/dev/ttyO%u", index + 1);
191     if (!mraa_file_exist(devpath)) {
192         capepath = mraa_file_unglob(SYSFS_DEVICES_CAPEMGR_SLOTS);
193         if (capepath == NULL) {
194             syslog(LOG_ERR, "uart: Could not find CapeManager");
195             return ret;
196         }
197         FILE* fh;
198         fh = fopen(capepath, "w");
199         free(capepath);
200         if (fh == NULL) {
201             syslog(LOG_ERR, "uart: Failed to open capepath for writing, check access rights for user");
202             return ret;
203         }
204         if (fprintf(fh, UART_OVERLAY(index + 1)) < 0) {
205             syslog(LOG_ERR, "uart: Failed to write to CapeManager");
206         }
207         fclose(fh);
208     }
209     if (mraa_file_exist(devpath))
210         ret = MRAA_SUCCESS;
211     else
212         syslog(LOG_ERR, "uart: Device not initialized");
213     return ret;
214 }
215 
216 mraa_result_t
mraa_beaglebone_spi_init_pre(int index)217 mraa_beaglebone_spi_init_pre(int index)
218 {
219     mraa_result_t ret = MRAA_ERROR_NO_RESOURCES;
220     char devpath[MAX_SIZE];
221     char overlay[MAX_SIZE];
222     char* capepath = NULL;
223     int deviceindex = 0;
224 
225     // The first initialized SPI devices always gets the bus id 1
226     // So we need to track down correct mapping and adjust the bus_id field
227     if ((index == 0) && mraa_link_targets("/sys/class/spidev/spidev1.0", "48030000"))
228         deviceindex = 1;
229     if ((index == 0) && mraa_link_targets("/sys/class/spidev/spidev2.0", "48030000"))
230         deviceindex = 2;
231     if ((index == 1) && mraa_link_targets("/sys/class/spidev/spidev1.0", "481a0000"))
232         deviceindex = 1;
233     if ((index == 1) && mraa_link_targets("/sys/class/spidev/spidev2.0", "481a0000"))
234         deviceindex = 2;
235     if ((deviceindex == 0) && mraa_file_exist("/sys/class/spidev/spidev1.0"))
236         deviceindex = 2;
237     if (deviceindex == 0)
238         deviceindex = 1;
239 
240     sprintf(devpath, "/dev/spidev%u.0", deviceindex);
241     if (!mraa_file_exist(devpath)) {
242         capepath = mraa_file_unglob(SYSFS_DEVICES_CAPEMGR_SLOTS);
243         if (capepath == NULL) {
244             syslog(LOG_ERR, "spi: Could not find CapeManager");
245             return ret;
246         }
247         FILE* fh;
248         fh = fopen(capepath, "w");
249         free(capepath);
250         if (fh == NULL) {
251             syslog(LOG_ERR, "spi: Failed to open capepath for writing, check access rights for user");
252             return ret;
253         }
254         if (fprintf(fh, SPI_OVERLAY(index)) < 0) {
255             syslog(LOG_ERR,
256                    "spi: Failed to write to CapeManager, check that /lib/firmware/%s exists",
257                    SPI_OVERLAY(index));
258         }
259         fclose(fh);
260     }
261     if (mraa_file_exist(devpath)) {
262         plat->spi_bus[index].bus_id = deviceindex;
263         ret = MRAA_SUCCESS;
264     } else {
265         syslog(LOG_ERR, "spi: Device not initialized, check that /lib/firmware/%s exists", SPI_OVERLAY(index));
266         syslog(LOG_ERR, "spi: Check http://elinux.org/BeagleBone_Black_Enable_SPIDEV for details");
267     }
268     return ret;
269 }
270 
271 mraa_result_t
mraa_beaglebone_i2c_init_pre(unsigned int bus)272 mraa_beaglebone_i2c_init_pre(unsigned int bus)
273 {
274     mraa_result_t ret = MRAA_ERROR_NO_RESOURCES;
275     char devpath[MAX_SIZE];
276     char overlay[MAX_SIZE];
277     char* capepath = NULL;
278     sprintf(devpath, "/dev/i2c-%u", plat->i2c_bus[bus].bus_id);
279     if (!mraa_file_exist(devpath)) {
280         capepath = mraa_file_unglob(SYSFS_DEVICES_CAPEMGR_SLOTS);
281         if (capepath == NULL) {
282             syslog(LOG_ERR, "i2c: Could not find CapeManager");
283             return ret;
284         }
285         FILE* fh;
286         fh = fopen(capepath, "w");
287         free(capepath);
288         if (fh == NULL) {
289             syslog(LOG_ERR, "i2c: Failed to open capepath for writing, check access rights for user");
290             return ret;
291         }
292         if (fprintf(fh, "ADAFRUIT-I2C%d", bus) < 0) {
293             syslog(LOG_ERR,
294                    "i2c: Failed to write to CapeManager, check that /lib/firmware/%s exists",
295                    I2C_OVERLAY(index));
296         }
297         fclose(fh);
298     }
299     if (mraa_file_exist(devpath))
300         ret = MRAA_SUCCESS;
301     else {
302         syslog(LOG_ERR,
303                "i2c: Device not initialized, check that /lib/firmware/%s exists",
304                I2C_OVERLAY(index));
305     }
306     return ret;
307 }
308 
309 mraa_pwm_context
mraa_beaglebone_pwm_init_replace(int pin)310 mraa_beaglebone_pwm_init_replace(int pin)
311 {
312     char devpath[MAX_SIZE];
313     char overlay[MAX_SIZE];
314     char* capepath = NULL;
315     if (plat == NULL) {
316         syslog(LOG_ERR, "pwm: Platform Not Initialised");
317         return NULL;
318     }
319     if (plat->pins[pin].capabilites.pwm != 1) {
320         syslog(LOG_ERR, "pwm: pin not capable of pwm");
321         return NULL;
322     }
323     if (!mraa_file_exist(SYSFS_CLASS_PWM "pwmchip0")) {
324         FILE* fh;
325         capepath = mraa_file_unglob(SYSFS_DEVICES_CAPEMGR_SLOTS);
326         if (capepath == NULL) {
327             syslog(LOG_ERR, "pwm: Could not find CapeManager");
328             return NULL;
329         }
330         fh = fopen(capepath, "w");
331         free(capepath);
332         if (fh == NULL) {
333             syslog(LOG_ERR, "pwm: Failed to open %s for writing, check access rights for user");
334             return NULL;
335         }
336         if (fprintf(fh, SYSFS_PWM_OVERLAY) < 0) {
337             syslog(LOG_ERR,
338                    "pwm: Failed to write to CapeManager, check that /lib/firmware/%s exists", SYSFS_PWM_OVERLAY);
339         }
340         fclose(fh);
341     }
342 
343     sprintf(devpath, SYSFS_CLASS_PWM "pwm%u", plat->pins[pin].pwm.pinmap);
344     if (!mraa_file_exist(devpath)) {
345         FILE* fh;
346         fh = fopen(SYSFS_CLASS_PWM "export", "w");
347         if (fh == NULL) {
348             syslog(LOG_ERR, "pwm: Failed to open /sys/class/pwm/export for writing, check access "
349                             "rights for user");
350             return NULL;
351         }
352         if (fprintf(fh, "%d", plat->pins[pin].pwm.pinmap) < 0) {
353             syslog(LOG_ERR, "pwm: Failed to write to CapeManager");
354         }
355         fclose(fh);
356     }
357 
358     if (mraa_file_exist(devpath)) {
359         mraa_pwm_context dev = (mraa_pwm_context) calloc(1, sizeof(struct _pwm));
360         if (dev == NULL)
361             return NULL;
362         dev->duty_fp = -1;
363         dev->chipid = -1;
364         dev->pin = plat->pins[pin].pwm.pinmap;
365         dev->period = -1;
366         return dev;
367     } else
368         syslog(LOG_ERR, "pwm: pin not initialized, check that /lib/firmware/%s exists", SYSFS_PWM_OVERLAY);
369     return NULL;
370 }
371 
372 mraa_board_t*
mraa_beaglebone()373 mraa_beaglebone()
374 {
375     unsigned int emmc_enabled = 1;
376     unsigned int hdmi_enabled = 1;
377     unsigned int i2c0_enabled = 1;
378     unsigned int i2c1_enabled = 1;
379     unsigned int spi0_enabled = 0;
380     unsigned int spi1_enabled = 0;
381     unsigned int uart1_enabled = 0;
382     unsigned int uart2_enabled = 0;
383     unsigned int uart3_enabled = 0;
384     unsigned int uart4_enabled = 0;
385     unsigned int uart5_enabled = 0;
386     unsigned int ehrpwm0a_enabled = 0;
387     unsigned int ehrpwm0b_enabled = 0;
388     unsigned int ehrpwm1a_enabled = 0;
389     unsigned int ehrpwm1b_enabled = 0;
390     unsigned int ehrpwm2a_enabled = 0;
391     unsigned int ehrpwm2b_enabled = 0;
392     unsigned int is_rev_c = 0;
393     size_t len = 0;
394     char* line = NULL;
395 
396     FILE* fh;
397     fh = fopen(SYSFS_CLASS_MMC "mmc1/mmc1:0001/name", "r");
398     if (fh != NULL) {
399         emmc_enabled = 1;
400         if (getline(&line, &len, fh) != -1) {
401             if (strstr(line, "MMC04G")) {
402                 is_rev_c = 1;
403             }
404         }
405         fclose(fh);
406         free(line);
407     } else
408         emmc_enabled = 0;
409 
410 
411     if (mraa_file_exist("/sys/devices/ocp.*/hdmi.*"))
412         hdmi_enabled = 1;
413     else
414         hdmi_enabled = 0;
415 
416     if (mraa_file_exist("/sys/class/i2c-dev/i2c-0"))
417         i2c0_enabled = 1;
418     else
419         i2c0_enabled = 0;
420 
421     if (mraa_file_exist("/sys/class/i2c-dev/i2c-1"))
422         i2c1_enabled = 1;
423     else
424         i2c1_enabled = 0;
425 
426     if (mraa_file_exist("/sys/class/spidev/spidev1.0"))
427         spi0_enabled = 1;
428     else
429         spi0_enabled = 0;
430 
431     if (mraa_file_exist("/sys/class/spidev/spidev2.0"))
432         spi1_enabled = 1;
433     else
434         spi1_enabled = 0;
435 
436     if (mraa_file_exist("/sys/class/tty/ttyO1"))
437         uart1_enabled = 1;
438     else
439         uart1_enabled = 0;
440 
441     if (mraa_file_exist("/sys/class/tty/ttyO2"))
442         uart2_enabled = 1;
443     else
444         uart2_enabled = 0;
445 
446     if (mraa_file_exist("/sys/class/tty/ttyO3"))
447         uart3_enabled = 1;
448     else
449         uart3_enabled = 0;
450 
451     if (mraa_file_exist("/sys/class/tty/ttyO4"))
452         uart4_enabled = 1;
453     else
454         uart4_enabled = 0;
455 
456     if (mraa_file_exist("/sys/class/tty/ttyO5"))
457         uart5_enabled = 1;
458     else
459         uart5_enabled = 0;
460 
461     if (mraa_file_exist("/sys/class/pwm/pwm0"))
462         ehrpwm0a_enabled = 1;
463     else
464         ehrpwm0a_enabled = 0;
465 
466     if (mraa_file_exist("/sys/class/pwm/pwm1"))
467         ehrpwm0b_enabled = 1;
468     else
469         ehrpwm0b_enabled = 0;
470 
471     if (mraa_file_exist("/sys/class/pwm/pwm3"))
472         ehrpwm1a_enabled = 1;
473     else
474         ehrpwm1a_enabled = 0;
475 
476     if (mraa_file_exist("/sys/class/pwm/pwm4"))
477         ehrpwm1b_enabled = 1;
478     else
479         ehrpwm1b_enabled = 0;
480 
481     if (mraa_file_exist("/sys/class/pwm/pwm5"))
482         ehrpwm2a_enabled = 1;
483     else
484         ehrpwm2a_enabled = 0;
485 
486     if (mraa_file_exist("/sys/class/pwm/pwm6"))
487         ehrpwm2b_enabled = 1;
488     else
489         ehrpwm2b_enabled = 0;
490 
491     mraa_board_t* b = (mraa_board_t*) calloc(1, sizeof(mraa_board_t));
492     if (b == NULL)
493         return NULL;
494     // TODO: Detect Beaglebone Black Revisions, for now always TYPE B
495     if (is_rev_c == 0) {
496         b->platform_name = PLATFORM_NAME_BEAGLEBONE_BLACK_REV_B;
497         b->phy_pin_count = MRAA_BEAGLEBONE_BLACK_PINCOUNT;
498     }
499     if (is_rev_c == 1) {
500         b->platform_name = PLATFORM_NAME_BEAGLEBONE_BLACK_REV_C;
501         b->phy_pin_count = MRAA_BEAGLEBONE_BLACK_PINCOUNT;
502     }
503 
504     if (b->platform_name == NULL) {
505         goto error;
506     }
507 
508     b->aio_count = 7;
509     b->adc_raw = 12;
510     b->adc_supported = 12;
511     b->pwm_default_period = 500;
512     b->pwm_max_period = 2147483;
513     b->pwm_min_period = 1;
514 
515     b->pins = (mraa_pininfo_t*) calloc(b->phy_pin_count,sizeof(mraa_pininfo_t));
516     if (b->pins == NULL) {
517         goto error;
518     }
519 
520     b->adv_func = (mraa_adv_func_t*) calloc(1, sizeof(mraa_adv_func_t));
521     if (b->adv_func == NULL) {
522         free(b->pins);
523         goto error;
524     }
525 
526     b->adv_func->uart_init_pre = &mraa_beaglebone_uart_init_pre;
527     b->adv_func->spi_init_pre = &mraa_beaglebone_spi_init_pre;
528     b->adv_func->i2c_init_pre = &mraa_beaglebone_i2c_init_pre;
529     b->adv_func->pwm_init_replace = &mraa_beaglebone_pwm_init_replace;
530 
531     strncpy(b->pins[0].name, "INVALID", MRAA_PIN_NAME_SIZE);
532     b->pins[0].capabilites = (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 };
533 
534     strncpy(b->pins[1].name, "GND", MRAA_PIN_NAME_SIZE);
535     b->pins[1].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
536 
537     strncpy(b->pins[2].name, "GND", MRAA_PIN_NAME_SIZE);
538     b->pins[2].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
539 
540     if (emmc_enabled == 1) {
541         strncpy(b->pins[3].name, "MMC1_D6", MRAA_PIN_NAME_SIZE);
542         b->pins[3].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
543     } else {
544         strncpy(b->pins[3].name, "GPIO38", MRAA_PIN_NAME_SIZE);
545         b->pins[3].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
546     }
547     b->pins[3].gpio.pinmap = 38;
548     b->pins[3].gpio.parent_id = 0;
549     b->pins[3].gpio.mux_total = 0;
550 
551     if (emmc_enabled == 1) {
552         strncpy(b->pins[4].name, "MMC1_D7", MRAA_PIN_NAME_SIZE);
553         b->pins[4].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
554     } else {
555         strncpy(b->pins[4].name, "GPIO39", MRAA_PIN_NAME_SIZE);
556         b->pins[4].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
557     }
558     b->pins[4].gpio.pinmap = 39;
559     b->pins[4].gpio.parent_id = 0;
560     b->pins[4].gpio.mux_total = 0;
561 
562     if (emmc_enabled == 1) {
563         strncpy(b->pins[5].name, "MMC1_D2", MRAA_PIN_NAME_SIZE);
564         b->pins[5].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
565     } else {
566         strncpy(b->pins[5].name, "GPIO34", MRAA_PIN_NAME_SIZE);
567         b->pins[5].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
568     }
569     b->pins[5].gpio.pinmap = 34;
570     b->pins[5].gpio.parent_id = 0;
571     b->pins[5].gpio.mux_total = 0;
572 
573     if (emmc_enabled == 1) {
574         strncpy(b->pins[6].name, "MMC1_D3", MRAA_PIN_NAME_SIZE);
575         b->pins[6].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
576     } else {
577         strncpy(b->pins[6].name, "GPIO35", MRAA_PIN_NAME_SIZE);
578         b->pins[6].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
579     }
580     b->pins[6].gpio.pinmap = 35;
581     b->pins[6].gpio.parent_id = 0;
582     b->pins[6].gpio.mux_total = 0;
583 
584     // TODO TIMER4
585     strncpy(b->pins[7].name, "GPIO66", MRAA_PIN_NAME_SIZE);
586     b->pins[7].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
587     b->pins[7].gpio.pinmap = 66;
588     b->pins[7].gpio.parent_id = 0;
589     b->pins[7].gpio.mux_total = 0;
590 
591     // TODO TIMER7
592     strncpy(b->pins[8].name, "GPIO67", MRAA_PIN_NAME_SIZE);
593     b->pins[8].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
594     b->pins[8].gpio.pinmap = 67;
595     b->pins[8].gpio.parent_id = 0;
596     b->pins[8].gpio.mux_total = 0;
597 
598     // TODO TIMER5
599     strncpy(b->pins[9].name, "GPIO69", MRAA_PIN_NAME_SIZE);
600     b->pins[9].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
601     b->pins[9].gpio.pinmap = 69;
602     b->pins[9].gpio.parent_id = 0;
603     b->pins[9].gpio.mux_total = 0;
604 
605     // TODO TIMER6
606     strncpy(b->pins[10].name, "GPIO68", MRAA_PIN_NAME_SIZE);
607     b->pins[10].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
608     b->pins[10].gpio.pinmap = 68;
609     b->pins[10].gpio.parent_id = 0;
610     b->pins[10].gpio.mux_total = 0;
611 
612     strncpy(b->pins[11].name, "GPIO45", MRAA_PIN_NAME_SIZE);
613     b->pins[11].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
614     b->pins[11].gpio.pinmap = 45;
615     b->pins[11].gpio.parent_id = 0;
616     b->pins[11].gpio.mux_total = 0;
617 
618     strncpy(b->pins[12].name, "GPIO44", MRAA_PIN_NAME_SIZE);
619     b->pins[12].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
620     b->pins[12].gpio.pinmap = 44;
621     b->pins[12].gpio.parent_id = 0;
622     b->pins[12].gpio.mux_total = 0;
623 
624     if (ehrpwm2b_enabled == 1) {
625         strncpy(b->pins[13].name, "EHRPWM2B", MRAA_PIN_NAME_SIZE);
626         b->pins[13].capabilites = (mraa_pincapabilities_t){ 1, 0, 1, 0, 0, 0, 0, 0 };
627     } else {
628         strncpy(b->pins[13].name, "GPIO23", MRAA_PIN_NAME_SIZE);
629         b->pins[13].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0, 0 };
630     }
631     b->pins[13].gpio.pinmap = 23;
632     b->pins[13].gpio.parent_id = 0;
633     b->pins[13].gpio.mux_total = 0;
634     b->pins[13].pwm.pinmap = 6;
635     b->pins[13].pwm.mux_total = 0;
636 
637     strncpy(b->pins[14].name, "GPIO26", MRAA_PIN_NAME_SIZE);
638     b->pins[14].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
639     b->pins[14].gpio.pinmap = 26;
640     b->pins[14].gpio.parent_id = 0;
641     b->pins[14].gpio.mux_total = 0;
642 
643     strncpy(b->pins[15].name, "GPIO47", MRAA_PIN_NAME_SIZE);
644     b->pins[15].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
645     b->pins[15].gpio.pinmap = 47;
646     b->pins[15].gpio.parent_id = 0;
647     b->pins[15].gpio.mux_total = 0;
648 
649     strncpy(b->pins[16].name, "GPIO46", MRAA_PIN_NAME_SIZE);
650     b->pins[16].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
651     b->pins[16].gpio.pinmap = 46;
652     b->pins[16].gpio.parent_id = 0;
653     b->pins[16].gpio.mux_total = 0;
654 
655     // TODO PWM0_SYNCO
656     strncpy(b->pins[17].name, "GPIO27", MRAA_PIN_NAME_SIZE);
657     b->pins[17].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
658     b->pins[17].gpio.pinmap = 27;
659     b->pins[17].gpio.parent_id = 0;
660     b->pins[17].gpio.mux_total = 0;
661 
662     strncpy(b->pins[18].name, "GPIO65", MRAA_PIN_NAME_SIZE);
663     b->pins[18].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
664     b->pins[18].gpio.pinmap = 65;
665     b->pins[18].gpio.parent_id = 0;
666     b->pins[18].gpio.mux_total = 0;
667 
668     if (ehrpwm2a_enabled == 1) {
669         strncpy(b->pins[19].name, "EHRPWM2A", MRAA_PIN_NAME_SIZE);
670         b->pins[19].capabilites = (mraa_pincapabilities_t){ 1, 0, 1, 0, 0, 0, 0, 0 };
671     } else {
672         strncpy(b->pins[19].name, "GPIO22", MRAA_PIN_NAME_SIZE);
673         b->pins[19].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0, 0 };
674     }
675     b->pins[19].gpio.pinmap = 22;
676     b->pins[19].gpio.parent_id = 0;
677     b->pins[19].gpio.mux_total = 0;
678     b->pins[19].pwm.pinmap = 5;
679     b->pins[19].pwm.mux_total = 0;
680 
681     if (emmc_enabled == 1) {
682         strncpy(b->pins[20].name, "MMC1_CMD", MRAA_PIN_NAME_SIZE);
683         b->pins[20].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
684     } else {
685         strncpy(b->pins[20].name, "GPIO63", MRAA_PIN_NAME_SIZE);
686         b->pins[20].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
687     }
688     b->pins[20].gpio.pinmap = 63;
689     b->pins[20].gpio.parent_id = 0;
690     b->pins[20].gpio.mux_total = 0;
691 
692     if (emmc_enabled == 1) {
693         strncpy(b->pins[21].name, "MMC1_CLK", MRAA_PIN_NAME_SIZE);
694         b->pins[21].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
695     } else {
696         strncpy(b->pins[21].name, "GPIO62", MRAA_PIN_NAME_SIZE);
697         b->pins[21].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
698     }
699     b->pins[21].gpio.pinmap = 62;
700     b->pins[21].gpio.parent_id = 0;
701     b->pins[21].gpio.mux_total = 0;
702 
703     if (emmc_enabled == 1) {
704         strncpy(b->pins[22].name, "MMC1_D5", MRAA_PIN_NAME_SIZE);
705         b->pins[22].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
706     } else {
707         strncpy(b->pins[22].name, "GPIO37", MRAA_PIN_NAME_SIZE);
708         b->pins[22].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
709     }
710     b->pins[22].gpio.pinmap = 37;
711     b->pins[22].gpio.parent_id = 0;
712     b->pins[22].gpio.mux_total = 0;
713 
714     if (emmc_enabled == 1) {
715         strncpy(b->pins[23].name, "MMC_D4", MRAA_PIN_NAME_SIZE);
716         b->pins[23].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
717     } else {
718         strncpy(b->pins[23].name, "GPIO36", MRAA_PIN_NAME_SIZE);
719         b->pins[23].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
720     }
721     b->pins[23].gpio.pinmap = 36;
722     b->pins[23].gpio.parent_id = 0;
723     b->pins[23].gpio.mux_total = 0;
724 
725     if (emmc_enabled == 1) {
726         strncpy(b->pins[24].name, "MMC_D1", MRAA_PIN_NAME_SIZE);
727         b->pins[24].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
728     } else {
729         strncpy(b->pins[24].name, "GPIO33", MRAA_PIN_NAME_SIZE);
730         b->pins[24].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
731     }
732     b->pins[24].gpio.pinmap = 33;
733     b->pins[24].gpio.parent_id = 0;
734     b->pins[24].gpio.mux_total = 0;
735 
736     if (emmc_enabled == 1) {
737         strncpy(b->pins[25].name, "MMC1_D0", MRAA_PIN_NAME_SIZE);
738         b->pins[25].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
739     } else {
740         strncpy(b->pins[25].name, "GPIO32", MRAA_PIN_NAME_SIZE);
741         b->pins[25].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
742     }
743     b->pins[25].gpio.pinmap = 32;
744     b->pins[25].gpio.parent_id = 0;
745     b->pins[25].gpio.mux_total = 0;
746 
747     strncpy(b->pins[26].name, "GPIO61", MRAA_PIN_NAME_SIZE);
748     b->pins[26].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
749     b->pins[26].gpio.pinmap = 61;
750     b->pins[26].gpio.parent_id = 0;
751     b->pins[26].gpio.mux_total = 0;
752 
753     if (hdmi_enabled == 1) {
754         strncpy(b->pins[27].name, "LCD_VSYNC", MRAA_PIN_NAME_SIZE);
755         b->pins[27].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
756     } else {
757         strncpy(b->pins[27].name, "GPIO86", MRAA_PIN_NAME_SIZE);
758         b->pins[27].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
759     }
760     b->pins[27].gpio.pinmap = 86;
761     b->pins[27].gpio.parent_id = 0;
762     b->pins[27].gpio.mux_total = 0;
763 
764     if (hdmi_enabled == 1) {
765         strncpy(b->pins[28].name, "LCD_PCLK", MRAA_PIN_NAME_SIZE);
766         b->pins[28].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
767     } else {
768         strncpy(b->pins[28].name, "GPIO88", MRAA_PIN_NAME_SIZE);
769         b->pins[28].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
770     }
771     b->pins[28].gpio.pinmap = 88;
772     b->pins[28].gpio.parent_id = 0;
773     b->pins[28].gpio.mux_total = 0;
774 
775     if (hdmi_enabled == 1) {
776         strncpy(b->pins[29].name, "LCD_HSYNC", MRAA_PIN_NAME_SIZE);
777         b->pins[29].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
778     } else {
779         strncpy(b->pins[29].name, "GPIO87", MRAA_PIN_NAME_SIZE);
780         b->pins[29].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
781     }
782     b->pins[29].gpio.pinmap = 87;
783     b->pins[29].gpio.parent_id = 0;
784     b->pins[29].gpio.mux_total = 0;
785 
786     if (hdmi_enabled == 1) {
787         strncpy(b->pins[30].name, "LCD_AC_BIAS", MRAA_PIN_NAME_SIZE);
788         b->pins[30].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
789     } else {
790         strncpy(b->pins[30].name, "GPIO89", MRAA_PIN_NAME_SIZE);
791         b->pins[30].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
792     }
793     b->pins[30].gpio.pinmap = 89;
794     b->pins[30].gpio.parent_id = 0;
795     b->pins[30].gpio.mux_total = 0;
796 
797     if (hdmi_enabled == 1) {
798         strncpy(b->pins[31].name, "LCD_D14", MRAA_PIN_NAME_SIZE);
799         b->pins[31].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
800     } else {
801         // TODO UART5_CTS this is ignored when using ADAFRUIT
802         strncpy(b->pins[31].name, "GPIO10", MRAA_PIN_NAME_SIZE);
803         b->pins[31].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
804     }
805     b->pins[31].gpio.pinmap = 10;
806     b->pins[31].gpio.parent_id = 0;
807     b->pins[31].gpio.mux_total = 0;
808     b->pins[31].uart.mux_total = 0;
809 
810     if (hdmi_enabled == 1) {
811         strncpy(b->pins[32].name, "LCD_D15", MRAA_PIN_NAME_SIZE);
812         b->pins[32].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
813     } else {
814         // TODO UART5_RTS this is ignored when using ADAFRUIT
815         strncpy(b->pins[32].name, "GPIO11", MRAA_PIN_NAME_SIZE);
816         b->pins[32].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
817     }
818     b->pins[32].gpio.pinmap = 11;
819     b->pins[32].gpio.parent_id = 0;
820     b->pins[32].gpio.mux_total = 0;
821     b->pins[32].uart.mux_total = 0;
822 
823     if (hdmi_enabled == 1) {
824         strncpy(b->pins[33].name, "LCD_D13", MRAA_PIN_NAME_SIZE);
825         b->pins[33].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
826     } else {
827         // TODO UART4_RTS this is ignored when using ADAFRUIT
828         strncpy(b->pins[33].name, "GPIO9", MRAA_PIN_NAME_SIZE);
829         b->pins[33].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
830     }
831     b->pins[33].gpio.pinmap = 9;
832     b->pins[33].gpio.parent_id = 0;
833     b->pins[33].gpio.mux_total = 0;
834     b->pins[33].uart.mux_total = 0;
835 
836     // TODO PWM_1B
837     if (hdmi_enabled == 1) {
838         strncpy(b->pins[34].name, "LCD_D11", MRAA_PIN_NAME_SIZE);
839         b->pins[34].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
840     } else {
841         strncpy(b->pins[34].name, "GPIO81", MRAA_PIN_NAME_SIZE);
842         b->pins[34].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0, 0 };
843     }
844     b->pins[34].gpio.pinmap = 81;
845     b->pins[34].gpio.parent_id = 0;
846     b->pins[34].gpio.mux_total = 0;
847 
848     if (hdmi_enabled == 1) {
849         strncpy(b->pins[35].name, "LCD_D12", MRAA_PIN_NAME_SIZE);
850         b->pins[35].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
851     } else {
852         // TODO UART4_CTS this is ignored when using ADAFRUIT
853         strncpy(b->pins[35].name, "GPIO8", MRAA_PIN_NAME_SIZE);
854         b->pins[35].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
855     }
856     b->pins[35].gpio.pinmap = 8;
857     b->pins[35].gpio.parent_id = 0;
858     b->pins[35].gpio.mux_total = 0;
859     b->pins[35].uart.mux_total = 0;
860 
861     // TODO PWM_1A
862     if (hdmi_enabled == 1) {
863         strncpy(b->pins[36].name, "LCD_D10", MRAA_PIN_NAME_SIZE);
864         b->pins[36].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
865     } else {
866         strncpy(b->pins[36].name, "GPIO80", MRAA_PIN_NAME_SIZE);
867         b->pins[36].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0, 0 };
868     }
869     b->pins[36].gpio.pinmap = 80;
870     b->pins[36].gpio.parent_id = 0;
871     b->pins[36].gpio.mux_total = 0;
872 
873     if (hdmi_enabled == 1) {
874         strncpy(b->pins[37].name, "LCD_D8", MRAA_PIN_NAME_SIZE);
875         b->pins[37].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
876     } else {
877         if (uart5_enabled == 1) {
878             strncpy(b->pins[37].name, "UART5TX", MRAA_PIN_NAME_SIZE);
879             b->pins[37].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
880         } else {
881             strncpy(b->pins[37].name, "GPIO78", MRAA_PIN_NAME_SIZE);
882             b->pins[37].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
883         }
884     }
885     b->pins[37].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
886     b->pins[37].gpio.pinmap = 78;
887     b->pins[37].gpio.parent_id = 0;
888     b->pins[37].gpio.mux_total = 0;
889     b->pins[37].uart.mux_total = 0;
890 
891     if (hdmi_enabled == 1) {
892         strncpy(b->pins[38].name, "LCD_D9", MRAA_PIN_NAME_SIZE);
893         b->pins[38].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
894     } else {
895         // TODO UART5_RX
896         if (uart5_enabled == 1) {
897             strncpy(b->pins[38].name, "UART5RX", MRAA_PIN_NAME_SIZE);
898             b->pins[38].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
899         } else {
900             strncpy(b->pins[38].name, "GPIO79", MRAA_PIN_NAME_SIZE);
901             b->pins[38].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
902         }
903     }
904     b->pins[38].gpio.pinmap = 79;
905     b->pins[38].gpio.parent_id = 0;
906     b->pins[38].gpio.mux_total = 0;
907     b->pins[38].uart.mux_total = 0;
908 
909     if (hdmi_enabled == 1) {
910         strncpy(b->pins[39].name, "LCD_D6", MRAA_PIN_NAME_SIZE);
911         b->pins[39].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
912     } else {
913         strncpy(b->pins[39].name, "GPIO76", MRAA_PIN_NAME_SIZE);
914         b->pins[39].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
915     }
916     b->pins[39].gpio.pinmap = 76;
917     b->pins[39].gpio.parent_id = 0;
918     b->pins[39].gpio.mux_total = 0;
919 
920     if (hdmi_enabled == 1) {
921         strncpy(b->pins[40].name, "LCD_D7", MRAA_PIN_NAME_SIZE);
922         b->pins[40].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
923     } else {
924         strncpy(b->pins[40].name, "GPIO77", MRAA_PIN_NAME_SIZE);
925         b->pins[40].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
926     }
927     b->pins[40].gpio.pinmap = 77;
928     b->pins[40].gpio.parent_id = 0;
929     b->pins[40].gpio.mux_total = 0;
930 
931     if (hdmi_enabled == 1) {
932         strncpy(b->pins[41].name, "LCD_D4", MRAA_PIN_NAME_SIZE);
933         b->pins[41].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
934     } else {
935         strncpy(b->pins[41].name, "GPIO74", MRAA_PIN_NAME_SIZE);
936         b->pins[41].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
937     }
938     b->pins[41].gpio.pinmap = 74;
939     b->pins[41].gpio.parent_id = 0;
940     b->pins[41].gpio.mux_total = 0;
941 
942     if (hdmi_enabled == 1) {
943         strncpy(b->pins[42].name, "LCD_D5", MRAA_PIN_NAME_SIZE);
944         b->pins[42].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
945     } else {
946         strncpy(b->pins[42].name, "GPIO75", MRAA_PIN_NAME_SIZE);
947         b->pins[42].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
948     }
949     b->pins[42].gpio.pinmap = 75;
950     b->pins[42].gpio.parent_id = 0;
951     b->pins[42].gpio.mux_total = 0;
952 
953     if (hdmi_enabled == 1) {
954         strncpy(b->pins[43].name, "LCD_D2", MRAA_PIN_NAME_SIZE);
955         b->pins[43].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
956     } else {
957         strncpy(b->pins[43].name, "GPIO72", MRAA_PIN_NAME_SIZE);
958         b->pins[43].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
959     }
960     b->pins[43].gpio.pinmap = 72;
961     b->pins[43].gpio.parent_id = 0;
962     b->pins[43].gpio.mux_total = 0;
963 
964     if (hdmi_enabled == 1) {
965         strncpy(b->pins[44].name, "LCD_D3", MRAA_PIN_NAME_SIZE);
966         b->pins[44].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
967     } else {
968         strncpy(b->pins[44].name, "GPIO73", MRAA_PIN_NAME_SIZE);
969         b->pins[44].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
970     }
971     b->pins[44].gpio.pinmap = 73;
972     b->pins[44].gpio.parent_id = 0;
973     b->pins[44].gpio.mux_total = 0;
974 
975     // TODO PWM_2A
976     if (hdmi_enabled == 1) {
977         strncpy(b->pins[45].name, "LCD_D0", MRAA_PIN_NAME_SIZE);
978         b->pins[45].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
979     } else {
980         strncpy(b->pins[45].name, "GPIO70", MRAA_PIN_NAME_SIZE);
981         b->pins[45].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0, 0 };
982     }
983     b->pins[45].gpio.pinmap = 70;
984     b->pins[45].gpio.parent_id = 0;
985     b->pins[45].gpio.mux_total = 0;
986 
987     // TODO PWM_2B
988     if (hdmi_enabled == 1) {
989         strncpy(b->pins[46].name, "LCD_D1", MRAA_PIN_NAME_SIZE);
990         b->pins[46].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
991     } else {
992         strncpy(b->pins[46].name, "GPIO71", MRAA_PIN_NAME_SIZE);
993         b->pins[46].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0, 0 };
994     }
995     b->pins[46].gpio.pinmap = 71;
996     b->pins[46].gpio.parent_id = 0;
997     b->pins[46].gpio.mux_total = 0;
998 
999     strncpy(b->pins[47].name, "GND", MRAA_PIN_NAME_SIZE);
1000     b->pins[47].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
1001 
1002     strncpy(b->pins[48].name, "GND", MRAA_PIN_NAME_SIZE);
1003     b->pins[48].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
1004 
1005     strncpy(b->pins[49].name, "3.3V", MRAA_PIN_NAME_SIZE);
1006     b->pins[49].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
1007 
1008     strncpy(b->pins[50].name, "3.3V", MRAA_PIN_NAME_SIZE);
1009     b->pins[50].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
1010 
1011     strncpy(b->pins[51].name, "5V", MRAA_PIN_NAME_SIZE);
1012     b->pins[51].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
1013 
1014     strncpy(b->pins[52].name, "5V", MRAA_PIN_NAME_SIZE);
1015     b->pins[52].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
1016 
1017     strncpy(b->pins[53].name, "5V", MRAA_PIN_NAME_SIZE);
1018     b->pins[53].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
1019 
1020     strncpy(b->pins[54].name, "5V", MRAA_PIN_NAME_SIZE);
1021     b->pins[54].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
1022 
1023     strncpy(b->pins[55].name, "PWR", MRAA_PIN_NAME_SIZE);
1024     b->pins[55].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
1025 
1026     strncpy(b->pins[56].name, "RESET", MRAA_PIN_NAME_SIZE);
1027     b->pins[56].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
1028 
1029     if (uart4_enabled == 1) {
1030         strncpy(b->pins[57].name, "UART4_RX", MRAA_PIN_NAME_SIZE);
1031         b->pins[57].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
1032     } else {
1033         strncpy(b->pins[57].name, "GPIO30", MRAA_PIN_NAME_SIZE);
1034         b->pins[57].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
1035     }
1036     b->pins[57].gpio.pinmap = 30;
1037     b->pins[57].gpio.parent_id = 0;
1038     b->pins[57].gpio.mux_total = 0;
1039     b->pins[57].uart.mux_total = 0;
1040 
1041     strncpy(b->pins[58].name, "GPIO60", MRAA_PIN_NAME_SIZE);
1042     b->pins[58].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
1043     b->pins[58].gpio.pinmap = 60;
1044     b->pins[58].gpio.parent_id = 0;
1045     b->pins[58].gpio.mux_total = 0;
1046 
1047     if (uart4_enabled == 1) {
1048         strncpy(b->pins[59].name, "UART4_TX", MRAA_PIN_NAME_SIZE);
1049         b->pins[59].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
1050     } else {
1051         strncpy(b->pins[59].name, "GPIO31", MRAA_PIN_NAME_SIZE);
1052         b->pins[59].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
1053     }
1054     b->pins[59].gpio.pinmap = 31;
1055     b->pins[59].gpio.parent_id = 0;
1056     b->pins[59].gpio.mux_total = 0;
1057     b->pins[59].uart.mux_total = 0;
1058 
1059     if (ehrpwm1a_enabled == 1) {
1060         strncpy(b->pins[60].name, "EHRPWM1A", MRAA_PIN_NAME_SIZE);
1061         b->pins[60].capabilites = (mraa_pincapabilities_t){ 1, 0, 1, 0, 0, 0, 0, 0 };
1062     } else {
1063         strncpy(b->pins[60].name, "GPIO50", MRAA_PIN_NAME_SIZE);
1064         b->pins[60].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0, 0 };
1065     }
1066     b->pins[60].gpio.pinmap = 50;
1067     b->pins[60].gpio.parent_id = 0;
1068     b->pins[60].gpio.mux_total = 0;
1069     b->pins[60].pwm.pinmap = 3;
1070     b->pins[60].pwm.mux_total = 0;
1071 
1072     // TODO PWM_TRIP2_IN (not a PWM output, but used for sync cf ref. manual)
1073     strncpy(b->pins[61].name, "GPIO48", MRAA_PIN_NAME_SIZE);
1074     b->pins[61].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
1075     b->pins[61].gpio.pinmap = 48;
1076     b->pins[61].gpio.parent_id = 0;
1077     b->pins[61].gpio.mux_total = 0;
1078 
1079     if (ehrpwm1b_enabled == 1) {
1080         strncpy(b->pins[62].name, "EHRPWM1B", MRAA_PIN_NAME_SIZE);
1081         b->pins[62].capabilites = (mraa_pincapabilities_t){ 1, 0, 1, 0, 0, 0, 0, 0 };
1082     } else {
1083         strncpy(b->pins[62].name, "GPIO51", MRAA_PIN_NAME_SIZE);
1084         b->pins[62].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0, 0 };
1085     }
1086     b->pins[62].gpio.pinmap = 51;
1087     b->pins[62].gpio.parent_id = 0;
1088     b->pins[62].gpio.mux_total = 0;
1089     b->pins[62].pwm.pinmap = 4;
1090     b->pins[62].pwm.mux_total = 0;
1091 
1092     if ((i2c0_enabled == 1) || (spi0_enabled == 1)) {
1093         if (i2c0_enabled == 1) {
1094             strncpy(b->pins[63].name, "I2C1SCL", MRAA_PIN_NAME_SIZE);
1095             b->pins[63].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 1, 1, 0, 0 };
1096         }
1097         if (spi0_enabled == 1) {
1098             strncpy(b->pins[63].name, "SPI0CS0", MRAA_PIN_NAME_SIZE);
1099             b->pins[63].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 1, 0, 0, 0 };
1100         }
1101     } else {
1102         strncpy(b->pins[63].name, "GPIO4", MRAA_PIN_NAME_SIZE);
1103         b->pins[63].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 1, 1, 0, 0 };
1104     }
1105     b->pins[63].gpio.pinmap = 4;
1106     b->pins[63].gpio.parent_id = 0;
1107     b->pins[63].gpio.mux_total = 0;
1108     b->pins[63].i2c.mux_total = 0;
1109     b->pins[63].spi.mux_total = 0;
1110 
1111     if ((i2c0_enabled == 1) || (spi0_enabled == 1)) {
1112         if (i2c0_enabled == 1) {
1113             strncpy(b->pins[64].name, "I2C1SDA", MRAA_PIN_NAME_SIZE);
1114             b->pins[64].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 1, 1, 0, 0 };
1115         }
1116         if (spi0_enabled == 1) {
1117             strncpy(b->pins[64].name, "SPI0D1", MRAA_PIN_NAME_SIZE);
1118             b->pins[64].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 1, 0, 0, 0 };
1119         }
1120     } else {
1121         strncpy(b->pins[64].name, "GPIO5", MRAA_PIN_NAME_SIZE);
1122         b->pins[64].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 1, 1, 0, 0 };
1123     }
1124     b->pins[64].gpio.pinmap = 5;
1125     b->pins[64].gpio.parent_id = 0;
1126     b->pins[64].gpio.mux_total = 0;
1127     b->pins[64].i2c.mux_total = 0;
1128     b->pins[64].spi.mux_total = 0;
1129 
1130     if (i2c0_enabled == 1) {
1131         strncpy(b->pins[65].name, "I2C2SCL", MRAA_PIN_NAME_SIZE);
1132         b->pins[65].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 1, 0, 0 };
1133         b->pins[65].i2c.mux_total = 0;
1134     } else {
1135         strncpy(b->pins[65].name, "GPIO13", MRAA_PIN_NAME_SIZE);
1136         b->pins[65].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 0, 0 };
1137     }
1138     b->pins[65].gpio.pinmap = 13;
1139     b->pins[65].gpio.parent_id = 0;
1140     b->pins[65].gpio.mux_total = 0;
1141     b->pins[65].i2c.mux_total = 0;
1142 
1143     if (i2c0_enabled == 1) {
1144         strncpy(b->pins[66].name, "I2C2SDA", MRAA_PIN_NAME_SIZE);
1145         b->pins[66].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 1, 0, 0 };
1146         b->pins[66].i2c.mux_total = 0;
1147     } else {
1148         strncpy(b->pins[66].name, "GPIO12", MRAA_PIN_NAME_SIZE);
1149         b->pins[66].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 0, 0 };
1150     }
1151     b->pins[66].gpio.pinmap = 12;
1152     b->pins[66].gpio.parent_id = 0;
1153     b->pins[66].gpio.mux_total = 0;
1154     b->pins[66].i2c.mux_total = 0;
1155 
1156     if ((spi0_enabled == 1) || uart2_enabled == 1 || ehrpwm0b_enabled == 1) {
1157         if (uart2_enabled == 1) {
1158             strncpy(b->pins[67].name, "UART2_TX", MRAA_PIN_NAME_SIZE);
1159             b->pins[67].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 1 };
1160         }
1161         if (spi0_enabled == 1) {
1162             strncpy(b->pins[67].name, "SPI0D0", MRAA_PIN_NAME_SIZE);
1163             b->pins[67].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 1, 0, 0, 0 };
1164         }
1165         if (ehrpwm0b_enabled == 1) {
1166             strncpy(b->pins[67].name, "EHRPWM0B", MRAA_PIN_NAME_SIZE);
1167             b->pins[67].capabilites = (mraa_pincapabilities_t){ 1, 0, 1, 0, 0, 0, 0, 0 };
1168         }
1169     } else {
1170         strncpy(b->pins[67].name, "GPIO3", MRAA_PIN_NAME_SIZE);
1171         b->pins[67].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 1, 0, 0, 1 };
1172     }
1173     b->pins[67].gpio.pinmap = 3;
1174     b->pins[67].gpio.parent_id = 0;
1175     b->pins[67].gpio.mux_total = 0;
1176     b->pins[67].spi.mux_total = 0;
1177     b->pins[67].uart.mux_total = 0;
1178     b->pins[67].pwm.pinmap = 1;
1179     b->pins[67].pwm.mux_total = 0;
1180 
1181     if ((spi0_enabled == 1) || uart2_enabled == 1 || ehrpwm0a_enabled == 1) {
1182         if (uart2_enabled == 1) {
1183             strncpy(b->pins[68].name, "UART2_RX", MRAA_PIN_NAME_SIZE);
1184             b->pins[68].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 1, 0, 0, 1 };
1185         }
1186         if (spi0_enabled == 1) {
1187             strncpy(b->pins[68].name, "SPI0CLK", MRAA_PIN_NAME_SIZE);
1188             b->pins[68].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 1, 0, 0, 0 };
1189         }
1190         if (ehrpwm0a_enabled == 1) {
1191             strncpy(b->pins[68].name, "EHRPWM0A", MRAA_PIN_NAME_SIZE);
1192             b->pins[68].capabilites = (mraa_pincapabilities_t){ 1, 0, 1, 0, 0, 0, 0, 0 };
1193         }
1194     } else {
1195         strncpy(b->pins[68].name, "GPIO2", MRAA_PIN_NAME_SIZE);
1196         b->pins[68].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 1, 0, 0, 1 };
1197     }
1198     b->pins[68].gpio.pinmap = 2;
1199     b->pins[68].gpio.parent_id = 0;
1200     b->pins[68].gpio.mux_total = 0;
1201     b->pins[68].spi.mux_total = 0;
1202     b->pins[68].uart.mux_total = 0;
1203     b->pins[68].pwm.pinmap = 0;
1204     b->pins[68].pwm.mux_total = 0;
1205 
1206     // TODO PWM0_SYNCO ?? PWM
1207     strncpy(b->pins[69].name, "GPIO49", MRAA_PIN_NAME_SIZE);
1208     b->pins[69].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
1209     b->pins[69].gpio.pinmap = 49;
1210     b->pins[69].gpio.parent_id = 0;
1211     b->pins[69].gpio.mux_total = 0;
1212 
1213     if (uart1_enabled == 1) {
1214         strncpy(b->pins[70].name, "UART1_RX", MRAA_PIN_NAME_SIZE);
1215         b->pins[70].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
1216     } else {
1217         strncpy(b->pins[70].name, "GPIO15", MRAA_PIN_NAME_SIZE);
1218         b->pins[70].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
1219     }
1220     b->pins[70].gpio.pinmap = 15;
1221     b->pins[70].gpio.parent_id = 0;
1222     b->pins[70].gpio.mux_total = 0;
1223     b->pins[70].uart.mux_total = 0;
1224 
1225     strncpy(b->pins[71].name, "GPIO117", MRAA_PIN_NAME_SIZE);
1226     b->pins[71].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
1227     b->pins[71].gpio.pinmap = 117;
1228     b->pins[71].gpio.parent_id = 0;
1229     b->pins[71].gpio.mux_total = 0;
1230 
1231     if (uart1_enabled == 1) {
1232         strncpy(b->pins[72].name, "UART1_RX", MRAA_PIN_NAME_SIZE);
1233         b->pins[72].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
1234     } else {
1235         strncpy(b->pins[72].name, "GPIO14", MRAA_PIN_NAME_SIZE);
1236         b->pins[72].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
1237     }
1238     b->pins[72].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
1239     b->pins[72].gpio.pinmap = 14;
1240     b->pins[72].gpio.parent_id = 0;
1241     b->pins[72].gpio.mux_total = 0;
1242     b->pins[72].uart.mux_total = 0;
1243 
1244     strncpy(b->pins[73].name, "GPIO115", MRAA_PIN_NAME_SIZE);
1245     b->pins[73].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
1246     b->pins[73].gpio.pinmap = 115;
1247     b->pins[73].gpio.parent_id = 0;
1248     b->pins[73].gpio.mux_total = 0;
1249 
1250     if (emmc_enabled != 1) {
1251         if (spi1_enabled == 1) {
1252             strncpy(b->pins[74].name, "SPI1CS0", MRAA_PIN_NAME_SIZE);
1253             b->pins[74].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 1, 0, 0, 0 };
1254         } else {
1255             strncpy(b->pins[74].name, "GPIO113", MRAA_PIN_NAME_SIZE);
1256             b->pins[74].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 };
1257         }
1258     } else {
1259         strncpy(b->pins[74].name, "MCASP0XX", MRAA_PIN_NAME_SIZE);
1260         b->pins[74].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 1, 0, 0, 0 };
1261     }
1262     b->pins[74].gpio.pinmap = 113;
1263     b->pins[74].gpio.parent_id = 0;
1264     b->pins[74].gpio.mux_total = 0;
1265     b->pins[74].spi.mux_total = 0;
1266 
1267     if (emmc_enabled != 1) {
1268         if (spi1_enabled == 1) {
1269             strncpy(b->pins[75].name, "SPI1D0", MRAA_PIN_NAME_SIZE);
1270             b->pins[75].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 1, 0, 0, 0 };
1271         } else {
1272             strncpy(b->pins[75].name, "GPIO111", MRAA_PIN_NAME_SIZE);
1273             b->pins[75].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 };
1274         }
1275     } else {
1276         strncpy(b->pins[75].name, "MMC1_SD", MRAA_PIN_NAME_SIZE);
1277         b->pins[75].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
1278     }
1279     b->pins[75].gpio.pinmap = 111;
1280     b->pins[75].gpio.parent_id = 0;
1281     b->pins[75].gpio.mux_total = 0;
1282     b->pins[75].spi.mux_total = 0;
1283 
1284     if (emmc_enabled != 1) {
1285         if (spi1_enabled == 1) {
1286             strncpy(b->pins[76].name, "SPI1D1", MRAA_PIN_NAME_SIZE);
1287             b->pins[76].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 1, 0, 0, 0 };
1288         } else {
1289             strncpy(b->pins[76].name, "GPIO112", MRAA_PIN_NAME_SIZE);
1290             b->pins[76].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 };
1291         }
1292     } else {
1293         strncpy(b->pins[76].name, "MMC2_SD", MRAA_PIN_NAME_SIZE);
1294         b->pins[76].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
1295     }
1296     b->pins[76].gpio.pinmap = 112;
1297     b->pins[76].gpio.parent_id = 0;
1298     b->pins[76].gpio.mux_total = 0;
1299     b->pins[76].spi.mux_total = 0;
1300 
1301     if (emmc_enabled != 1) {
1302         if (spi1_enabled == 1) {
1303             strncpy(b->pins[77].name, "SPI1CLK", MRAA_PIN_NAME_SIZE);
1304             b->pins[77].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 1, 0, 0, 0 };
1305         } else {
1306             strncpy(b->pins[77].name, "GPIO110", MRAA_PIN_NAME_SIZE);
1307             b->pins[77].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 };
1308         }
1309     } else {
1310         strncpy(b->pins[77].name, "MMC0_SD", MRAA_PIN_NAME_SIZE);
1311         b->pins[77].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
1312     }
1313     b->pins[77].gpio.pinmap = 110;
1314     b->pins[77].gpio.parent_id = 0;
1315     b->pins[77].gpio.mux_total = 0;
1316     b->pins[77].spi.mux_total = 0;
1317 
1318 
1319     strncpy(b->pins[78].name, "VDD_ADC", MRAA_PIN_NAME_SIZE);
1320     b->pins[78].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
1321 
1322     // TODO AIN4
1323     strncpy(b->pins[79].name, "AIN4", MRAA_PIN_NAME_SIZE);
1324     b->pins[79].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 1, 0 };
1325 
1326     strncpy(b->pins[80].name, "GND_ADC", MRAA_PIN_NAME_SIZE);
1327     b->pins[80].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
1328     // TODO AIN6
1329     strncpy(b->pins[81].name, "AIN6", MRAA_PIN_NAME_SIZE);
1330     b->pins[81].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 1, 0 };
1331     // TODO AIN5
1332     strncpy(b->pins[82].name, "AIN5", MRAA_PIN_NAME_SIZE);
1333     b->pins[82].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 1, 0 };
1334     // TODO AIN2
1335     strncpy(b->pins[83].name, "AIN2", MRAA_PIN_NAME_SIZE);
1336     b->pins[83].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 1, 0 };
1337     // TODO AIN3
1338     strncpy(b->pins[84].name, "AIN3", MRAA_PIN_NAME_SIZE);
1339     b->pins[84].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 1, 0 };
1340     // TODO AIN0
1341     strncpy(b->pins[85].name, "AIN0", MRAA_PIN_NAME_SIZE);
1342     b->pins[85].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 1, 0 };
1343     // TODO AIN1
1344     strncpy(b->pins[86].name, "AIN1", MRAA_PIN_NAME_SIZE);
1345     b->pins[86].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 1, 0 };
1346 
1347     strncpy(b->pins[87].name, "GPIO20", MRAA_PIN_NAME_SIZE);
1348     b->pins[87].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
1349     b->pins[87].gpio.pinmap = 20;
1350     b->pins[87].gpio.parent_id = 0;
1351     b->pins[87].gpio.mux_total = 0;
1352 
1353     strncpy(b->pins[88].name, "GPIO7", MRAA_PIN_NAME_SIZE);
1354     b->pins[88].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
1355     b->pins[88].gpio.pinmap = 7;
1356     b->pins[88].gpio.parent_id = 0;
1357     b->pins[88].gpio.mux_total = 0;
1358 
1359     // GND
1360     strncpy(b->pins[89].name, "GND", MRAA_PIN_NAME_SIZE);
1361     b->pins[89].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
1362 
1363     // GND
1364     strncpy(b->pins[90].name, "GND", MRAA_PIN_NAME_SIZE);
1365     b->pins[90].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
1366 
1367     // GND
1368     strncpy(b->pins[91].name, "GND", MRAA_PIN_NAME_SIZE);
1369     b->pins[91].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
1370 
1371     // GND
1372     strncpy(b->pins[92].name, "GND", MRAA_PIN_NAME_SIZE);
1373     b->pins[92].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
1374 
1375     // BUS DEFINITIONS
1376     b->i2c_bus_count = 2;
1377     b->def_i2c_bus = 0;
1378 
1379     b->i2c_bus[0].bus_id = 0;
1380     b->i2c_bus[0].sda = 46 + 18;
1381     b->i2c_bus[0].scl = 46 + 17;
1382 
1383     b->i2c_bus[1].bus_id = 1;
1384     b->i2c_bus[1].sda = 46 + 20;
1385     b->i2c_bus[1].scl = 46 + 19;
1386 
1387     if (emmc_enabled == 1)
1388         b->spi_bus_count = 1;
1389     else
1390         b->spi_bus_count = 2;
1391     b->def_spi_bus = 0;
1392     b->spi_bus[0].bus_id = 1;
1393     b->spi_bus[0].slave_s = 0;
1394     b->spi_bus[0].cs = 46 + 17;
1395     b->spi_bus[0].mosi = 46 + 18;
1396     b->spi_bus[0].miso = 46 + 21;
1397     b->spi_bus[0].sclk = 46 + 22;
1398 
1399     b->spi_bus[1].bus_id = 2;
1400     b->spi_bus[1].slave_s = 0;
1401     b->spi_bus[1].cs = 46 + 28;
1402     b->spi_bus[1].mosi = 46 + 29;
1403     b->spi_bus[1].miso = 46 + 30;
1404     b->spi_bus[1].sclk = 46 + 31;
1405 
1406     b->uart_dev_count = 5;
1407     b->def_uart_dev = 0;
1408     b->uart_dev[0].rx = 46 + 26;
1409     b->uart_dev[0].tx = 46 + 24;
1410     b->uart_dev[1].rx = 46 + 22;
1411     b->uart_dev[1].tx = 46 + 21;
1412     // TODO
1413     b->uart_dev[2].rx = 0;
1414     b->uart_dev[2].tx = 42;
1415 
1416     b->uart_dev[3].rx = 46 + 11;
1417     b->uart_dev[3].tx = 46 + 13;
1418     b->uart_dev[4].rx = 38;
1419     b->uart_dev[4].tx = 37;
1420 
1421     b->gpio_count = 0;
1422     int i;
1423     for (i = 0; i < b->phy_pin_count; i++)
1424         if (b->pins[i].capabilites.gpio)
1425             b->gpio_count++;
1426 
1427     return b;
1428 error:
1429     syslog(LOG_CRIT, "Beaglebone: failed to initialize");
1430     free(b);
1431     return NULL;
1432 };
1433