1 //===-- AArch64InstPrinter.h - Convert AArch64 MCInst to assembly syntax --===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This class prints an AArch64 MCInst to a .s file.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_LIB_TARGET_AARCH64_INSTPRINTER_AARCH64INSTPRINTER_H
15 #define LLVM_LIB_TARGET_AARCH64_INSTPRINTER_AARCH64INSTPRINTER_H
16 
17 #include "MCTargetDesc/AArch64MCTargetDesc.h"
18 #include "llvm/ADT/StringRef.h"
19 #include "llvm/MC/MCInstPrinter.h"
20 #include "llvm/MC/MCSubtargetInfo.h"
21 
22 namespace llvm {
23 
24 class MCOperand;
25 
26 class AArch64InstPrinter : public MCInstPrinter {
27 public:
28   AArch64InstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
29                      const MCRegisterInfo &MRI);
30 
31   void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot,
32                  const MCSubtargetInfo &STI) override;
33   void printRegName(raw_ostream &OS, unsigned RegNo) const override;
34 
35   // Autogenerated by tblgen.
36   virtual void printInstruction(const MCInst *MI, const MCSubtargetInfo &STI,
37                                 raw_ostream &O);
38   virtual bool printAliasInstr(const MCInst *MI, const MCSubtargetInfo &STI,
39                                raw_ostream &O);
40   virtual void printCustomAliasOperand(const MCInst *MI, unsigned OpIdx,
41                                        unsigned PrintMethodIdx,
42                                        const MCSubtargetInfo &STI,
43                                        raw_ostream &O);
getRegName(unsigned RegNo)44   virtual StringRef getRegName(unsigned RegNo) const {
45     return getRegisterName(RegNo);
46   }
47   static const char *getRegisterName(unsigned RegNo,
48                                      unsigned AltIdx = AArch64::NoRegAltName);
49 
50 protected:
51   bool printSysAlias(const MCInst *MI, const MCSubtargetInfo &STI,
52                      raw_ostream &O);
53   // Operand printers
54   void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
55                     raw_ostream &O);
56   void printHexImm(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
57                    raw_ostream &O);
58   void printPostIncOperand(const MCInst *MI, unsigned OpNo, unsigned Imm,
59                            raw_ostream &O);
60   template <int Amount>
printPostIncOperand(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O)61   void printPostIncOperand(const MCInst *MI, unsigned OpNo,
62                            const MCSubtargetInfo &STI, raw_ostream &O) {
63     printPostIncOperand(MI, OpNo, Amount, O);
64   }
65 
66   void printVRegOperand(const MCInst *MI, unsigned OpNo,
67                         const MCSubtargetInfo &STI, raw_ostream &O);
68   void printSysCROperand(const MCInst *MI, unsigned OpNo,
69                          const MCSubtargetInfo &STI, raw_ostream &O);
70   void printAddSubImm(const MCInst *MI, unsigned OpNum,
71                       const MCSubtargetInfo &STI, raw_ostream &O);
72   void printLogicalImm32(const MCInst *MI, unsigned OpNum,
73                          const MCSubtargetInfo &STI, raw_ostream &O);
74   void printLogicalImm64(const MCInst *MI, unsigned OpNum,
75                          const MCSubtargetInfo &STI, raw_ostream &O);
76   void printShifter(const MCInst *MI, unsigned OpNum,
77                     const MCSubtargetInfo &STI, raw_ostream &O);
78   void printShiftedRegister(const MCInst *MI, unsigned OpNum,
79                             const MCSubtargetInfo &STI, raw_ostream &O);
80   void printExtendedRegister(const MCInst *MI, unsigned OpNum,
81                              const MCSubtargetInfo &STI, raw_ostream &O);
82   void printArithExtend(const MCInst *MI, unsigned OpNum,
83                         const MCSubtargetInfo &STI, raw_ostream &O);
84 
85   void printMemExtend(const MCInst *MI, unsigned OpNum, raw_ostream &O,
86                       char SrcRegKind, unsigned Width);
87   template <char SrcRegKind, unsigned Width>
printMemExtend(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O)88   void printMemExtend(const MCInst *MI, unsigned OpNum,
89                       const MCSubtargetInfo &STI, raw_ostream &O) {
90     printMemExtend(MI, OpNum, O, SrcRegKind, Width);
91   }
92 
93   void printCondCode(const MCInst *MI, unsigned OpNum,
94                      const MCSubtargetInfo &STI, raw_ostream &O);
95   void printInverseCondCode(const MCInst *MI, unsigned OpNum,
96                             const MCSubtargetInfo &STI, raw_ostream &O);
97   void printAlignedLabel(const MCInst *MI, unsigned OpNum,
98                          const MCSubtargetInfo &STI, raw_ostream &O);
99   void printUImm12Offset(const MCInst *MI, unsigned OpNum, unsigned Scale,
100                          raw_ostream &O);
101   void printAMIndexedWB(const MCInst *MI, unsigned OpNum, unsigned Scale,
102                         raw_ostream &O);
103 
104   template <int Scale>
printUImm12Offset(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O)105   void printUImm12Offset(const MCInst *MI, unsigned OpNum,
106                          const MCSubtargetInfo &STI, raw_ostream &O) {
107     printUImm12Offset(MI, OpNum, Scale, O);
108   }
109 
110   template <int BitWidth>
printAMIndexedWB(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O)111   void printAMIndexedWB(const MCInst *MI, unsigned OpNum,
112                         const MCSubtargetInfo &STI, raw_ostream &O) {
113     printAMIndexedWB(MI, OpNum, BitWidth / 8, O);
114   }
115 
116   void printAMNoIndex(const MCInst *MI, unsigned OpNum,
117                       const MCSubtargetInfo &STI, raw_ostream &O);
118 
119   template <int Scale>
120   void printImmScale(const MCInst *MI, unsigned OpNum,
121                      const MCSubtargetInfo &STI, raw_ostream &O);
122 
123   void printPrefetchOp(const MCInst *MI, unsigned OpNum,
124                        const MCSubtargetInfo &STI, raw_ostream &O);
125 
126   void printPSBHintOp(const MCInst *MI, unsigned OpNum,
127                       const MCSubtargetInfo &STI, raw_ostream &O);
128 
129   void printFPImmOperand(const MCInst *MI, unsigned OpNum,
130                          const MCSubtargetInfo &STI, raw_ostream &O);
131 
132   void printVectorList(const MCInst *MI, unsigned OpNum,
133                        const MCSubtargetInfo &STI, raw_ostream &O,
134                        StringRef LayoutSuffix);
135 
136   /// Print a list of vector registers where the type suffix is implicit
137   /// (i.e. attached to the instruction rather than the registers).
138   void printImplicitlyTypedVectorList(const MCInst *MI, unsigned OpNum,
139                                       const MCSubtargetInfo &STI,
140                                       raw_ostream &O);
141 
142   template <unsigned NumLanes, char LaneKind>
143   void printTypedVectorList(const MCInst *MI, unsigned OpNum,
144                             const MCSubtargetInfo &STI, raw_ostream &O);
145 
146   void printVectorIndex(const MCInst *MI, unsigned OpNum,
147                         const MCSubtargetInfo &STI, raw_ostream &O);
148   void printAdrpLabel(const MCInst *MI, unsigned OpNum,
149                       const MCSubtargetInfo &STI, raw_ostream &O);
150   void printBarrierOption(const MCInst *MI, unsigned OpNum,
151                           const MCSubtargetInfo &STI, raw_ostream &O);
152   void printMSRSystemRegister(const MCInst *MI, unsigned OpNum,
153                               const MCSubtargetInfo &STI, raw_ostream &O);
154   void printMRSSystemRegister(const MCInst *MI, unsigned OpNum,
155                               const MCSubtargetInfo &STI, raw_ostream &O);
156   void printSystemPStateField(const MCInst *MI, unsigned OpNum,
157                               const MCSubtargetInfo &STI, raw_ostream &O);
158   void printSIMDType10Operand(const MCInst *MI, unsigned OpNum,
159                               const MCSubtargetInfo &STI, raw_ostream &O);
160   template<unsigned size>
161   void printGPRSeqPairsClassOperand(const MCInst *MI, unsigned OpNum,
162                                     const MCSubtargetInfo &STI,
163                                     raw_ostream &O);
164 };
165 
166 class AArch64AppleInstPrinter : public AArch64InstPrinter {
167 public:
168   AArch64AppleInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
169                           const MCRegisterInfo &MRI);
170 
171   void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot,
172                  const MCSubtargetInfo &STI) override;
173 
174   void printInstruction(const MCInst *MI, const MCSubtargetInfo &STI,
175                         raw_ostream &O) override;
176   bool printAliasInstr(const MCInst *MI, const MCSubtargetInfo &STI,
177                        raw_ostream &O) override;
178   void printCustomAliasOperand(const MCInst *MI, unsigned OpIdx,
179                                unsigned PrintMethodIdx,
180                                const MCSubtargetInfo &STI,
181                                raw_ostream &O) override;
getRegName(unsigned RegNo)182   StringRef getRegName(unsigned RegNo) const override {
183     return getRegisterName(RegNo);
184   }
185   static const char *getRegisterName(unsigned RegNo,
186                                      unsigned AltIdx = AArch64::NoRegAltName);
187 };
188 }
189 
190 #endif
191