1 //===-- X86SelectionDAGInfo.cpp - X86 SelectionDAG Info -------------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the X86SelectionDAGInfo class.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "X86InstrInfo.h"
15 #include "X86ISelLowering.h"
16 #include "X86RegisterInfo.h"
17 #include "X86Subtarget.h"
18 #include "X86SelectionDAGInfo.h"
19 #include "llvm/CodeGen/SelectionDAG.h"
20 #include "llvm/IR/DerivedTypes.h"
21 #include "llvm/Target/TargetLowering.h"
22 
23 using namespace llvm;
24 
25 #define DEBUG_TYPE "x86-selectiondag-info"
26 
isBaseRegConflictPossible(SelectionDAG & DAG,ArrayRef<unsigned> ClobberSet) const27 bool X86SelectionDAGInfo::isBaseRegConflictPossible(
28     SelectionDAG &DAG, ArrayRef<unsigned> ClobberSet) const {
29   // We cannot use TRI->hasBasePointer() until *after* we select all basic
30   // blocks.  Legalization may introduce new stack temporaries with large
31   // alignment requirements.  Fall back to generic code if there are any
32   // dynamic stack adjustments (hopefully rare) and the base pointer would
33   // conflict if we had to use it.
34   MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
35   if (!MFI->hasVarSizedObjects() && !MFI->hasOpaqueSPAdjustment())
36     return false;
37 
38   const X86RegisterInfo *TRI = static_cast<const X86RegisterInfo *>(
39       DAG.getSubtarget().getRegisterInfo());
40   unsigned BaseReg = TRI->getBaseRegister();
41   for (unsigned R : ClobberSet)
42     if (BaseReg == R)
43       return true;
44   return false;
45 }
46 
EmitTargetCodeForMemset(SelectionDAG & DAG,SDLoc dl,SDValue Chain,SDValue Dst,SDValue Src,SDValue Size,unsigned Align,bool isVolatile,MachinePointerInfo DstPtrInfo) const47 SDValue X86SelectionDAGInfo::EmitTargetCodeForMemset(
48     SelectionDAG &DAG, SDLoc dl, SDValue Chain, SDValue Dst, SDValue Src,
49     SDValue Size, unsigned Align, bool isVolatile,
50     MachinePointerInfo DstPtrInfo) const {
51   ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
52   const X86Subtarget &Subtarget =
53       DAG.getMachineFunction().getSubtarget<X86Subtarget>();
54 
55 #ifndef NDEBUG
56   // If the base register might conflict with our physical registers, bail out.
57   const unsigned ClobberSet[] = {X86::RCX, X86::RAX, X86::RDI,
58                                  X86::ECX, X86::EAX, X86::EDI};
59   assert(!isBaseRegConflictPossible(DAG, ClobberSet));
60 #endif
61 
62   // If to a segment-relative address space, use the default lowering.
63   if (DstPtrInfo.getAddrSpace() >= 256)
64     return SDValue();
65 
66   // If not DWORD aligned or size is more than the threshold, call the library.
67   // The libc version is likely to be faster for these cases. It can use the
68   // address value and run time information about the CPU.
69   if ((Align & 3) != 0 || !ConstantSize ||
70       ConstantSize->getZExtValue() > Subtarget.getMaxInlineSizeThreshold()) {
71     // Check to see if there is a specialized entry-point for memory zeroing.
72     ConstantSDNode *V = dyn_cast<ConstantSDNode>(Src);
73 
74     if (const char *bzeroEntry = V &&
75         V->isNullValue() ? Subtarget.getBZeroEntry() : nullptr) {
76       const TargetLowering &TLI = DAG.getTargetLoweringInfo();
77       EVT IntPtr = TLI.getPointerTy(DAG.getDataLayout());
78       Type *IntPtrTy = DAG.getDataLayout().getIntPtrType(*DAG.getContext());
79       TargetLowering::ArgListTy Args;
80       TargetLowering::ArgListEntry Entry;
81       Entry.Node = Dst;
82       Entry.Ty = IntPtrTy;
83       Args.push_back(Entry);
84       Entry.Node = Size;
85       Args.push_back(Entry);
86 
87       TargetLowering::CallLoweringInfo CLI(DAG);
88       CLI.setDebugLoc(dl).setChain(Chain)
89         .setCallee(CallingConv::C, Type::getVoidTy(*DAG.getContext()),
90                    DAG.getExternalSymbol(bzeroEntry, IntPtr), std::move(Args),
91                    0)
92         .setDiscardResult();
93 
94       std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI);
95       return CallResult.second;
96     }
97 
98     // Otherwise have the target-independent code call memset.
99     return SDValue();
100   }
101 
102   uint64_t SizeVal = ConstantSize->getZExtValue();
103   SDValue InFlag;
104   EVT AVT;
105   SDValue Count;
106   ConstantSDNode *ValC = dyn_cast<ConstantSDNode>(Src);
107   unsigned BytesLeft = 0;
108   bool TwoRepStos = false;
109   if (ValC) {
110     unsigned ValReg;
111     uint64_t Val = ValC->getZExtValue() & 255;
112 
113     // If the value is a constant, then we can potentially use larger sets.
114     switch (Align & 3) {
115     case 2:   // WORD aligned
116       AVT = MVT::i16;
117       ValReg = X86::AX;
118       Val = (Val << 8) | Val;
119       break;
120     case 0:  // DWORD aligned
121       AVT = MVT::i32;
122       ValReg = X86::EAX;
123       Val = (Val << 8)  | Val;
124       Val = (Val << 16) | Val;
125       if (Subtarget.is64Bit() && ((Align & 0x7) == 0)) {  // QWORD aligned
126         AVT = MVT::i64;
127         ValReg = X86::RAX;
128         Val = (Val << 32) | Val;
129       }
130       break;
131     default:  // Byte aligned
132       AVT = MVT::i8;
133       ValReg = X86::AL;
134       Count = DAG.getIntPtrConstant(SizeVal, dl);
135       break;
136     }
137 
138     if (AVT.bitsGT(MVT::i8)) {
139       unsigned UBytes = AVT.getSizeInBits() / 8;
140       Count = DAG.getIntPtrConstant(SizeVal / UBytes, dl);
141       BytesLeft = SizeVal % UBytes;
142     }
143 
144     Chain = DAG.getCopyToReg(Chain, dl, ValReg, DAG.getConstant(Val, dl, AVT),
145                              InFlag);
146     InFlag = Chain.getValue(1);
147   } else {
148     AVT = MVT::i8;
149     Count  = DAG.getIntPtrConstant(SizeVal, dl);
150     Chain  = DAG.getCopyToReg(Chain, dl, X86::AL, Src, InFlag);
151     InFlag = Chain.getValue(1);
152   }
153 
154   Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RCX : X86::ECX,
155                            Count, InFlag);
156   InFlag = Chain.getValue(1);
157   Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RDI : X86::EDI,
158                            Dst, InFlag);
159   InFlag = Chain.getValue(1);
160 
161   SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Glue);
162   SDValue Ops[] = { Chain, DAG.getValueType(AVT), InFlag };
163   Chain = DAG.getNode(X86ISD::REP_STOS, dl, Tys, Ops);
164 
165   if (TwoRepStos) {
166     InFlag = Chain.getValue(1);
167     Count  = Size;
168     EVT CVT = Count.getValueType();
169     SDValue Left = DAG.getNode(ISD::AND, dl, CVT, Count,
170                                DAG.getConstant((AVT == MVT::i64) ? 7 : 3, dl,
171                                                CVT));
172     Chain = DAG.getCopyToReg(Chain, dl, (CVT == MVT::i64) ? X86::RCX : X86::ECX,
173                              Left, InFlag);
174     InFlag = Chain.getValue(1);
175     Tys = DAG.getVTList(MVT::Other, MVT::Glue);
176     SDValue Ops[] = { Chain, DAG.getValueType(MVT::i8), InFlag };
177     Chain = DAG.getNode(X86ISD::REP_STOS, dl, Tys, Ops);
178   } else if (BytesLeft) {
179     // Handle the last 1 - 7 bytes.
180     unsigned Offset = SizeVal - BytesLeft;
181     EVT AddrVT = Dst.getValueType();
182     EVT SizeVT = Size.getValueType();
183 
184     Chain = DAG.getMemset(Chain, dl,
185                           DAG.getNode(ISD::ADD, dl, AddrVT, Dst,
186                                       DAG.getConstant(Offset, dl, AddrVT)),
187                           Src,
188                           DAG.getConstant(BytesLeft, dl, SizeVT),
189                           Align, isVolatile, false,
190                           DstPtrInfo.getWithOffset(Offset));
191   }
192 
193   // TODO: Use a Tokenfactor, as in memcpy, instead of a single chain.
194   return Chain;
195 }
196 
EmitTargetCodeForMemcpy(SelectionDAG & DAG,SDLoc dl,SDValue Chain,SDValue Dst,SDValue Src,SDValue Size,unsigned Align,bool isVolatile,bool AlwaysInline,MachinePointerInfo DstPtrInfo,MachinePointerInfo SrcPtrInfo) const197 SDValue X86SelectionDAGInfo::EmitTargetCodeForMemcpy(
198     SelectionDAG &DAG, SDLoc dl, SDValue Chain, SDValue Dst, SDValue Src,
199     SDValue Size, unsigned Align, bool isVolatile, bool AlwaysInline,
200     MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const {
201   // This requires the copy size to be a constant, preferably
202   // within a subtarget-specific limit.
203   ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
204   const X86Subtarget &Subtarget =
205       DAG.getMachineFunction().getSubtarget<X86Subtarget>();
206   if (!ConstantSize)
207     return SDValue();
208   uint64_t SizeVal = ConstantSize->getZExtValue();
209   if (!AlwaysInline && SizeVal > Subtarget.getMaxInlineSizeThreshold())
210     return SDValue();
211 
212   /// If not DWORD aligned, it is more efficient to call the library.  However
213   /// if calling the library is not allowed (AlwaysInline), then soldier on as
214   /// the code generated here is better than the long load-store sequence we
215   /// would otherwise get.
216   if (!AlwaysInline && (Align & 3) != 0)
217     return SDValue();
218 
219   // If to a segment-relative address space, use the default lowering.
220   if (DstPtrInfo.getAddrSpace() >= 256 ||
221       SrcPtrInfo.getAddrSpace() >= 256)
222     return SDValue();
223 
224   // If the base register might conflict with our physical registers, bail out.
225   const unsigned ClobberSet[] = {X86::RCX, X86::RSI, X86::RDI,
226                                  X86::ECX, X86::ESI, X86::EDI};
227   if (isBaseRegConflictPossible(DAG, ClobberSet))
228     return SDValue();
229 
230   MVT AVT;
231   if (Align & 1)
232     AVT = MVT::i8;
233   else if (Align & 2)
234     AVT = MVT::i16;
235   else if (Align & 4)
236     // DWORD aligned
237     AVT = MVT::i32;
238   else
239     // QWORD aligned
240     AVT = Subtarget.is64Bit() ? MVT::i64 : MVT::i32;
241 
242   unsigned UBytes = AVT.getSizeInBits() / 8;
243   unsigned CountVal = SizeVal / UBytes;
244   SDValue Count = DAG.getIntPtrConstant(CountVal, dl);
245   unsigned BytesLeft = SizeVal % UBytes;
246 
247   SDValue InFlag;
248   Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RCX : X86::ECX,
249                            Count, InFlag);
250   InFlag = Chain.getValue(1);
251   Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RDI : X86::EDI,
252                            Dst, InFlag);
253   InFlag = Chain.getValue(1);
254   Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RSI : X86::ESI,
255                            Src, InFlag);
256   InFlag = Chain.getValue(1);
257 
258   SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Glue);
259   SDValue Ops[] = { Chain, DAG.getValueType(AVT), InFlag };
260   SDValue RepMovs = DAG.getNode(X86ISD::REP_MOVS, dl, Tys, Ops);
261 
262   SmallVector<SDValue, 4> Results;
263   Results.push_back(RepMovs);
264   if (BytesLeft) {
265     // Handle the last 1 - 7 bytes.
266     unsigned Offset = SizeVal - BytesLeft;
267     EVT DstVT = Dst.getValueType();
268     EVT SrcVT = Src.getValueType();
269     EVT SizeVT = Size.getValueType();
270     Results.push_back(DAG.getMemcpy(Chain, dl,
271                                     DAG.getNode(ISD::ADD, dl, DstVT, Dst,
272                                                 DAG.getConstant(Offset, dl,
273                                                                 DstVT)),
274                                     DAG.getNode(ISD::ADD, dl, SrcVT, Src,
275                                                 DAG.getConstant(Offset, dl,
276                                                                 SrcVT)),
277                                     DAG.getConstant(BytesLeft, dl, SizeVT),
278                                     Align, isVolatile, AlwaysInline, false,
279                                     DstPtrInfo.getWithOffset(Offset),
280                                     SrcPtrInfo.getWithOffset(Offset)));
281   }
282 
283   return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Results);
284 }
285