1%default {"opcode":"shl"}
2    /*
3     * 64-bit shift operation.
4     *
5     * For: shl-long, shr-long, ushr-long
6     */
7    /* binop vAA, vBB, vCC */
8    FETCH w0, 1                         // w0<- CCBB
9    lsr      w3, wINST, #8               // w3<- AA
10    lsr      w2, w0, #8                  // w2<- CC
11    GET_VREG w2, w2                     // w2<- vCC (shift count)
12    and      w1, w0, #255                // w1<- BB
13    GET_VREG_WIDE x1, w1                // x1<- vBB
14    FETCH_ADVANCE_INST 2                // advance rPC, load rINST
15    and      x2, x2, #63                 // Mask low 6
16    $opcode  x0, x1, x2                 // Do the shift.
17    GET_INST_OPCODE ip                  // extract opcode from rINST
18    SET_VREG_WIDE x0, w3                // vAA<- x0
19    GOTO_OPCODE ip                      // jump to next instruction
20    /* 11-14 instructions */
21