1 /* BFD back-end for ARM COFF files.
2 Copyright (C) 1990-2014 Free Software Foundation, Inc.
3 Written by Cygnus Support.
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
21
22 #include "sysdep.h"
23 #include "bfd.h"
24 #include "libbfd.h"
25 #include "coff/arm.h"
26 #include "coff/internal.h"
27
28 #ifdef COFF_WITH_PE
29 #include "coff/pe.h"
30 #endif
31
32 #include "libcoff.h"
33
34 /* Macros for manipulation the bits in the flags field of the coff data
35 structure. */
36 #define APCS_26_FLAG(abfd) \
37 (coff_data (abfd)->flags & F_APCS_26)
38
39 #define APCS_FLOAT_FLAG(abfd) \
40 (coff_data (abfd)->flags & F_APCS_FLOAT)
41
42 #define PIC_FLAG(abfd) \
43 (coff_data (abfd)->flags & F_PIC)
44
45 #define APCS_SET(abfd) \
46 (coff_data (abfd)->flags & F_APCS_SET)
47
48 #define SET_APCS_FLAGS(abfd, flgs) \
49 do \
50 { \
51 coff_data (abfd)->flags &= ~(F_APCS_26 | F_APCS_FLOAT | F_PIC); \
52 coff_data (abfd)->flags |= (flgs) | F_APCS_SET; \
53 } \
54 while (0)
55
56 #define INTERWORK_FLAG(abfd) \
57 (coff_data (abfd)->flags & F_INTERWORK)
58
59 #define INTERWORK_SET(abfd) \
60 (coff_data (abfd)->flags & F_INTERWORK_SET)
61
62 #define SET_INTERWORK_FLAG(abfd, flg) \
63 do \
64 { \
65 coff_data (abfd)->flags &= ~F_INTERWORK; \
66 coff_data (abfd)->flags |= (flg) | F_INTERWORK_SET; \
67 } \
68 while (0)
69
70 #ifndef NUM_ELEM
71 #define NUM_ELEM(a) ((sizeof (a)) / sizeof ((a)[0]))
72 #endif
73
74 typedef enum {bunknown, b9, b12, b23} thumb_pcrel_branchtype;
75 /* Some typedefs for holding instructions. */
76 typedef unsigned long int insn32;
77 typedef unsigned short int insn16;
78
79 /* The linker script knows the section names for placement.
80 The entry_names are used to do simple name mangling on the stubs.
81 Given a function name, and its type, the stub can be found. The
82 name can be changed. The only requirement is the %s be present. */
83
84 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
85 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
86
87 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
88 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
89
90 /* Used by the assembler. */
91
92 static bfd_reloc_status_type
coff_arm_reloc(bfd * abfd,arelent * reloc_entry,asymbol * symbol ATTRIBUTE_UNUSED,void * data,asection * input_section ATTRIBUTE_UNUSED,bfd * output_bfd,char ** error_message ATTRIBUTE_UNUSED)93 coff_arm_reloc (bfd *abfd,
94 arelent *reloc_entry,
95 asymbol *symbol ATTRIBUTE_UNUSED,
96 void * data,
97 asection *input_section ATTRIBUTE_UNUSED,
98 bfd *output_bfd,
99 char **error_message ATTRIBUTE_UNUSED)
100 {
101 symvalue diff;
102
103 if (output_bfd == NULL)
104 return bfd_reloc_continue;
105
106 diff = reloc_entry->addend;
107
108 #define DOIT(x) \
109 x = ((x & ~howto->dst_mask) \
110 | (((x & howto->src_mask) + diff) & howto->dst_mask))
111
112 if (diff != 0)
113 {
114 reloc_howto_type *howto = reloc_entry->howto;
115 unsigned char *addr = (unsigned char *) data + reloc_entry->address;
116
117 switch (howto->size)
118 {
119 case 0:
120 {
121 char x = bfd_get_8 (abfd, addr);
122 DOIT (x);
123 bfd_put_8 (abfd, x, addr);
124 }
125 break;
126
127 case 1:
128 {
129 short x = bfd_get_16 (abfd, addr);
130 DOIT (x);
131 bfd_put_16 (abfd, (bfd_vma) x, addr);
132 }
133 break;
134
135 case 2:
136 {
137 long x = bfd_get_32 (abfd, addr);
138 DOIT (x);
139 bfd_put_32 (abfd, (bfd_vma) x, addr);
140 }
141 break;
142
143 default:
144 abort ();
145 }
146 }
147
148 /* Now let bfd_perform_relocation finish everything up. */
149 return bfd_reloc_continue;
150 }
151
152 /* If USER_LABEL_PREFIX is defined as "_" (see coff_arm_is_local_label_name()
153 in this file), then TARGET_UNDERSCORE should be defined, otherwise it
154 should not. */
155 #ifndef TARGET_UNDERSCORE
156 #define TARGET_UNDERSCORE '_'
157 #endif
158
159 #ifndef PCRELOFFSET
160 #define PCRELOFFSET TRUE
161 #endif
162
163 /* These most certainly belong somewhere else. Just had to get rid of
164 the manifest constants in the code. */
165
166 #ifdef ARM_WINCE
167
168 #define ARM_26D 0
169 #define ARM_32 1
170 #define ARM_RVA32 2
171 #define ARM_26 3
172 #define ARM_THUMB12 4
173 #define ARM_SECTION 14
174 #define ARM_SECREL 15
175
176 #else
177
178 #define ARM_8 0
179 #define ARM_16 1
180 #define ARM_32 2
181 #define ARM_26 3
182 #define ARM_DISP8 4
183 #define ARM_DISP16 5
184 #define ARM_DISP32 6
185 #define ARM_26D 7
186 /* 8 is unused. */
187 #define ARM_NEG16 9
188 #define ARM_NEG32 10
189 #define ARM_RVA32 11
190 #define ARM_THUMB9 12
191 #define ARM_THUMB12 13
192 #define ARM_THUMB23 14
193
194 #endif
195
196 static bfd_reloc_status_type aoutarm_fix_pcrel_26_done
197 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
198 static bfd_reloc_status_type aoutarm_fix_pcrel_26
199 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
200 static bfd_reloc_status_type coff_thumb_pcrel_12
201 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
202 #ifndef ARM_WINCE
203 static bfd_reloc_status_type coff_thumb_pcrel_9
204 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
205 static bfd_reloc_status_type coff_thumb_pcrel_23
206 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
207 #endif
208
209 static reloc_howto_type aoutarm_std_reloc_howto[] =
210 {
211 #ifdef ARM_WINCE
212 HOWTO (ARM_26D,
213 2,
214 2,
215 24,
216 TRUE,
217 0,
218 complain_overflow_dont,
219 aoutarm_fix_pcrel_26_done,
220 "ARM_26D",
221 TRUE, /* partial_inplace. */
222 0x00ffffff,
223 0x0,
224 PCRELOFFSET),
225 HOWTO (ARM_32,
226 0,
227 2,
228 32,
229 FALSE,
230 0,
231 complain_overflow_bitfield,
232 coff_arm_reloc,
233 "ARM_32",
234 TRUE, /* partial_inplace. */
235 0xffffffff,
236 0xffffffff,
237 PCRELOFFSET),
238 HOWTO (ARM_RVA32,
239 0,
240 2,
241 32,
242 FALSE,
243 0,
244 complain_overflow_bitfield,
245 coff_arm_reloc,
246 "ARM_RVA32",
247 TRUE, /* partial_inplace. */
248 0xffffffff,
249 0xffffffff,
250 PCRELOFFSET),
251 HOWTO (ARM_26,
252 2,
253 2,
254 24,
255 TRUE,
256 0,
257 complain_overflow_signed,
258 aoutarm_fix_pcrel_26 ,
259 "ARM_26",
260 FALSE,
261 0x00ffffff,
262 0x00ffffff,
263 PCRELOFFSET),
264 HOWTO (ARM_THUMB12,
265 1,
266 1,
267 11,
268 TRUE,
269 0,
270 complain_overflow_signed,
271 coff_thumb_pcrel_12 ,
272 "ARM_THUMB12",
273 FALSE,
274 0x000007ff,
275 0x000007ff,
276 PCRELOFFSET),
277 EMPTY_HOWTO (-1),
278 EMPTY_HOWTO (-1),
279 EMPTY_HOWTO (-1),
280 EMPTY_HOWTO (-1),
281 EMPTY_HOWTO (-1),
282 EMPTY_HOWTO (-1),
283 EMPTY_HOWTO (-1),
284 EMPTY_HOWTO (-1),
285 EMPTY_HOWTO (-1),
286 HOWTO (ARM_SECTION,
287 0,
288 1,
289 16,
290 FALSE,
291 0,
292 complain_overflow_bitfield,
293 coff_arm_reloc,
294 "ARM_SECTION",
295 TRUE, /* partial_inplace. */
296 0x0000ffff,
297 0x0000ffff,
298 PCRELOFFSET),
299 HOWTO (ARM_SECREL,
300 0,
301 2,
302 32,
303 FALSE,
304 0,
305 complain_overflow_bitfield,
306 coff_arm_reloc,
307 "ARM_SECREL",
308 TRUE, /* partial_inplace. */
309 0xffffffff,
310 0xffffffff,
311 PCRELOFFSET),
312 #else /* not ARM_WINCE */
313 HOWTO (ARM_8,
314 0,
315 0,
316 8,
317 FALSE,
318 0,
319 complain_overflow_bitfield,
320 coff_arm_reloc,
321 "ARM_8",
322 TRUE,
323 0x000000ff,
324 0x000000ff,
325 PCRELOFFSET),
326 HOWTO (ARM_16,
327 0,
328 1,
329 16,
330 FALSE,
331 0,
332 complain_overflow_bitfield,
333 coff_arm_reloc,
334 "ARM_16",
335 TRUE,
336 0x0000ffff,
337 0x0000ffff,
338 PCRELOFFSET),
339 HOWTO (ARM_32,
340 0,
341 2,
342 32,
343 FALSE,
344 0,
345 complain_overflow_bitfield,
346 coff_arm_reloc,
347 "ARM_32",
348 TRUE,
349 0xffffffff,
350 0xffffffff,
351 PCRELOFFSET),
352 HOWTO (ARM_26,
353 2,
354 2,
355 24,
356 TRUE,
357 0,
358 complain_overflow_signed,
359 aoutarm_fix_pcrel_26 ,
360 "ARM_26",
361 FALSE,
362 0x00ffffff,
363 0x00ffffff,
364 PCRELOFFSET),
365 HOWTO (ARM_DISP8,
366 0,
367 0,
368 8,
369 TRUE,
370 0,
371 complain_overflow_signed,
372 coff_arm_reloc,
373 "ARM_DISP8",
374 TRUE,
375 0x000000ff,
376 0x000000ff,
377 TRUE),
378 HOWTO (ARM_DISP16,
379 0,
380 1,
381 16,
382 TRUE,
383 0,
384 complain_overflow_signed,
385 coff_arm_reloc,
386 "ARM_DISP16",
387 TRUE,
388 0x0000ffff,
389 0x0000ffff,
390 TRUE),
391 HOWTO (ARM_DISP32,
392 0,
393 2,
394 32,
395 TRUE,
396 0,
397 complain_overflow_signed,
398 coff_arm_reloc,
399 "ARM_DISP32",
400 TRUE,
401 0xffffffff,
402 0xffffffff,
403 TRUE),
404 HOWTO (ARM_26D,
405 2,
406 2,
407 24,
408 FALSE,
409 0,
410 complain_overflow_dont,
411 aoutarm_fix_pcrel_26_done,
412 "ARM_26D",
413 TRUE,
414 0x00ffffff,
415 0x0,
416 FALSE),
417 /* 8 is unused */
418 EMPTY_HOWTO (-1),
419 HOWTO (ARM_NEG16,
420 0,
421 -1,
422 16,
423 FALSE,
424 0,
425 complain_overflow_bitfield,
426 coff_arm_reloc,
427 "ARM_NEG16",
428 TRUE,
429 0x0000ffff,
430 0x0000ffff,
431 FALSE),
432 HOWTO (ARM_NEG32,
433 0,
434 -2,
435 32,
436 FALSE,
437 0,
438 complain_overflow_bitfield,
439 coff_arm_reloc,
440 "ARM_NEG32",
441 TRUE,
442 0xffffffff,
443 0xffffffff,
444 FALSE),
445 HOWTO (ARM_RVA32,
446 0,
447 2,
448 32,
449 FALSE,
450 0,
451 complain_overflow_bitfield,
452 coff_arm_reloc,
453 "ARM_RVA32",
454 TRUE,
455 0xffffffff,
456 0xffffffff,
457 PCRELOFFSET),
458 HOWTO (ARM_THUMB9,
459 1,
460 1,
461 8,
462 TRUE,
463 0,
464 complain_overflow_signed,
465 coff_thumb_pcrel_9 ,
466 "ARM_THUMB9",
467 FALSE,
468 0x000000ff,
469 0x000000ff,
470 PCRELOFFSET),
471 HOWTO (ARM_THUMB12,
472 1,
473 1,
474 11,
475 TRUE,
476 0,
477 complain_overflow_signed,
478 coff_thumb_pcrel_12 ,
479 "ARM_THUMB12",
480 FALSE,
481 0x000007ff,
482 0x000007ff,
483 PCRELOFFSET),
484 HOWTO (ARM_THUMB23,
485 1,
486 2,
487 22,
488 TRUE,
489 0,
490 complain_overflow_signed,
491 coff_thumb_pcrel_23 ,
492 "ARM_THUMB23",
493 FALSE,
494 0x07ff07ff,
495 0x07ff07ff,
496 PCRELOFFSET)
497 #endif /* not ARM_WINCE */
498 };
499
500 #define NUM_RELOCS NUM_ELEM (aoutarm_std_reloc_howto)
501
502 #ifdef COFF_WITH_PE
503 /* Return TRUE if this relocation should
504 appear in the output .reloc section. */
505
506 static bfd_boolean
in_reloc_p(bfd * abfd ATTRIBUTE_UNUSED,reloc_howto_type * howto)507 in_reloc_p (bfd * abfd ATTRIBUTE_UNUSED,
508 reloc_howto_type * howto)
509 {
510 return !howto->pc_relative && howto->type != ARM_RVA32;
511 }
512 #endif
513
514 #define RTYPE2HOWTO(cache_ptr, dst) \
515 (cache_ptr)->howto = \
516 (dst)->r_type < NUM_RELOCS \
517 ? aoutarm_std_reloc_howto + (dst)->r_type \
518 : NULL
519
520 #define coff_rtype_to_howto coff_arm_rtype_to_howto
521
522 static reloc_howto_type *
coff_arm_rtype_to_howto(bfd * abfd ATTRIBUTE_UNUSED,asection * sec,struct internal_reloc * rel,struct coff_link_hash_entry * h ATTRIBUTE_UNUSED,struct internal_syment * sym ATTRIBUTE_UNUSED,bfd_vma * addendp)523 coff_arm_rtype_to_howto (bfd *abfd ATTRIBUTE_UNUSED,
524 asection *sec,
525 struct internal_reloc *rel,
526 struct coff_link_hash_entry *h ATTRIBUTE_UNUSED,
527 struct internal_syment *sym ATTRIBUTE_UNUSED,
528 bfd_vma *addendp)
529 {
530 reloc_howto_type * howto;
531
532 if (rel->r_type >= NUM_RELOCS)
533 return NULL;
534
535 howto = aoutarm_std_reloc_howto + rel->r_type;
536
537 if (rel->r_type == ARM_RVA32)
538 *addendp -= pe_data (sec->output_section->owner)->pe_opthdr.ImageBase;
539
540 #if defined COFF_WITH_PE && defined ARM_WINCE
541 if (rel->r_type == ARM_SECREL)
542 {
543 bfd_vma osect_vma;
544
545 if (h && (h->type == bfd_link_hash_defined
546 || h->type == bfd_link_hash_defweak))
547 osect_vma = h->root.u.def.section->output_section->vma;
548 else
549 {
550 int i;
551
552 /* Sigh, the only way to get the section to offset against
553 is to find it the hard way. */
554
555 for (sec = abfd->sections, i = 1; i < sym->n_scnum; i++)
556 sec = sec->next;
557
558 osect_vma = sec->output_section->vma;
559 }
560
561 *addendp -= osect_vma;
562 }
563 #endif
564
565 return howto;
566 }
567
568 /* Used by the assembler. */
569
570 static bfd_reloc_status_type
aoutarm_fix_pcrel_26_done(bfd * abfd ATTRIBUTE_UNUSED,arelent * reloc_entry ATTRIBUTE_UNUSED,asymbol * symbol ATTRIBUTE_UNUSED,void * data ATTRIBUTE_UNUSED,asection * input_section ATTRIBUTE_UNUSED,bfd * output_bfd ATTRIBUTE_UNUSED,char ** error_message ATTRIBUTE_UNUSED)571 aoutarm_fix_pcrel_26_done (bfd *abfd ATTRIBUTE_UNUSED,
572 arelent *reloc_entry ATTRIBUTE_UNUSED,
573 asymbol *symbol ATTRIBUTE_UNUSED,
574 void * data ATTRIBUTE_UNUSED,
575 asection *input_section ATTRIBUTE_UNUSED,
576 bfd *output_bfd ATTRIBUTE_UNUSED,
577 char **error_message ATTRIBUTE_UNUSED)
578 {
579 /* This is dead simple at present. */
580 return bfd_reloc_ok;
581 }
582
583 /* Used by the assembler. */
584
585 static bfd_reloc_status_type
aoutarm_fix_pcrel_26(bfd * abfd,arelent * reloc_entry,asymbol * symbol,void * data,asection * input_section,bfd * output_bfd,char ** error_message ATTRIBUTE_UNUSED)586 aoutarm_fix_pcrel_26 (bfd *abfd,
587 arelent *reloc_entry,
588 asymbol *symbol,
589 void * data,
590 asection *input_section,
591 bfd *output_bfd,
592 char **error_message ATTRIBUTE_UNUSED)
593 {
594 bfd_vma relocation;
595 bfd_size_type addr = reloc_entry->address;
596 long target = bfd_get_32 (abfd, (bfd_byte *) data + addr);
597 bfd_reloc_status_type flag = bfd_reloc_ok;
598
599 /* If this is an undefined symbol, return error. */
600 if (bfd_is_und_section (symbol->section)
601 && (symbol->flags & BSF_WEAK) == 0)
602 return output_bfd ? bfd_reloc_continue : bfd_reloc_undefined;
603
604 /* If the sections are different, and we are doing a partial relocation,
605 just ignore it for now. */
606 if (symbol->section->name != input_section->name
607 && output_bfd != (bfd *)NULL)
608 return bfd_reloc_continue;
609
610 relocation = (target & 0x00ffffff) << 2;
611 relocation = (relocation ^ 0x02000000) - 0x02000000; /* Sign extend. */
612 relocation += symbol->value;
613 relocation += symbol->section->output_section->vma;
614 relocation += symbol->section->output_offset;
615 relocation += reloc_entry->addend;
616 relocation -= input_section->output_section->vma;
617 relocation -= input_section->output_offset;
618 relocation -= addr;
619
620 if (relocation & 3)
621 return bfd_reloc_overflow;
622
623 /* Check for overflow. */
624 if (relocation & 0x02000000)
625 {
626 if ((relocation & ~ (bfd_vma) 0x03ffffff) != ~ (bfd_vma) 0x03ffffff)
627 flag = bfd_reloc_overflow;
628 }
629 else if (relocation & ~(bfd_vma) 0x03ffffff)
630 flag = bfd_reloc_overflow;
631
632 target &= ~0x00ffffff;
633 target |= (relocation >> 2) & 0x00ffffff;
634 bfd_put_32 (abfd, (bfd_vma) target, (bfd_byte *) data + addr);
635
636 /* Now the ARM magic... Change the reloc type so that it is marked as done.
637 Strictly this is only necessary if we are doing a partial relocation. */
638 reloc_entry->howto = &aoutarm_std_reloc_howto[ARM_26D];
639
640 return flag;
641 }
642
643 static bfd_reloc_status_type
coff_thumb_pcrel_common(bfd * abfd,arelent * reloc_entry,asymbol * symbol,void * data,asection * input_section,bfd * output_bfd,char ** error_message ATTRIBUTE_UNUSED,thumb_pcrel_branchtype btype)644 coff_thumb_pcrel_common (bfd *abfd,
645 arelent *reloc_entry,
646 asymbol *symbol,
647 void * data,
648 asection *input_section,
649 bfd *output_bfd,
650 char **error_message ATTRIBUTE_UNUSED,
651 thumb_pcrel_branchtype btype)
652 {
653 bfd_vma relocation = 0;
654 bfd_size_type addr = reloc_entry->address;
655 long target = bfd_get_32 (abfd, (bfd_byte *) data + addr);
656 bfd_reloc_status_type flag = bfd_reloc_ok;
657 bfd_vma dstmsk;
658 bfd_vma offmsk;
659 bfd_vma signbit;
660
661 /* NOTE: This routine is currently used by GAS, but not by the link
662 phase. */
663 switch (btype)
664 {
665 case b9:
666 dstmsk = 0x000000ff;
667 offmsk = 0x000001fe;
668 signbit = 0x00000100;
669 break;
670
671 case b12:
672 dstmsk = 0x000007ff;
673 offmsk = 0x00000ffe;
674 signbit = 0x00000800;
675 break;
676
677 case b23:
678 dstmsk = 0x07ff07ff;
679 offmsk = 0x007fffff;
680 signbit = 0x00400000;
681 break;
682
683 default:
684 abort ();
685 }
686
687 /* If this is an undefined symbol, return error. */
688 if (bfd_is_und_section (symbol->section)
689 && (symbol->flags & BSF_WEAK) == 0)
690 return output_bfd ? bfd_reloc_continue : bfd_reloc_undefined;
691
692 /* If the sections are different, and we are doing a partial relocation,
693 just ignore it for now. */
694 if (symbol->section->name != input_section->name
695 && output_bfd != (bfd *)NULL)
696 return bfd_reloc_continue;
697
698 switch (btype)
699 {
700 case b9:
701 case b12:
702 relocation = ((target & dstmsk) << 1);
703 break;
704
705 case b23:
706 if (bfd_big_endian (abfd))
707 relocation = ((target & 0x7ff) << 1) | ((target & 0x07ff0000) >> 4);
708 else
709 relocation = ((target & 0x7ff) << 12) | ((target & 0x07ff0000) >> 15);
710 break;
711
712 default:
713 abort ();
714 }
715
716 relocation = (relocation ^ signbit) - signbit; /* Sign extend. */
717 relocation += symbol->value;
718 relocation += symbol->section->output_section->vma;
719 relocation += symbol->section->output_offset;
720 relocation += reloc_entry->addend;
721 relocation -= input_section->output_section->vma;
722 relocation -= input_section->output_offset;
723 relocation -= addr;
724
725 if (relocation & 1)
726 return bfd_reloc_overflow;
727
728 /* Check for overflow. */
729 if (relocation & signbit)
730 {
731 if ((relocation & ~offmsk) != ~offmsk)
732 flag = bfd_reloc_overflow;
733 }
734 else if (relocation & ~offmsk)
735 flag = bfd_reloc_overflow;
736
737 target &= ~dstmsk;
738 switch (btype)
739 {
740 case b9:
741 case b12:
742 target |= (relocation >> 1);
743 break;
744
745 case b23:
746 if (bfd_big_endian (abfd))
747 target |= (((relocation & 0xfff) >> 1)
748 | ((relocation << 4) & 0x07ff0000));
749 else
750 target |= (((relocation & 0xffe) << 15)
751 | ((relocation >> 12) & 0x7ff));
752 break;
753
754 default:
755 abort ();
756 }
757
758 bfd_put_32 (abfd, (bfd_vma) target, (bfd_byte *) data + addr);
759
760 /* Now the ARM magic... Change the reloc type so that it is marked as done.
761 Strictly this is only necessary if we are doing a partial relocation. */
762 reloc_entry->howto = & aoutarm_std_reloc_howto [ARM_26D];
763
764 /* TODO: We should possibly have DONE entries for the THUMB PCREL relocations. */
765 return flag;
766 }
767
768 #ifndef ARM_WINCE
769 static bfd_reloc_status_type
coff_thumb_pcrel_23(bfd * abfd,arelent * reloc_entry,asymbol * symbol,void * data,asection * input_section,bfd * output_bfd,char ** error_message)770 coff_thumb_pcrel_23 (bfd *abfd,
771 arelent *reloc_entry,
772 asymbol *symbol,
773 void * data,
774 asection *input_section,
775 bfd *output_bfd,
776 char **error_message)
777 {
778 return coff_thumb_pcrel_common (abfd, reloc_entry, symbol, data,
779 input_section, output_bfd, error_message,
780 b23);
781 }
782
783 static bfd_reloc_status_type
coff_thumb_pcrel_9(bfd * abfd,arelent * reloc_entry,asymbol * symbol,void * data,asection * input_section,bfd * output_bfd,char ** error_message)784 coff_thumb_pcrel_9 (bfd *abfd,
785 arelent *reloc_entry,
786 asymbol *symbol,
787 void * data,
788 asection *input_section,
789 bfd *output_bfd,
790 char **error_message)
791 {
792 return coff_thumb_pcrel_common (abfd, reloc_entry, symbol, data,
793 input_section, output_bfd, error_message,
794 b9);
795 }
796 #endif /* not ARM_WINCE */
797
798 static bfd_reloc_status_type
coff_thumb_pcrel_12(bfd * abfd,arelent * reloc_entry,asymbol * symbol,void * data,asection * input_section,bfd * output_bfd,char ** error_message)799 coff_thumb_pcrel_12 (bfd *abfd,
800 arelent *reloc_entry,
801 asymbol *symbol,
802 void * data,
803 asection *input_section,
804 bfd *output_bfd,
805 char **error_message)
806 {
807 return coff_thumb_pcrel_common (abfd, reloc_entry, symbol, data,
808 input_section, output_bfd, error_message,
809 b12);
810 }
811
812 static const struct reloc_howto_struct *
coff_arm_reloc_type_lookup(bfd * abfd,bfd_reloc_code_real_type code)813 coff_arm_reloc_type_lookup (bfd * abfd, bfd_reloc_code_real_type code)
814 {
815 #define ASTD(i,j) case i: return aoutarm_std_reloc_howto + j
816
817 if (code == BFD_RELOC_CTOR)
818 switch (bfd_arch_bits_per_address (abfd))
819 {
820 case 32:
821 code = BFD_RELOC_32;
822 break;
823 default:
824 return NULL;
825 }
826
827 switch (code)
828 {
829 #ifdef ARM_WINCE
830 ASTD (BFD_RELOC_32, ARM_32);
831 ASTD (BFD_RELOC_RVA, ARM_RVA32);
832 ASTD (BFD_RELOC_ARM_PCREL_BRANCH, ARM_26);
833 ASTD (BFD_RELOC_THUMB_PCREL_BRANCH12, ARM_THUMB12);
834 ASTD (BFD_RELOC_32_SECREL, ARM_SECREL);
835 #else
836 ASTD (BFD_RELOC_8, ARM_8);
837 ASTD (BFD_RELOC_16, ARM_16);
838 ASTD (BFD_RELOC_32, ARM_32);
839 ASTD (BFD_RELOC_ARM_PCREL_BRANCH, ARM_26);
840 ASTD (BFD_RELOC_ARM_PCREL_BLX, ARM_26);
841 ASTD (BFD_RELOC_8_PCREL, ARM_DISP8);
842 ASTD (BFD_RELOC_16_PCREL, ARM_DISP16);
843 ASTD (BFD_RELOC_32_PCREL, ARM_DISP32);
844 ASTD (BFD_RELOC_RVA, ARM_RVA32);
845 ASTD (BFD_RELOC_THUMB_PCREL_BRANCH9, ARM_THUMB9);
846 ASTD (BFD_RELOC_THUMB_PCREL_BRANCH12, ARM_THUMB12);
847 ASTD (BFD_RELOC_THUMB_PCREL_BRANCH23, ARM_THUMB23);
848 ASTD (BFD_RELOC_THUMB_PCREL_BLX, ARM_THUMB23);
849 #endif
850 default: return NULL;
851 }
852 }
853
854 static reloc_howto_type *
coff_arm_reloc_name_lookup(bfd * abfd ATTRIBUTE_UNUSED,const char * r_name)855 coff_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
856 const char *r_name)
857 {
858 unsigned int i;
859
860 for (i = 0;
861 i < (sizeof (aoutarm_std_reloc_howto)
862 / sizeof (aoutarm_std_reloc_howto[0]));
863 i++)
864 if (aoutarm_std_reloc_howto[i].name != NULL
865 && strcasecmp (aoutarm_std_reloc_howto[i].name, r_name) == 0)
866 return &aoutarm_std_reloc_howto[i];
867
868 return NULL;
869 }
870
871 #define COFF_DEFAULT_SECTION_ALIGNMENT_POWER 2
872 #define COFF_PAGE_SIZE 0x1000
873
874 /* Turn a howto into a reloc nunmber. */
875 #define SELECT_RELOC(x,howto) { x.r_type = howto->type; }
876 #define BADMAG(x) ARMBADMAG(x)
877 #define ARM 1 /* Customize coffcode.h. */
878
879 #ifndef ARM_WINCE
880 /* Make sure that the 'r_offset' field is copied properly
881 so that identical binaries will compare the same. */
882 #define SWAP_IN_RELOC_OFFSET H_GET_32
883 #define SWAP_OUT_RELOC_OFFSET H_PUT_32
884 #endif
885
886 /* Extend the coff_link_hash_table structure with a few ARM specific fields.
887 This allows us to store global data here without actually creating any
888 global variables, which is a no-no in the BFD world. */
889 struct coff_arm_link_hash_table
890 {
891 /* The original coff_link_hash_table structure. MUST be first field. */
892 struct coff_link_hash_table root;
893
894 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
895 bfd_size_type thumb_glue_size;
896
897 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
898 bfd_size_type arm_glue_size;
899
900 /* An arbitrary input BFD chosen to hold the glue sections. */
901 bfd * bfd_of_glue_owner;
902
903 /* Support interworking with old, non-interworking aware ARM code. */
904 int support_old_code;
905 };
906
907 /* Get the ARM coff linker hash table from a link_info structure. */
908 #define coff_arm_hash_table(info) \
909 ((struct coff_arm_link_hash_table *) ((info)->hash))
910
911 /* Create an ARM coff linker hash table. */
912
913 static struct bfd_link_hash_table *
coff_arm_link_hash_table_create(bfd * abfd)914 coff_arm_link_hash_table_create (bfd * abfd)
915 {
916 struct coff_arm_link_hash_table * ret;
917 bfd_size_type amt = sizeof (struct coff_arm_link_hash_table);
918
919 ret = bfd_zmalloc (amt);
920 if (ret == NULL)
921 return NULL;
922
923 if (!_bfd_coff_link_hash_table_init (&ret->root,
924 abfd,
925 _bfd_coff_link_hash_newfunc,
926 sizeof (struct coff_link_hash_entry)))
927 {
928 free (ret);
929 return NULL;
930 }
931
932 return & ret->root.root;
933 }
934
935 static bfd_boolean
arm_emit_base_file_entry(struct bfd_link_info * info,bfd * output_bfd,asection * input_section,bfd_vma reloc_offset)936 arm_emit_base_file_entry (struct bfd_link_info *info,
937 bfd *output_bfd,
938 asection *input_section,
939 bfd_vma reloc_offset)
940 {
941 bfd_vma addr = (reloc_offset
942 - input_section->vma
943 + input_section->output_offset
944 + input_section->output_section->vma);
945
946 if (coff_data (output_bfd)->pe)
947 addr -= pe_data (output_bfd)->pe_opthdr.ImageBase;
948 if (fwrite (&addr, sizeof (addr), 1, (FILE *) info->base_file) == 1)
949 return TRUE;
950
951 bfd_set_error (bfd_error_system_call);
952 return FALSE;
953 }
954
955 #ifndef ARM_WINCE
956 /* The thumb form of a long branch is a bit finicky, because the offset
957 encoding is split over two fields, each in it's own instruction. They
958 can occur in any order. So given a thumb form of long branch, and an
959 offset, insert the offset into the thumb branch and return finished
960 instruction.
961
962 It takes two thumb instructions to encode the target address. Each has
963 11 bits to invest. The upper 11 bits are stored in one (identified by
964 H-0.. see below), the lower 11 bits are stored in the other (identified
965 by H-1).
966
967 Combine together and shifted left by 1 (it's a half word address) and
968 there you have it.
969
970 Op: 1111 = F,
971 H-0, upper address-0 = 000
972 Op: 1111 = F,
973 H-1, lower address-0 = 800
974
975 They can be ordered either way, but the arm tools I've seen always put
976 the lower one first. It probably doesn't matter. krk@cygnus.com
977
978 XXX: Actually the order does matter. The second instruction (H-1)
979 moves the computed address into the PC, so it must be the second one
980 in the sequence. The problem, however is that whilst little endian code
981 stores the instructions in HI then LOW order, big endian code does the
982 reverse. nickc@cygnus.com. */
983
984 #define LOW_HI_ORDER 0xF800F000
985 #define HI_LOW_ORDER 0xF000F800
986
987 static insn32
insert_thumb_branch(insn32 br_insn,int rel_off)988 insert_thumb_branch (insn32 br_insn, int rel_off)
989 {
990 unsigned int low_bits;
991 unsigned int high_bits;
992
993 BFD_ASSERT ((rel_off & 1) != 1);
994
995 rel_off >>= 1; /* Half word aligned address. */
996 low_bits = rel_off & 0x000007FF; /* The bottom 11 bits. */
997 high_bits = (rel_off >> 11) & 0x000007FF; /* The top 11 bits. */
998
999 if ((br_insn & LOW_HI_ORDER) == LOW_HI_ORDER)
1000 br_insn = LOW_HI_ORDER | (low_bits << 16) | high_bits;
1001 else if ((br_insn & HI_LOW_ORDER) == HI_LOW_ORDER)
1002 br_insn = HI_LOW_ORDER | (high_bits << 16) | low_bits;
1003 else
1004 /* FIXME: the BFD library should never abort except for internal errors
1005 - it should return an error status. */
1006 abort (); /* Error - not a valid branch instruction form. */
1007
1008 return br_insn;
1009 }
1010
1011
1012 static struct coff_link_hash_entry *
find_thumb_glue(struct bfd_link_info * info,const char * name,bfd * input_bfd)1013 find_thumb_glue (struct bfd_link_info *info,
1014 const char *name,
1015 bfd *input_bfd)
1016 {
1017 char *tmp_name;
1018 struct coff_link_hash_entry *myh;
1019 bfd_size_type amt = strlen (name) + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1;
1020
1021 tmp_name = bfd_malloc (amt);
1022
1023 BFD_ASSERT (tmp_name);
1024
1025 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
1026
1027 myh = coff_link_hash_lookup
1028 (coff_hash_table (info), tmp_name, FALSE, FALSE, TRUE);
1029
1030 if (myh == NULL)
1031 /* xgettext:c-format */
1032 _bfd_error_handler (_("%B: unable to find THUMB glue '%s' for `%s'"),
1033 input_bfd, tmp_name, name);
1034
1035 free (tmp_name);
1036
1037 return myh;
1038 }
1039 #endif /* not ARM_WINCE */
1040
1041 static struct coff_link_hash_entry *
find_arm_glue(struct bfd_link_info * info,const char * name,bfd * input_bfd)1042 find_arm_glue (struct bfd_link_info *info,
1043 const char *name,
1044 bfd *input_bfd)
1045 {
1046 char *tmp_name;
1047 struct coff_link_hash_entry * myh;
1048 bfd_size_type amt = strlen (name) + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1;
1049
1050 tmp_name = bfd_malloc (amt);
1051
1052 BFD_ASSERT (tmp_name);
1053
1054 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
1055
1056 myh = coff_link_hash_lookup
1057 (coff_hash_table (info), tmp_name, FALSE, FALSE, TRUE);
1058
1059 if (myh == NULL)
1060 /* xgettext:c-format */
1061 _bfd_error_handler (_("%B: unable to find ARM glue '%s' for `%s'"),
1062 input_bfd, tmp_name, name);
1063
1064 free (tmp_name);
1065
1066 return myh;
1067 }
1068
1069 /*
1070 ARM->Thumb glue:
1071
1072 .arm
1073 __func_from_arm:
1074 ldr r12, __func_addr
1075 bx r12
1076 __func_addr:
1077 .word func @ behave as if you saw a ARM_32 reloc
1078 */
1079
1080 #define ARM2THUMB_GLUE_SIZE 12
1081 static const insn32 a2t1_ldr_insn = 0xe59fc000;
1082 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
1083 static const insn32 a2t3_func_addr_insn = 0x00000001;
1084
1085 /*
1086 Thumb->ARM: Thumb->(non-interworking aware) ARM
1087
1088 .thumb .thumb
1089 .align 2 .align 2
1090 __func_from_thumb: __func_from_thumb:
1091 bx pc push {r6, lr}
1092 nop ldr r6, __func_addr
1093 .arm mov lr, pc
1094 __func_change_to_arm: bx r6
1095 b func .arm
1096 __func_back_to_thumb:
1097 ldmia r13! {r6, lr}
1098 bx lr
1099 __func_addr:
1100 .word func
1101 */
1102
1103 #define THUMB2ARM_GLUE_SIZE (globals->support_old_code ? 20 : 8)
1104 #ifndef ARM_WINCE
1105 static const insn16 t2a1_bx_pc_insn = 0x4778;
1106 static const insn16 t2a2_noop_insn = 0x46c0;
1107 static const insn32 t2a3_b_insn = 0xea000000;
1108
1109 static const insn16 t2a1_push_insn = 0xb540;
1110 static const insn16 t2a2_ldr_insn = 0x4e03;
1111 static const insn16 t2a3_mov_insn = 0x46fe;
1112 static const insn16 t2a4_bx_insn = 0x4730;
1113 static const insn32 t2a5_pop_insn = 0xe8bd4040;
1114 static const insn32 t2a6_bx_insn = 0xe12fff1e;
1115 #endif
1116
1117 /* TODO:
1118 We should really create new local (static) symbols in destination
1119 object for each stub we create. We should also create local
1120 (static) symbols within the stubs when switching between ARM and
1121 Thumb code. This will ensure that the debugger and disassembler
1122 can present a better view of stubs.
1123
1124 We can treat stubs like literal sections, and for the THUMB9 ones
1125 (short addressing range) we should be able to insert the stubs
1126 between sections. i.e. the simplest approach (since relocations
1127 are done on a section basis) is to dump the stubs at the end of
1128 processing a section. That way we can always try and minimise the
1129 offset to and from a stub. However, this does not map well onto
1130 the way that the linker/BFD does its work: mapping all input
1131 sections to output sections via the linker script before doing
1132 all the processing.
1133
1134 Unfortunately it may be easier to just to disallow short range
1135 Thumb->ARM stubs (i.e. no conditional inter-working branches,
1136 only branch-and-link (BL) calls. This will simplify the processing
1137 since we can then put all of the stubs into their own section.
1138
1139 TODO:
1140 On a different subject, rather than complaining when a
1141 branch cannot fit in the number of bits available for the
1142 instruction we should generate a trampoline stub (needed to
1143 address the complete 32bit address space). */
1144
1145 /* The standard COFF backend linker does not cope with the special
1146 Thumb BRANCH23 relocation. The alternative would be to split the
1147 BRANCH23 into seperate HI23 and LO23 relocations. However, it is a
1148 bit simpler simply providing our own relocation driver. */
1149
1150 /* The reloc processing routine for the ARM/Thumb COFF linker. NOTE:
1151 This code is a very slightly modified copy of
1152 _bfd_coff_generic_relocate_section. It would be a much more
1153 maintainable solution to have a MACRO that could be expanded within
1154 _bfd_coff_generic_relocate_section that would only be provided for
1155 ARM/Thumb builds. It is only the code marked THUMBEXTENSION that
1156 is different from the original. */
1157
1158 static bfd_boolean
coff_arm_relocate_section(bfd * output_bfd,struct bfd_link_info * info,bfd * input_bfd,asection * input_section,bfd_byte * contents,struct internal_reloc * relocs,struct internal_syment * syms,asection ** sections)1159 coff_arm_relocate_section (bfd *output_bfd,
1160 struct bfd_link_info *info,
1161 bfd *input_bfd,
1162 asection *input_section,
1163 bfd_byte *contents,
1164 struct internal_reloc *relocs,
1165 struct internal_syment *syms,
1166 asection **sections)
1167 {
1168 struct internal_reloc * rel;
1169 struct internal_reloc * relend;
1170 #ifndef ARM_WINCE
1171 bfd_vma high_address = bfd_get_section_limit (input_bfd, input_section);
1172 #endif
1173
1174 rel = relocs;
1175 relend = rel + input_section->reloc_count;
1176
1177 for (; rel < relend; rel++)
1178 {
1179 int done = 0;
1180 long symndx;
1181 struct coff_link_hash_entry * h;
1182 struct internal_syment * sym;
1183 bfd_vma addend;
1184 bfd_vma val;
1185 reloc_howto_type * howto;
1186 bfd_reloc_status_type rstat;
1187 bfd_vma h_val;
1188
1189 symndx = rel->r_symndx;
1190
1191 if (symndx == -1)
1192 {
1193 h = NULL;
1194 sym = NULL;
1195 }
1196 else
1197 {
1198 h = obj_coff_sym_hashes (input_bfd)[symndx];
1199 sym = syms + symndx;
1200 }
1201
1202 /* COFF treats common symbols in one of two ways. Either the
1203 size of the symbol is included in the section contents, or it
1204 is not. We assume that the size is not included, and force
1205 the rtype_to_howto function to adjust the addend as needed. */
1206
1207 if (sym != NULL && sym->n_scnum != 0)
1208 addend = - sym->n_value;
1209 else
1210 addend = 0;
1211
1212 howto = coff_rtype_to_howto (input_bfd, input_section, rel, h,
1213 sym, &addend);
1214 if (howto == NULL)
1215 return FALSE;
1216
1217 /* The relocation_section function will skip pcrel_offset relocs
1218 when doing a relocatable link. However, we want to convert
1219 ARM_26 to ARM_26D relocs if possible. We return a fake howto in
1220 this case without pcrel_offset set, and adjust the addend to
1221 compensate. 'partial_inplace' is also set, since we want 'done'
1222 relocations to be reflected in section's data. */
1223 if (rel->r_type == ARM_26
1224 && h != NULL
1225 && info->relocatable
1226 && (h->root.type == bfd_link_hash_defined
1227 || h->root.type == bfd_link_hash_defweak)
1228 && (h->root.u.def.section->output_section
1229 == input_section->output_section))
1230 {
1231 static reloc_howto_type fake_arm26_reloc =
1232 HOWTO (ARM_26,
1233 2,
1234 2,
1235 24,
1236 TRUE,
1237 0,
1238 complain_overflow_signed,
1239 aoutarm_fix_pcrel_26 ,
1240 "ARM_26",
1241 TRUE,
1242 0x00ffffff,
1243 0x00ffffff,
1244 FALSE);
1245
1246 addend -= rel->r_vaddr - input_section->vma;
1247 #ifdef ARM_WINCE
1248 /* FIXME: I don't know why, but the hack is necessary for correct
1249 generation of bl's instruction offset. */
1250 addend -= 8;
1251 #endif
1252 howto = & fake_arm26_reloc;
1253 }
1254
1255 #ifdef ARM_WINCE
1256 /* MS ARM-CE makes the reloc relative to the opcode's pc, not
1257 the next opcode's pc, so is off by one. */
1258 if (howto->pc_relative && !info->relocatable)
1259 addend -= 8;
1260 #endif
1261
1262 /* If we are doing a relocatable link, then we can just ignore
1263 a PC relative reloc that is pcrel_offset. It will already
1264 have the correct value. If this is not a relocatable link,
1265 then we should ignore the symbol value. */
1266 if (howto->pc_relative && howto->pcrel_offset)
1267 {
1268 if (info->relocatable)
1269 continue;
1270 /* FIXME - it is not clear which targets need this next test
1271 and which do not. It is known that it is needed for the
1272 VxWorks and EPOC-PE targets, but it is also known that it
1273 was suppressed for other ARM targets. This ought to be
1274 sorted out one day. */
1275 #ifdef ARM_COFF_BUGFIX
1276 /* We must not ignore the symbol value. If the symbol is
1277 within the same section, the relocation should have already
1278 been fixed, but if it is not, we'll be handed a reloc into
1279 the beginning of the symbol's section, so we must not cancel
1280 out the symbol's value, otherwise we'll be adding it in
1281 twice. */
1282 if (sym != NULL && sym->n_scnum != 0)
1283 addend += sym->n_value;
1284 #endif
1285 }
1286
1287 val = 0;
1288
1289 if (h == NULL)
1290 {
1291 asection *sec;
1292
1293 if (symndx == -1)
1294 {
1295 sec = bfd_abs_section_ptr;
1296 val = 0;
1297 }
1298 else
1299 {
1300 sec = sections[symndx];
1301 val = (sec->output_section->vma
1302 + sec->output_offset
1303 + sym->n_value
1304 - sec->vma);
1305 }
1306 }
1307 else
1308 {
1309 /* We don't output the stubs if we are generating a
1310 relocatable output file, since we may as well leave the
1311 stub generation to the final linker pass. If we fail to
1312 verify that the name is defined, we'll try to build stubs
1313 for an undefined name... */
1314 if (! info->relocatable
1315 && ( h->root.type == bfd_link_hash_defined
1316 || h->root.type == bfd_link_hash_defweak))
1317 {
1318 asection * h_sec = h->root.u.def.section;
1319 const char * name = h->root.root.string;
1320
1321 /* h locates the symbol referenced in the reloc. */
1322 h_val = (h->root.u.def.value
1323 + h_sec->output_section->vma
1324 + h_sec->output_offset);
1325
1326 if (howto->type == ARM_26)
1327 {
1328 if ( h->symbol_class == C_THUMBSTATFUNC
1329 || h->symbol_class == C_THUMBEXTFUNC)
1330 {
1331 /* Arm code calling a Thumb function. */
1332 unsigned long int tmp;
1333 bfd_vma my_offset;
1334 asection * s;
1335 long int ret_offset;
1336 struct coff_link_hash_entry * myh;
1337 struct coff_arm_link_hash_table * globals;
1338
1339 myh = find_arm_glue (info, name, input_bfd);
1340 if (myh == NULL)
1341 return FALSE;
1342
1343 globals = coff_arm_hash_table (info);
1344
1345 BFD_ASSERT (globals != NULL);
1346 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
1347
1348 my_offset = myh->root.u.def.value;
1349
1350 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
1351 ARM2THUMB_GLUE_SECTION_NAME);
1352 BFD_ASSERT (s != NULL);
1353 BFD_ASSERT (s->contents != NULL);
1354 BFD_ASSERT (s->output_section != NULL);
1355
1356 if ((my_offset & 0x01) == 0x01)
1357 {
1358 if (h_sec->owner != NULL
1359 && INTERWORK_SET (h_sec->owner)
1360 && ! INTERWORK_FLAG (h_sec->owner))
1361 _bfd_error_handler
1362 /* xgettext:c-format */
1363 (_("%B(%s): warning: interworking not enabled.\n"
1364 " first occurrence: %B: arm call to thumb"),
1365 h_sec->owner, input_bfd, name);
1366
1367 --my_offset;
1368 myh->root.u.def.value = my_offset;
1369
1370 bfd_put_32 (output_bfd, (bfd_vma) a2t1_ldr_insn,
1371 s->contents + my_offset);
1372
1373 bfd_put_32 (output_bfd, (bfd_vma) a2t2_bx_r12_insn,
1374 s->contents + my_offset + 4);
1375
1376 /* It's a thumb address. Add the low order bit. */
1377 bfd_put_32 (output_bfd, h_val | a2t3_func_addr_insn,
1378 s->contents + my_offset + 8);
1379
1380 if (info->base_file
1381 && !arm_emit_base_file_entry (info, output_bfd,
1382 s, my_offset + 8))
1383 return FALSE;
1384 }
1385
1386 BFD_ASSERT (my_offset <= globals->arm_glue_size);
1387
1388 tmp = bfd_get_32 (input_bfd, contents + rel->r_vaddr
1389 - input_section->vma);
1390
1391 tmp = tmp & 0xFF000000;
1392
1393 /* Somehow these are both 4 too far, so subtract 8. */
1394 ret_offset =
1395 s->output_offset
1396 + my_offset
1397 + s->output_section->vma
1398 - (input_section->output_offset
1399 + input_section->output_section->vma
1400 + rel->r_vaddr)
1401 - 8;
1402
1403 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
1404
1405 bfd_put_32 (output_bfd, (bfd_vma) tmp,
1406 contents + rel->r_vaddr - input_section->vma);
1407 done = 1;
1408 }
1409 }
1410
1411 #ifndef ARM_WINCE
1412 /* Note: We used to check for ARM_THUMB9 and ARM_THUMB12. */
1413 else if (howto->type == ARM_THUMB23)
1414 {
1415 if ( h->symbol_class == C_EXT
1416 || h->symbol_class == C_STAT
1417 || h->symbol_class == C_LABEL)
1418 {
1419 /* Thumb code calling an ARM function. */
1420 asection * s = 0;
1421 bfd_vma my_offset;
1422 unsigned long int tmp;
1423 long int ret_offset;
1424 struct coff_link_hash_entry * myh;
1425 struct coff_arm_link_hash_table * globals;
1426
1427 myh = find_thumb_glue (info, name, input_bfd);
1428 if (myh == NULL)
1429 return FALSE;
1430
1431 globals = coff_arm_hash_table (info);
1432
1433 BFD_ASSERT (globals != NULL);
1434 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
1435
1436 my_offset = myh->root.u.def.value;
1437
1438 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
1439 THUMB2ARM_GLUE_SECTION_NAME);
1440
1441 BFD_ASSERT (s != NULL);
1442 BFD_ASSERT (s->contents != NULL);
1443 BFD_ASSERT (s->output_section != NULL);
1444
1445 if ((my_offset & 0x01) == 0x01)
1446 {
1447 if (h_sec->owner != NULL
1448 && INTERWORK_SET (h_sec->owner)
1449 && ! INTERWORK_FLAG (h_sec->owner)
1450 && ! globals->support_old_code)
1451 _bfd_error_handler
1452 /* xgettext:c-format */
1453 (_("%B(%s): warning: interworking not enabled.\n"
1454 " first occurrence: %B: thumb call to arm\n"
1455 " consider relinking with --support-old-code enabled"),
1456 h_sec->owner, input_bfd, name);
1457
1458 -- my_offset;
1459 myh->root.u.def.value = my_offset;
1460
1461 if (globals->support_old_code)
1462 {
1463 bfd_put_16 (output_bfd, (bfd_vma) t2a1_push_insn,
1464 s->contents + my_offset);
1465
1466 bfd_put_16 (output_bfd, (bfd_vma) t2a2_ldr_insn,
1467 s->contents + my_offset + 2);
1468
1469 bfd_put_16 (output_bfd, (bfd_vma) t2a3_mov_insn,
1470 s->contents + my_offset + 4);
1471
1472 bfd_put_16 (output_bfd, (bfd_vma) t2a4_bx_insn,
1473 s->contents + my_offset + 6);
1474
1475 bfd_put_32 (output_bfd, (bfd_vma) t2a5_pop_insn,
1476 s->contents + my_offset + 8);
1477
1478 bfd_put_32 (output_bfd, (bfd_vma) t2a6_bx_insn,
1479 s->contents + my_offset + 12);
1480
1481 /* Store the address of the function in the last word of the stub. */
1482 bfd_put_32 (output_bfd, h_val,
1483 s->contents + my_offset + 16);
1484
1485 if (info->base_file
1486 && !arm_emit_base_file_entry (info,
1487 output_bfd, s,
1488 my_offset + 16))
1489 return FALSE;
1490 }
1491 else
1492 {
1493 bfd_put_16 (output_bfd, (bfd_vma) t2a1_bx_pc_insn,
1494 s->contents + my_offset);
1495
1496 bfd_put_16 (output_bfd, (bfd_vma) t2a2_noop_insn,
1497 s->contents + my_offset + 2);
1498
1499 ret_offset =
1500 /* Address of destination of the stub. */
1501 ((bfd_signed_vma) h_val)
1502 - ((bfd_signed_vma)
1503 /* Offset from the start of the current section to the start of the stubs. */
1504 (s->output_offset
1505 /* Offset of the start of this stub from the start of the stubs. */
1506 + my_offset
1507 /* Address of the start of the current section. */
1508 + s->output_section->vma)
1509 /* The branch instruction is 4 bytes into the stub. */
1510 + 4
1511 /* ARM branches work from the pc of the instruction + 8. */
1512 + 8);
1513
1514 bfd_put_32 (output_bfd,
1515 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
1516 s->contents + my_offset + 4);
1517
1518 }
1519 }
1520
1521 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
1522
1523 /* Now go back and fix up the original BL insn to point
1524 to here. */
1525 ret_offset =
1526 s->output_offset
1527 + my_offset
1528 - (input_section->output_offset
1529 + rel->r_vaddr)
1530 -4;
1531
1532 tmp = bfd_get_32 (input_bfd, contents + rel->r_vaddr
1533 - input_section->vma);
1534
1535 bfd_put_32 (output_bfd,
1536 (bfd_vma) insert_thumb_branch (tmp,
1537 ret_offset),
1538 contents + rel->r_vaddr - input_section->vma);
1539
1540 done = 1;
1541 }
1542 }
1543 #endif
1544 }
1545
1546 /* If the relocation type and destination symbol does not
1547 fall into one of the above categories, then we can just
1548 perform a direct link. */
1549
1550 if (done)
1551 rstat = bfd_reloc_ok;
1552 else
1553 if ( h->root.type == bfd_link_hash_defined
1554 || h->root.type == bfd_link_hash_defweak)
1555 {
1556 asection *sec;
1557
1558 sec = h->root.u.def.section;
1559 val = (h->root.u.def.value
1560 + sec->output_section->vma
1561 + sec->output_offset);
1562 }
1563
1564 else if (! info->relocatable)
1565 {
1566 if (! ((*info->callbacks->undefined_symbol)
1567 (info, h->root.root.string, input_bfd, input_section,
1568 rel->r_vaddr - input_section->vma, TRUE)))
1569 return FALSE;
1570 }
1571 }
1572
1573 /* Emit a reloc if the backend thinks it needs it. */
1574 if (info->base_file
1575 && sym
1576 && pe_data(output_bfd)->in_reloc_p(output_bfd, howto)
1577 && !arm_emit_base_file_entry (info, output_bfd, input_section,
1578 rel->r_vaddr))
1579 return FALSE;
1580
1581 if (done)
1582 rstat = bfd_reloc_ok;
1583 #ifndef ARM_WINCE
1584 /* Only perform this fix during the final link, not a relocatable link. */
1585 else if (! info->relocatable
1586 && howto->type == ARM_THUMB23)
1587 {
1588 /* This is pretty much a copy of what the default
1589 _bfd_final_link_relocate and _bfd_relocate_contents
1590 routines do to perform a relocation, with special
1591 processing for the split addressing of the Thumb BL
1592 instruction. Again, it would probably be simpler adding a
1593 ThumbBRANCH23 specific macro expansion into the default
1594 code. */
1595
1596 bfd_vma address = rel->r_vaddr - input_section->vma;
1597
1598 if (address > high_address)
1599 rstat = bfd_reloc_outofrange;
1600 else
1601 {
1602 bfd_vma relocation = val + addend;
1603 int size = bfd_get_reloc_size (howto);
1604 bfd_boolean overflow = FALSE;
1605 bfd_byte *location = contents + address;
1606 bfd_vma x = bfd_get_32 (input_bfd, location);
1607 bfd_vma src_mask = 0x007FFFFE;
1608 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
1609 bfd_signed_vma reloc_signed_min = ~reloc_signed_max;
1610 bfd_vma check;
1611 bfd_signed_vma signed_check;
1612 bfd_vma add;
1613 bfd_signed_vma signed_add;
1614
1615 BFD_ASSERT (size == 4);
1616
1617 /* howto->pc_relative should be TRUE for type 14 BRANCH23. */
1618 relocation -= (input_section->output_section->vma
1619 + input_section->output_offset);
1620
1621 /* howto->pcrel_offset should be TRUE for type 14 BRANCH23. */
1622 relocation -= address;
1623
1624 /* No need to negate the relocation with BRANCH23. */
1625 /* howto->complain_on_overflow == complain_overflow_signed for BRANCH23. */
1626 /* howto->rightshift == 1 */
1627
1628 /* Drop unwanted bits from the value we are relocating to. */
1629 check = relocation >> howto->rightshift;
1630
1631 /* If this is a signed value, the rightshift just dropped
1632 leading 1 bits (assuming twos complement). */
1633 if ((bfd_signed_vma) relocation >= 0)
1634 signed_check = check;
1635 else
1636 signed_check = (check
1637 | ((bfd_vma) - 1
1638 & ~((bfd_vma) - 1 >> howto->rightshift)));
1639
1640 /* Get the value from the object file. */
1641 if (bfd_big_endian (input_bfd))
1642 add = (((x) & 0x07ff0000) >> 4) | (((x) & 0x7ff) << 1);
1643 else
1644 add = ((((x) & 0x7ff) << 12) | (((x) & 0x07ff0000) >> 15));
1645
1646 /* Get the value from the object file with an appropriate sign.
1647 The expression involving howto->src_mask isolates the upper
1648 bit of src_mask. If that bit is set in the value we are
1649 adding, it is negative, and we subtract out that number times
1650 two. If src_mask includes the highest possible bit, then we
1651 can not get the upper bit, but that does not matter since
1652 signed_add needs no adjustment to become negative in that
1653 case. */
1654 signed_add = add;
1655
1656 if ((add & (((~ src_mask) >> 1) & src_mask)) != 0)
1657 signed_add -= (((~ src_mask) >> 1) & src_mask) << 1;
1658
1659 /* howto->bitpos == 0 */
1660 /* Add the value from the object file, shifted so that it is a
1661 straight number. */
1662 signed_check += signed_add;
1663 relocation += signed_add;
1664
1665 BFD_ASSERT (howto->complain_on_overflow == complain_overflow_signed);
1666
1667 /* Assumes two's complement. */
1668 if ( signed_check > reloc_signed_max
1669 || signed_check < reloc_signed_min)
1670 overflow = TRUE;
1671
1672 /* Put the relocation into the correct bits.
1673 For a BLX instruction, make sure that the relocation is rounded up
1674 to a word boundary. This follows the semantics of the instruction
1675 which specifies that bit 1 of the target address will come from bit
1676 1 of the base address. */
1677 if (bfd_big_endian (input_bfd))
1678 {
1679 if ((x & 0x1800) == 0x0800 && (relocation & 0x02))
1680 relocation += 2;
1681 relocation = (((relocation & 0xffe) >> 1) | ((relocation << 4) & 0x07ff0000));
1682 }
1683 else
1684 {
1685 if ((x & 0x18000000) == 0x08000000 && (relocation & 0x02))
1686 relocation += 2;
1687 relocation = (((relocation & 0xffe) << 15) | ((relocation >> 12) & 0x7ff));
1688 }
1689
1690 /* Add the relocation to the correct bits of X. */
1691 x = ((x & ~howto->dst_mask) | relocation);
1692
1693 /* Put the relocated value back in the object file. */
1694 bfd_put_32 (input_bfd, x, location);
1695
1696 rstat = overflow ? bfd_reloc_overflow : bfd_reloc_ok;
1697 }
1698 }
1699 #endif
1700 else
1701 if (info->relocatable && ! howto->partial_inplace)
1702 rstat = bfd_reloc_ok;
1703 else
1704 rstat = _bfd_final_link_relocate (howto, input_bfd, input_section,
1705 contents,
1706 rel->r_vaddr - input_section->vma,
1707 val, addend);
1708 /* Only perform this fix during the final link, not a relocatable link. */
1709 if (! info->relocatable
1710 && (rel->r_type == ARM_32 || rel->r_type == ARM_RVA32))
1711 {
1712 /* Determine if we need to set the bottom bit of a relocated address
1713 because the address is the address of a Thumb code symbol. */
1714 int patchit = FALSE;
1715
1716 if (h != NULL
1717 && ( h->symbol_class == C_THUMBSTATFUNC
1718 || h->symbol_class == C_THUMBEXTFUNC))
1719 {
1720 patchit = TRUE;
1721 }
1722 else if (sym != NULL
1723 && sym->n_scnum > N_UNDEF)
1724 {
1725 /* No hash entry - use the symbol instead. */
1726 if ( sym->n_sclass == C_THUMBSTATFUNC
1727 || sym->n_sclass == C_THUMBEXTFUNC)
1728 patchit = TRUE;
1729 }
1730
1731 if (patchit)
1732 {
1733 bfd_byte * location = contents + rel->r_vaddr - input_section->vma;
1734 bfd_vma x = bfd_get_32 (input_bfd, location);
1735
1736 bfd_put_32 (input_bfd, x | 1, location);
1737 }
1738 }
1739
1740 switch (rstat)
1741 {
1742 default:
1743 abort ();
1744 case bfd_reloc_ok:
1745 break;
1746 case bfd_reloc_outofrange:
1747 (*_bfd_error_handler)
1748 (_("%B: bad reloc address 0x%lx in section `%A'"),
1749 input_bfd, input_section, (unsigned long) rel->r_vaddr);
1750 return FALSE;
1751 case bfd_reloc_overflow:
1752 {
1753 const char *name;
1754 char buf[SYMNMLEN + 1];
1755
1756 if (symndx == -1)
1757 name = "*ABS*";
1758 else if (h != NULL)
1759 name = NULL;
1760 else
1761 {
1762 name = _bfd_coff_internal_syment_name (input_bfd, sym, buf);
1763 if (name == NULL)
1764 return FALSE;
1765 }
1766
1767 if (! ((*info->callbacks->reloc_overflow)
1768 (info, (h ? &h->root : NULL), name, howto->name,
1769 (bfd_vma) 0, input_bfd, input_section,
1770 rel->r_vaddr - input_section->vma)))
1771 return FALSE;
1772 }
1773 }
1774 }
1775
1776 return TRUE;
1777 }
1778
1779 #ifndef COFF_IMAGE_WITH_PE
1780
1781 bfd_boolean
bfd_arm_allocate_interworking_sections(struct bfd_link_info * info)1782 bfd_arm_allocate_interworking_sections (struct bfd_link_info * info)
1783 {
1784 asection * s;
1785 bfd_byte * foo;
1786 struct coff_arm_link_hash_table * globals;
1787
1788 globals = coff_arm_hash_table (info);
1789
1790 BFD_ASSERT (globals != NULL);
1791
1792 if (globals->arm_glue_size != 0)
1793 {
1794 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
1795
1796 s = bfd_get_section_by_name
1797 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
1798
1799 BFD_ASSERT (s != NULL);
1800
1801 foo = bfd_alloc (globals->bfd_of_glue_owner, globals->arm_glue_size);
1802
1803 s->size = globals->arm_glue_size;
1804 s->contents = foo;
1805 }
1806
1807 if (globals->thumb_glue_size != 0)
1808 {
1809 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
1810
1811 s = bfd_get_section_by_name
1812 (globals->bfd_of_glue_owner, THUMB2ARM_GLUE_SECTION_NAME);
1813
1814 BFD_ASSERT (s != NULL);
1815
1816 foo = bfd_alloc (globals->bfd_of_glue_owner, globals->thumb_glue_size);
1817
1818 s->size = globals->thumb_glue_size;
1819 s->contents = foo;
1820 }
1821
1822 return TRUE;
1823 }
1824
1825 static void
record_arm_to_thumb_glue(struct bfd_link_info * info,struct coff_link_hash_entry * h)1826 record_arm_to_thumb_glue (struct bfd_link_info * info,
1827 struct coff_link_hash_entry * h)
1828 {
1829 const char * name = h->root.root.string;
1830 register asection * s;
1831 char * tmp_name;
1832 struct coff_link_hash_entry * myh;
1833 struct bfd_link_hash_entry * bh;
1834 struct coff_arm_link_hash_table * globals;
1835 bfd_vma val;
1836 bfd_size_type amt;
1837
1838 globals = coff_arm_hash_table (info);
1839
1840 BFD_ASSERT (globals != NULL);
1841 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
1842
1843 s = bfd_get_section_by_name
1844 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
1845
1846 BFD_ASSERT (s != NULL);
1847
1848 amt = strlen (name) + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1;
1849 tmp_name = bfd_malloc (amt);
1850
1851 BFD_ASSERT (tmp_name);
1852
1853 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
1854
1855 myh = coff_link_hash_lookup
1856 (coff_hash_table (info), tmp_name, FALSE, FALSE, TRUE);
1857
1858 if (myh != NULL)
1859 {
1860 free (tmp_name);
1861 /* We've already seen this guy. */
1862 return;
1863 }
1864
1865 /* The only trick here is using globals->arm_glue_size as the value. Even
1866 though the section isn't allocated yet, this is where we will be putting
1867 it. */
1868 bh = NULL;
1869 val = globals->arm_glue_size + 1;
1870 bfd_coff_link_add_one_symbol (info, globals->bfd_of_glue_owner, tmp_name,
1871 BSF_GLOBAL, s, val, NULL, TRUE, FALSE, &bh);
1872
1873 free (tmp_name);
1874
1875 globals->arm_glue_size += ARM2THUMB_GLUE_SIZE;
1876
1877 return;
1878 }
1879
1880 #ifndef ARM_WINCE
1881 static void
record_thumb_to_arm_glue(struct bfd_link_info * info,struct coff_link_hash_entry * h)1882 record_thumb_to_arm_glue (struct bfd_link_info * info,
1883 struct coff_link_hash_entry * h)
1884 {
1885 const char * name = h->root.root.string;
1886 asection * s;
1887 char * tmp_name;
1888 struct coff_link_hash_entry * myh;
1889 struct bfd_link_hash_entry * bh;
1890 struct coff_arm_link_hash_table * globals;
1891 bfd_vma val;
1892 bfd_size_type amt;
1893
1894 globals = coff_arm_hash_table (info);
1895
1896 BFD_ASSERT (globals != NULL);
1897 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
1898
1899 s = bfd_get_section_by_name
1900 (globals->bfd_of_glue_owner, THUMB2ARM_GLUE_SECTION_NAME);
1901
1902 BFD_ASSERT (s != NULL);
1903
1904 amt = strlen (name) + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1;
1905 tmp_name = bfd_malloc (amt);
1906
1907 BFD_ASSERT (tmp_name);
1908
1909 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
1910
1911 myh = coff_link_hash_lookup
1912 (coff_hash_table (info), tmp_name, FALSE, FALSE, TRUE);
1913
1914 if (myh != NULL)
1915 {
1916 free (tmp_name);
1917 /* We've already seen this guy. */
1918 return;
1919 }
1920
1921 bh = NULL;
1922 val = globals->thumb_glue_size + 1;
1923 bfd_coff_link_add_one_symbol (info, globals->bfd_of_glue_owner, tmp_name,
1924 BSF_GLOBAL, s, val, NULL, TRUE, FALSE, &bh);
1925
1926 /* If we mark it 'thumb', the disassembler will do a better job. */
1927 myh = (struct coff_link_hash_entry *) bh;
1928 myh->symbol_class = C_THUMBEXTFUNC;
1929
1930 free (tmp_name);
1931
1932 /* Allocate another symbol to mark where we switch to arm mode. */
1933
1934 #define CHANGE_TO_ARM "__%s_change_to_arm"
1935 #define BACK_FROM_ARM "__%s_back_from_arm"
1936
1937 amt = strlen (name) + strlen (CHANGE_TO_ARM) + 1;
1938 tmp_name = bfd_malloc (amt);
1939
1940 BFD_ASSERT (tmp_name);
1941
1942 sprintf (tmp_name, globals->support_old_code ? BACK_FROM_ARM : CHANGE_TO_ARM, name);
1943
1944 bh = NULL;
1945 val = globals->thumb_glue_size + (globals->support_old_code ? 8 : 4);
1946 bfd_coff_link_add_one_symbol (info, globals->bfd_of_glue_owner, tmp_name,
1947 BSF_LOCAL, s, val, NULL, TRUE, FALSE, &bh);
1948
1949 free (tmp_name);
1950
1951 globals->thumb_glue_size += THUMB2ARM_GLUE_SIZE;
1952
1953 return;
1954 }
1955 #endif /* not ARM_WINCE */
1956
1957 /* Select a BFD to be used to hold the sections used by the glue code.
1958 This function is called from the linker scripts in ld/emultempl/
1959 {armcoff/pe}.em */
1960
1961 bfd_boolean
bfd_arm_get_bfd_for_interworking(bfd * abfd,struct bfd_link_info * info)1962 bfd_arm_get_bfd_for_interworking (bfd * abfd,
1963 struct bfd_link_info * info)
1964 {
1965 struct coff_arm_link_hash_table * globals;
1966 flagword flags;
1967 asection * sec;
1968
1969 /* If we are only performing a partial link do not bother
1970 getting a bfd to hold the glue. */
1971 if (info->relocatable)
1972 return TRUE;
1973
1974 globals = coff_arm_hash_table (info);
1975
1976 BFD_ASSERT (globals != NULL);
1977
1978 if (globals->bfd_of_glue_owner != NULL)
1979 return TRUE;
1980
1981 sec = bfd_get_section_by_name (abfd, ARM2THUMB_GLUE_SECTION_NAME);
1982
1983 if (sec == NULL)
1984 {
1985 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
1986 | SEC_CODE | SEC_READONLY);
1987 sec = bfd_make_section_with_flags (abfd, ARM2THUMB_GLUE_SECTION_NAME,
1988 flags);
1989 if (sec == NULL
1990 || ! bfd_set_section_alignment (abfd, sec, 2))
1991 return FALSE;
1992 }
1993
1994 sec = bfd_get_section_by_name (abfd, THUMB2ARM_GLUE_SECTION_NAME);
1995
1996 if (sec == NULL)
1997 {
1998 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
1999 | SEC_CODE | SEC_READONLY);
2000 sec = bfd_make_section_with_flags (abfd, THUMB2ARM_GLUE_SECTION_NAME,
2001 flags);
2002
2003 if (sec == NULL
2004 || ! bfd_set_section_alignment (abfd, sec, 2))
2005 return FALSE;
2006 }
2007
2008 /* Save the bfd for later use. */
2009 globals->bfd_of_glue_owner = abfd;
2010
2011 return TRUE;
2012 }
2013
2014 bfd_boolean
bfd_arm_process_before_allocation(bfd * abfd,struct bfd_link_info * info,int support_old_code)2015 bfd_arm_process_before_allocation (bfd * abfd,
2016 struct bfd_link_info * info,
2017 int support_old_code)
2018 {
2019 asection * sec;
2020 struct coff_arm_link_hash_table * globals;
2021
2022 /* If we are only performing a partial link do not bother
2023 to construct any glue. */
2024 if (info->relocatable)
2025 return TRUE;
2026
2027 /* Here we have a bfd that is to be included on the link. We have a hook
2028 to do reloc rummaging, before section sizes are nailed down. */
2029 _bfd_coff_get_external_symbols (abfd);
2030
2031 globals = coff_arm_hash_table (info);
2032
2033 BFD_ASSERT (globals != NULL);
2034 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
2035
2036 globals->support_old_code = support_old_code;
2037
2038 /* Rummage around all the relocs and map the glue vectors. */
2039 sec = abfd->sections;
2040
2041 if (sec == NULL)
2042 return TRUE;
2043
2044 for (; sec != NULL; sec = sec->next)
2045 {
2046 struct internal_reloc * i;
2047 struct internal_reloc * rel;
2048
2049 if (sec->reloc_count == 0)
2050 continue;
2051
2052 /* Load the relocs. */
2053 /* FIXME: there may be a storage leak here. */
2054 i = _bfd_coff_read_internal_relocs (abfd, sec, 1, 0, 0, 0);
2055
2056 BFD_ASSERT (i != 0);
2057
2058 for (rel = i; rel < i + sec->reloc_count; ++rel)
2059 {
2060 unsigned short r_type = rel->r_type;
2061 long symndx;
2062 struct coff_link_hash_entry * h;
2063
2064 symndx = rel->r_symndx;
2065
2066 /* If the relocation is not against a symbol it cannot concern us. */
2067 if (symndx == -1)
2068 continue;
2069
2070 /* If the index is outside of the range of our table, something has gone wrong. */
2071 if (symndx >= obj_conv_table_size (abfd))
2072 {
2073 _bfd_error_handler (_("%B: illegal symbol index in reloc: %d"),
2074 abfd, symndx);
2075 continue;
2076 }
2077
2078 h = obj_coff_sym_hashes (abfd)[symndx];
2079
2080 /* If the relocation is against a static symbol it must be within
2081 the current section and so cannot be a cross ARM/Thumb relocation. */
2082 if (h == NULL)
2083 continue;
2084
2085 switch (r_type)
2086 {
2087 case ARM_26:
2088 /* This one is a call from arm code. We need to look up
2089 the target of the call. If it is a thumb target, we
2090 insert glue. */
2091
2092 if (h->symbol_class == C_THUMBEXTFUNC)
2093 record_arm_to_thumb_glue (info, h);
2094 break;
2095
2096 #ifndef ARM_WINCE
2097 case ARM_THUMB23:
2098 /* This one is a call from thumb code. We used to look
2099 for ARM_THUMB9 and ARM_THUMB12 as well. We need to look
2100 up the target of the call. If it is an arm target, we
2101 insert glue. If the symbol does not exist it will be
2102 given a class of C_EXT and so we will generate a stub
2103 for it. This is not really a problem, since the link
2104 is doomed anyway. */
2105
2106 switch (h->symbol_class)
2107 {
2108 case C_EXT:
2109 case C_STAT:
2110 case C_LABEL:
2111 record_thumb_to_arm_glue (info, h);
2112 break;
2113 default:
2114 ;
2115 }
2116 break;
2117 #endif
2118
2119 default:
2120 break;
2121 }
2122 }
2123 }
2124
2125 return TRUE;
2126 }
2127
2128 #endif /* ! defined (COFF_IMAGE_WITH_PE) */
2129
2130 #define coff_bfd_reloc_type_lookup coff_arm_reloc_type_lookup
2131 #define coff_bfd_reloc_name_lookup coff_arm_reloc_name_lookup
2132 #define coff_relocate_section coff_arm_relocate_section
2133 #define coff_bfd_is_local_label_name coff_arm_is_local_label_name
2134 #define coff_adjust_symndx coff_arm_adjust_symndx
2135 #define coff_link_output_has_begun coff_arm_link_output_has_begun
2136 #define coff_final_link_postscript coff_arm_final_link_postscript
2137 #define coff_bfd_merge_private_bfd_data coff_arm_merge_private_bfd_data
2138 #define coff_bfd_print_private_bfd_data coff_arm_print_private_bfd_data
2139 #define coff_bfd_set_private_flags _bfd_coff_arm_set_private_flags
2140 #define coff_bfd_copy_private_bfd_data coff_arm_copy_private_bfd_data
2141 #define coff_bfd_link_hash_table_create coff_arm_link_hash_table_create
2142
2143 /* When doing a relocatable link, we want to convert ARM_26 relocs
2144 into ARM_26D relocs. */
2145
2146 static bfd_boolean
coff_arm_adjust_symndx(bfd * obfd ATTRIBUTE_UNUSED,struct bfd_link_info * info ATTRIBUTE_UNUSED,bfd * ibfd,asection * sec,struct internal_reloc * irel,bfd_boolean * adjustedp)2147 coff_arm_adjust_symndx (bfd *obfd ATTRIBUTE_UNUSED,
2148 struct bfd_link_info *info ATTRIBUTE_UNUSED,
2149 bfd *ibfd,
2150 asection *sec,
2151 struct internal_reloc *irel,
2152 bfd_boolean *adjustedp)
2153 {
2154 if (irel->r_type == ARM_26)
2155 {
2156 struct coff_link_hash_entry *h;
2157
2158 h = obj_coff_sym_hashes (ibfd)[irel->r_symndx];
2159 if (h != NULL
2160 && (h->root.type == bfd_link_hash_defined
2161 || h->root.type == bfd_link_hash_defweak)
2162 && h->root.u.def.section->output_section == sec->output_section)
2163 irel->r_type = ARM_26D;
2164 }
2165 *adjustedp = FALSE;
2166 return TRUE;
2167 }
2168
2169 /* Called when merging the private data areas of two BFDs.
2170 This is important as it allows us to detect if we are
2171 attempting to merge binaries compiled for different ARM
2172 targets, eg different CPUs or different APCS's. */
2173
2174 static bfd_boolean
coff_arm_merge_private_bfd_data(bfd * ibfd,bfd * obfd)2175 coff_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
2176 {
2177 BFD_ASSERT (ibfd != NULL && obfd != NULL);
2178
2179 if (ibfd == obfd)
2180 return TRUE;
2181
2182 /* If the two formats are different we cannot merge anything.
2183 This is not an error, since it is permissable to change the
2184 input and output formats. */
2185 if ( ibfd->xvec->flavour != bfd_target_coff_flavour
2186 || obfd->xvec->flavour != bfd_target_coff_flavour)
2187 return TRUE;
2188
2189 /* Determine what should happen if the input ARM architecture
2190 does not match the output ARM architecture. */
2191 if (! bfd_arm_merge_machines (ibfd, obfd))
2192 return FALSE;
2193
2194 /* Verify that the APCS is the same for the two BFDs. */
2195 if (APCS_SET (ibfd))
2196 {
2197 if (APCS_SET (obfd))
2198 {
2199 /* If the src and dest have different APCS flag bits set, fail. */
2200 if (APCS_26_FLAG (obfd) != APCS_26_FLAG (ibfd))
2201 {
2202 _bfd_error_handler
2203 /* xgettext: c-format */
2204 (_("error: %B is compiled for APCS-%d, whereas %B is compiled for APCS-%d"),
2205 ibfd, obfd,
2206 APCS_26_FLAG (ibfd) ? 26 : 32,
2207 APCS_26_FLAG (obfd) ? 26 : 32
2208 );
2209
2210 bfd_set_error (bfd_error_wrong_format);
2211 return FALSE;
2212 }
2213
2214 if (APCS_FLOAT_FLAG (obfd) != APCS_FLOAT_FLAG (ibfd))
2215 {
2216 const char *msg;
2217
2218 if (APCS_FLOAT_FLAG (ibfd))
2219 /* xgettext: c-format */
2220 msg = _("error: %B passes floats in float registers, whereas %B passes them in integer registers");
2221 else
2222 /* xgettext: c-format */
2223 msg = _("error: %B passes floats in integer registers, whereas %B passes them in float registers");
2224
2225 _bfd_error_handler (msg, ibfd, obfd);
2226
2227 bfd_set_error (bfd_error_wrong_format);
2228 return FALSE;
2229 }
2230
2231 if (PIC_FLAG (obfd) != PIC_FLAG (ibfd))
2232 {
2233 const char * msg;
2234
2235 if (PIC_FLAG (ibfd))
2236 /* xgettext: c-format */
2237 msg = _("error: %B is compiled as position independent code, whereas target %B is absolute position");
2238 else
2239 /* xgettext: c-format */
2240 msg = _("error: %B is compiled as absolute position code, whereas target %B is position independent");
2241 _bfd_error_handler (msg, ibfd, obfd);
2242
2243 bfd_set_error (bfd_error_wrong_format);
2244 return FALSE;
2245 }
2246 }
2247 else
2248 {
2249 SET_APCS_FLAGS (obfd, APCS_26_FLAG (ibfd) | APCS_FLOAT_FLAG (ibfd) | PIC_FLAG (ibfd));
2250
2251 /* Set up the arch and fields as well as these are probably wrong. */
2252 bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
2253 }
2254 }
2255
2256 /* Check the interworking support. */
2257 if (INTERWORK_SET (ibfd))
2258 {
2259 if (INTERWORK_SET (obfd))
2260 {
2261 /* If the src and dest differ in their interworking issue a warning. */
2262 if (INTERWORK_FLAG (obfd) != INTERWORK_FLAG (ibfd))
2263 {
2264 const char * msg;
2265
2266 if (INTERWORK_FLAG (ibfd))
2267 /* xgettext: c-format */
2268 msg = _("Warning: %B supports interworking, whereas %B does not");
2269 else
2270 /* xgettext: c-format */
2271 msg = _("Warning: %B does not support interworking, whereas %B does");
2272
2273 _bfd_error_handler (msg, ibfd, obfd);
2274 }
2275 }
2276 else
2277 {
2278 SET_INTERWORK_FLAG (obfd, INTERWORK_FLAG (ibfd));
2279 }
2280 }
2281
2282 return TRUE;
2283 }
2284
2285 /* Display the flags field. */
2286
2287 static bfd_boolean
coff_arm_print_private_bfd_data(bfd * abfd,void * ptr)2288 coff_arm_print_private_bfd_data (bfd * abfd, void * ptr)
2289 {
2290 FILE * file = (FILE *) ptr;
2291
2292 BFD_ASSERT (abfd != NULL && ptr != NULL);
2293
2294 /* xgettext:c-format */
2295 fprintf (file, _("private flags = %x:"), coff_data (abfd)->flags);
2296
2297 if (APCS_SET (abfd))
2298 {
2299 /* xgettext: APCS is ARM Procedure Call Standard, it should not be translated. */
2300 fprintf (file, " [APCS-%d]", APCS_26_FLAG (abfd) ? 26 : 32);
2301
2302 if (APCS_FLOAT_FLAG (abfd))
2303 fprintf (file, _(" [floats passed in float registers]"));
2304 else
2305 fprintf (file, _(" [floats passed in integer registers]"));
2306
2307 if (PIC_FLAG (abfd))
2308 fprintf (file, _(" [position independent]"));
2309 else
2310 fprintf (file, _(" [absolute position]"));
2311 }
2312
2313 if (! INTERWORK_SET (abfd))
2314 fprintf (file, _(" [interworking flag not initialised]"));
2315 else if (INTERWORK_FLAG (abfd))
2316 fprintf (file, _(" [interworking supported]"));
2317 else
2318 fprintf (file, _(" [interworking not supported]"));
2319
2320 fputc ('\n', file);
2321
2322 return TRUE;
2323 }
2324
2325 /* Copies the given flags into the coff_tdata.flags field.
2326 Typically these flags come from the f_flags[] field of
2327 the COFF filehdr structure, which contains important,
2328 target specific information.
2329 Note: Although this function is static, it is explicitly
2330 called from both coffcode.h and peicode.h. */
2331
2332 static bfd_boolean
_bfd_coff_arm_set_private_flags(bfd * abfd,flagword flags)2333 _bfd_coff_arm_set_private_flags (bfd * abfd, flagword flags)
2334 {
2335 flagword flag;
2336
2337 BFD_ASSERT (abfd != NULL);
2338
2339 flag = (flags & F_APCS26) ? F_APCS_26 : 0;
2340
2341 /* Make sure that the APCS field has not been initialised to the opposite
2342 value. */
2343 if (APCS_SET (abfd)
2344 && ( (APCS_26_FLAG (abfd) != flag)
2345 || (APCS_FLOAT_FLAG (abfd) != (flags & F_APCS_FLOAT))
2346 || (PIC_FLAG (abfd) != (flags & F_PIC))
2347 ))
2348 return FALSE;
2349
2350 flag |= (flags & (F_APCS_FLOAT | F_PIC));
2351
2352 SET_APCS_FLAGS (abfd, flag);
2353
2354 flag = (flags & F_INTERWORK);
2355
2356 /* If the BFD has already had its interworking flag set, but it
2357 is different from the value that we have been asked to set,
2358 then assume that that merged code will not support interworking
2359 and set the flag accordingly. */
2360 if (INTERWORK_SET (abfd) && (INTERWORK_FLAG (abfd) != flag))
2361 {
2362 if (flag)
2363 /* xgettext: c-format */
2364 _bfd_error_handler (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
2365 abfd);
2366 else
2367 /* xgettext: c-format */
2368 _bfd_error_handler (_("Warning: Clearing the interworking flag of %B due to outside request"),
2369 abfd);
2370 flag = 0;
2371 }
2372
2373 SET_INTERWORK_FLAG (abfd, flag);
2374
2375 return TRUE;
2376 }
2377
2378 /* Copy the important parts of the target specific data
2379 from one instance of a BFD to another. */
2380
2381 static bfd_boolean
coff_arm_copy_private_bfd_data(bfd * src,bfd * dest)2382 coff_arm_copy_private_bfd_data (bfd * src, bfd * dest)
2383 {
2384 BFD_ASSERT (src != NULL && dest != NULL);
2385
2386 if (src == dest)
2387 return TRUE;
2388
2389 /* If the destination is not in the same format as the source, do not do
2390 the copy. */
2391 if (src->xvec != dest->xvec)
2392 return TRUE;
2393
2394 /* Copy the flags field. */
2395 if (APCS_SET (src))
2396 {
2397 if (APCS_SET (dest))
2398 {
2399 /* If the src and dest have different APCS flag bits set, fail. */
2400 if (APCS_26_FLAG (dest) != APCS_26_FLAG (src))
2401 return FALSE;
2402
2403 if (APCS_FLOAT_FLAG (dest) != APCS_FLOAT_FLAG (src))
2404 return FALSE;
2405
2406 if (PIC_FLAG (dest) != PIC_FLAG (src))
2407 return FALSE;
2408 }
2409 else
2410 SET_APCS_FLAGS (dest, APCS_26_FLAG (src) | APCS_FLOAT_FLAG (src)
2411 | PIC_FLAG (src));
2412 }
2413
2414 if (INTERWORK_SET (src))
2415 {
2416 if (INTERWORK_SET (dest))
2417 {
2418 /* If the src and dest have different interworking flags then turn
2419 off the interworking bit. */
2420 if (INTERWORK_FLAG (dest) != INTERWORK_FLAG (src))
2421 {
2422 if (INTERWORK_FLAG (dest))
2423 {
2424 /* xgettext:c-format */
2425 _bfd_error_handler (("\
2426 Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
2427 dest, src);
2428 }
2429
2430 SET_INTERWORK_FLAG (dest, 0);
2431 }
2432 }
2433 else
2434 {
2435 SET_INTERWORK_FLAG (dest, INTERWORK_FLAG (src));
2436 }
2437 }
2438
2439 return TRUE;
2440 }
2441
2442 /* Note: the definitions here of LOCAL_LABEL_PREFIX and USER_LABEL_PREIFX
2443 *must* match the definitions in gcc/config/arm/{coff|semi|aout}.h. */
2444 #ifndef LOCAL_LABEL_PREFIX
2445 #define LOCAL_LABEL_PREFIX ""
2446 #endif
2447 #ifndef USER_LABEL_PREFIX
2448 #define USER_LABEL_PREFIX "_"
2449 #endif
2450
2451 /* Like _bfd_coff_is_local_label_name, but
2452 a) test against USER_LABEL_PREFIX, to avoid stripping labels known to be
2453 non-local.
2454 b) Allow other prefixes than ".", e.g. an empty prefix would cause all
2455 labels of the form Lxxx to be stripped. */
2456
2457 static bfd_boolean
coff_arm_is_local_label_name(bfd * abfd ATTRIBUTE_UNUSED,const char * name)2458 coff_arm_is_local_label_name (bfd * abfd ATTRIBUTE_UNUSED,
2459 const char * name)
2460 {
2461 #ifdef USER_LABEL_PREFIX
2462 if (USER_LABEL_PREFIX[0] != 0)
2463 {
2464 size_t len = strlen (USER_LABEL_PREFIX);
2465
2466 if (strncmp (name, USER_LABEL_PREFIX, len) == 0)
2467 return FALSE;
2468 }
2469 #endif
2470
2471 #ifdef LOCAL_LABEL_PREFIX
2472 /* If there is a prefix for local labels then look for this.
2473 If the prefix exists, but it is empty, then ignore the test. */
2474
2475 if (LOCAL_LABEL_PREFIX[0] != 0)
2476 {
2477 size_t len = strlen (LOCAL_LABEL_PREFIX);
2478
2479 if (strncmp (name, LOCAL_LABEL_PREFIX, len) != 0)
2480 return FALSE;
2481
2482 /* Perform the checks below for the rest of the name. */
2483 name += len;
2484 }
2485 #endif
2486
2487 return name[0] == 'L';
2488 }
2489
2490 /* This piece of machinery exists only to guarantee that the bfd that holds
2491 the glue section is written last.
2492
2493 This does depend on bfd_make_section attaching a new section to the
2494 end of the section list for the bfd. */
2495
2496 static bfd_boolean
coff_arm_link_output_has_begun(bfd * sub,struct coff_final_link_info * info)2497 coff_arm_link_output_has_begun (bfd * sub, struct coff_final_link_info * info)
2498 {
2499 return (sub->output_has_begun
2500 || sub == coff_arm_hash_table (info->info)->bfd_of_glue_owner);
2501 }
2502
2503 static bfd_boolean
coff_arm_final_link_postscript(bfd * abfd ATTRIBUTE_UNUSED,struct coff_final_link_info * pfinfo)2504 coff_arm_final_link_postscript (bfd * abfd ATTRIBUTE_UNUSED,
2505 struct coff_final_link_info * pfinfo)
2506 {
2507 struct coff_arm_link_hash_table * globals;
2508
2509 globals = coff_arm_hash_table (pfinfo->info);
2510
2511 BFD_ASSERT (globals != NULL);
2512
2513 if (globals->bfd_of_glue_owner != NULL)
2514 {
2515 if (! _bfd_coff_link_input_bfd (pfinfo, globals->bfd_of_glue_owner))
2516 return FALSE;
2517
2518 globals->bfd_of_glue_owner->output_has_begun = TRUE;
2519 }
2520
2521 return bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
2522 }
2523
2524 #ifndef bfd_pe_print_pdata
2525 #define bfd_pe_print_pdata NULL
2526 #endif
2527
2528 #include "coffcode.h"
2529
2530 #ifndef TARGET_LITTLE_SYM
2531 #define TARGET_LITTLE_SYM arm_coff_le_vec
2532 #endif
2533 #ifndef TARGET_LITTLE_NAME
2534 #define TARGET_LITTLE_NAME "coff-arm-little"
2535 #endif
2536 #ifndef TARGET_BIG_SYM
2537 #define TARGET_BIG_SYM arm_coff_be_vec
2538 #endif
2539 #ifndef TARGET_BIG_NAME
2540 #define TARGET_BIG_NAME "coff-arm-big"
2541 #endif
2542
2543 #ifndef TARGET_UNDERSCORE
2544 #define TARGET_UNDERSCORE 0
2545 #endif
2546
2547 #ifndef EXTRA_S_FLAGS
2548 #ifdef COFF_WITH_PE
2549 #define EXTRA_S_FLAGS (SEC_CODE | SEC_LINK_ONCE | SEC_LINK_DUPLICATES)
2550 #else
2551 #define EXTRA_S_FLAGS SEC_CODE
2552 #endif
2553 #endif
2554
2555 /* Forward declaration for use initialising alternative_target field. */
2556 extern const bfd_target TARGET_BIG_SYM ;
2557
2558 /* Target vectors. */
2559 CREATE_LITTLE_COFF_TARGET_VEC (TARGET_LITTLE_SYM, TARGET_LITTLE_NAME, D_PAGED, EXTRA_S_FLAGS, TARGET_UNDERSCORE, & TARGET_BIG_SYM, COFF_SWAP_TABLE)
2560 CREATE_BIG_COFF_TARGET_VEC (TARGET_BIG_SYM, TARGET_BIG_NAME, D_PAGED, EXTRA_S_FLAGS, TARGET_UNDERSCORE, & TARGET_LITTLE_SYM, COFF_SWAP_TABLE)
2561