1 /* tc-mn10300.c -- Assembler code for the Matsushita 10300
2 Copyright (C) 1996-2014 Free Software Foundation, Inc.
3
4 This file is part of GAS, the GNU Assembler.
5
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
9 any later version.
10
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
19 Boston, MA 02110-1301, USA. */
20
21 #include "as.h"
22 #include "safe-ctype.h"
23 #include "subsegs.h"
24 #include "opcode/mn10300.h"
25 #include "dwarf2dbg.h"
26 #include "libiberty.h"
27
28 /* Structure to hold information about predefined registers. */
29 struct reg_name
30 {
31 const char *name;
32 int value;
33 };
34
35 /* Generic assembler global variables which must be defined by all
36 targets. */
37
38 /* Characters which always start a comment. */
39 const char comment_chars[] = "#";
40
41 /* Characters which start a comment at the beginning of a line. */
42 const char line_comment_chars[] = ";#";
43
44 /* Characters which may be used to separate multiple commands on a
45 single line. */
46 const char line_separator_chars[] = ";";
47
48 /* Characters which are used to indicate an exponent in a floating
49 point number. */
50 const char EXP_CHARS[] = "eE";
51
52 /* Characters which mean that a number is a floating point constant,
53 as in 0d1.0. */
54 const char FLT_CHARS[] = "dD";
55
56 const relax_typeS md_relax_table[] =
57 {
58 /* The plus values for the bCC and fBCC instructions in the table below
59 are because the branch instruction is translated into a jump
60 instruction that is now +2 or +3 bytes further on in memory, and the
61 correct size of jump instruction must be selected. */
62 /* bCC relaxing. */
63 {0x7f, -0x80, 2, 1},
64 {0x7fff + 2, -0x8000 + 2, 5, 2},
65 {0x7fffffff, -0x80000000, 7, 0},
66
67 /* bCC relaxing (uncommon cases for 3byte length instructions) */
68 {0x7f, -0x80, 3, 4},
69 {0x7fff + 3, -0x8000 + 3, 6, 5},
70 {0x7fffffff, -0x80000000, 8, 0},
71
72 /* call relaxing. */
73 {0x7fff, -0x8000, 5, 7},
74 {0x7fffffff, -0x80000000, 7, 0},
75
76 /* calls relaxing. */
77 {0x7fff, -0x8000, 4, 9},
78 {0x7fffffff, -0x80000000, 6, 0},
79
80 /* jmp relaxing. */
81 {0x7f, -0x80, 2, 11},
82 {0x7fff, -0x8000, 3, 12},
83 {0x7fffffff, -0x80000000, 5, 0},
84
85 /* fbCC relaxing. */
86 {0x7f, -0x80, 3, 14},
87 {0x7fff + 3, -0x8000 + 3, 6, 15},
88 {0x7fffffff, -0x80000000, 8, 0},
89
90 };
91
92 /* Set linkrelax here to avoid fixups in most sections. */
93 int linkrelax = 1;
94
95 static int current_machine;
96
97 /* Fixups. */
98 #define MAX_INSN_FIXUPS 5
99
100 struct mn10300_fixup
101 {
102 expressionS exp;
103 int opindex;
104 bfd_reloc_code_real_type reloc;
105 };
106 struct mn10300_fixup fixups[MAX_INSN_FIXUPS];
107 static int fc;
108
109 /* We must store the value of each register operand so that we can
110 verify that certain registers do not match. */
111 int mn10300_reg_operands[MN10300_MAX_OPERANDS];
112
113 const char *md_shortopts = "";
114
115 struct option md_longopts[] =
116 {
117 {NULL, no_argument, NULL, 0}
118 };
119
120 size_t md_longopts_size = sizeof (md_longopts);
121
122 #define HAVE_AM33_2 (current_machine == AM33_2)
123 #define HAVE_AM33 (current_machine == AM33 || HAVE_AM33_2)
124 #define HAVE_AM30 (current_machine == AM30)
125
126 /* Opcode hash table. */
127 static struct hash_control *mn10300_hash;
128
129 /* This table is sorted. Suitable for searching by a binary search. */
130 static const struct reg_name data_registers[] =
131 {
132 { "d0", 0 },
133 { "d1", 1 },
134 { "d2", 2 },
135 { "d3", 3 },
136 };
137
138 static const struct reg_name address_registers[] =
139 {
140 { "a0", 0 },
141 { "a1", 1 },
142 { "a2", 2 },
143 { "a3", 3 },
144 };
145
146 static const struct reg_name r_registers[] =
147 {
148 { "a0", 8 },
149 { "a1", 9 },
150 { "a2", 10 },
151 { "a3", 11 },
152 { "d0", 12 },
153 { "d1", 13 },
154 { "d2", 14 },
155 { "d3", 15 },
156 { "e0", 0 },
157 { "e1", 1 },
158 { "e10", 10 },
159 { "e11", 11 },
160 { "e12", 12 },
161 { "e13", 13 },
162 { "e14", 14 },
163 { "e15", 15 },
164 { "e2", 2 },
165 { "e3", 3 },
166 { "e4", 4 },
167 { "e5", 5 },
168 { "e6", 6 },
169 { "e7", 7 },
170 { "e8", 8 },
171 { "e9", 9 },
172 { "r0", 0 },
173 { "r1", 1 },
174 { "r10", 10 },
175 { "r11", 11 },
176 { "r12", 12 },
177 { "r13", 13 },
178 { "r14", 14 },
179 { "r15", 15 },
180 { "r2", 2 },
181 { "r3", 3 },
182 { "r4", 4 },
183 { "r5", 5 },
184 { "r6", 6 },
185 { "r7", 7 },
186 { "r8", 8 },
187 { "r9", 9 },
188 };
189
190 static const struct reg_name xr_registers[] =
191 {
192 { "mcrh", 2 },
193 { "mcrl", 3 },
194 { "mcvf", 4 },
195 { "mdrq", 1 },
196 { "sp", 0 },
197 { "xr0", 0 },
198 { "xr1", 1 },
199 { "xr10", 10 },
200 { "xr11", 11 },
201 { "xr12", 12 },
202 { "xr13", 13 },
203 { "xr14", 14 },
204 { "xr15", 15 },
205 { "xr2", 2 },
206 { "xr3", 3 },
207 { "xr4", 4 },
208 { "xr5", 5 },
209 { "xr6", 6 },
210 { "xr7", 7 },
211 { "xr8", 8 },
212 { "xr9", 9 },
213 };
214
215 static const struct reg_name float_registers[] =
216 {
217 { "fs0", 0 },
218 { "fs1", 1 },
219 { "fs10", 10 },
220 { "fs11", 11 },
221 { "fs12", 12 },
222 { "fs13", 13 },
223 { "fs14", 14 },
224 { "fs15", 15 },
225 { "fs16", 16 },
226 { "fs17", 17 },
227 { "fs18", 18 },
228 { "fs19", 19 },
229 { "fs2", 2 },
230 { "fs20", 20 },
231 { "fs21", 21 },
232 { "fs22", 22 },
233 { "fs23", 23 },
234 { "fs24", 24 },
235 { "fs25", 25 },
236 { "fs26", 26 },
237 { "fs27", 27 },
238 { "fs28", 28 },
239 { "fs29", 29 },
240 { "fs3", 3 },
241 { "fs30", 30 },
242 { "fs31", 31 },
243 { "fs4", 4 },
244 { "fs5", 5 },
245 { "fs6", 6 },
246 { "fs7", 7 },
247 { "fs8", 8 },
248 { "fs9", 9 },
249 };
250
251 static const struct reg_name double_registers[] =
252 {
253 { "fd0", 0 },
254 { "fd10", 10 },
255 { "fd12", 12 },
256 { "fd14", 14 },
257 { "fd16", 16 },
258 { "fd18", 18 },
259 { "fd2", 2 },
260 { "fd20", 20 },
261 { "fd22", 22 },
262 { "fd24", 24 },
263 { "fd26", 26 },
264 { "fd28", 28 },
265 { "fd30", 30 },
266 { "fd4", 4 },
267 { "fd6", 6 },
268 { "fd8", 8 },
269 };
270
271 /* We abuse the `value' field, that would be otherwise unused, to
272 encode the architecture on which (access to) the register was
273 introduced. FIXME: we should probably warn when we encounter a
274 register name when assembling for an architecture that doesn't
275 support it, before parsing it as a symbol name. */
276 static const struct reg_name other_registers[] =
277 {
278 { "epsw", AM33 },
279 { "mdr", 0 },
280 { "pc", AM33 },
281 { "psw", 0 },
282 { "sp", 0 },
283 { "ssp", 0 },
284 { "usp", 0 },
285 };
286
287 #define OTHER_REG_NAME_CNT ARRAY_SIZE (other_registers)
288
289 /* Perform a binary search of the given register table REGS to see
290 if NAME is a valid regiter name. Returns the register number from
291 the array on success, or -1 on failure. */
292
293 static int
reg_name_search(const struct reg_name * regs,int regcount,const char * name)294 reg_name_search (const struct reg_name *regs,
295 int regcount,
296 const char *name)
297 {
298 int low, high;
299
300 low = 0;
301 high = regcount - 1;
302
303 do
304 {
305 int cmp, middle;
306
307 middle = (low + high) / 2;
308 cmp = strcasecmp (name, regs[middle].name);
309 if (cmp < 0)
310 high = middle - 1;
311 else if (cmp > 0)
312 low = middle + 1;
313 else
314 return regs[middle].value;
315 }
316 while (low <= high);
317
318 return -1;
319 }
320
321 /* Looks at the current position in the input line to see if it is
322 the name of a register in TABLE. If it is, then the name is
323 converted into an expression returned in EXPRESSIONP (with X_op
324 set to O_register and X_add_number set to the register number), the
325 input pointer is left pointing at the first non-blank character after
326 the name and the function returns TRUE. Otherwise the input pointer
327 is left alone and the function returns FALSE. */
328
329 static bfd_boolean
get_register_name(expressionS * expressionP,const struct reg_name * table,size_t table_length)330 get_register_name (expressionS * expressionP,
331 const struct reg_name * table,
332 size_t table_length)
333 {
334 int reg_number;
335 char *name;
336 char *start;
337 char c;
338
339 /* Find the spelling of the operand. */
340 start = name = input_line_pointer;
341
342 c = get_symbol_end ();
343 reg_number = reg_name_search (table, table_length, name);
344
345 /* Put back the delimiting char. */
346 *input_line_pointer = c;
347
348 /* Look to see if it's in the register table. */
349 if (reg_number >= 0)
350 {
351 expressionP->X_op = O_register;
352 expressionP->X_add_number = reg_number;
353
354 /* Make the rest nice. */
355 expressionP->X_add_symbol = NULL;
356 expressionP->X_op_symbol = NULL;
357
358 return TRUE;
359 }
360
361 /* Reset the line as if we had not done anything. */
362 input_line_pointer = start;
363 return FALSE;
364 }
365
366 static bfd_boolean
r_register_name(expressionS * expressionP)367 r_register_name (expressionS *expressionP)
368 {
369 return get_register_name (expressionP, r_registers, ARRAY_SIZE (r_registers));
370 }
371
372
373 static bfd_boolean
xr_register_name(expressionS * expressionP)374 xr_register_name (expressionS *expressionP)
375 {
376 return get_register_name (expressionP, xr_registers, ARRAY_SIZE (xr_registers));
377 }
378
379 static bfd_boolean
data_register_name(expressionS * expressionP)380 data_register_name (expressionS *expressionP)
381 {
382 return get_register_name (expressionP, data_registers, ARRAY_SIZE (data_registers));
383 }
384
385 static bfd_boolean
address_register_name(expressionS * expressionP)386 address_register_name (expressionS *expressionP)
387 {
388 return get_register_name (expressionP, address_registers, ARRAY_SIZE (address_registers));
389 }
390
391 static bfd_boolean
float_register_name(expressionS * expressionP)392 float_register_name (expressionS *expressionP)
393 {
394 return get_register_name (expressionP, float_registers, ARRAY_SIZE (float_registers));
395 }
396
397 static bfd_boolean
double_register_name(expressionS * expressionP)398 double_register_name (expressionS *expressionP)
399 {
400 return get_register_name (expressionP, double_registers, ARRAY_SIZE (double_registers));
401 }
402
403 static bfd_boolean
other_register_name(expressionS * expressionP)404 other_register_name (expressionS *expressionP)
405 {
406 int reg_number;
407 char *name;
408 char *start;
409 char c;
410
411 /* Find the spelling of the operand. */
412 start = name = input_line_pointer;
413
414 c = get_symbol_end ();
415 reg_number = reg_name_search (other_registers, ARRAY_SIZE (other_registers), name);
416
417 /* Put back the delimiting char. */
418 *input_line_pointer = c;
419
420 /* Look to see if it's in the register table. */
421 if (reg_number == 0
422 || (reg_number == AM33 && HAVE_AM33))
423 {
424 expressionP->X_op = O_register;
425 expressionP->X_add_number = 0;
426
427 /* Make the rest nice. */
428 expressionP->X_add_symbol = NULL;
429 expressionP->X_op_symbol = NULL;
430
431 return TRUE;
432 }
433
434 /* Reset the line as if we had not done anything. */
435 input_line_pointer = start;
436 return FALSE;
437 }
438
439 void
md_show_usage(FILE * stream)440 md_show_usage (FILE *stream)
441 {
442 fprintf (stream, _("MN10300 assembler options:\n\
443 none yet\n"));
444 }
445
446 int
md_parse_option(int c ATTRIBUTE_UNUSED,char * arg ATTRIBUTE_UNUSED)447 md_parse_option (int c ATTRIBUTE_UNUSED, char *arg ATTRIBUTE_UNUSED)
448 {
449 return 0;
450 }
451
452 symbolS *
md_undefined_symbol(char * name ATTRIBUTE_UNUSED)453 md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
454 {
455 return 0;
456 }
457
458 char *
md_atof(int type,char * litp,int * sizep)459 md_atof (int type, char *litp, int *sizep)
460 {
461 return ieee_md_atof (type, litp, sizep, FALSE);
462 }
463
464 void
md_convert_frag(bfd * abfd ATTRIBUTE_UNUSED,asection * sec,fragS * fragP)465 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
466 asection *sec,
467 fragS *fragP)
468 {
469 static unsigned long label_count = 0;
470 char buf[40];
471
472 subseg_change (sec, 0);
473 if (fragP->fr_subtype == 0)
474 {
475 fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol,
476 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
477 fragP->fr_var = 0;
478 fragP->fr_fix += 2;
479 }
480 else if (fragP->fr_subtype == 1)
481 {
482 /* Reverse the condition of the first branch. */
483 int offset = fragP->fr_fix;
484 int opcode = fragP->fr_literal[offset] & 0xff;
485
486 switch (opcode)
487 {
488 case 0xc8:
489 opcode = 0xc9;
490 break;
491 case 0xc9:
492 opcode = 0xc8;
493 break;
494 case 0xc0:
495 opcode = 0xc2;
496 break;
497 case 0xc2:
498 opcode = 0xc0;
499 break;
500 case 0xc3:
501 opcode = 0xc1;
502 break;
503 case 0xc1:
504 opcode = 0xc3;
505 break;
506 case 0xc4:
507 opcode = 0xc6;
508 break;
509 case 0xc6:
510 opcode = 0xc4;
511 break;
512 case 0xc7:
513 opcode = 0xc5;
514 break;
515 case 0xc5:
516 opcode = 0xc7;
517 break;
518 default:
519 abort ();
520 }
521 fragP->fr_literal[offset] = opcode;
522
523 /* Create a fixup for the reversed conditional branch. */
524 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
525 fix_new (fragP, fragP->fr_fix + 1, 1,
526 symbol_new (buf, sec, 0, fragP->fr_next),
527 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
528
529 /* Now create the unconditional branch + fixup to the
530 final target. */
531 fragP->fr_literal[offset + 2] = 0xcc;
532 fix_new (fragP, fragP->fr_fix + 3, 2, fragP->fr_symbol,
533 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
534 fragP->fr_var = 0;
535 fragP->fr_fix += 5;
536 }
537 else if (fragP->fr_subtype == 2)
538 {
539 /* Reverse the condition of the first branch. */
540 int offset = fragP->fr_fix;
541 int opcode = fragP->fr_literal[offset] & 0xff;
542
543 switch (opcode)
544 {
545 case 0xc8:
546 opcode = 0xc9;
547 break;
548 case 0xc9:
549 opcode = 0xc8;
550 break;
551 case 0xc0:
552 opcode = 0xc2;
553 break;
554 case 0xc2:
555 opcode = 0xc0;
556 break;
557 case 0xc3:
558 opcode = 0xc1;
559 break;
560 case 0xc1:
561 opcode = 0xc3;
562 break;
563 case 0xc4:
564 opcode = 0xc6;
565 break;
566 case 0xc6:
567 opcode = 0xc4;
568 break;
569 case 0xc7:
570 opcode = 0xc5;
571 break;
572 case 0xc5:
573 opcode = 0xc7;
574 break;
575 default:
576 abort ();
577 }
578 fragP->fr_literal[offset] = opcode;
579
580 /* Create a fixup for the reversed conditional branch. */
581 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
582 fix_new (fragP, fragP->fr_fix + 1, 1,
583 symbol_new (buf, sec, 0, fragP->fr_next),
584 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
585
586 /* Now create the unconditional branch + fixup to the
587 final target. */
588 fragP->fr_literal[offset + 2] = 0xdc;
589 fix_new (fragP, fragP->fr_fix + 3, 4, fragP->fr_symbol,
590 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
591 fragP->fr_var = 0;
592 fragP->fr_fix += 7;
593 }
594 else if (fragP->fr_subtype == 3)
595 {
596 fix_new (fragP, fragP->fr_fix + 2, 1, fragP->fr_symbol,
597 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
598 fragP->fr_var = 0;
599 fragP->fr_fix += 3;
600 }
601 else if (fragP->fr_subtype == 4)
602 {
603 /* Reverse the condition of the first branch. */
604 int offset = fragP->fr_fix;
605 int opcode = fragP->fr_literal[offset + 1] & 0xff;
606
607 switch (opcode)
608 {
609 case 0xe8:
610 opcode = 0xe9;
611 break;
612 case 0xe9:
613 opcode = 0xe8;
614 break;
615 case 0xea:
616 opcode = 0xeb;
617 break;
618 case 0xeb:
619 opcode = 0xea;
620 break;
621 default:
622 abort ();
623 }
624 fragP->fr_literal[offset + 1] = opcode;
625
626 /* Create a fixup for the reversed conditional branch. */
627 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
628 fix_new (fragP, fragP->fr_fix + 2, 1,
629 symbol_new (buf, sec, 0, fragP->fr_next),
630 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
631
632 /* Now create the unconditional branch + fixup to the
633 final target. */
634 fragP->fr_literal[offset + 3] = 0xcc;
635 fix_new (fragP, fragP->fr_fix + 4, 2, fragP->fr_symbol,
636 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
637 fragP->fr_var = 0;
638 fragP->fr_fix += 6;
639 }
640 else if (fragP->fr_subtype == 5)
641 {
642 /* Reverse the condition of the first branch. */
643 int offset = fragP->fr_fix;
644 int opcode = fragP->fr_literal[offset + 1] & 0xff;
645
646 switch (opcode)
647 {
648 case 0xe8:
649 opcode = 0xe9;
650 break;
651 case 0xea:
652 opcode = 0xeb;
653 break;
654 case 0xeb:
655 opcode = 0xea;
656 break;
657 default:
658 abort ();
659 }
660 fragP->fr_literal[offset + 1] = opcode;
661
662 /* Create a fixup for the reversed conditional branch. */
663 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
664 fix_new (fragP, fragP->fr_fix + 2, 1,
665 symbol_new (buf, sec, 0, fragP->fr_next),
666 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
667
668 /* Now create the unconditional branch + fixup to the
669 final target. */
670 fragP->fr_literal[offset + 3] = 0xdc;
671 fix_new (fragP, fragP->fr_fix + 4, 4, fragP->fr_symbol,
672 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
673 fragP->fr_var = 0;
674 fragP->fr_fix += 8;
675 }
676 else if (fragP->fr_subtype == 6)
677 {
678 int offset = fragP->fr_fix;
679
680 fragP->fr_literal[offset] = 0xcd;
681 fix_new (fragP, fragP->fr_fix + 1, 2, fragP->fr_symbol,
682 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
683 fragP->fr_var = 0;
684 fragP->fr_fix += 5;
685 }
686 else if (fragP->fr_subtype == 7)
687 {
688 int offset = fragP->fr_fix;
689
690 fragP->fr_literal[offset] = 0xdd;
691 fragP->fr_literal[offset + 5] = fragP->fr_literal[offset + 3];
692 fragP->fr_literal[offset + 6] = fragP->fr_literal[offset + 4];
693 fragP->fr_literal[offset + 3] = 0;
694 fragP->fr_literal[offset + 4] = 0;
695
696 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
697 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
698 fragP->fr_var = 0;
699 fragP->fr_fix += 7;
700 }
701 else if (fragP->fr_subtype == 8)
702 {
703 int offset = fragP->fr_fix;
704
705 fragP->fr_literal[offset] = 0xfa;
706 fragP->fr_literal[offset + 1] = 0xff;
707 fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol,
708 fragP->fr_offset + 2, 1, BFD_RELOC_16_PCREL);
709 fragP->fr_var = 0;
710 fragP->fr_fix += 4;
711 }
712 else if (fragP->fr_subtype == 9)
713 {
714 int offset = fragP->fr_fix;
715
716 fragP->fr_literal[offset] = 0xfc;
717 fragP->fr_literal[offset + 1] = 0xff;
718
719 fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol,
720 fragP->fr_offset + 2, 1, BFD_RELOC_32_PCREL);
721 fragP->fr_var = 0;
722 fragP->fr_fix += 6;
723 }
724 else if (fragP->fr_subtype == 10)
725 {
726 fragP->fr_literal[fragP->fr_fix] = 0xca;
727 fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol,
728 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
729 fragP->fr_var = 0;
730 fragP->fr_fix += 2;
731 }
732 else if (fragP->fr_subtype == 11)
733 {
734 int offset = fragP->fr_fix;
735
736 fragP->fr_literal[offset] = 0xcc;
737
738 fix_new (fragP, fragP->fr_fix + 1, 2, fragP->fr_symbol,
739 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
740 fragP->fr_var = 0;
741 fragP->fr_fix += 3;
742 }
743 else if (fragP->fr_subtype == 12)
744 {
745 int offset = fragP->fr_fix;
746
747 fragP->fr_literal[offset] = 0xdc;
748
749 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
750 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
751 fragP->fr_var = 0;
752 fragP->fr_fix += 5;
753 }
754 else if (fragP->fr_subtype == 13)
755 {
756 fix_new (fragP, fragP->fr_fix + 2, 1, fragP->fr_symbol,
757 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
758 fragP->fr_var = 0;
759 fragP->fr_fix += 3;
760 }
761 else if (fragP->fr_subtype == 14)
762 {
763 /* Reverse the condition of the first branch. */
764 int offset = fragP->fr_fix;
765 int opcode = fragP->fr_literal[offset + 1] & 0xff;
766
767 switch (opcode)
768 {
769 case 0xd0:
770 opcode = 0xd1;
771 break;
772 case 0xd1:
773 opcode = 0xd0;
774 break;
775 case 0xd2:
776 opcode = 0xdc;
777 break;
778 case 0xd3:
779 opcode = 0xdb;
780 break;
781 case 0xd4:
782 opcode = 0xda;
783 break;
784 case 0xd5:
785 opcode = 0xd9;
786 break;
787 case 0xd6:
788 opcode = 0xd8;
789 break;
790 case 0xd7:
791 opcode = 0xdd;
792 break;
793 case 0xd8:
794 opcode = 0xd6;
795 break;
796 case 0xd9:
797 opcode = 0xd5;
798 break;
799 case 0xda:
800 opcode = 0xd4;
801 break;
802 case 0xdb:
803 opcode = 0xd3;
804 break;
805 case 0xdc:
806 opcode = 0xd2;
807 break;
808 case 0xdd:
809 opcode = 0xd7;
810 break;
811 default:
812 abort ();
813 }
814 fragP->fr_literal[offset + 1] = opcode;
815
816 /* Create a fixup for the reversed conditional branch. */
817 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
818 fix_new (fragP, fragP->fr_fix + 2, 1,
819 symbol_new (buf, sec, 0, fragP->fr_next),
820 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
821
822 /* Now create the unconditional branch + fixup to the
823 final target. */
824 fragP->fr_literal[offset + 3] = 0xcc;
825 fix_new (fragP, fragP->fr_fix + 4, 2, fragP->fr_symbol,
826 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
827 fragP->fr_var = 0;
828 fragP->fr_fix += 6;
829 }
830 else if (fragP->fr_subtype == 15)
831 {
832 /* Reverse the condition of the first branch. */
833 int offset = fragP->fr_fix;
834 int opcode = fragP->fr_literal[offset + 1] & 0xff;
835
836 switch (opcode)
837 {
838 case 0xd0:
839 opcode = 0xd1;
840 break;
841 case 0xd1:
842 opcode = 0xd0;
843 break;
844 case 0xd2:
845 opcode = 0xdc;
846 break;
847 case 0xd3:
848 opcode = 0xdb;
849 break;
850 case 0xd4:
851 opcode = 0xda;
852 break;
853 case 0xd5:
854 opcode = 0xd9;
855 break;
856 case 0xd6:
857 opcode = 0xd8;
858 break;
859 case 0xd7:
860 opcode = 0xdd;
861 break;
862 case 0xd8:
863 opcode = 0xd6;
864 break;
865 case 0xd9:
866 opcode = 0xd5;
867 break;
868 case 0xda:
869 opcode = 0xd4;
870 break;
871 case 0xdb:
872 opcode = 0xd3;
873 break;
874 case 0xdc:
875 opcode = 0xd2;
876 break;
877 case 0xdd:
878 opcode = 0xd7;
879 break;
880 default:
881 abort ();
882 }
883 fragP->fr_literal[offset + 1] = opcode;
884
885 /* Create a fixup for the reversed conditional branch. */
886 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
887 fix_new (fragP, fragP->fr_fix + 2, 1,
888 symbol_new (buf, sec, 0, fragP->fr_next),
889 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
890
891 /* Now create the unconditional branch + fixup to the
892 final target. */
893 fragP->fr_literal[offset + 3] = 0xdc;
894 fix_new (fragP, fragP->fr_fix + 4, 4, fragP->fr_symbol,
895 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
896 fragP->fr_var = 0;
897 fragP->fr_fix += 8;
898 }
899 else
900 abort ();
901 }
902
903 valueT
md_section_align(asection * seg,valueT addr)904 md_section_align (asection *seg, valueT addr)
905 {
906 int align = bfd_get_section_alignment (stdoutput, seg);
907
908 return ((addr + (1 << align) - 1) & (-1 << align));
909 }
910
911 void
md_begin(void)912 md_begin (void)
913 {
914 char *prev_name = "";
915 const struct mn10300_opcode *op;
916
917 mn10300_hash = hash_new ();
918
919 /* Insert unique names into hash table. The MN10300 instruction set
920 has many identical opcode names that have different opcodes based
921 on the operands. This hash table then provides a quick index to
922 the first opcode with a particular name in the opcode table. */
923
924 op = mn10300_opcodes;
925 while (op->name)
926 {
927 if (strcmp (prev_name, op->name))
928 {
929 prev_name = (char *) op->name;
930 hash_insert (mn10300_hash, op->name, (char *) op);
931 }
932 op++;
933 }
934
935 /* Set the default machine type. */
936 #ifdef TE_LINUX
937 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, AM33_2))
938 as_warn (_("could not set architecture and machine"));
939
940 current_machine = AM33_2;
941 #else
942 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, MN103))
943 as_warn (_("could not set architecture and machine"));
944
945 current_machine = MN103;
946 #endif
947 }
948
949 static symbolS *GOT_symbol;
950
951 static inline int
mn10300_PIC_related_p(symbolS * sym)952 mn10300_PIC_related_p (symbolS *sym)
953 {
954 expressionS *exp;
955
956 if (! sym)
957 return 0;
958
959 if (sym == GOT_symbol)
960 return 1;
961
962 exp = symbol_get_value_expression (sym);
963
964 return (exp->X_op == O_PIC_reloc
965 || mn10300_PIC_related_p (exp->X_add_symbol)
966 || mn10300_PIC_related_p (exp->X_op_symbol));
967 }
968
969 static inline int
mn10300_check_fixup(struct mn10300_fixup * fixup)970 mn10300_check_fixup (struct mn10300_fixup *fixup)
971 {
972 expressionS *exp = &fixup->exp;
973
974 repeat:
975 switch (exp->X_op)
976 {
977 case O_add:
978 case O_subtract: /* If we're sufficiently unlucky that the label
979 and the expression that references it happen
980 to end up in different frags, the subtract
981 won't be simplified within expression(). */
982 /* The PIC-related operand must be the first operand of a sum. */
983 if (exp != &fixup->exp || mn10300_PIC_related_p (exp->X_op_symbol))
984 return 1;
985
986 if (exp->X_add_symbol && exp->X_add_symbol == GOT_symbol)
987 fixup->reloc = BFD_RELOC_32_GOT_PCREL;
988
989 exp = symbol_get_value_expression (exp->X_add_symbol);
990 goto repeat;
991
992 case O_symbol:
993 if (exp->X_add_symbol && exp->X_add_symbol == GOT_symbol)
994 fixup->reloc = BFD_RELOC_32_GOT_PCREL;
995 break;
996
997 case O_PIC_reloc:
998 fixup->reloc = exp->X_md;
999 exp->X_op = O_symbol;
1000 if (fixup->reloc == BFD_RELOC_32_PLT_PCREL
1001 && fixup->opindex >= 0
1002 && (mn10300_operands[fixup->opindex].flags
1003 & MN10300_OPERAND_RELAX))
1004 return 1;
1005 break;
1006
1007 default:
1008 return (mn10300_PIC_related_p (exp->X_add_symbol)
1009 || mn10300_PIC_related_p (exp->X_op_symbol));
1010 }
1011
1012 return 0;
1013 }
1014
1015 void
mn10300_cons_fix_new(fragS * frag,int off,int size,expressionS * exp,bfd_reloc_code_real_type r ATTRIBUTE_UNUSED)1016 mn10300_cons_fix_new (fragS *frag, int off, int size, expressionS *exp,
1017 bfd_reloc_code_real_type r ATTRIBUTE_UNUSED)
1018 {
1019 struct mn10300_fixup fixup;
1020
1021 fixup.opindex = -1;
1022 fixup.exp = *exp;
1023 fixup.reloc = BFD_RELOC_UNUSED;
1024
1025 mn10300_check_fixup (&fixup);
1026
1027 if (fixup.reloc == BFD_RELOC_MN10300_GOT32)
1028 switch (size)
1029 {
1030 case 2:
1031 fixup.reloc = BFD_RELOC_MN10300_GOT16;
1032 break;
1033
1034 case 3:
1035 fixup.reloc = BFD_RELOC_MN10300_GOT24;
1036 break;
1037
1038 case 4:
1039 break;
1040
1041 default:
1042 goto error;
1043 }
1044 else if (fixup.reloc == BFD_RELOC_UNUSED)
1045 switch (size)
1046 {
1047 case 1:
1048 fixup.reloc = BFD_RELOC_8;
1049 break;
1050
1051 case 2:
1052 fixup.reloc = BFD_RELOC_16;
1053 break;
1054
1055 case 3:
1056 fixup.reloc = BFD_RELOC_24;
1057 break;
1058
1059 case 4:
1060 fixup.reloc = BFD_RELOC_32;
1061 break;
1062
1063 default:
1064 goto error;
1065 }
1066 else if (size != 4)
1067 {
1068 error:
1069 as_bad (_("unsupported BFD relocation size %u"), size);
1070 fixup.reloc = BFD_RELOC_UNUSED;
1071 }
1072
1073 fix_new_exp (frag, off, size, &fixup.exp, 0, fixup.reloc);
1074 }
1075
1076 static bfd_boolean
check_operand(const struct mn10300_operand * operand,offsetT val)1077 check_operand (const struct mn10300_operand *operand,
1078 offsetT val)
1079 {
1080 /* No need to check 32bit operands for a bit. Note that
1081 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */
1082 if (operand->bits != 32
1083 && (operand->flags & MN10300_OPERAND_SPLIT) == 0)
1084 {
1085 long min, max;
1086 offsetT test;
1087 int bits;
1088
1089 bits = operand->bits;
1090 if (operand->flags & MN10300_OPERAND_24BIT)
1091 bits = 24;
1092
1093 if ((operand->flags & MN10300_OPERAND_SIGNED) != 0)
1094 {
1095 max = (1 << (bits - 1)) - 1;
1096 min = - (1 << (bits - 1));
1097 }
1098 else
1099 {
1100 max = (1 << bits) - 1;
1101 min = 0;
1102 }
1103
1104 test = val;
1105
1106 if (test < (offsetT) min || test > (offsetT) max)
1107 return FALSE;
1108 }
1109 return TRUE;
1110 }
1111
1112 /* Insert an operand value into an instruction. */
1113
1114 static void
mn10300_insert_operand(unsigned long * insnp,unsigned long * extensionp,const struct mn10300_operand * operand,offsetT val,char * file,unsigned int line,unsigned int shift)1115 mn10300_insert_operand (unsigned long *insnp,
1116 unsigned long *extensionp,
1117 const struct mn10300_operand *operand,
1118 offsetT val,
1119 char *file,
1120 unsigned int line,
1121 unsigned int shift)
1122 {
1123 /* No need to check 32bit operands for a bit. Note that
1124 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */
1125 if (operand->bits != 32
1126 && (operand->flags & MN10300_OPERAND_SPLIT) == 0)
1127 {
1128 long min, max;
1129 offsetT test;
1130 int bits;
1131
1132 bits = operand->bits;
1133 if (operand->flags & MN10300_OPERAND_24BIT)
1134 bits = 24;
1135
1136 if ((operand->flags & MN10300_OPERAND_SIGNED) != 0)
1137 {
1138 max = (1 << (bits - 1)) - 1;
1139 min = - (1 << (bits - 1));
1140 }
1141 else
1142 {
1143 max = (1 << bits) - 1;
1144 min = 0;
1145 }
1146
1147 test = val;
1148
1149 if (test < (offsetT) min || test > (offsetT) max)
1150 as_warn_value_out_of_range (_("operand"), test, (offsetT) min, (offsetT) max, file, line);
1151 }
1152
1153 if ((operand->flags & MN10300_OPERAND_SPLIT) != 0)
1154 {
1155 *insnp |= (val >> (32 - operand->bits)) & ((1 << operand->bits) - 1);
1156 *extensionp |= ((val & ((1 << (32 - operand->bits)) - 1))
1157 << operand->shift);
1158 }
1159 else if ((operand->flags & MN10300_OPERAND_24BIT) != 0)
1160 {
1161 *insnp |= (val >> (24 - operand->bits)) & ((1 << operand->bits) - 1);
1162 *extensionp |= ((val & ((1 << (24 - operand->bits)) - 1))
1163 << operand->shift);
1164 }
1165 else if ((operand->flags & (MN10300_OPERAND_FSREG | MN10300_OPERAND_FDREG)))
1166 {
1167 /* See devo/opcodes/m10300-opc.c just before #define FSM0 for an
1168 explanation of these variables. Note that FMT-implied shifts
1169 are not taken into account for FP registers. */
1170 unsigned long mask_low, mask_high;
1171 int shl_low, shr_high, shl_high;
1172
1173 switch (operand->bits)
1174 {
1175 case 5:
1176 /* Handle regular FP registers. */
1177 if (operand->shift >= 0)
1178 {
1179 /* This is an `m' register. */
1180 shl_low = operand->shift;
1181 shl_high = 8 + (8 & shl_low) + (shl_low & 4) / 4;
1182 }
1183 else
1184 {
1185 /* This is an `n' register. */
1186 shl_low = -operand->shift;
1187 shl_high = shl_low / 4;
1188 }
1189
1190 mask_low = 0x0f;
1191 mask_high = 0x10;
1192 shr_high = 4;
1193 break;
1194
1195 case 3:
1196 /* Handle accumulators. */
1197 shl_low = -operand->shift;
1198 shl_high = 0;
1199 mask_low = 0x03;
1200 mask_high = 0x04;
1201 shr_high = 2;
1202 break;
1203
1204 default:
1205 abort ();
1206 }
1207 *insnp |= ((((val & mask_high) >> shr_high) << shl_high)
1208 | ((val & mask_low) << shl_low));
1209 }
1210 else if ((operand->flags & MN10300_OPERAND_EXTENDED) == 0)
1211 {
1212 *insnp |= (((long) val & ((1 << operand->bits) - 1))
1213 << (operand->shift + shift));
1214
1215 if ((operand->flags & MN10300_OPERAND_REPEATED) != 0)
1216 *insnp |= (((long) val & ((1 << operand->bits) - 1))
1217 << (operand->shift + shift + operand->bits));
1218 }
1219 else
1220 {
1221 *extensionp |= (((long) val & ((1 << operand->bits) - 1))
1222 << (operand->shift + shift));
1223
1224 if ((operand->flags & MN10300_OPERAND_REPEATED) != 0)
1225 *extensionp |= (((long) val & ((1 << operand->bits) - 1))
1226 << (operand->shift + shift + operand->bits));
1227 }
1228 }
1229
1230 void
md_assemble(char * str)1231 md_assemble (char *str)
1232 {
1233 char *s;
1234 struct mn10300_opcode *opcode;
1235 struct mn10300_opcode *next_opcode;
1236 const unsigned char *opindex_ptr;
1237 int next_opindex, relaxable;
1238 unsigned long insn, extension, size = 0;
1239 char *f;
1240 int i;
1241 int match;
1242
1243 /* Get the opcode. */
1244 for (s = str; *s != '\0' && !ISSPACE (*s); s++)
1245 ;
1246 if (*s != '\0')
1247 *s++ = '\0';
1248
1249 /* Find the first opcode with the proper name. */
1250 opcode = (struct mn10300_opcode *) hash_find (mn10300_hash, str);
1251 if (opcode == NULL)
1252 {
1253 as_bad (_("Unrecognized opcode: `%s'"), str);
1254 return;
1255 }
1256
1257 str = s;
1258 while (ISSPACE (*str))
1259 ++str;
1260
1261 input_line_pointer = str;
1262
1263 for (;;)
1264 {
1265 const char *errmsg;
1266 int op_idx;
1267 char *hold;
1268 int extra_shift = 0;
1269
1270 errmsg = _("Invalid opcode/operands");
1271
1272 /* Reset the array of register operands. */
1273 memset (mn10300_reg_operands, -1, sizeof (mn10300_reg_operands));
1274
1275 relaxable = 0;
1276 fc = 0;
1277 match = 0;
1278 next_opindex = 0;
1279 insn = opcode->opcode;
1280 extension = 0;
1281
1282 /* If the instruction is not available on the current machine
1283 then it can not possibly match. */
1284 if (opcode->machine
1285 && !(opcode->machine == AM33_2 && HAVE_AM33_2)
1286 && !(opcode->machine == AM33 && HAVE_AM33)
1287 && !(opcode->machine == AM30 && HAVE_AM30))
1288 goto error;
1289
1290 for (op_idx = 1, opindex_ptr = opcode->operands;
1291 *opindex_ptr != 0;
1292 opindex_ptr++, op_idx++)
1293 {
1294 const struct mn10300_operand *operand;
1295 expressionS ex;
1296
1297 if (next_opindex == 0)
1298 {
1299 operand = &mn10300_operands[*opindex_ptr];
1300 }
1301 else
1302 {
1303 operand = &mn10300_operands[next_opindex];
1304 next_opindex = 0;
1305 }
1306
1307 while (*str == ' ' || *str == ',')
1308 ++str;
1309
1310 if (operand->flags & MN10300_OPERAND_RELAX)
1311 relaxable = 1;
1312
1313 /* Gather the operand. */
1314 hold = input_line_pointer;
1315 input_line_pointer = str;
1316
1317 if (operand->flags & MN10300_OPERAND_PAREN)
1318 {
1319 if (*input_line_pointer != ')' && *input_line_pointer != '(')
1320 {
1321 input_line_pointer = hold;
1322 str = hold;
1323 goto error;
1324 }
1325 input_line_pointer++;
1326 goto keep_going;
1327 }
1328 /* See if we can match the operands. */
1329 else if (operand->flags & MN10300_OPERAND_DREG)
1330 {
1331 if (!data_register_name (&ex))
1332 {
1333 input_line_pointer = hold;
1334 str = hold;
1335 goto error;
1336 }
1337 }
1338 else if (operand->flags & MN10300_OPERAND_AREG)
1339 {
1340 if (!address_register_name (&ex))
1341 {
1342 input_line_pointer = hold;
1343 str = hold;
1344 goto error;
1345 }
1346 }
1347 else if (operand->flags & MN10300_OPERAND_SP)
1348 {
1349 char *start = input_line_pointer;
1350 char c = get_symbol_end ();
1351
1352 if (strcasecmp (start, "sp") != 0)
1353 {
1354 *input_line_pointer = c;
1355 input_line_pointer = hold;
1356 str = hold;
1357 goto error;
1358 }
1359 *input_line_pointer = c;
1360 goto keep_going;
1361 }
1362 else if (operand->flags & MN10300_OPERAND_RREG)
1363 {
1364 if (!r_register_name (&ex))
1365 {
1366 input_line_pointer = hold;
1367 str = hold;
1368 goto error;
1369 }
1370 }
1371 else if (operand->flags & MN10300_OPERAND_XRREG)
1372 {
1373 if (!xr_register_name (&ex))
1374 {
1375 input_line_pointer = hold;
1376 str = hold;
1377 goto error;
1378 }
1379 }
1380 else if (operand->flags & MN10300_OPERAND_FSREG)
1381 {
1382 if (!float_register_name (&ex))
1383 {
1384 input_line_pointer = hold;
1385 str = hold;
1386 goto error;
1387 }
1388 }
1389 else if (operand->flags & MN10300_OPERAND_FDREG)
1390 {
1391 if (!double_register_name (&ex))
1392 {
1393 input_line_pointer = hold;
1394 str = hold;
1395 goto error;
1396 }
1397 }
1398 else if (operand->flags & MN10300_OPERAND_FPCR)
1399 {
1400 char *start = input_line_pointer;
1401 char c = get_symbol_end ();
1402
1403 if (strcasecmp (start, "fpcr") != 0)
1404 {
1405 *input_line_pointer = c;
1406 input_line_pointer = hold;
1407 str = hold;
1408 goto error;
1409 }
1410 *input_line_pointer = c;
1411 goto keep_going;
1412 }
1413 else if (operand->flags & MN10300_OPERAND_USP)
1414 {
1415 char *start = input_line_pointer;
1416 char c = get_symbol_end ();
1417
1418 if (strcasecmp (start, "usp") != 0)
1419 {
1420 *input_line_pointer = c;
1421 input_line_pointer = hold;
1422 str = hold;
1423 goto error;
1424 }
1425 *input_line_pointer = c;
1426 goto keep_going;
1427 }
1428 else if (operand->flags & MN10300_OPERAND_SSP)
1429 {
1430 char *start = input_line_pointer;
1431 char c = get_symbol_end ();
1432
1433 if (strcasecmp (start, "ssp") != 0)
1434 {
1435 *input_line_pointer = c;
1436 input_line_pointer = hold;
1437 str = hold;
1438 goto error;
1439 }
1440 *input_line_pointer = c;
1441 goto keep_going;
1442 }
1443 else if (operand->flags & MN10300_OPERAND_MSP)
1444 {
1445 char *start = input_line_pointer;
1446 char c = get_symbol_end ();
1447
1448 if (strcasecmp (start, "msp") != 0)
1449 {
1450 *input_line_pointer = c;
1451 input_line_pointer = hold;
1452 str = hold;
1453 goto error;
1454 }
1455 *input_line_pointer = c;
1456 goto keep_going;
1457 }
1458 else if (operand->flags & MN10300_OPERAND_PC)
1459 {
1460 char *start = input_line_pointer;
1461 char c = get_symbol_end ();
1462
1463 if (strcasecmp (start, "pc") != 0)
1464 {
1465 *input_line_pointer = c;
1466 input_line_pointer = hold;
1467 str = hold;
1468 goto error;
1469 }
1470 *input_line_pointer = c;
1471 goto keep_going;
1472 }
1473 else if (operand->flags & MN10300_OPERAND_EPSW)
1474 {
1475 char *start = input_line_pointer;
1476 char c = get_symbol_end ();
1477
1478 if (strcasecmp (start, "epsw") != 0)
1479 {
1480 *input_line_pointer = c;
1481 input_line_pointer = hold;
1482 str = hold;
1483 goto error;
1484 }
1485 *input_line_pointer = c;
1486 goto keep_going;
1487 }
1488 else if (operand->flags & MN10300_OPERAND_PLUS)
1489 {
1490 if (*input_line_pointer != '+')
1491 {
1492 input_line_pointer = hold;
1493 str = hold;
1494 goto error;
1495 }
1496 input_line_pointer++;
1497 goto keep_going;
1498 }
1499 else if (operand->flags & MN10300_OPERAND_PSW)
1500 {
1501 char *start = input_line_pointer;
1502 char c = get_symbol_end ();
1503
1504 if (strcasecmp (start, "psw") != 0)
1505 {
1506 *input_line_pointer = c;
1507 input_line_pointer = hold;
1508 str = hold;
1509 goto error;
1510 }
1511 *input_line_pointer = c;
1512 goto keep_going;
1513 }
1514 else if (operand->flags & MN10300_OPERAND_MDR)
1515 {
1516 char *start = input_line_pointer;
1517 char c = get_symbol_end ();
1518
1519 if (strcasecmp (start, "mdr") != 0)
1520 {
1521 *input_line_pointer = c;
1522 input_line_pointer = hold;
1523 str = hold;
1524 goto error;
1525 }
1526 *input_line_pointer = c;
1527 goto keep_going;
1528 }
1529 else if (operand->flags & MN10300_OPERAND_REG_LIST)
1530 {
1531 unsigned int value = 0;
1532 if (*input_line_pointer != '[')
1533 {
1534 input_line_pointer = hold;
1535 str = hold;
1536 goto error;
1537 }
1538
1539 /* Eat the '['. */
1540 input_line_pointer++;
1541
1542 /* We used to reject a null register list here; however,
1543 we accept it now so the compiler can emit "call"
1544 instructions for all calls to named functions.
1545
1546 The linker can then fill in the appropriate bits for the
1547 register list and stack size or change the instruction
1548 into a "calls" if using "call" is not profitable. */
1549 while (*input_line_pointer != ']')
1550 {
1551 char *start;
1552 char c;
1553
1554 if (*input_line_pointer == ',')
1555 input_line_pointer++;
1556
1557 start = input_line_pointer;
1558 c = get_symbol_end ();
1559
1560 if (strcasecmp (start, "d2") == 0)
1561 {
1562 value |= 0x80;
1563 *input_line_pointer = c;
1564 }
1565 else if (strcasecmp (start, "d3") == 0)
1566 {
1567 value |= 0x40;
1568 *input_line_pointer = c;
1569 }
1570 else if (strcasecmp (start, "a2") == 0)
1571 {
1572 value |= 0x20;
1573 *input_line_pointer = c;
1574 }
1575 else if (strcasecmp (start, "a3") == 0)
1576 {
1577 value |= 0x10;
1578 *input_line_pointer = c;
1579 }
1580 else if (strcasecmp (start, "other") == 0)
1581 {
1582 value |= 0x08;
1583 *input_line_pointer = c;
1584 }
1585 else if (HAVE_AM33
1586 && strcasecmp (start, "exreg0") == 0)
1587 {
1588 value |= 0x04;
1589 *input_line_pointer = c;
1590 }
1591 else if (HAVE_AM33
1592 && strcasecmp (start, "exreg1") == 0)
1593 {
1594 value |= 0x02;
1595 *input_line_pointer = c;
1596 }
1597 else if (HAVE_AM33
1598 && strcasecmp (start, "exother") == 0)
1599 {
1600 value |= 0x01;
1601 *input_line_pointer = c;
1602 }
1603 else if (HAVE_AM33
1604 && strcasecmp (start, "all") == 0)
1605 {
1606 value |= 0xff;
1607 *input_line_pointer = c;
1608 }
1609 else
1610 {
1611 input_line_pointer = hold;
1612 str = hold;
1613 goto error;
1614 }
1615 }
1616 input_line_pointer++;
1617 mn10300_insert_operand (& insn, & extension, operand,
1618 value, NULL, 0, 0);
1619 goto keep_going;
1620
1621 }
1622 else if (data_register_name (&ex))
1623 {
1624 input_line_pointer = hold;
1625 str = hold;
1626 goto error;
1627 }
1628 else if (address_register_name (&ex))
1629 {
1630 input_line_pointer = hold;
1631 str = hold;
1632 goto error;
1633 }
1634 else if (other_register_name (&ex))
1635 {
1636 input_line_pointer = hold;
1637 str = hold;
1638 goto error;
1639 }
1640 else if (HAVE_AM33 && r_register_name (&ex))
1641 {
1642 input_line_pointer = hold;
1643 str = hold;
1644 goto error;
1645 }
1646 else if (HAVE_AM33 && xr_register_name (&ex))
1647 {
1648 input_line_pointer = hold;
1649 str = hold;
1650 goto error;
1651 }
1652 else if (HAVE_AM33_2 && float_register_name (&ex))
1653 {
1654 input_line_pointer = hold;
1655 str = hold;
1656 goto error;
1657 }
1658 else if (HAVE_AM33_2 && double_register_name (&ex))
1659 {
1660 input_line_pointer = hold;
1661 str = hold;
1662 goto error;
1663 }
1664 else if (*str == ')' || *str == '(')
1665 {
1666 input_line_pointer = hold;
1667 str = hold;
1668 goto error;
1669 }
1670 else
1671 {
1672 expression (&ex);
1673 }
1674
1675 switch (ex.X_op)
1676 {
1677 case O_illegal:
1678 errmsg = _("illegal operand");
1679 goto error;
1680 case O_absent:
1681 errmsg = _("missing operand");
1682 goto error;
1683 case O_register:
1684 {
1685 int mask;
1686
1687 mask = MN10300_OPERAND_DREG | MN10300_OPERAND_AREG;
1688 if (HAVE_AM33)
1689 mask |= MN10300_OPERAND_RREG | MN10300_OPERAND_XRREG;
1690 if (HAVE_AM33_2)
1691 mask |= MN10300_OPERAND_FSREG | MN10300_OPERAND_FDREG;
1692 if ((operand->flags & mask) == 0)
1693 {
1694 input_line_pointer = hold;
1695 str = hold;
1696 goto error;
1697 }
1698
1699 if (opcode->format == FMT_D1 || opcode->format == FMT_S1)
1700 extra_shift = 8;
1701 else if (opcode->format == FMT_D2
1702 || opcode->format == FMT_D4
1703 || opcode->format == FMT_S2
1704 || opcode->format == FMT_S4
1705 || opcode->format == FMT_S6
1706 || opcode->format == FMT_D5)
1707 extra_shift = 16;
1708 else if (opcode->format == FMT_D7)
1709 extra_shift = 8;
1710 else if (opcode->format == FMT_D8 || opcode->format == FMT_D9)
1711 extra_shift = 8;
1712 else
1713 extra_shift = 0;
1714
1715 mn10300_insert_operand (& insn, & extension, operand,
1716 ex.X_add_number, NULL,
1717 0, extra_shift);
1718
1719 /* And note the register number in the register array. */
1720 mn10300_reg_operands[op_idx - 1] = ex.X_add_number;
1721 break;
1722 }
1723
1724 case O_constant:
1725 /* If this operand can be promoted, and it doesn't
1726 fit into the allocated bitfield for this insn,
1727 then promote it (ie this opcode does not match). */
1728 if (operand->flags
1729 & (MN10300_OPERAND_PROMOTE | MN10300_OPERAND_RELAX)
1730 && !check_operand (operand, ex.X_add_number))
1731 {
1732 input_line_pointer = hold;
1733 str = hold;
1734 goto error;
1735 }
1736
1737 mn10300_insert_operand (& insn, & extension, operand,
1738 ex.X_add_number, NULL, 0, 0);
1739 break;
1740
1741 default:
1742 /* If this operand can be promoted, then this opcode didn't
1743 match since we can't know if it needed promotion! */
1744 if (operand->flags & MN10300_OPERAND_PROMOTE)
1745 {
1746 input_line_pointer = hold;
1747 str = hold;
1748 goto error;
1749 }
1750
1751 /* We need to generate a fixup for this expression. */
1752 if (fc >= MAX_INSN_FIXUPS)
1753 as_fatal (_("too many fixups"));
1754 fixups[fc].exp = ex;
1755 fixups[fc].opindex = *opindex_ptr;
1756 fixups[fc].reloc = BFD_RELOC_UNUSED;
1757 if (mn10300_check_fixup (& fixups[fc]))
1758 goto error;
1759 ++fc;
1760 break;
1761 }
1762
1763 keep_going:
1764 str = input_line_pointer;
1765 input_line_pointer = hold;
1766
1767 while (*str == ' ' || *str == ',')
1768 ++str;
1769 }
1770
1771 /* Make sure we used all the operands! */
1772 if (*str != ',')
1773 match = 1;
1774
1775 /* If this instruction has registers that must not match, verify
1776 that they do indeed not match. */
1777 if (opcode->no_match_operands)
1778 {
1779 /* Look at each operand to see if it's marked. */
1780 for (i = 0; i < MN10300_MAX_OPERANDS; i++)
1781 {
1782 if ((1 << i) & opcode->no_match_operands)
1783 {
1784 int j;
1785
1786 /* operand I is marked. Check that it does not match any
1787 operands > I which are marked. */
1788 for (j = i + 1; j < MN10300_MAX_OPERANDS; j++)
1789 {
1790 if (((1 << j) & opcode->no_match_operands)
1791 && mn10300_reg_operands[i] == mn10300_reg_operands[j])
1792 {
1793 errmsg = _("Invalid register specification.");
1794 match = 0;
1795 goto error;
1796 }
1797 }
1798 }
1799 }
1800 }
1801
1802 error:
1803 if (match == 0)
1804 {
1805 next_opcode = opcode + 1;
1806 if (!strcmp (next_opcode->name, opcode->name))
1807 {
1808 opcode = next_opcode;
1809 continue;
1810 }
1811
1812 as_bad ("%s", errmsg);
1813 return;
1814 }
1815 break;
1816 }
1817
1818 while (ISSPACE (*str))
1819 ++str;
1820
1821 if (*str != '\0')
1822 as_bad (_("junk at end of line: `%s'"), str);
1823
1824 input_line_pointer = str;
1825
1826 /* Determine the size of the instruction. */
1827 if (opcode->format == FMT_S0)
1828 size = 1;
1829
1830 if (opcode->format == FMT_S1 || opcode->format == FMT_D0)
1831 size = 2;
1832
1833 if (opcode->format == FMT_S2 || opcode->format == FMT_D1)
1834 size = 3;
1835
1836 if (opcode->format == FMT_D6)
1837 size = 3;
1838
1839 if (opcode->format == FMT_D7 || opcode->format == FMT_D10)
1840 size = 4;
1841
1842 if (opcode->format == FMT_D8)
1843 size = 6;
1844
1845 if (opcode->format == FMT_D9)
1846 size = 7;
1847
1848 if (opcode->format == FMT_S4)
1849 size = 5;
1850
1851 if (opcode->format == FMT_S6 || opcode->format == FMT_D5)
1852 size = 7;
1853
1854 if (opcode->format == FMT_D2)
1855 size = 4;
1856
1857 if (opcode->format == FMT_D3)
1858 size = 5;
1859
1860 if (opcode->format == FMT_D4)
1861 size = 6;
1862
1863 if (relaxable && fc > 0)
1864 {
1865 /* On a 64-bit host the size of an 'int' is not the same
1866 as the size of a pointer, so we need a union to convert
1867 the opindex field of the fr_cgen structure into a char *
1868 so that it can be stored in the frag. We do not have
1869 to worry about loosing accuracy as we are not going to
1870 be even close to the 32bit limit of the int. */
1871 union
1872 {
1873 int opindex;
1874 char * ptr;
1875 }
1876 opindex_converter;
1877 int type;
1878
1879 /* We want to anchor the line info to the previous frag (if
1880 there isn't one, create it), so that, when the insn is
1881 resized, we still get the right address for the beginning of
1882 the region. */
1883 f = frag_more (0);
1884 dwarf2_emit_insn (0);
1885
1886 /* bCC */
1887 if (size == 2)
1888 {
1889 /* Handle bra specially. Basically treat it like jmp so
1890 that we automatically handle 8, 16 and 32 bit offsets
1891 correctly as well as jumps to an undefined address.
1892
1893 It is also important to not treat it like other bCC
1894 instructions since the long forms of bra is different
1895 from other bCC instructions. */
1896 if (opcode->opcode == 0xca00)
1897 type = 10;
1898 else
1899 type = 0;
1900 }
1901 /* call */
1902 else if (size == 5)
1903 type = 6;
1904 /* calls */
1905 else if (size == 4)
1906 type = 8;
1907 /* jmp */
1908 else if (size == 3 && opcode->opcode == 0xcc0000)
1909 type = 10;
1910 else if (size == 3 && (opcode->opcode & 0xfff000) == 0xf8d000)
1911 type = 13;
1912 /* bCC (uncommon cases) */
1913 else
1914 type = 3;
1915
1916 opindex_converter.opindex = fixups[0].opindex;
1917 f = frag_var (rs_machine_dependent, 8, 8 - size, type,
1918 fixups[0].exp.X_add_symbol,
1919 fixups[0].exp.X_add_number,
1920 opindex_converter.ptr);
1921
1922 /* This is pretty hokey. We basically just care about the
1923 opcode, so we have to write out the first word big endian.
1924
1925 The exception is "call", which has two operands that we
1926 care about.
1927
1928 The first operand (the register list) happens to be in the
1929 first instruction word, and will be in the right place if
1930 we output the first word in big endian mode.
1931
1932 The second operand (stack size) is in the extension word,
1933 and we want it to appear as the first character in the extension
1934 word (as it appears in memory). Luckily, writing the extension
1935 word in big endian format will do what we want. */
1936 number_to_chars_bigendian (f, insn, size > 4 ? 4 : size);
1937 if (size > 8)
1938 {
1939 number_to_chars_bigendian (f + 4, extension, 4);
1940 number_to_chars_bigendian (f + 8, 0, size - 8);
1941 }
1942 else if (size > 4)
1943 number_to_chars_bigendian (f + 4, extension, size - 4);
1944 }
1945 else
1946 {
1947 /* Allocate space for the instruction. */
1948 f = frag_more (size);
1949
1950 /* Fill in bytes for the instruction. Note that opcode fields
1951 are written big-endian, 16 & 32bit immediates are written
1952 little endian. Egad. */
1953 if (opcode->format == FMT_S0
1954 || opcode->format == FMT_S1
1955 || opcode->format == FMT_D0
1956 || opcode->format == FMT_D6
1957 || opcode->format == FMT_D7
1958 || opcode->format == FMT_D10
1959 || opcode->format == FMT_D1)
1960 {
1961 number_to_chars_bigendian (f, insn, size);
1962 }
1963 else if (opcode->format == FMT_S2
1964 && opcode->opcode != 0xdf0000
1965 && opcode->opcode != 0xde0000)
1966 {
1967 /* A format S2 instruction that is _not_ "ret" and "retf". */
1968 number_to_chars_bigendian (f, (insn >> 16) & 0xff, 1);
1969 number_to_chars_littleendian (f + 1, insn & 0xffff, 2);
1970 }
1971 else if (opcode->format == FMT_S2)
1972 {
1973 /* This must be a ret or retf, which is written entirely in
1974 big-endian format. */
1975 number_to_chars_bigendian (f, insn, 3);
1976 }
1977 else if (opcode->format == FMT_S4
1978 && opcode->opcode != 0xdc000000)
1979 {
1980 /* This must be a format S4 "call" instruction. What a pain. */
1981 unsigned long temp = (insn >> 8) & 0xffff;
1982 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
1983 number_to_chars_littleendian (f + 1, temp, 2);
1984 number_to_chars_bigendian (f + 3, insn & 0xff, 1);
1985 number_to_chars_bigendian (f + 4, extension & 0xff, 1);
1986 }
1987 else if (opcode->format == FMT_S4)
1988 {
1989 /* This must be a format S4 "jmp" instruction. */
1990 unsigned long temp = ((insn & 0xffffff) << 8) | (extension & 0xff);
1991 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
1992 number_to_chars_littleendian (f + 1, temp, 4);
1993 }
1994 else if (opcode->format == FMT_S6)
1995 {
1996 unsigned long temp = ((insn & 0xffffff) << 8)
1997 | ((extension >> 16) & 0xff);
1998 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
1999 number_to_chars_littleendian (f + 1, temp, 4);
2000 number_to_chars_bigendian (f + 5, (extension >> 8) & 0xff, 1);
2001 number_to_chars_bigendian (f + 6, extension & 0xff, 1);
2002 }
2003 else if (opcode->format == FMT_D2
2004 && opcode->opcode != 0xfaf80000
2005 && opcode->opcode != 0xfaf00000
2006 && opcode->opcode != 0xfaf40000)
2007 {
2008 /* A format D2 instruction where the 16bit immediate is
2009 really a single 16bit value, not two 8bit values. */
2010 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
2011 number_to_chars_littleendian (f + 2, insn & 0xffff, 2);
2012 }
2013 else if (opcode->format == FMT_D2)
2014 {
2015 /* A format D2 instruction where the 16bit immediate
2016 is really two 8bit immediates. */
2017 number_to_chars_bigendian (f, insn, 4);
2018 }
2019 else if (opcode->format == FMT_D3)
2020 {
2021 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
2022 number_to_chars_littleendian (f + 2, insn & 0xffff, 2);
2023 number_to_chars_bigendian (f + 4, extension & 0xff, 1);
2024 }
2025 else if (opcode->format == FMT_D4)
2026 {
2027 unsigned long temp = ((insn & 0xffff) << 16) | (extension & 0xffff);
2028
2029 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
2030 number_to_chars_littleendian (f + 2, temp, 4);
2031 }
2032 else if (opcode->format == FMT_D5)
2033 {
2034 unsigned long temp = (((insn & 0xffff) << 16)
2035 | ((extension >> 8) & 0xffff));
2036
2037 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
2038 number_to_chars_littleendian (f + 2, temp, 4);
2039 number_to_chars_bigendian (f + 6, extension & 0xff, 1);
2040 }
2041 else if (opcode->format == FMT_D8)
2042 {
2043 unsigned long temp = ((insn & 0xff) << 16) | (extension & 0xffff);
2044
2045 number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3);
2046 number_to_chars_bigendian (f + 3, (temp & 0xff), 1);
2047 number_to_chars_littleendian (f + 4, temp >> 8, 2);
2048 }
2049 else if (opcode->format == FMT_D9)
2050 {
2051 unsigned long temp = ((insn & 0xff) << 24) | (extension & 0xffffff);
2052
2053 number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3);
2054 number_to_chars_littleendian (f + 3, temp, 4);
2055 }
2056
2057 /* Create any fixups. */
2058 for (i = 0; i < fc; i++)
2059 {
2060 const struct mn10300_operand *operand;
2061 int reloc_size;
2062
2063 operand = &mn10300_operands[fixups[i].opindex];
2064 if (fixups[i].reloc != BFD_RELOC_UNUSED
2065 && fixups[i].reloc != BFD_RELOC_32_GOT_PCREL
2066 && fixups[i].reloc != BFD_RELOC_32_GOTOFF
2067 && fixups[i].reloc != BFD_RELOC_32_PLT_PCREL
2068 && fixups[i].reloc != BFD_RELOC_MN10300_TLS_GD
2069 && fixups[i].reloc != BFD_RELOC_MN10300_TLS_LD
2070 && fixups[i].reloc != BFD_RELOC_MN10300_TLS_LDO
2071 && fixups[i].reloc != BFD_RELOC_MN10300_TLS_GOTIE
2072 && fixups[i].reloc != BFD_RELOC_MN10300_TLS_IE
2073 && fixups[i].reloc != BFD_RELOC_MN10300_TLS_LE
2074 && fixups[i].reloc != BFD_RELOC_MN10300_GOT32)
2075 {
2076 reloc_howto_type *reloc_howto;
2077 int offset;
2078
2079 reloc_howto = bfd_reloc_type_lookup (stdoutput,
2080 fixups[i].reloc);
2081
2082 if (!reloc_howto)
2083 abort ();
2084
2085 reloc_size = bfd_get_reloc_size (reloc_howto);
2086
2087 if (reloc_size < 1 || reloc_size > 4)
2088 abort ();
2089
2090 offset = 4 - size;
2091 fix_new_exp (frag_now, f - frag_now->fr_literal + offset,
2092 reloc_size, &fixups[i].exp,
2093 reloc_howto->pc_relative,
2094 fixups[i].reloc);
2095 }
2096 else
2097 {
2098 int reloc, pcrel, offset;
2099 fixS *fixP;
2100
2101 reloc = BFD_RELOC_NONE;
2102 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2103 reloc = fixups[i].reloc;
2104 /* How big is the reloc? Remember SPLIT relocs are
2105 implicitly 32bits. */
2106 if ((operand->flags & MN10300_OPERAND_SPLIT) != 0)
2107 reloc_size = 32;
2108 else if ((operand->flags & MN10300_OPERAND_24BIT) != 0)
2109 reloc_size = 24;
2110 else
2111 reloc_size = operand->bits;
2112
2113 /* Is the reloc pc-relative? */
2114 pcrel = (operand->flags & MN10300_OPERAND_PCREL) != 0;
2115 if (reloc != BFD_RELOC_NONE)
2116 pcrel = bfd_reloc_type_lookup (stdoutput, reloc)->pc_relative;
2117
2118 offset = size - (reloc_size + operand->shift) / 8;
2119
2120 /* Choose a proper BFD relocation type. */
2121 if (reloc != BFD_RELOC_NONE)
2122 ;
2123 else if (pcrel)
2124 {
2125 if (reloc_size == 32)
2126 reloc = BFD_RELOC_32_PCREL;
2127 else if (reloc_size == 16)
2128 reloc = BFD_RELOC_16_PCREL;
2129 else if (reloc_size == 8)
2130 reloc = BFD_RELOC_8_PCREL;
2131 else
2132 abort ();
2133 }
2134 else
2135 {
2136 if (reloc_size == 32)
2137 reloc = BFD_RELOC_32;
2138 else if (reloc_size == 16)
2139 reloc = BFD_RELOC_16;
2140 else if (reloc_size == 8)
2141 reloc = BFD_RELOC_8;
2142 else
2143 abort ();
2144 }
2145
2146 fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset,
2147 reloc_size / 8, &fixups[i].exp, pcrel,
2148 ((bfd_reloc_code_real_type) reloc));
2149
2150 if (pcrel)
2151 fixP->fx_offset += offset;
2152 }
2153 }
2154
2155 dwarf2_emit_insn (size);
2156 }
2157
2158 /* Label this frag as one that contains instructions. */
2159 frag_now->tc_frag_data = TRUE;
2160 }
2161
2162 /* If while processing a fixup, a reloc really needs to be created
2163 then it is done here. */
2164
2165 arelent **
tc_gen_reloc(asection * seg ATTRIBUTE_UNUSED,fixS * fixp)2166 tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
2167 {
2168 static arelent * no_relocs = NULL;
2169 static arelent * relocs[MAX_RELOC_EXPANSION + 1];
2170 arelent *reloc;
2171
2172 reloc = xmalloc (sizeof (arelent));
2173
2174 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
2175 if (reloc->howto == NULL)
2176 {
2177 as_bad_where (fixp->fx_file, fixp->fx_line,
2178 _("reloc %d not supported by object file format"),
2179 (int) fixp->fx_r_type);
2180 free (reloc);
2181 return & no_relocs;
2182 }
2183
2184 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
2185 relocs[0] = reloc;
2186 relocs[1] = NULL;
2187
2188 if (fixp->fx_subsy
2189 && S_GET_SEGMENT (fixp->fx_subsy) == absolute_section)
2190 {
2191 fixp->fx_offset -= S_GET_VALUE (fixp->fx_subsy);
2192 fixp->fx_subsy = NULL;
2193 }
2194
2195 if (fixp->fx_addsy && fixp->fx_subsy)
2196 {
2197 asection *asec, *ssec;
2198
2199 asec = S_GET_SEGMENT (fixp->fx_addsy);
2200 ssec = S_GET_SEGMENT (fixp->fx_subsy);
2201
2202 /* If we have a difference between two (non-absolute) symbols we must
2203 generate two relocs (one for each symbol) and allow the linker to
2204 resolve them - relaxation may change the distances between symbols,
2205 even local symbols defined in the same section. */
2206 if (ssec != absolute_section || asec != absolute_section)
2207 {
2208 arelent * reloc2 = xmalloc (sizeof * reloc);
2209
2210 relocs[0] = reloc2;
2211 relocs[1] = reloc;
2212
2213 reloc2->address = reloc->address;
2214 reloc2->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_MN10300_SYM_DIFF);
2215 reloc2->addend = - S_GET_VALUE (fixp->fx_subsy);
2216 reloc2->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
2217 *reloc2->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_subsy);
2218
2219 reloc->addend = fixp->fx_offset;
2220 if (asec == absolute_section)
2221 {
2222 reloc->addend += S_GET_VALUE (fixp->fx_addsy);
2223 reloc->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr;
2224 }
2225 else
2226 {
2227 reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
2228 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
2229 }
2230
2231 fixp->fx_pcrel = 0;
2232 fixp->fx_done = 1;
2233 return relocs;
2234 }
2235 else
2236 {
2237 char *fixpos = fixp->fx_where + fixp->fx_frag->fr_literal;
2238
2239 reloc->addend = (S_GET_VALUE (fixp->fx_addsy)
2240 - S_GET_VALUE (fixp->fx_subsy) + fixp->fx_offset);
2241
2242 switch (fixp->fx_r_type)
2243 {
2244 case BFD_RELOC_8:
2245 md_number_to_chars (fixpos, reloc->addend, 1);
2246 break;
2247
2248 case BFD_RELOC_16:
2249 md_number_to_chars (fixpos, reloc->addend, 2);
2250 break;
2251
2252 case BFD_RELOC_24:
2253 md_number_to_chars (fixpos, reloc->addend, 3);
2254 break;
2255
2256 case BFD_RELOC_32:
2257 md_number_to_chars (fixpos, reloc->addend, 4);
2258 break;
2259
2260 default:
2261 reloc->sym_ptr_ptr
2262 = (asymbol **) bfd_abs_section_ptr->symbol_ptr_ptr;
2263 return relocs;
2264 }
2265
2266 free (reloc);
2267 return & no_relocs;
2268 }
2269 }
2270 else
2271 {
2272 reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
2273 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
2274 reloc->addend = fixp->fx_offset;
2275 }
2276 return relocs;
2277 }
2278
2279 /* Returns true iff the symbol attached to the frag is at a known location
2280 in the given section, (and hence the relocation to it can be relaxed by
2281 the assembler). */
2282 static inline bfd_boolean
has_known_symbol_location(fragS * fragp,asection * sec)2283 has_known_symbol_location (fragS * fragp, asection * sec)
2284 {
2285 symbolS * sym = fragp->fr_symbol;
2286
2287 return sym != NULL
2288 && S_IS_DEFINED (sym)
2289 && ! S_IS_WEAK (sym)
2290 && S_GET_SEGMENT (sym) == sec;
2291 }
2292
2293 int
md_estimate_size_before_relax(fragS * fragp,asection * seg)2294 md_estimate_size_before_relax (fragS *fragp, asection *seg)
2295 {
2296 if (fragp->fr_subtype == 6
2297 && ! has_known_symbol_location (fragp, seg))
2298 fragp->fr_subtype = 7;
2299 else if (fragp->fr_subtype == 8
2300 && ! has_known_symbol_location (fragp, seg))
2301 fragp->fr_subtype = 9;
2302 else if (fragp->fr_subtype == 10
2303 && ! has_known_symbol_location (fragp, seg))
2304 fragp->fr_subtype = 12;
2305
2306 if (fragp->fr_subtype == 13)
2307 return 3;
2308
2309 if (fragp->fr_subtype >= sizeof (md_relax_table) / sizeof (md_relax_table[0]))
2310 abort ();
2311
2312 return md_relax_table[fragp->fr_subtype].rlx_length;
2313 }
2314
2315 long
md_pcrel_from(fixS * fixp)2316 md_pcrel_from (fixS *fixp)
2317 {
2318 if (fixp->fx_addsy != (symbolS *) NULL
2319 && (!S_IS_DEFINED (fixp->fx_addsy) || S_IS_WEAK (fixp->fx_addsy)))
2320 /* The symbol is undefined or weak. Let the linker figure it out. */
2321 return 0;
2322
2323 return fixp->fx_frag->fr_address + fixp->fx_where;
2324 }
2325
2326 void
md_apply_fix(fixS * fixP,valueT * valP,segT seg)2327 md_apply_fix (fixS * fixP, valueT * valP, segT seg)
2328 {
2329 char * fixpos = fixP->fx_where + fixP->fx_frag->fr_literal;
2330 int size = 0;
2331 int value = (int) * valP;
2332
2333 gas_assert (fixP->fx_r_type < BFD_RELOC_UNUSED);
2334
2335 /* This should never happen. */
2336 if (seg->flags & SEC_ALLOC)
2337 abort ();
2338
2339 /* The value we are passed in *valuep includes the symbol values.
2340 If we are doing this relocation the code in write.c is going to
2341 call bfd_install_relocation, which is also going to use the symbol
2342 value. That means that if the reloc is fully resolved we want to
2343 use *valuep since bfd_install_relocation is not being used.
2344
2345 However, if the reloc is not fully resolved we do not want to use
2346 *valuep, and must use fx_offset instead. However, if the reloc
2347 is PC relative, we do want to use *valuep since it includes the
2348 result of md_pcrel_from. */
2349 if (fixP->fx_addsy != NULL && ! fixP->fx_pcrel)
2350 value = fixP->fx_offset;
2351
2352 /* If the fix is relative to a symbol which is not defined, or not
2353 in the same segment as the fix, we cannot resolve it here. */
2354 if (fixP->fx_addsy != NULL
2355 && (! S_IS_DEFINED (fixP->fx_addsy)
2356 || (S_GET_SEGMENT (fixP->fx_addsy) != seg)))
2357 {
2358 fixP->fx_done = 0;
2359 return;
2360 }
2361
2362 switch (fixP->fx_r_type)
2363 {
2364 case BFD_RELOC_8:
2365 case BFD_RELOC_8_PCREL:
2366 size = 1;
2367 break;
2368
2369 case BFD_RELOC_16:
2370 case BFD_RELOC_16_PCREL:
2371 size = 2;
2372 break;
2373
2374 case BFD_RELOC_32:
2375 case BFD_RELOC_32_PCREL:
2376 size = 4;
2377 break;
2378
2379 case BFD_RELOC_VTABLE_INHERIT:
2380 case BFD_RELOC_VTABLE_ENTRY:
2381 fixP->fx_done = 0;
2382 return;
2383
2384 case BFD_RELOC_MN10300_ALIGN:
2385 fixP->fx_done = 1;
2386 return;
2387
2388 case BFD_RELOC_NONE:
2389 default:
2390 as_bad_where (fixP->fx_file, fixP->fx_line,
2391 _("Bad relocation fixup type (%d)"), fixP->fx_r_type);
2392 }
2393
2394 md_number_to_chars (fixpos, value, size);
2395
2396 /* If a symbol remains, pass the fixup, as a reloc, onto the linker. */
2397 if (fixP->fx_addsy == NULL)
2398 fixP->fx_done = 1;
2399 }
2400
2401 /* Return zero if the fixup in fixp should be left alone and not
2402 adjusted. */
2403
2404 bfd_boolean
mn10300_fix_adjustable(struct fix * fixp)2405 mn10300_fix_adjustable (struct fix *fixp)
2406 {
2407 if (fixp->fx_pcrel)
2408 {
2409 if (TC_FORCE_RELOCATION_LOCAL (fixp))
2410 return FALSE;
2411 }
2412 /* Non-relative relocs can (and must) be adjusted if they do
2413 not meet the criteria below, or the generic criteria. */
2414 else if (TC_FORCE_RELOCATION (fixp))
2415 return FALSE;
2416
2417 /* Do not adjust relocations involving symbols in code sections,
2418 because it breaks linker relaxations. This could be fixed in the
2419 linker, but this fix is simpler, and it pretty much only affects
2420 object size a little bit. */
2421 if (S_GET_SEGMENT (fixp->fx_addsy)->flags & SEC_CODE)
2422 return FALSE;
2423
2424 /* Likewise, do not adjust symbols that won't be merged, or debug
2425 symbols, because they too break relaxation. We do want to adjust
2426 other mergable symbols, like .rodata, because code relaxations
2427 need section-relative symbols to properly relax them. */
2428 if (! (S_GET_SEGMENT (fixp->fx_addsy)->flags & SEC_MERGE))
2429 return FALSE;
2430
2431 if (strncmp (S_GET_SEGMENT (fixp->fx_addsy)->name, ".debug", 6) == 0)
2432 return FALSE;
2433
2434 return TRUE;
2435 }
2436
2437 static void
set_arch_mach(int mach)2438 set_arch_mach (int mach)
2439 {
2440 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, mach))
2441 as_warn (_("could not set architecture and machine"));
2442
2443 current_machine = mach;
2444 }
2445
2446 static inline char *
mn10300_end_of_match(char * cont,char * what)2447 mn10300_end_of_match (char *cont, char *what)
2448 {
2449 int len = strlen (what);
2450
2451 if (strncmp (cont, what, strlen (what)) == 0
2452 && ! is_part_of_name (cont[len]))
2453 return cont + len;
2454
2455 return NULL;
2456 }
2457
2458 int
mn10300_parse_name(char const * name,expressionS * exprP,enum expr_mode mode,char * nextcharP)2459 mn10300_parse_name (char const *name,
2460 expressionS *exprP,
2461 enum expr_mode mode,
2462 char *nextcharP)
2463 {
2464 char *next = input_line_pointer;
2465 char *next_end;
2466 int reloc_type;
2467 segT segment;
2468
2469 exprP->X_op_symbol = NULL;
2470
2471 if (strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0)
2472 {
2473 if (! GOT_symbol)
2474 GOT_symbol = symbol_find_or_make (name);
2475
2476 exprP->X_add_symbol = GOT_symbol;
2477 no_suffix:
2478 /* If we have an absolute symbol or a reg,
2479 then we know its value now. */
2480 segment = S_GET_SEGMENT (exprP->X_add_symbol);
2481 if (mode != expr_defer && segment == absolute_section)
2482 {
2483 exprP->X_op = O_constant;
2484 exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol);
2485 exprP->X_add_symbol = NULL;
2486 }
2487 else if (mode != expr_defer && segment == reg_section)
2488 {
2489 exprP->X_op = O_register;
2490 exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol);
2491 exprP->X_add_symbol = NULL;
2492 }
2493 else
2494 {
2495 exprP->X_op = O_symbol;
2496 exprP->X_add_number = 0;
2497 }
2498
2499 return 1;
2500 }
2501
2502 exprP->X_add_symbol = symbol_find_or_make (name);
2503
2504 if (*nextcharP != '@')
2505 goto no_suffix;
2506 else if ((next_end = mn10300_end_of_match (next + 1, "GOTOFF")))
2507 reloc_type = BFD_RELOC_32_GOTOFF;
2508 else if ((next_end = mn10300_end_of_match (next + 1, "GOT")))
2509 reloc_type = BFD_RELOC_MN10300_GOT32;
2510 else if ((next_end = mn10300_end_of_match (next + 1, "PLT")))
2511 reloc_type = BFD_RELOC_32_PLT_PCREL;
2512 else if ((next_end = mn10300_end_of_match (next + 1, "tlsgd")))
2513 reloc_type = BFD_RELOC_MN10300_TLS_GD;
2514 else if ((next_end = mn10300_end_of_match (next + 1, "tlsldm")))
2515 reloc_type = BFD_RELOC_MN10300_TLS_LD;
2516 else if ((next_end = mn10300_end_of_match (next + 1, "dtpoff")))
2517 reloc_type = BFD_RELOC_MN10300_TLS_LDO;
2518 else if ((next_end = mn10300_end_of_match (next + 1, "gotntpoff")))
2519 reloc_type = BFD_RELOC_MN10300_TLS_GOTIE;
2520 else if ((next_end = mn10300_end_of_match (next + 1, "indntpoff")))
2521 reloc_type = BFD_RELOC_MN10300_TLS_IE;
2522 else if ((next_end = mn10300_end_of_match (next + 1, "tpoff")))
2523 reloc_type = BFD_RELOC_MN10300_TLS_LE;
2524 else
2525 goto no_suffix;
2526
2527 *input_line_pointer = *nextcharP;
2528 input_line_pointer = next_end;
2529 *nextcharP = *input_line_pointer;
2530 *input_line_pointer = '\0';
2531
2532 exprP->X_op = O_PIC_reloc;
2533 exprP->X_add_number = 0;
2534 exprP->X_md = reloc_type;
2535
2536 return 1;
2537 }
2538
2539 /* The target specific pseudo-ops which we support. */
2540 const pseudo_typeS md_pseudo_table[] =
2541 {
2542 { "am30", set_arch_mach, AM30 },
2543 { "am33", set_arch_mach, AM33 },
2544 { "am33_2", set_arch_mach, AM33_2 },
2545 { "mn10300", set_arch_mach, MN103 },
2546 {NULL, 0, 0}
2547 };
2548
2549 /* Returns FALSE if there is some mn10300 specific reason why the
2550 subtraction of two same-section symbols cannot be computed by
2551 the assembler. */
2552
2553 bfd_boolean
mn10300_allow_local_subtract(expressionS * left,expressionS * right,segT section)2554 mn10300_allow_local_subtract (expressionS * left, expressionS * right, segT section)
2555 {
2556 bfd_boolean result;
2557 fragS * left_frag;
2558 fragS * right_frag;
2559 fragS * frag;
2560
2561 /* If we are not performing linker relaxation then we have nothing
2562 to worry about. */
2563 if (linkrelax == 0)
2564 return TRUE;
2565
2566 /* If the symbols are not in a code section then they are OK. */
2567 if ((section->flags & SEC_CODE) == 0)
2568 return TRUE;
2569
2570 /* Otherwise we have to scan the fragments between the two symbols.
2571 If any instructions are found then we have to assume that linker
2572 relaxation may change their size and so we must delay resolving
2573 the subtraction until the final link. */
2574 left_frag = symbol_get_frag (left->X_add_symbol);
2575 right_frag = symbol_get_frag (right->X_add_symbol);
2576
2577 if (left_frag == right_frag)
2578 return ! left_frag->tc_frag_data;
2579
2580 result = TRUE;
2581 for (frag = left_frag; frag != NULL; frag = frag->fr_next)
2582 {
2583 if (frag->tc_frag_data)
2584 result = FALSE;
2585 if (frag == right_frag)
2586 break;
2587 }
2588
2589 if (frag == NULL)
2590 for (frag = right_frag; frag != NULL; frag = frag->fr_next)
2591 {
2592 if (frag->tc_frag_data)
2593 result = FALSE;
2594 if (frag == left_frag)
2595 break;
2596 }
2597
2598 if (frag == NULL)
2599 /* The two symbols are on disjoint fragment chains
2600 - we cannot possibly compute their difference. */
2601 return FALSE;
2602
2603 return result;
2604 }
2605
2606 /* When relaxing, we need to output a reloc for any .align directive
2607 that requests alignment to a two byte boundary or larger. */
2608
2609 void
mn10300_handle_align(fragS * frag)2610 mn10300_handle_align (fragS *frag)
2611 {
2612 if (linkrelax
2613 && (frag->fr_type == rs_align
2614 || frag->fr_type == rs_align_code)
2615 && frag->fr_address + frag->fr_fix > 0
2616 && frag->fr_offset > 1
2617 && now_seg != bss_section
2618 /* Do not create relocs for the merging sections - such
2619 relocs will prevent the contents from being merged. */
2620 && (bfd_get_section_flags (now_seg->owner, now_seg) & SEC_MERGE) == 0)
2621 /* Create a new fixup to record the alignment request. The symbol is
2622 irrelevent but must be present so we use the absolute section symbol.
2623 The offset from the symbol is used to record the power-of-two alignment
2624 value. The size is set to 0 because the frag may already be aligned,
2625 thus causing cvt_frag_to_fill to reduce the size of the frag to zero. */
2626 fix_new (frag, frag->fr_fix, 0, & abs_symbol, frag->fr_offset, FALSE,
2627 BFD_RELOC_MN10300_ALIGN);
2628 }
2629
2630 bfd_boolean
mn10300_force_relocation(struct fix * fixp)2631 mn10300_force_relocation (struct fix * fixp)
2632 {
2633 if (linkrelax
2634 && (fixp->fx_pcrel
2635 || fixp->fx_r_type == BFD_RELOC_MN10300_ALIGN))
2636 return TRUE;
2637
2638 return generic_force_reloc (fixp);
2639 }
2640