1 /* Renesas RL78 specific support for 32-bit ELF.
2 Copyright (C) 2011-2014 Free Software Foundation, Inc.
3
4 This file is part of BFD, the Binary File Descriptor library.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
19
20 #include "sysdep.h"
21 #include "bfd.h"
22 #include "bfd_stdint.h"
23 #include "libbfd.h"
24 #include "elf-bfd.h"
25 #include "elf/rl78.h"
26 #include "libiberty.h"
27
28 #define valid_16bit_address(v) ((v) <= 0x0ffff || (v) >= 0xf0000)
29
30 #define RL78REL(n,sz,bit,shift,complain,pcrel) \
31 HOWTO (R_RL78_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \
32 bfd_elf_generic_reloc, "R_RL78_" #n, FALSE, 0, ~0, FALSE)
33
34 /* Note that the relocations around 0x7f are internal to this file;
35 feel free to move them as needed to avoid conflicts with published
36 relocation numbers. */
37
38 static reloc_howto_type rl78_elf_howto_table [] =
39 {
40 RL78REL (NONE, 0, 0, 0, dont, FALSE),
41 RL78REL (DIR32, 2, 32, 0, signed, FALSE),
42 RL78REL (DIR24S, 2, 24, 0, signed, FALSE),
43 RL78REL (DIR16, 1, 16, 0, dont, FALSE),
44 RL78REL (DIR16U, 1, 16, 0, unsigned, FALSE),
45 RL78REL (DIR16S, 1, 16, 0, signed, FALSE),
46 RL78REL (DIR8, 0, 8, 0, dont, FALSE),
47 RL78REL (DIR8U, 0, 8, 0, unsigned, FALSE),
48 RL78REL (DIR8S, 0, 8, 0, signed, FALSE),
49 RL78REL (DIR24S_PCREL, 2, 24, 0, signed, TRUE),
50 RL78REL (DIR16S_PCREL, 1, 16, 0, signed, TRUE),
51 RL78REL (DIR8S_PCREL, 0, 8, 0, signed, TRUE),
52 RL78REL (DIR16UL, 1, 16, 2, unsigned, FALSE),
53 RL78REL (DIR16UW, 1, 16, 1, unsigned, FALSE),
54 RL78REL (DIR8UL, 0, 8, 2, unsigned, FALSE),
55 RL78REL (DIR8UW, 0, 8, 1, unsigned, FALSE),
56 RL78REL (DIR32_REV, 1, 16, 0, dont, FALSE),
57 RL78REL (DIR16_REV, 1, 16, 0, dont, FALSE),
58 RL78REL (DIR3U_PCREL, 0, 3, 0, dont, TRUE),
59
60 EMPTY_HOWTO (0x13),
61 EMPTY_HOWTO (0x14),
62 EMPTY_HOWTO (0x15),
63 EMPTY_HOWTO (0x16),
64 EMPTY_HOWTO (0x17),
65 EMPTY_HOWTO (0x18),
66 EMPTY_HOWTO (0x19),
67 EMPTY_HOWTO (0x1a),
68 EMPTY_HOWTO (0x1b),
69 EMPTY_HOWTO (0x1c),
70 EMPTY_HOWTO (0x1d),
71 EMPTY_HOWTO (0x1e),
72 EMPTY_HOWTO (0x1f),
73
74 EMPTY_HOWTO (0x20),
75 EMPTY_HOWTO (0x21),
76 EMPTY_HOWTO (0x22),
77 EMPTY_HOWTO (0x23),
78 EMPTY_HOWTO (0x24),
79 EMPTY_HOWTO (0x25),
80 EMPTY_HOWTO (0x26),
81 EMPTY_HOWTO (0x27),
82 EMPTY_HOWTO (0x28),
83 EMPTY_HOWTO (0x29),
84 EMPTY_HOWTO (0x2a),
85 EMPTY_HOWTO (0x2b),
86 EMPTY_HOWTO (0x2c),
87 RL78REL (RH_RELAX, 0, 0, 0, dont, FALSE),
88
89 EMPTY_HOWTO (0x2e),
90 EMPTY_HOWTO (0x2f),
91 EMPTY_HOWTO (0x30),
92 EMPTY_HOWTO (0x31),
93 EMPTY_HOWTO (0x32),
94 EMPTY_HOWTO (0x33),
95 EMPTY_HOWTO (0x34),
96 EMPTY_HOWTO (0x35),
97 EMPTY_HOWTO (0x36),
98 EMPTY_HOWTO (0x37),
99 EMPTY_HOWTO (0x38),
100 EMPTY_HOWTO (0x39),
101 EMPTY_HOWTO (0x3a),
102 EMPTY_HOWTO (0x3b),
103 EMPTY_HOWTO (0x3c),
104 EMPTY_HOWTO (0x3d),
105 EMPTY_HOWTO (0x3e),
106 EMPTY_HOWTO (0x3f),
107 EMPTY_HOWTO (0x40),
108
109 RL78REL (ABS32, 2, 32, 0, dont, FALSE),
110 RL78REL (ABS24S, 2, 24, 0, signed, FALSE),
111 RL78REL (ABS16, 1, 16, 0, dont, FALSE),
112 RL78REL (ABS16U, 1, 16, 0, unsigned, FALSE),
113 RL78REL (ABS16S, 1, 16, 0, signed, FALSE),
114 RL78REL (ABS8, 0, 8, 0, dont, FALSE),
115 RL78REL (ABS8U, 0, 8, 0, unsigned, FALSE),
116 RL78REL (ABS8S, 0, 8, 0, signed, FALSE),
117 RL78REL (ABS24S_PCREL, 2, 24, 0, signed, TRUE),
118 RL78REL (ABS16S_PCREL, 1, 16, 0, signed, TRUE),
119 RL78REL (ABS8S_PCREL, 0, 8, 0, signed, TRUE),
120 RL78REL (ABS16UL, 1, 16, 0, unsigned, FALSE),
121 RL78REL (ABS16UW, 1, 16, 0, unsigned, FALSE),
122 RL78REL (ABS8UL, 0, 8, 0, unsigned, FALSE),
123 RL78REL (ABS8UW, 0, 8, 0, unsigned, FALSE),
124 RL78REL (ABS32_REV, 2, 32, 0, dont, FALSE),
125 RL78REL (ABS16_REV, 1, 16, 0, dont, FALSE),
126
127 #define STACK_REL_P(x) ((x) <= R_RL78_ABS16_REV && (x) >= R_RL78_ABS32)
128
129 EMPTY_HOWTO (0x52),
130 EMPTY_HOWTO (0x53),
131 EMPTY_HOWTO (0x54),
132 EMPTY_HOWTO (0x55),
133 EMPTY_HOWTO (0x56),
134 EMPTY_HOWTO (0x57),
135 EMPTY_HOWTO (0x58),
136 EMPTY_HOWTO (0x59),
137 EMPTY_HOWTO (0x5a),
138 EMPTY_HOWTO (0x5b),
139 EMPTY_HOWTO (0x5c),
140 EMPTY_HOWTO (0x5d),
141 EMPTY_HOWTO (0x5e),
142 EMPTY_HOWTO (0x5f),
143 EMPTY_HOWTO (0x60),
144 EMPTY_HOWTO (0x61),
145 EMPTY_HOWTO (0x62),
146 EMPTY_HOWTO (0x63),
147 EMPTY_HOWTO (0x64),
148 EMPTY_HOWTO (0x65),
149 EMPTY_HOWTO (0x66),
150 EMPTY_HOWTO (0x67),
151 EMPTY_HOWTO (0x68),
152 EMPTY_HOWTO (0x69),
153 EMPTY_HOWTO (0x6a),
154 EMPTY_HOWTO (0x6b),
155 EMPTY_HOWTO (0x6c),
156 EMPTY_HOWTO (0x6d),
157 EMPTY_HOWTO (0x6e),
158 EMPTY_HOWTO (0x6f),
159 EMPTY_HOWTO (0x70),
160 EMPTY_HOWTO (0x71),
161 EMPTY_HOWTO (0x72),
162 EMPTY_HOWTO (0x73),
163 EMPTY_HOWTO (0x74),
164 EMPTY_HOWTO (0x75),
165 EMPTY_HOWTO (0x76),
166 EMPTY_HOWTO (0x77),
167
168 EMPTY_HOWTO (0x78),
169 EMPTY_HOWTO (0x79),
170 EMPTY_HOWTO (0x7a),
171 EMPTY_HOWTO (0x7b),
172 EMPTY_HOWTO (0x7c),
173 EMPTY_HOWTO (0x7d),
174 EMPTY_HOWTO (0x7e),
175 EMPTY_HOWTO (0x7f),
176
177 RL78REL (SYM, 2, 32, 0, dont, FALSE),
178 RL78REL (OPneg, 2, 32, 0, dont, FALSE),
179 RL78REL (OPadd, 2, 32, 0, dont, FALSE),
180 RL78REL (OPsub, 2, 32, 0, dont, FALSE),
181 RL78REL (OPmul, 2, 32, 0, dont, FALSE),
182 RL78REL (OPdiv, 2, 32, 0, dont, FALSE),
183 RL78REL (OPshla, 2, 32, 0, dont, FALSE),
184 RL78REL (OPshra, 2, 32, 0, dont, FALSE),
185 RL78REL (OPsctsize, 2, 32, 0, dont, FALSE),
186 EMPTY_HOWTO (0x89),
187 EMPTY_HOWTO (0x8a),
188 EMPTY_HOWTO (0x8b),
189 EMPTY_HOWTO (0x8c),
190 RL78REL (OPscttop, 2, 32, 0, dont, FALSE),
191 EMPTY_HOWTO (0x8e),
192 EMPTY_HOWTO (0x8f),
193 RL78REL (OPand, 2, 32, 0, dont, FALSE),
194 RL78REL (OPor, 2, 32, 0, dont, FALSE),
195 RL78REL (OPxor, 2, 32, 0, dont, FALSE),
196 RL78REL (OPnot, 2, 32, 0, dont, FALSE),
197 RL78REL (OPmod, 2, 32, 0, dont, FALSE),
198 RL78REL (OPromtop, 2, 32, 0, dont, FALSE),
199 RL78REL (OPramtop, 2, 32, 0, dont, FALSE)
200 };
201
202 /* Map BFD reloc types to RL78 ELF reloc types. */
203
204 struct rl78_reloc_map
205 {
206 bfd_reloc_code_real_type bfd_reloc_val;
207 unsigned int rl78_reloc_val;
208 };
209
210 static const struct rl78_reloc_map rl78_reloc_map [] =
211 {
212 { BFD_RELOC_NONE, R_RL78_NONE },
213 { BFD_RELOC_8, R_RL78_DIR8S },
214 { BFD_RELOC_16, R_RL78_DIR16S },
215 { BFD_RELOC_24, R_RL78_DIR24S },
216 { BFD_RELOC_32, R_RL78_DIR32 },
217 { BFD_RELOC_RL78_16_OP, R_RL78_DIR16 },
218 { BFD_RELOC_RL78_DIR3U_PCREL, R_RL78_DIR3U_PCREL },
219 { BFD_RELOC_8_PCREL, R_RL78_DIR8S_PCREL },
220 { BFD_RELOC_16_PCREL, R_RL78_DIR16S_PCREL },
221 { BFD_RELOC_24_PCREL, R_RL78_DIR24S_PCREL },
222 { BFD_RELOC_RL78_8U, R_RL78_DIR8U },
223 { BFD_RELOC_RL78_16U, R_RL78_DIR16U },
224 { BFD_RELOC_RL78_SYM, R_RL78_SYM },
225 { BFD_RELOC_RL78_OP_SUBTRACT, R_RL78_OPsub },
226 { BFD_RELOC_RL78_OP_NEG, R_RL78_OPneg },
227 { BFD_RELOC_RL78_OP_AND, R_RL78_OPand },
228 { BFD_RELOC_RL78_OP_SHRA, R_RL78_OPshra },
229 { BFD_RELOC_RL78_ABS8, R_RL78_ABS8 },
230 { BFD_RELOC_RL78_ABS16, R_RL78_ABS16 },
231 { BFD_RELOC_RL78_ABS16_REV, R_RL78_ABS16_REV },
232 { BFD_RELOC_RL78_ABS32, R_RL78_ABS32 },
233 { BFD_RELOC_RL78_ABS32_REV, R_RL78_ABS32_REV },
234 { BFD_RELOC_RL78_ABS16UL, R_RL78_ABS16UL },
235 { BFD_RELOC_RL78_ABS16UW, R_RL78_ABS16UW },
236 { BFD_RELOC_RL78_ABS16U, R_RL78_ABS16U },
237 { BFD_RELOC_RL78_RELAX, R_RL78_RH_RELAX }
238 };
239
240 static reloc_howto_type *
rl78_reloc_type_lookup(bfd * abfd ATTRIBUTE_UNUSED,bfd_reloc_code_real_type code)241 rl78_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
242 bfd_reloc_code_real_type code)
243 {
244 unsigned int i;
245
246 if (code == BFD_RELOC_RL78_32_OP)
247 return rl78_elf_howto_table + R_RL78_DIR32;
248
249 for (i = ARRAY_SIZE (rl78_reloc_map); --i;)
250 if (rl78_reloc_map [i].bfd_reloc_val == code)
251 return rl78_elf_howto_table + rl78_reloc_map[i].rl78_reloc_val;
252
253 return NULL;
254 }
255
256 static reloc_howto_type *
rl78_reloc_name_lookup(bfd * abfd ATTRIBUTE_UNUSED,const char * r_name)257 rl78_reloc_name_lookup (bfd * abfd ATTRIBUTE_UNUSED, const char * r_name)
258 {
259 unsigned int i;
260
261 for (i = 0; i < ARRAY_SIZE (rl78_elf_howto_table); i++)
262 if (rl78_elf_howto_table[i].name != NULL
263 && strcasecmp (rl78_elf_howto_table[i].name, r_name) == 0)
264 return rl78_elf_howto_table + i;
265
266 return NULL;
267 }
268
269 /* Set the howto pointer for an RL78 ELF reloc. */
270
271 static void
rl78_info_to_howto_rela(bfd * abfd ATTRIBUTE_UNUSED,arelent * cache_ptr,Elf_Internal_Rela * dst)272 rl78_info_to_howto_rela (bfd * abfd ATTRIBUTE_UNUSED,
273 arelent * cache_ptr,
274 Elf_Internal_Rela * dst)
275 {
276 unsigned int r_type;
277
278 r_type = ELF32_R_TYPE (dst->r_info);
279 BFD_ASSERT (r_type < (unsigned int) R_RL78_max);
280 cache_ptr->howto = rl78_elf_howto_table + r_type;
281 }
282
283 static bfd_vma
get_symbol_value(const char * name,bfd_reloc_status_type * status,struct bfd_link_info * info,bfd * input_bfd,asection * input_section,int offset)284 get_symbol_value (const char * name,
285 bfd_reloc_status_type * status,
286 struct bfd_link_info * info,
287 bfd * input_bfd,
288 asection * input_section,
289 int offset)
290 {
291 bfd_vma value = 0;
292 struct bfd_link_hash_entry * h;
293
294 h = bfd_link_hash_lookup (info->hash, name, FALSE, FALSE, TRUE);
295
296 if (h == NULL
297 || (h->type != bfd_link_hash_defined
298 && h->type != bfd_link_hash_defweak))
299 * status = info->callbacks->undefined_symbol
300 (info, name, input_bfd, input_section, offset, TRUE);
301 else
302 value = (h->u.def.value
303 + h->u.def.section->output_section->vma
304 + h->u.def.section->output_offset);
305
306 return value;
307 }
308
309 static bfd_vma
get_romstart(bfd_reloc_status_type * status,struct bfd_link_info * info,bfd * abfd,asection * sec,int offset)310 get_romstart (bfd_reloc_status_type * status,
311 struct bfd_link_info * info,
312 bfd * abfd,
313 asection * sec,
314 int offset)
315 {
316 static bfd_boolean cached = FALSE;
317 static bfd_vma cached_value = 0;
318
319 if (!cached)
320 {
321 cached_value = get_symbol_value ("_start", status, info, abfd, sec, offset);
322 cached = TRUE;
323 }
324 return cached_value;
325 }
326
327 static bfd_vma
get_ramstart(bfd_reloc_status_type * status,struct bfd_link_info * info,bfd * abfd,asection * sec,int offset)328 get_ramstart (bfd_reloc_status_type * status,
329 struct bfd_link_info * info,
330 bfd * abfd,
331 asection * sec,
332 int offset)
333 {
334 static bfd_boolean cached = FALSE;
335 static bfd_vma cached_value = 0;
336
337 if (!cached)
338 {
339 cached_value = get_symbol_value ("__datastart", status, info, abfd, sec, offset);
340 cached = TRUE;
341 }
342 return cached_value;
343 }
344
345 #define NUM_STACK_ENTRIES 16
346 static int32_t rl78_stack [ NUM_STACK_ENTRIES ];
347 static unsigned int rl78_stack_top;
348
349 #define RL78_STACK_PUSH(val) \
350 do \
351 { \
352 if (rl78_stack_top < NUM_STACK_ENTRIES) \
353 rl78_stack [rl78_stack_top ++] = (val); \
354 else \
355 r = bfd_reloc_dangerous; \
356 } \
357 while (0)
358
359 #define RL78_STACK_POP(dest) \
360 do \
361 { \
362 if (rl78_stack_top > 0) \
363 (dest) = rl78_stack [-- rl78_stack_top]; \
364 else \
365 (dest) = 0, r = bfd_reloc_dangerous; \
366 } \
367 while (0)
368
369 /* Relocate an RL78 ELF section.
370 There is some attempt to make this function usable for many architectures,
371 both USE_REL and USE_RELA ['twould be nice if such a critter existed],
372 if only to serve as a learning tool.
373
374 The RELOCATE_SECTION function is called by the new ELF backend linker
375 to handle the relocations for a section.
376
377 The relocs are always passed as Rela structures; if the section
378 actually uses Rel structures, the r_addend field will always be
379 zero.
380
381 This function is responsible for adjusting the section contents as
382 necessary, and (if using Rela relocs and generating a relocatable
383 output file) adjusting the reloc addend as necessary.
384
385 This function does not have to worry about setting the reloc
386 address or the reloc symbol index.
387
388 LOCAL_SYMS is a pointer to the swapped in local symbols.
389
390 LOCAL_SECTIONS is an array giving the section in the input file
391 corresponding to the st_shndx field of each local symbol.
392
393 The global hash table entry for the global symbols can be found
394 via elf_sym_hashes (input_bfd).
395
396 When generating relocatable output, this function must handle
397 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
398 going to be the section symbol corresponding to the output
399 section, which means that the addend must be adjusted
400 accordingly. */
401
402 static bfd_boolean
rl78_elf_relocate_section(bfd * output_bfd,struct bfd_link_info * info,bfd * input_bfd,asection * input_section,bfd_byte * contents,Elf_Internal_Rela * relocs,Elf_Internal_Sym * local_syms,asection ** local_sections)403 rl78_elf_relocate_section
404 (bfd * output_bfd,
405 struct bfd_link_info * info,
406 bfd * input_bfd,
407 asection * input_section,
408 bfd_byte * contents,
409 Elf_Internal_Rela * relocs,
410 Elf_Internal_Sym * local_syms,
411 asection ** local_sections)
412 {
413 Elf_Internal_Shdr * symtab_hdr;
414 struct elf_link_hash_entry ** sym_hashes;
415 Elf_Internal_Rela * rel;
416 Elf_Internal_Rela * relend;
417 bfd *dynobj;
418 asection *splt;
419
420 symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr;
421 sym_hashes = elf_sym_hashes (input_bfd);
422 relend = relocs + input_section->reloc_count;
423
424 dynobj = elf_hash_table (info)->dynobj;
425 splt = NULL;
426 if (dynobj != NULL)
427 splt = bfd_get_linker_section (dynobj, ".plt");
428
429 for (rel = relocs; rel < relend; rel ++)
430 {
431 reloc_howto_type * howto;
432 unsigned long r_symndx;
433 Elf_Internal_Sym * sym;
434 asection * sec;
435 struct elf_link_hash_entry * h;
436 bfd_vma relocation;
437 bfd_reloc_status_type r;
438 const char * name = NULL;
439 bfd_boolean unresolved_reloc = TRUE;
440 int r_type;
441
442 r_type = ELF32_R_TYPE (rel->r_info);
443 r_symndx = ELF32_R_SYM (rel->r_info);
444
445 howto = rl78_elf_howto_table + ELF32_R_TYPE (rel->r_info);
446 h = NULL;
447 sym = NULL;
448 sec = NULL;
449 relocation = 0;
450
451 if (r_symndx < symtab_hdr->sh_info)
452 {
453 sym = local_syms + r_symndx;
454 sec = local_sections [r_symndx];
455 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, & sec, rel);
456
457 name = bfd_elf_string_from_elf_section
458 (input_bfd, symtab_hdr->sh_link, sym->st_name);
459 name = (sym->st_name == 0) ? bfd_section_name (input_bfd, sec) : name;
460 }
461 else
462 {
463 bfd_boolean warned ATTRIBUTE_UNUSED;
464 bfd_boolean ignored ATTRIBUTE_UNUSED;
465
466 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
467 r_symndx, symtab_hdr, sym_hashes, h,
468 sec, relocation, unresolved_reloc,
469 warned, ignored);
470
471 name = h->root.root.string;
472 }
473
474 if (sec != NULL && discarded_section (sec))
475 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
476 rel, 1, relend, howto, 0, contents);
477
478 if (info->relocatable)
479 {
480 /* This is a relocatable link. We don't have to change
481 anything, unless the reloc is against a section symbol,
482 in which case we have to adjust according to where the
483 section symbol winds up in the output section. */
484 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
485 rel->r_addend += sec->output_offset;
486 continue;
487 }
488
489 switch (ELF32_R_TYPE (rel->r_info))
490 {
491 case R_RL78_DIR16S:
492 {
493 bfd_vma *plt_offset;
494
495 if (h != NULL)
496 plt_offset = &h->plt.offset;
497 else
498 plt_offset = elf_local_got_offsets (input_bfd) + r_symndx;
499
500 if (! valid_16bit_address (relocation))
501 {
502 /* If this is the first time we've processed this symbol,
503 fill in the plt entry with the correct symbol address. */
504 if ((*plt_offset & 1) == 0)
505 {
506 unsigned int x;
507
508 x = 0x000000ec; /* br !!abs24 */
509 x |= (relocation << 8) & 0xffffff00;
510 bfd_put_32 (input_bfd, x, splt->contents + *plt_offset);
511 *plt_offset |= 1;
512 }
513
514 relocation = (splt->output_section->vma
515 + splt->output_offset
516 + (*plt_offset & -2));
517 if (name)
518 {
519 char *newname = bfd_malloc (strlen(name)+5);
520 strcpy (newname, name);
521 strcat(newname, ".plt");
522 _bfd_generic_link_add_one_symbol (info,
523 input_bfd,
524 newname,
525 BSF_FUNCTION | BSF_WEAK,
526 splt,
527 (*plt_offset & -2),
528 0,
529 1,
530 0,
531 0);
532 }
533 }
534 }
535 break;
536 }
537
538 if (h != NULL && h->root.type == bfd_link_hash_undefweak)
539 /* If the symbol is undefined and weak
540 then the relocation resolves to zero. */
541 relocation = 0;
542 else
543 {
544 if (howto->pc_relative)
545 {
546 relocation -= (input_section->output_section->vma
547 + input_section->output_offset
548 + rel->r_offset);
549 relocation -= bfd_get_reloc_size (howto);
550 }
551
552 relocation += rel->r_addend;
553 }
554
555 r = bfd_reloc_ok;
556
557 #define RANGE(a,b) if (a > (long) relocation || (long) relocation > b) r = bfd_reloc_overflow
558 #define ALIGN(m) if (relocation & m) r = bfd_reloc_other;
559 #define OP(i) (contents[rel->r_offset + (i)])
560
561 /* Opcode relocs are always big endian. Data relocs are bi-endian. */
562 switch (r_type)
563 {
564 case R_RL78_NONE:
565 break;
566
567 case R_RL78_RH_RELAX:
568 break;
569
570 case R_RL78_DIR8S_PCREL:
571 RANGE (-128, 127);
572 OP (0) = relocation;
573 break;
574
575 case R_RL78_DIR8S:
576 RANGE (-128, 255);
577 OP (0) = relocation;
578 break;
579
580 case R_RL78_DIR8U:
581 RANGE (0, 255);
582 OP (0) = relocation;
583 break;
584
585 case R_RL78_DIR16S_PCREL:
586 RANGE (-32768, 32767);
587 OP (0) = relocation;
588 OP (1) = relocation >> 8;
589 break;
590
591 case R_RL78_DIR16S:
592 if ((relocation & 0xf0000) == 0xf0000)
593 relocation &= 0xffff;
594 RANGE (-32768, 65535);
595 OP (0) = relocation;
596 OP (1) = relocation >> 8;
597 break;
598
599 case R_RL78_DIR16U:
600 RANGE (0, 65536);
601 OP (0) = relocation;
602 OP (1) = relocation >> 8;
603 break;
604
605 case R_RL78_DIR16:
606 RANGE (-32768, 65536);
607 OP (0) = relocation;
608 OP (1) = relocation >> 8;
609 break;
610
611 case R_RL78_DIR16_REV:
612 RANGE (-32768, 65536);
613 OP (1) = relocation;
614 OP (0) = relocation >> 8;
615 break;
616
617 case R_RL78_DIR3U_PCREL:
618 RANGE (3, 10);
619 OP (0) &= 0xf8;
620 OP (0) |= relocation & 0x07;
621 break;
622
623 case R_RL78_DIR24S_PCREL:
624 RANGE (-0x800000, 0x7fffff);
625 OP (0) = relocation;
626 OP (1) = relocation >> 8;
627 OP (2) = relocation >> 16;
628 break;
629
630 case R_RL78_DIR24S:
631 RANGE (-0x800000, 0x7fffff);
632 OP (0) = relocation;
633 OP (1) = relocation >> 8;
634 OP (2) = relocation >> 16;
635 break;
636
637 case R_RL78_DIR32:
638 OP (0) = relocation;
639 OP (1) = relocation >> 8;
640 OP (2) = relocation >> 16;
641 OP (3) = relocation >> 24;
642 break;
643
644 case R_RL78_DIR32_REV:
645 OP (3) = relocation;
646 OP (2) = relocation >> 8;
647 OP (1) = relocation >> 16;
648 OP (0) = relocation >> 24;
649 break;
650
651 case R_RL78_RH_SFR:
652 RANGE (0xfff00, 0xfffff);
653 OP (0) = relocation & 0xff;
654 break;
655
656 case R_RL78_RH_SADDR:
657 RANGE (0xffe20, 0xfff1f);
658 OP (0) = relocation & 0xff;
659 break;
660
661 /* Complex reloc handling: */
662
663 case R_RL78_ABS32:
664 RL78_STACK_POP (relocation);
665 OP (0) = relocation;
666 OP (1) = relocation >> 8;
667 OP (2) = relocation >> 16;
668 OP (3) = relocation >> 24;
669 break;
670
671 case R_RL78_ABS32_REV:
672 RL78_STACK_POP (relocation);
673 OP (3) = relocation;
674 OP (2) = relocation >> 8;
675 OP (1) = relocation >> 16;
676 OP (0) = relocation >> 24;
677 break;
678
679 case R_RL78_ABS24S_PCREL:
680 case R_RL78_ABS24S:
681 RL78_STACK_POP (relocation);
682 RANGE (-0x800000, 0x7fffff);
683 OP (0) = relocation;
684 OP (1) = relocation >> 8;
685 OP (2) = relocation >> 16;
686 break;
687
688 case R_RL78_ABS16:
689 RL78_STACK_POP (relocation);
690 RANGE (-32768, 65535);
691 OP (0) = relocation;
692 OP (1) = relocation >> 8;
693 break;
694
695 case R_RL78_ABS16_REV:
696 RL78_STACK_POP (relocation);
697 RANGE (-32768, 65535);
698 OP (1) = relocation;
699 OP (0) = relocation >> 8;
700 break;
701
702 case R_RL78_ABS16S_PCREL:
703 case R_RL78_ABS16S:
704 RL78_STACK_POP (relocation);
705 RANGE (-32768, 32767);
706 OP (0) = relocation;
707 OP (1) = relocation >> 8;
708 break;
709
710 case R_RL78_ABS16U:
711 RL78_STACK_POP (relocation);
712 RANGE (0, 65536);
713 OP (0) = relocation;
714 OP (1) = relocation >> 8;
715 break;
716
717 case R_RL78_ABS16UL:
718 RL78_STACK_POP (relocation);
719 relocation >>= 2;
720 RANGE (0, 65536);
721 OP (0) = relocation;
722 OP (1) = relocation >> 8;
723 break;
724
725 case R_RL78_ABS16UW:
726 RL78_STACK_POP (relocation);
727 relocation >>= 1;
728 RANGE (0, 65536);
729 OP (0) = relocation;
730 OP (1) = relocation >> 8;
731 break;
732
733 case R_RL78_ABS8:
734 RL78_STACK_POP (relocation);
735 RANGE (-128, 255);
736 OP (0) = relocation;
737 break;
738
739 case R_RL78_ABS8U:
740 RL78_STACK_POP (relocation);
741 RANGE (0, 255);
742 OP (0) = relocation;
743 break;
744
745 case R_RL78_ABS8UL:
746 RL78_STACK_POP (relocation);
747 relocation >>= 2;
748 RANGE (0, 255);
749 OP (0) = relocation;
750 break;
751
752 case R_RL78_ABS8UW:
753 RL78_STACK_POP (relocation);
754 relocation >>= 1;
755 RANGE (0, 255);
756 OP (0) = relocation;
757 break;
758
759 case R_RL78_ABS8S_PCREL:
760 case R_RL78_ABS8S:
761 RL78_STACK_POP (relocation);
762 RANGE (-128, 127);
763 OP (0) = relocation;
764 break;
765
766 case R_RL78_SYM:
767 if (r_symndx < symtab_hdr->sh_info)
768 RL78_STACK_PUSH (sec->output_section->vma
769 + sec->output_offset
770 + sym->st_value
771 + rel->r_addend);
772 else
773 {
774 if (h != NULL
775 && (h->root.type == bfd_link_hash_defined
776 || h->root.type == bfd_link_hash_defweak))
777 RL78_STACK_PUSH (h->root.u.def.value
778 + sec->output_section->vma
779 + sec->output_offset
780 + rel->r_addend);
781 else if (h->root.type == bfd_link_hash_undefweak)
782 RL78_STACK_PUSH (0);
783 else
784 _bfd_error_handler (_("Warning: RL78_SYM reloc with an unknown symbol"));
785 }
786 break;
787
788 case R_RL78_OPneg:
789 {
790 int32_t tmp;
791
792 RL78_STACK_POP (tmp);
793 tmp = - tmp;
794 RL78_STACK_PUSH (tmp);
795 }
796 break;
797
798 case R_RL78_OPadd:
799 {
800 int32_t tmp1, tmp2;
801
802 RL78_STACK_POP (tmp2);
803 RL78_STACK_POP (tmp1);
804 tmp1 += tmp2;
805 RL78_STACK_PUSH (tmp1);
806 }
807 break;
808
809 case R_RL78_OPsub:
810 {
811 int32_t tmp1, tmp2;
812
813 /* For the expression "A - B", the assembler pushes A,
814 then B, then OPSUB. So the first op we pop is B, not
815 A. */
816 RL78_STACK_POP (tmp2); /* B */
817 RL78_STACK_POP (tmp1); /* A */
818 tmp1 -= tmp2; /* A - B */
819 RL78_STACK_PUSH (tmp1);
820 }
821 break;
822
823 case R_RL78_OPmul:
824 {
825 int32_t tmp1, tmp2;
826
827 RL78_STACK_POP (tmp2);
828 RL78_STACK_POP (tmp1);
829 tmp1 *= tmp2;
830 RL78_STACK_PUSH (tmp1);
831 }
832 break;
833
834 case R_RL78_OPdiv:
835 {
836 int32_t tmp1, tmp2;
837
838 RL78_STACK_POP (tmp2);
839 RL78_STACK_POP (tmp1);
840 tmp1 /= tmp2;
841 RL78_STACK_PUSH (tmp1);
842 }
843 break;
844
845 case R_RL78_OPshla:
846 {
847 int32_t tmp1, tmp2;
848
849 RL78_STACK_POP (tmp2);
850 RL78_STACK_POP (tmp1);
851 tmp1 <<= tmp2;
852 RL78_STACK_PUSH (tmp1);
853 }
854 break;
855
856 case R_RL78_OPshra:
857 {
858 int32_t tmp1, tmp2;
859
860 RL78_STACK_POP (tmp2);
861 RL78_STACK_POP (tmp1);
862 tmp1 >>= tmp2;
863 RL78_STACK_PUSH (tmp1);
864 }
865 break;
866
867 case R_RL78_OPsctsize:
868 RL78_STACK_PUSH (input_section->size);
869 break;
870
871 case R_RL78_OPscttop:
872 RL78_STACK_PUSH (input_section->output_section->vma);
873 break;
874
875 case R_RL78_OPand:
876 {
877 int32_t tmp1, tmp2;
878
879 RL78_STACK_POP (tmp2);
880 RL78_STACK_POP (tmp1);
881 tmp1 &= tmp2;
882 RL78_STACK_PUSH (tmp1);
883 }
884 break;
885
886 case R_RL78_OPor:
887 {
888 int32_t tmp1, tmp2;
889
890 RL78_STACK_POP (tmp2);
891 RL78_STACK_POP (tmp1);
892 tmp1 |= tmp2;
893 RL78_STACK_PUSH (tmp1);
894 }
895 break;
896
897 case R_RL78_OPxor:
898 {
899 int32_t tmp1, tmp2;
900
901 RL78_STACK_POP (tmp2);
902 RL78_STACK_POP (tmp1);
903 tmp1 ^= tmp2;
904 RL78_STACK_PUSH (tmp1);
905 }
906 break;
907
908 case R_RL78_OPnot:
909 {
910 int32_t tmp;
911
912 RL78_STACK_POP (tmp);
913 tmp = ~ tmp;
914 RL78_STACK_PUSH (tmp);
915 }
916 break;
917
918 case R_RL78_OPmod:
919 {
920 int32_t tmp1, tmp2;
921
922 RL78_STACK_POP (tmp2);
923 RL78_STACK_POP (tmp1);
924 tmp1 %= tmp2;
925 RL78_STACK_PUSH (tmp1);
926 }
927 break;
928
929 case R_RL78_OPromtop:
930 RL78_STACK_PUSH (get_romstart (&r, info, input_bfd, input_section, rel->r_offset));
931 break;
932
933 case R_RL78_OPramtop:
934 RL78_STACK_PUSH (get_ramstart (&r, info, input_bfd, input_section, rel->r_offset));
935 break;
936
937 default:
938 r = bfd_reloc_notsupported;
939 break;
940 }
941
942 if (r != bfd_reloc_ok)
943 {
944 const char * msg = NULL;
945
946 switch (r)
947 {
948 case bfd_reloc_overflow:
949 /* Catch the case of a missing function declaration
950 and emit a more helpful error message. */
951 if (r_type == R_RL78_DIR24S_PCREL)
952 msg = _("%B(%A): error: call to undefined function '%s'");
953 else
954 r = info->callbacks->reloc_overflow
955 (info, (h ? &h->root : NULL), name, howto->name, (bfd_vma) 0,
956 input_bfd, input_section, rel->r_offset);
957 break;
958
959 case bfd_reloc_undefined:
960 r = info->callbacks->undefined_symbol
961 (info, name, input_bfd, input_section, rel->r_offset,
962 TRUE);
963 break;
964
965 case bfd_reloc_other:
966 msg = _("%B(%A): warning: unaligned access to symbol '%s' in the small data area");
967 break;
968
969 case bfd_reloc_outofrange:
970 msg = _("%B(%A): internal error: out of range error");
971 break;
972
973 case bfd_reloc_notsupported:
974 msg = _("%B(%A): internal error: unsupported relocation error");
975 break;
976
977 case bfd_reloc_dangerous:
978 msg = _("%B(%A): internal error: dangerous relocation");
979 break;
980
981 default:
982 msg = _("%B(%A): internal error: unknown error");
983 break;
984 }
985
986 if (msg)
987 _bfd_error_handler (msg, input_bfd, input_section, name);
988
989 if (! r)
990 return FALSE;
991 }
992 }
993
994 return TRUE;
995 }
996
997 /* Function to set the ELF flag bits. */
998
999 static bfd_boolean
rl78_elf_set_private_flags(bfd * abfd,flagword flags)1000 rl78_elf_set_private_flags (bfd * abfd, flagword flags)
1001 {
1002 elf_elfheader (abfd)->e_flags = flags;
1003 elf_flags_init (abfd) = TRUE;
1004 return TRUE;
1005 }
1006
1007 static bfd_boolean no_warn_mismatch = FALSE;
1008
1009 void bfd_elf32_rl78_set_target_flags (bfd_boolean);
1010
1011 void
bfd_elf32_rl78_set_target_flags(bfd_boolean user_no_warn_mismatch)1012 bfd_elf32_rl78_set_target_flags (bfd_boolean user_no_warn_mismatch)
1013 {
1014 no_warn_mismatch = user_no_warn_mismatch;
1015 }
1016
1017 /* Merge backend specific data from an object file to the output
1018 object file when linking. */
1019
1020 static bfd_boolean
rl78_elf_merge_private_bfd_data(bfd * ibfd,bfd * obfd)1021 rl78_elf_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
1022 {
1023 flagword new_flags;
1024 flagword old_flags;
1025 bfd_boolean error = FALSE;
1026
1027 new_flags = elf_elfheader (ibfd)->e_flags;
1028 old_flags = elf_elfheader (obfd)->e_flags;
1029
1030 if (!elf_flags_init (obfd))
1031 {
1032 /* First call, no flags set. */
1033 elf_flags_init (obfd) = TRUE;
1034 elf_elfheader (obfd)->e_flags = new_flags;
1035 }
1036 else if (old_flags != new_flags)
1037 {
1038 flagword changed_flags = old_flags ^ new_flags;
1039
1040 if (changed_flags & E_FLAG_RL78_G10)
1041 {
1042 (*_bfd_error_handler)
1043 (_("RL78/G10 ABI conflict: cannot link G10 and non-G10 objects together"));
1044
1045 if (old_flags & E_FLAG_RL78_G10)
1046 (*_bfd_error_handler) (_("- %s is G10, %s is not"),
1047 bfd_get_filename (obfd), bfd_get_filename (ibfd));
1048 else
1049 (*_bfd_error_handler) (_("- %s is G10, %s is not"),
1050 bfd_get_filename (ibfd), bfd_get_filename (obfd));
1051 }
1052
1053 if (changed_flags & E_FLAG_RL78_64BIT_DOUBLES)
1054 {
1055 (*_bfd_error_handler)
1056 (_("RL78 merge conflict: cannot link 32-bit and 64-bit objects together"));
1057
1058 if (old_flags & E_FLAG_RL78_64BIT_DOUBLES)
1059 (*_bfd_error_handler) (_("- %s is 64-bit, %s is not"),
1060 bfd_get_filename (obfd), bfd_get_filename (ibfd));
1061 else
1062 (*_bfd_error_handler) (_("- %s is 64-bit, %s is not"),
1063 bfd_get_filename (ibfd), bfd_get_filename (obfd));
1064 }
1065 }
1066
1067 return !error;
1068 }
1069
1070 static bfd_boolean
rl78_elf_print_private_bfd_data(bfd * abfd,void * ptr)1071 rl78_elf_print_private_bfd_data (bfd * abfd, void * ptr)
1072 {
1073 FILE * file = (FILE *) ptr;
1074 flagword flags;
1075
1076 BFD_ASSERT (abfd != NULL && ptr != NULL);
1077
1078 /* Print normal ELF private data. */
1079 _bfd_elf_print_private_bfd_data (abfd, ptr);
1080
1081 flags = elf_elfheader (abfd)->e_flags;
1082 fprintf (file, _("private flags = 0x%lx:"), (long) flags);
1083
1084 if (flags & E_FLAG_RL78_G10)
1085 fprintf (file, _(" [G10]"));
1086
1087 if (flags & E_FLAG_RL78_64BIT_DOUBLES)
1088 fprintf (file, _(" [64-bit doubles]"));
1089
1090 fputc ('\n', file);
1091 return TRUE;
1092 }
1093
1094 /* Return the MACH for an e_flags value. */
1095
1096 static int
elf32_rl78_machine(bfd * abfd)1097 elf32_rl78_machine (bfd * abfd)
1098 {
1099 if ((elf_elfheader (abfd)->e_flags & EF_RL78_CPU_MASK) == EF_RL78_CPU_RL78)
1100 return bfd_mach_rl78;
1101
1102 return 0;
1103 }
1104
1105 static bfd_boolean
rl78_elf_object_p(bfd * abfd)1106 rl78_elf_object_p (bfd * abfd)
1107 {
1108 bfd_default_set_arch_mach (abfd, bfd_arch_rl78,
1109 elf32_rl78_machine (abfd));
1110 return TRUE;
1111 }
1112
1113 /* support PLT for 16-bit references to 24-bit functions. */
1114
1115 /* We support 16-bit pointers to code above 64k by generating a thunk
1116 below 64k containing a JMP instruction to the final address. */
1117
1118 static bfd_boolean
rl78_elf_check_relocs(bfd * abfd,struct bfd_link_info * info,asection * sec,const Elf_Internal_Rela * relocs)1119 rl78_elf_check_relocs
1120 (bfd * abfd,
1121 struct bfd_link_info * info,
1122 asection * sec,
1123 const Elf_Internal_Rela * relocs)
1124 {
1125 Elf_Internal_Shdr * symtab_hdr;
1126 struct elf_link_hash_entry ** sym_hashes;
1127 const Elf_Internal_Rela * rel;
1128 const Elf_Internal_Rela * rel_end;
1129 bfd_vma *local_plt_offsets;
1130 asection *splt;
1131 bfd *dynobj;
1132
1133 if (info->relocatable)
1134 return TRUE;
1135
1136 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1137 sym_hashes = elf_sym_hashes (abfd);
1138 local_plt_offsets = elf_local_got_offsets (abfd);
1139 splt = NULL;
1140 dynobj = elf_hash_table(info)->dynobj;
1141
1142 rel_end = relocs + sec->reloc_count;
1143 for (rel = relocs; rel < rel_end; rel++)
1144 {
1145 struct elf_link_hash_entry *h;
1146 unsigned long r_symndx;
1147 bfd_vma *offset;
1148
1149 r_symndx = ELF32_R_SYM (rel->r_info);
1150 if (r_symndx < symtab_hdr->sh_info)
1151 h = NULL;
1152 else
1153 {
1154 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
1155 while (h->root.type == bfd_link_hash_indirect
1156 || h->root.type == bfd_link_hash_warning)
1157 h = (struct elf_link_hash_entry *) h->root.u.i.link;
1158
1159 /* PR15323, ref flags aren't set for references in the same
1160 object. */
1161 h->root.non_ir_ref = 1;
1162 }
1163
1164 switch (ELF32_R_TYPE (rel->r_info))
1165 {
1166 /* This relocation describes a 16-bit pointer to a function.
1167 We may need to allocate a thunk in low memory; reserve memory
1168 for it now. */
1169 case R_RL78_DIR16S:
1170 if (dynobj == NULL)
1171 elf_hash_table (info)->dynobj = dynobj = abfd;
1172 if (splt == NULL)
1173 {
1174 splt = bfd_get_linker_section (dynobj, ".plt");
1175 if (splt == NULL)
1176 {
1177 flagword flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
1178 | SEC_IN_MEMORY | SEC_LINKER_CREATED
1179 | SEC_READONLY | SEC_CODE);
1180 splt = bfd_make_section_anyway_with_flags (dynobj, ".plt",
1181 flags);
1182 if (splt == NULL
1183 || ! bfd_set_section_alignment (dynobj, splt, 1))
1184 return FALSE;
1185 }
1186 }
1187
1188 if (h != NULL)
1189 offset = &h->plt.offset;
1190 else
1191 {
1192 if (local_plt_offsets == NULL)
1193 {
1194 size_t size;
1195 unsigned int i;
1196
1197 size = symtab_hdr->sh_info * sizeof (bfd_vma);
1198 local_plt_offsets = (bfd_vma *) bfd_alloc (abfd, size);
1199 if (local_plt_offsets == NULL)
1200 return FALSE;
1201 elf_local_got_offsets (abfd) = local_plt_offsets;
1202
1203 for (i = 0; i < symtab_hdr->sh_info; i++)
1204 local_plt_offsets[i] = (bfd_vma) -1;
1205 }
1206 offset = &local_plt_offsets[r_symndx];
1207 }
1208
1209 if (*offset == (bfd_vma) -1)
1210 {
1211 *offset = splt->size;
1212 splt->size += 4;
1213 }
1214 break;
1215 }
1216 }
1217
1218 return TRUE;
1219 }
1220
1221 /* This must exist if dynobj is ever set. */
1222
1223 static bfd_boolean
rl78_elf_finish_dynamic_sections(bfd * abfd ATTRIBUTE_UNUSED,struct bfd_link_info * info)1224 rl78_elf_finish_dynamic_sections (bfd *abfd ATTRIBUTE_UNUSED,
1225 struct bfd_link_info *info)
1226 {
1227 bfd *dynobj;
1228 asection *splt;
1229
1230 if (!elf_hash_table (info)->dynamic_sections_created)
1231 return TRUE;
1232
1233 /* As an extra sanity check, verify that all plt entries have been
1234 filled in. However, relaxing might have changed the relocs so
1235 that some plt entries don't get filled in, so we have to skip
1236 this check if we're relaxing. Unfortunately, check_relocs is
1237 called before relaxation. */
1238
1239 if (info->relax_trip > 0)
1240 return TRUE;
1241
1242 if ((dynobj = elf_hash_table (info)->dynobj) != NULL
1243 && (splt = bfd_get_linker_section (dynobj, ".plt")) != NULL)
1244 {
1245 bfd_byte *contents = splt->contents;
1246 unsigned int i, size = splt->size;
1247
1248 for (i = 0; i < size; i += 4)
1249 {
1250 unsigned int x = bfd_get_32 (dynobj, contents + i);
1251 BFD_ASSERT (x != 0);
1252 }
1253 }
1254
1255 return TRUE;
1256 }
1257
1258 static bfd_boolean
rl78_elf_always_size_sections(bfd * output_bfd ATTRIBUTE_UNUSED,struct bfd_link_info * info)1259 rl78_elf_always_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED,
1260 struct bfd_link_info *info)
1261 {
1262 bfd *dynobj;
1263 asection *splt;
1264
1265 if (info->relocatable)
1266 return TRUE;
1267
1268 dynobj = elf_hash_table (info)->dynobj;
1269 if (dynobj == NULL)
1270 return TRUE;
1271
1272 splt = bfd_get_linker_section (dynobj, ".plt");
1273 BFD_ASSERT (splt != NULL);
1274
1275 splt->contents = (bfd_byte *) bfd_zalloc (dynobj, splt->size);
1276 if (splt->contents == NULL)
1277 return FALSE;
1278
1279 return TRUE;
1280 }
1281
1282
1283
1284 /* Handle relaxing. */
1285
1286 /* A subroutine of rl78_elf_relax_section. If the global symbol H
1287 is within the low 64k, remove any entry for it in the plt. */
1288
1289 struct relax_plt_data
1290 {
1291 asection *splt;
1292 bfd_boolean *again;
1293 };
1294
1295 static bfd_boolean
rl78_relax_plt_check(struct elf_link_hash_entry * h,void * xdata)1296 rl78_relax_plt_check (struct elf_link_hash_entry *h, void * xdata)
1297 {
1298 struct relax_plt_data *data = (struct relax_plt_data *) xdata;
1299
1300 if (h->plt.offset != (bfd_vma) -1)
1301 {
1302 bfd_vma address;
1303
1304 if (h->root.type == bfd_link_hash_undefined
1305 || h->root.type == bfd_link_hash_undefweak)
1306 address = 0;
1307 else
1308 address = (h->root.u.def.section->output_section->vma
1309 + h->root.u.def.section->output_offset
1310 + h->root.u.def.value);
1311
1312 if (valid_16bit_address (address))
1313 {
1314 h->plt.offset = -1;
1315 data->splt->size -= 4;
1316 *data->again = TRUE;
1317 }
1318 }
1319
1320 return TRUE;
1321 }
1322
1323 /* A subroutine of rl78_elf_relax_section. If the global symbol H
1324 previously had a plt entry, give it a new entry offset. */
1325
1326 static bfd_boolean
rl78_relax_plt_realloc(struct elf_link_hash_entry * h,void * xdata)1327 rl78_relax_plt_realloc (struct elf_link_hash_entry *h, void * xdata)
1328 {
1329 bfd_vma *entry = (bfd_vma *) xdata;
1330
1331 if (h->plt.offset != (bfd_vma) -1)
1332 {
1333 h->plt.offset = *entry;
1334 *entry += 4;
1335 }
1336
1337 return TRUE;
1338 }
1339
1340 static bfd_boolean
rl78_elf_relax_plt_section(bfd * dynobj,asection * splt,struct bfd_link_info * info,bfd_boolean * again)1341 rl78_elf_relax_plt_section (bfd *dynobj,
1342 asection *splt,
1343 struct bfd_link_info *info,
1344 bfd_boolean *again)
1345 {
1346 struct relax_plt_data relax_plt_data;
1347 bfd *ibfd;
1348
1349 /* Assume nothing changes. */
1350 *again = FALSE;
1351
1352 if (info->relocatable)
1353 return TRUE;
1354
1355 /* We only relax the .plt section at the moment. */
1356 if (dynobj != elf_hash_table (info)->dynobj
1357 || strcmp (splt->name, ".plt") != 0)
1358 return TRUE;
1359
1360 /* Quick check for an empty plt. */
1361 if (splt->size == 0)
1362 return TRUE;
1363
1364 /* Map across all global symbols; see which ones happen to
1365 fall in the low 64k. */
1366 relax_plt_data.splt = splt;
1367 relax_plt_data.again = again;
1368 elf_link_hash_traverse (elf_hash_table (info), rl78_relax_plt_check,
1369 &relax_plt_data);
1370
1371 /* Likewise for local symbols, though that's somewhat less convenient
1372 as we have to walk the list of input bfds and swap in symbol data. */
1373 for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link.next)
1374 {
1375 bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd);
1376 Elf_Internal_Shdr *symtab_hdr;
1377 Elf_Internal_Sym *isymbuf = NULL;
1378 unsigned int idx;
1379
1380 if (! local_plt_offsets)
1381 continue;
1382
1383 symtab_hdr = &elf_tdata (ibfd)->symtab_hdr;
1384 if (symtab_hdr->sh_info != 0)
1385 {
1386 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
1387 if (isymbuf == NULL)
1388 isymbuf = bfd_elf_get_elf_syms (ibfd, symtab_hdr,
1389 symtab_hdr->sh_info, 0,
1390 NULL, NULL, NULL);
1391 if (isymbuf == NULL)
1392 return FALSE;
1393 }
1394
1395 for (idx = 0; idx < symtab_hdr->sh_info; ++idx)
1396 {
1397 Elf_Internal_Sym *isym;
1398 asection *tsec;
1399 bfd_vma address;
1400
1401 if (local_plt_offsets[idx] == (bfd_vma) -1)
1402 continue;
1403
1404 isym = &isymbuf[idx];
1405 if (isym->st_shndx == SHN_UNDEF)
1406 continue;
1407 else if (isym->st_shndx == SHN_ABS)
1408 tsec = bfd_abs_section_ptr;
1409 else if (isym->st_shndx == SHN_COMMON)
1410 tsec = bfd_com_section_ptr;
1411 else
1412 tsec = bfd_section_from_elf_index (ibfd, isym->st_shndx);
1413
1414 address = (tsec->output_section->vma
1415 + tsec->output_offset
1416 + isym->st_value);
1417 if (valid_16bit_address (address))
1418 {
1419 local_plt_offsets[idx] = -1;
1420 splt->size -= 4;
1421 *again = TRUE;
1422 }
1423 }
1424
1425 if (isymbuf != NULL
1426 && symtab_hdr->contents != (unsigned char *) isymbuf)
1427 {
1428 if (! info->keep_memory)
1429 free (isymbuf);
1430 else
1431 {
1432 /* Cache the symbols for elf_link_input_bfd. */
1433 symtab_hdr->contents = (unsigned char *) isymbuf;
1434 }
1435 }
1436 }
1437
1438 /* If we changed anything, walk the symbols again to reallocate
1439 .plt entry addresses. */
1440 if (*again && splt->size > 0)
1441 {
1442 bfd_vma entry = 0;
1443
1444 elf_link_hash_traverse (elf_hash_table (info),
1445 rl78_relax_plt_realloc, &entry);
1446
1447 for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link.next)
1448 {
1449 bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd);
1450 unsigned int nlocals = elf_tdata (ibfd)->symtab_hdr.sh_info;
1451 unsigned int idx;
1452
1453 if (! local_plt_offsets)
1454 continue;
1455
1456 for (idx = 0; idx < nlocals; ++idx)
1457 if (local_plt_offsets[idx] != (bfd_vma) -1)
1458 {
1459 local_plt_offsets[idx] = entry;
1460 entry += 4;
1461 }
1462 }
1463 }
1464
1465 return TRUE;
1466 }
1467
1468 /* Delete some bytes from a section while relaxing. */
1469
1470 static bfd_boolean
elf32_rl78_relax_delete_bytes(bfd * abfd,asection * sec,bfd_vma addr,int count,Elf_Internal_Rela * alignment_rel,int force_snip)1471 elf32_rl78_relax_delete_bytes (bfd *abfd, asection *sec, bfd_vma addr, int count,
1472 Elf_Internal_Rela *alignment_rel, int force_snip)
1473 {
1474 Elf_Internal_Shdr * symtab_hdr;
1475 unsigned int sec_shndx;
1476 bfd_byte * contents;
1477 Elf_Internal_Rela * irel;
1478 Elf_Internal_Rela * irelend;
1479 Elf_Internal_Sym * isym;
1480 Elf_Internal_Sym * isymend;
1481 bfd_vma toaddr;
1482 unsigned int symcount;
1483 struct elf_link_hash_entry ** sym_hashes;
1484 struct elf_link_hash_entry ** end_hashes;
1485
1486 if (!alignment_rel)
1487 force_snip = 1;
1488
1489 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
1490
1491 contents = elf_section_data (sec)->this_hdr.contents;
1492
1493 /* The deletion must stop at the next alignment boundary, if
1494 ALIGNMENT_REL is non-NULL. */
1495 toaddr = sec->size;
1496 if (alignment_rel)
1497 toaddr = alignment_rel->r_offset;
1498
1499 irel = elf_section_data (sec)->relocs;
1500 if (irel == NULL)
1501 {
1502 _bfd_elf_link_read_relocs (sec->owner, sec, NULL, NULL, TRUE);
1503 irel = elf_section_data (sec)->relocs;
1504 }
1505
1506 irelend = irel + sec->reloc_count;
1507
1508 /* Actually delete the bytes. */
1509 memmove (contents + addr, contents + addr + count,
1510 (size_t) (toaddr - addr - count));
1511
1512 /* If we don't have an alignment marker to worry about, we can just
1513 shrink the section. Otherwise, we have to fill in the newly
1514 created gap with NOP insns (0x03). */
1515 if (force_snip)
1516 sec->size -= count;
1517 else
1518 memset (contents + toaddr - count, 0x03, count);
1519
1520 /* Adjust all the relocs. */
1521 for (; irel && irel < irelend; irel++)
1522 {
1523 /* Get the new reloc address. */
1524 if (irel->r_offset > addr
1525 && (irel->r_offset < toaddr
1526 || (force_snip && irel->r_offset == toaddr)))
1527 irel->r_offset -= count;
1528
1529 /* If we see an ALIGN marker at the end of the gap, we move it
1530 to the beginning of the gap, since marking these gaps is what
1531 they're for. */
1532 if (irel->r_offset == toaddr
1533 && ELF32_R_TYPE (irel->r_info) == R_RL78_RH_RELAX
1534 && irel->r_addend & RL78_RELAXA_ALIGN)
1535 irel->r_offset -= count;
1536 }
1537
1538 /* Adjust the local symbols defined in this section. */
1539 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1540 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
1541 isymend = isym + symtab_hdr->sh_info;
1542
1543 for (; isym < isymend; isym++)
1544 {
1545 /* If the symbol is in the range of memory we just moved, we
1546 have to adjust its value. */
1547 if (isym->st_shndx == sec_shndx
1548 && isym->st_value > addr
1549 && isym->st_value < toaddr)
1550 isym->st_value -= count;
1551
1552 /* If the symbol *spans* the bytes we just deleted (i.e. it's
1553 *end* is in the moved bytes but it's *start* isn't), then we
1554 must adjust its size. */
1555 if (isym->st_shndx == sec_shndx
1556 && isym->st_value < addr
1557 && isym->st_value + isym->st_size > addr
1558 && isym->st_value + isym->st_size < toaddr)
1559 isym->st_size -= count;
1560 }
1561
1562 /* Now adjust the global symbols defined in this section. */
1563 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1564 - symtab_hdr->sh_info);
1565 sym_hashes = elf_sym_hashes (abfd);
1566 end_hashes = sym_hashes + symcount;
1567
1568 for (; sym_hashes < end_hashes; sym_hashes++)
1569 {
1570 struct elf_link_hash_entry *sym_hash = *sym_hashes;
1571
1572 if ((sym_hash->root.type == bfd_link_hash_defined
1573 || sym_hash->root.type == bfd_link_hash_defweak)
1574 && sym_hash->root.u.def.section == sec)
1575 {
1576 /* As above, adjust the value if needed. */
1577 if (sym_hash->root.u.def.value > addr
1578 && sym_hash->root.u.def.value < toaddr)
1579 sym_hash->root.u.def.value -= count;
1580
1581 /* As above, adjust the size if needed. */
1582 if (sym_hash->root.u.def.value < addr
1583 && sym_hash->root.u.def.value + sym_hash->size > addr
1584 && sym_hash->root.u.def.value + sym_hash->size < toaddr)
1585 sym_hash->size -= count;
1586 }
1587 }
1588
1589 return TRUE;
1590 }
1591
1592 /* Used to sort relocs by address. If relocs have the same address,
1593 we maintain their relative order, except that R_RL78_RH_RELAX
1594 alignment relocs must be the first reloc for any given address. */
1595
1596 static void
reloc_bubblesort(Elf_Internal_Rela * r,int count)1597 reloc_bubblesort (Elf_Internal_Rela * r, int count)
1598 {
1599 int i;
1600 bfd_boolean again;
1601 bfd_boolean swappit;
1602
1603 /* This is almost a classic bubblesort. It's the slowest sort, but
1604 we're taking advantage of the fact that the relocations are
1605 mostly in order already (the assembler emits them that way) and
1606 we need relocs with the same address to remain in the same
1607 relative order. */
1608 again = TRUE;
1609 while (again)
1610 {
1611 again = FALSE;
1612 for (i = 0; i < count - 1; i ++)
1613 {
1614 if (r[i].r_offset > r[i + 1].r_offset)
1615 swappit = TRUE;
1616 else if (r[i].r_offset < r[i + 1].r_offset)
1617 swappit = FALSE;
1618 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RL78_RH_RELAX
1619 && (r[i + 1].r_addend & RL78_RELAXA_ALIGN))
1620 swappit = TRUE;
1621 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RL78_RH_RELAX
1622 && (r[i + 1].r_addend & RL78_RELAXA_ELIGN)
1623 && !(ELF32_R_TYPE (r[i].r_info) == R_RL78_RH_RELAX
1624 && (r[i].r_addend & RL78_RELAXA_ALIGN)))
1625 swappit = TRUE;
1626 else
1627 swappit = FALSE;
1628
1629 if (swappit)
1630 {
1631 Elf_Internal_Rela tmp;
1632
1633 tmp = r[i];
1634 r[i] = r[i + 1];
1635 r[i + 1] = tmp;
1636 /* If we do move a reloc back, re-scan to see if it
1637 needs to be moved even further back. This avoids
1638 most of the O(n^2) behavior for our cases. */
1639 if (i > 0)
1640 i -= 2;
1641 again = TRUE;
1642 }
1643 }
1644 }
1645 }
1646
1647
1648 #define OFFSET_FOR_RELOC(rel, lrel, scale) \
1649 rl78_offset_for_reloc (abfd, rel + 1, symtab_hdr, shndx_buf, intsyms, \
1650 lrel, abfd, sec, link_info, scale)
1651
1652 static bfd_vma
rl78_offset_for_reloc(bfd * abfd,Elf_Internal_Rela * rel,Elf_Internal_Shdr * symtab_hdr,Elf_External_Sym_Shndx * shndx_buf ATTRIBUTE_UNUSED,Elf_Internal_Sym * intsyms,Elf_Internal_Rela ** lrel,bfd * input_bfd,asection * input_section,struct bfd_link_info * info,int * scale)1653 rl78_offset_for_reloc (bfd * abfd,
1654 Elf_Internal_Rela * rel,
1655 Elf_Internal_Shdr * symtab_hdr,
1656 Elf_External_Sym_Shndx * shndx_buf ATTRIBUTE_UNUSED,
1657 Elf_Internal_Sym * intsyms,
1658 Elf_Internal_Rela ** lrel,
1659 bfd * input_bfd,
1660 asection * input_section,
1661 struct bfd_link_info * info,
1662 int * scale)
1663 {
1664 bfd_vma symval;
1665 bfd_reloc_status_type r;
1666
1667 *scale = 1;
1668
1669 /* REL is the first of 1..N relocations. We compute the symbol
1670 value for each relocation, then combine them if needed. LREL
1671 gets a pointer to the last relocation used. */
1672 while (1)
1673 {
1674 int32_t tmp1, tmp2;
1675
1676 /* Get the value of the symbol referred to by the reloc. */
1677 if (ELF32_R_SYM (rel->r_info) < symtab_hdr->sh_info)
1678 {
1679 /* A local symbol. */
1680 Elf_Internal_Sym *isym;
1681 asection *ssec;
1682
1683 isym = intsyms + ELF32_R_SYM (rel->r_info);
1684
1685 if (isym->st_shndx == SHN_UNDEF)
1686 ssec = bfd_und_section_ptr;
1687 else if (isym->st_shndx == SHN_ABS)
1688 ssec = bfd_abs_section_ptr;
1689 else if (isym->st_shndx == SHN_COMMON)
1690 ssec = bfd_com_section_ptr;
1691 else
1692 ssec = bfd_section_from_elf_index (abfd,
1693 isym->st_shndx);
1694
1695 /* Initial symbol value. */
1696 symval = isym->st_value;
1697
1698 /* GAS may have made this symbol relative to a section, in
1699 which case, we have to add the addend to find the
1700 symbol. */
1701 if (ELF_ST_TYPE (isym->st_info) == STT_SECTION)
1702 symval += rel->r_addend;
1703
1704 if (ssec)
1705 {
1706 if ((ssec->flags & SEC_MERGE)
1707 && ssec->sec_info_type == SEC_INFO_TYPE_MERGE)
1708 symval = _bfd_merged_section_offset (abfd, & ssec,
1709 elf_section_data (ssec)->sec_info,
1710 symval);
1711 }
1712
1713 /* Now make the offset relative to where the linker is putting it. */
1714 if (ssec)
1715 symval +=
1716 ssec->output_section->vma + ssec->output_offset;
1717
1718 symval += rel->r_addend;
1719 }
1720 else
1721 {
1722 unsigned long indx;
1723 struct elf_link_hash_entry * h;
1724
1725 /* An external symbol. */
1726 indx = ELF32_R_SYM (rel->r_info) - symtab_hdr->sh_info;
1727 h = elf_sym_hashes (abfd)[indx];
1728 BFD_ASSERT (h != NULL);
1729
1730 if (h->root.type != bfd_link_hash_defined
1731 && h->root.type != bfd_link_hash_defweak)
1732 {
1733 /* This appears to be a reference to an undefined
1734 symbol. Just ignore it--it will be caught by the
1735 regular reloc processing. */
1736 if (lrel)
1737 *lrel = rel;
1738 return 0;
1739 }
1740
1741 symval = (h->root.u.def.value
1742 + h->root.u.def.section->output_section->vma
1743 + h->root.u.def.section->output_offset);
1744
1745 symval += rel->r_addend;
1746 }
1747
1748 switch (ELF32_R_TYPE (rel->r_info))
1749 {
1750 case R_RL78_SYM:
1751 RL78_STACK_PUSH (symval);
1752 break;
1753
1754 case R_RL78_OPneg:
1755 RL78_STACK_POP (tmp1);
1756 tmp1 = - tmp1;
1757 RL78_STACK_PUSH (tmp1);
1758 break;
1759
1760 case R_RL78_OPadd:
1761 RL78_STACK_POP (tmp1);
1762 RL78_STACK_POP (tmp2);
1763 tmp1 += tmp2;
1764 RL78_STACK_PUSH (tmp1);
1765 break;
1766
1767 case R_RL78_OPsub:
1768 RL78_STACK_POP (tmp1);
1769 RL78_STACK_POP (tmp2);
1770 tmp2 -= tmp1;
1771 RL78_STACK_PUSH (tmp2);
1772 break;
1773
1774 case R_RL78_OPmul:
1775 RL78_STACK_POP (tmp1);
1776 RL78_STACK_POP (tmp2);
1777 tmp1 *= tmp2;
1778 RL78_STACK_PUSH (tmp1);
1779 break;
1780
1781 case R_RL78_OPdiv:
1782 RL78_STACK_POP (tmp1);
1783 RL78_STACK_POP (tmp2);
1784 tmp1 /= tmp2;
1785 RL78_STACK_PUSH (tmp1);
1786 break;
1787
1788 case R_RL78_OPshla:
1789 RL78_STACK_POP (tmp1);
1790 RL78_STACK_POP (tmp2);
1791 tmp1 <<= tmp2;
1792 RL78_STACK_PUSH (tmp1);
1793 break;
1794
1795 case R_RL78_OPshra:
1796 RL78_STACK_POP (tmp1);
1797 RL78_STACK_POP (tmp2);
1798 tmp1 >>= tmp2;
1799 RL78_STACK_PUSH (tmp1);
1800 break;
1801
1802 case R_RL78_OPsctsize:
1803 RL78_STACK_PUSH (input_section->size);
1804 break;
1805
1806 case R_RL78_OPscttop:
1807 RL78_STACK_PUSH (input_section->output_section->vma);
1808 break;
1809
1810 case R_RL78_OPand:
1811 RL78_STACK_POP (tmp1);
1812 RL78_STACK_POP (tmp2);
1813 tmp1 &= tmp2;
1814 RL78_STACK_PUSH (tmp1);
1815 break;
1816
1817 case R_RL78_OPor:
1818 RL78_STACK_POP (tmp1);
1819 RL78_STACK_POP (tmp2);
1820 tmp1 |= tmp2;
1821 RL78_STACK_PUSH (tmp1);
1822 break;
1823
1824 case R_RL78_OPxor:
1825 RL78_STACK_POP (tmp1);
1826 RL78_STACK_POP (tmp2);
1827 tmp1 ^= tmp2;
1828 RL78_STACK_PUSH (tmp1);
1829 break;
1830
1831 case R_RL78_OPnot:
1832 RL78_STACK_POP (tmp1);
1833 tmp1 = ~ tmp1;
1834 RL78_STACK_PUSH (tmp1);
1835 break;
1836
1837 case R_RL78_OPmod:
1838 RL78_STACK_POP (tmp1);
1839 RL78_STACK_POP (tmp2);
1840 tmp1 %= tmp2;
1841 RL78_STACK_PUSH (tmp1);
1842 break;
1843
1844 case R_RL78_OPromtop:
1845 RL78_STACK_PUSH (get_romstart (&r, info, input_bfd, input_section, rel->r_offset));
1846 break;
1847
1848 case R_RL78_OPramtop:
1849 RL78_STACK_PUSH (get_ramstart (&r, info, input_bfd, input_section, rel->r_offset));
1850 break;
1851
1852 case R_RL78_DIR16UL:
1853 case R_RL78_DIR8UL:
1854 case R_RL78_ABS16UL:
1855 case R_RL78_ABS8UL:
1856 if (rl78_stack_top)
1857 RL78_STACK_POP (symval);
1858 if (lrel)
1859 *lrel = rel;
1860 *scale = 4;
1861 return symval;
1862
1863 case R_RL78_DIR16UW:
1864 case R_RL78_DIR8UW:
1865 case R_RL78_ABS16UW:
1866 case R_RL78_ABS8UW:
1867 if (rl78_stack_top)
1868 RL78_STACK_POP (symval);
1869 if (lrel)
1870 *lrel = rel;
1871 *scale = 2;
1872 return symval;
1873
1874 default:
1875 if (rl78_stack_top)
1876 RL78_STACK_POP (symval);
1877 if (lrel)
1878 *lrel = rel;
1879 return symval;
1880 }
1881
1882 rel ++;
1883 }
1884 }
1885
1886 struct {
1887 int prefix; /* or -1 for "no prefix" */
1888 int insn; /* or -1 for "end of list" */
1889 int insn_for_saddr; /* or -1 for "no alternative" */
1890 int insn_for_sfr; /* or -1 for "no alternative" */
1891 } relax_addr16[] = {
1892 { -1, 0x02, 0x06, -1 }, /* ADDW AX, !addr16 */
1893 { -1, 0x22, 0x26, -1 }, /* SUBW AX, !addr16 */
1894 { -1, 0x42, 0x46, -1 }, /* CMPW AX, !addr16 */
1895 { -1, 0x40, 0x4a, -1 }, /* CMP !addr16, #byte */
1896
1897 { -1, 0x0f, 0x0b, -1 }, /* ADD A, !addr16 */
1898 { -1, 0x1f, 0x1b, -1 }, /* ADDC A, !addr16 */
1899 { -1, 0x2f, 0x2b, -1 }, /* SUB A, !addr16 */
1900 { -1, 0x3f, 0x3b, -1 }, /* SUBC A, !addr16 */
1901 { -1, 0x4f, 0x4b, -1 }, /* CMP A, !addr16 */
1902 { -1, 0x5f, 0x5b, -1 }, /* AND A, !addr16 */
1903 { -1, 0x6f, 0x6b, -1 }, /* OR A, !addr16 */
1904 { -1, 0x7f, 0x7b, -1 }, /* XOR A, !addr16 */
1905
1906 { -1, 0x8f, 0x8d, 0x8e }, /* MOV A, !addr16 */
1907 { -1, 0x9f, 0x9d, 0x9e }, /* MOV !addr16, A */
1908 { -1, 0xaf, 0xad, 0xae }, /* MOVW AX, !addr16 */
1909 { -1, 0xbf, 0xbd, 0xbe }, /* MOVW !addr16, AX */
1910 { -1, 0xcf, 0xcd, 0xce }, /* MOVW !addr16, #word */
1911
1912 { -1, 0xa0, 0xa4, -1 }, /* INC !addr16 */
1913 { -1, 0xa2, 0xa6, -1 }, /* INCW !addr16 */
1914 { -1, 0xb0, 0xb4, -1 }, /* DEC !addr16 */
1915 { -1, 0xb2, 0xb6, -1 }, /* DECW !addr16 */
1916
1917 { -1, 0xd5, 0xd4, -1 }, /* CMP0 !addr16 */
1918 { -1, 0xe5, 0xe4, -1 }, /* ONEB !addr16 */
1919 { -1, 0xf5, 0xf4, -1 }, /* CLRB !addr16 */
1920
1921 { -1, 0xd9, 0xd8, -1 }, /* MOV X, !addr16 */
1922 { -1, 0xe9, 0xe8, -1 }, /* MOV B, !addr16 */
1923 { -1, 0xf9, 0xf8, -1 }, /* MOV C, !addr16 */
1924 { -1, 0xdb, 0xda, -1 }, /* MOVW BC, !addr16 */
1925 { -1, 0xeb, 0xea, -1 }, /* MOVW DE, !addr16 */
1926 { -1, 0xfb, 0xfa, -1 }, /* MOVW HL, !addr16 */
1927
1928 { 0x61, 0xaa, 0xa8, -1 }, /* XCH A, !addr16 */
1929
1930 { 0x71, 0x00, 0x02, 0x0a }, /* SET1 !addr16.0 */
1931 { 0x71, 0x10, 0x12, 0x1a }, /* SET1 !addr16.0 */
1932 { 0x71, 0x20, 0x22, 0x2a }, /* SET1 !addr16.0 */
1933 { 0x71, 0x30, 0x32, 0x3a }, /* SET1 !addr16.0 */
1934 { 0x71, 0x40, 0x42, 0x4a }, /* SET1 !addr16.0 */
1935 { 0x71, 0x50, 0x52, 0x5a }, /* SET1 !addr16.0 */
1936 { 0x71, 0x60, 0x62, 0x6a }, /* SET1 !addr16.0 */
1937 { 0x71, 0x70, 0x72, 0x7a }, /* SET1 !addr16.0 */
1938
1939 { 0x71, 0x08, 0x03, 0x0b }, /* CLR1 !addr16.0 */
1940 { 0x71, 0x18, 0x13, 0x1b }, /* CLR1 !addr16.0 */
1941 { 0x71, 0x28, 0x23, 0x2b }, /* CLR1 !addr16.0 */
1942 { 0x71, 0x38, 0x33, 0x3b }, /* CLR1 !addr16.0 */
1943 { 0x71, 0x48, 0x43, 0x4b }, /* CLR1 !addr16.0 */
1944 { 0x71, 0x58, 0x53, 0x5b }, /* CLR1 !addr16.0 */
1945 { 0x71, 0x68, 0x63, 0x6b }, /* CLR1 !addr16.0 */
1946 { 0x71, 0x78, 0x73, 0x7b }, /* CLR1 !addr16.0 */
1947
1948 { -1, -1, -1, -1 }
1949 };
1950
1951 /* Relax one section. */
1952
1953 static bfd_boolean
rl78_elf_relax_section(bfd * abfd,asection * sec,struct bfd_link_info * link_info,bfd_boolean * again)1954 rl78_elf_relax_section
1955 (bfd * abfd,
1956 asection * sec,
1957 struct bfd_link_info * link_info,
1958 bfd_boolean * again)
1959 {
1960 Elf_Internal_Shdr * symtab_hdr;
1961 Elf_Internal_Shdr * shndx_hdr;
1962 Elf_Internal_Rela * internal_relocs;
1963 Elf_Internal_Rela * free_relocs = NULL;
1964 Elf_Internal_Rela * irel;
1965 Elf_Internal_Rela * srel;
1966 Elf_Internal_Rela * irelend;
1967 Elf_Internal_Rela * next_alignment;
1968 bfd_byte * contents = NULL;
1969 bfd_byte * free_contents = NULL;
1970 Elf_Internal_Sym * intsyms = NULL;
1971 Elf_Internal_Sym * free_intsyms = NULL;
1972 Elf_External_Sym_Shndx * shndx_buf = NULL;
1973 bfd_vma pc;
1974 bfd_vma symval ATTRIBUTE_UNUSED = 0;
1975 int pcrel ATTRIBUTE_UNUSED = 0;
1976 int code ATTRIBUTE_UNUSED = 0;
1977 int section_alignment_glue;
1978 int scale;
1979
1980 if (abfd == elf_hash_table (link_info)->dynobj
1981 && strcmp (sec->name, ".plt") == 0)
1982 return rl78_elf_relax_plt_section (abfd, sec, link_info, again);
1983
1984 /* Assume nothing changes. */
1985 *again = FALSE;
1986
1987 /* We don't have to do anything for a relocatable link, if
1988 this section does not have relocs, or if this is not a
1989 code section. */
1990 if (link_info->relocatable
1991 || (sec->flags & SEC_RELOC) == 0
1992 || sec->reloc_count == 0
1993 || (sec->flags & SEC_CODE) == 0)
1994 return TRUE;
1995
1996 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1997 shndx_hdr = &elf_tdata (abfd)->symtab_shndx_hdr;
1998
1999 /* Get the section contents. */
2000 if (elf_section_data (sec)->this_hdr.contents != NULL)
2001 contents = elf_section_data (sec)->this_hdr.contents;
2002 /* Go get them off disk. */
2003 else
2004 {
2005 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
2006 goto error_return;
2007 elf_section_data (sec)->this_hdr.contents = contents;
2008 }
2009
2010 /* Read this BFD's symbols. */
2011 /* Get cached copy if it exists. */
2012 if (symtab_hdr->contents != NULL)
2013 intsyms = (Elf_Internal_Sym *) symtab_hdr->contents;
2014 else
2015 {
2016 intsyms = bfd_elf_get_elf_syms (abfd, symtab_hdr, symtab_hdr->sh_info, 0, NULL, NULL, NULL);
2017 symtab_hdr->contents = (bfd_byte *) intsyms;
2018 }
2019
2020 if (shndx_hdr->sh_size != 0)
2021 {
2022 bfd_size_type amt;
2023
2024 amt = symtab_hdr->sh_info;
2025 amt *= sizeof (Elf_External_Sym_Shndx);
2026 shndx_buf = (Elf_External_Sym_Shndx *) bfd_malloc (amt);
2027 if (shndx_buf == NULL)
2028 goto error_return;
2029 if (bfd_seek (abfd, shndx_hdr->sh_offset, SEEK_SET) != 0
2030 || bfd_bread (shndx_buf, amt, abfd) != amt)
2031 goto error_return;
2032 shndx_hdr->contents = (bfd_byte *) shndx_buf;
2033 }
2034
2035 /* Get a copy of the native relocations. */
2036 internal_relocs = (_bfd_elf_link_read_relocs
2037 (abfd, sec, NULL, (Elf_Internal_Rela *) NULL,
2038 link_info->keep_memory));
2039 if (internal_relocs == NULL)
2040 goto error_return;
2041 if (! link_info->keep_memory)
2042 free_relocs = internal_relocs;
2043
2044 /* The RL_ relocs must be just before the operand relocs they go
2045 with, so we must sort them to guarantee this. We use bubblesort
2046 instead of qsort so we can guarantee that relocs with the same
2047 address remain in the same relative order. */
2048 reloc_bubblesort (internal_relocs, sec->reloc_count);
2049
2050 /* Walk through them looking for relaxing opportunities. */
2051 irelend = internal_relocs + sec->reloc_count;
2052
2053
2054 /* This will either be NULL or a pointer to the next alignment
2055 relocation. */
2056 next_alignment = internal_relocs;
2057
2058 /* We calculate worst case shrinkage caused by alignment directives.
2059 No fool-proof, but better than either ignoring the problem or
2060 doing heavy duty analysis of all the alignment markers in all
2061 input sections. */
2062 section_alignment_glue = 0;
2063 for (irel = internal_relocs; irel < irelend; irel++)
2064 if (ELF32_R_TYPE (irel->r_info) == R_RL78_RH_RELAX
2065 && irel->r_addend & RL78_RELAXA_ALIGN)
2066 {
2067 int this_glue = 1 << (irel->r_addend & RL78_RELAXA_ANUM);
2068
2069 if (section_alignment_glue < this_glue)
2070 section_alignment_glue = this_glue;
2071 }
2072 /* Worst case is all 0..N alignments, in order, causing 2*N-1 byte
2073 shrinkage. */
2074 section_alignment_glue *= 2;
2075
2076 for (irel = internal_relocs; irel < irelend; irel++)
2077 {
2078 unsigned char *insn;
2079 int nrelocs;
2080
2081 /* The insns we care about are all marked with one of these. */
2082 if (ELF32_R_TYPE (irel->r_info) != R_RL78_RH_RELAX)
2083 continue;
2084
2085 if (irel->r_addend & RL78_RELAXA_ALIGN
2086 || next_alignment == internal_relocs)
2087 {
2088 /* When we delete bytes, we need to maintain all the alignments
2089 indicated. In addition, we need to be careful about relaxing
2090 jumps across alignment boundaries - these displacements
2091 *grow* when we delete bytes. For now, don't shrink
2092 displacements across an alignment boundary, just in case.
2093 Note that this only affects relocations to the same
2094 section. */
2095 next_alignment += 2;
2096 while (next_alignment < irelend
2097 && (ELF32_R_TYPE (next_alignment->r_info) != R_RL78_RH_RELAX
2098 || !(next_alignment->r_addend & RL78_RELAXA_ELIGN)))
2099 next_alignment ++;
2100 if (next_alignment >= irelend || next_alignment->r_offset == 0)
2101 next_alignment = NULL;
2102 }
2103
2104 /* When we hit alignment markers, see if we've shrunk enough
2105 before them to reduce the gap without violating the alignment
2106 requirements. */
2107 if (irel->r_addend & RL78_RELAXA_ALIGN)
2108 {
2109 /* At this point, the next relocation *should* be the ELIGN
2110 end marker. */
2111 Elf_Internal_Rela *erel = irel + 1;
2112 unsigned int alignment, nbytes;
2113
2114 if (ELF32_R_TYPE (erel->r_info) != R_RL78_RH_RELAX)
2115 continue;
2116 if (!(erel->r_addend & RL78_RELAXA_ELIGN))
2117 continue;
2118
2119 alignment = 1 << (irel->r_addend & RL78_RELAXA_ANUM);
2120
2121 if (erel->r_offset - irel->r_offset < alignment)
2122 continue;
2123
2124 nbytes = erel->r_offset - irel->r_offset;
2125 nbytes /= alignment;
2126 nbytes *= alignment;
2127
2128 elf32_rl78_relax_delete_bytes (abfd, sec, erel->r_offset-nbytes, nbytes, next_alignment,
2129 erel->r_offset == sec->size);
2130 *again = TRUE;
2131
2132 continue;
2133 }
2134
2135 if (irel->r_addend & RL78_RELAXA_ELIGN)
2136 continue;
2137
2138 insn = contents + irel->r_offset;
2139
2140 nrelocs = irel->r_addend & RL78_RELAXA_RNUM;
2141
2142 /* At this point, we have an insn that is a candidate for linker
2143 relaxation. There are NRELOCS relocs following that may be
2144 relaxed, although each reloc may be made of more than one
2145 reloc entry (such as gp-rel symbols). */
2146
2147 /* Get the value of the symbol referred to by the reloc. Just
2148 in case this is the last reloc in the list, use the RL's
2149 addend to choose between this reloc (no addend) or the next
2150 (yes addend, which means at least one following reloc). */
2151
2152 /* srel points to the "current" reloction for this insn -
2153 actually the last reloc for a given operand, which is the one
2154 we need to update. We check the relaxations in the same
2155 order that the relocations happen, so we'll just push it
2156 along as we go. */
2157 srel = irel;
2158
2159 pc = sec->output_section->vma + sec->output_offset
2160 + srel->r_offset;
2161
2162 #define GET_RELOC \
2163 BFD_ASSERT (nrelocs > 0); \
2164 symval = OFFSET_FOR_RELOC (srel, &srel, &scale); \
2165 pcrel = symval - pc + srel->r_addend; \
2166 nrelocs --;
2167
2168 #define SNIPNR(offset, nbytes) \
2169 elf32_rl78_relax_delete_bytes (abfd, sec, (insn - contents) + offset, nbytes, next_alignment, 0);
2170 #define SNIP(offset, nbytes, newtype) \
2171 SNIPNR (offset, nbytes); \
2172 srel->r_info = ELF32_R_INFO (ELF32_R_SYM (srel->r_info), newtype)
2173
2174 /* The order of these bit tests must match the order that the
2175 relocs appear in. Since we sorted those by offset, we can
2176 predict them. */
2177
2178 /*----------------------------------------------------------------------*/
2179 /* EF ad BR $rel8 pcrel
2180 ED al ah BR !abs16 abs
2181 EE al ah BR $!rel16 pcrel
2182 EC al ah as BR !!abs20 abs
2183
2184 FD al ah CALL !abs16 abs
2185 FE al ah CALL $!rel16 pcrel
2186 FC al ah as CALL !!abs20 abs
2187
2188 DC ad BC $rel8
2189 DE ad BNC $rel8
2190 DD ad BZ $rel8
2191 DF ad BNZ $rel8
2192 61 C3 ad BH $rel8
2193 61 D3 ad BNH $rel8
2194 61 C8 EF ad SKC ; BR $rel8
2195 61 D8 EF ad SKNC ; BR $rel8
2196 61 E8 EF ad SKZ ; BR $rel8
2197 61 F8 EF ad SKNZ ; BR $rel8
2198 61 E3 EF ad SKH ; BR $rel8
2199 61 F3 EF ad SKNH ; BR $rel8
2200 */
2201
2202 if ((irel->r_addend & RL78_RELAXA_MASK) == RL78_RELAXA_BRA)
2203 {
2204 /* SKIP opcodes that skip non-branches will have a relax tag
2205 but no corresponding symbol to relax against; we just
2206 skip those. */
2207 if (irel->r_addend & RL78_RELAXA_RNUM)
2208 {
2209 GET_RELOC;
2210 }
2211
2212 switch (insn[0])
2213 {
2214 case 0xec: /* BR !!abs20 */
2215
2216 if (pcrel < 127
2217 && pcrel > -127)
2218 {
2219 insn[0] = 0xef;
2220 insn[1] = pcrel;
2221 SNIP (2, 2, R_RL78_DIR8S_PCREL);
2222 *again = TRUE;
2223 }
2224 else if (symval < 65536)
2225 {
2226 insn[0] = 0xed;
2227 insn[1] = symval & 0xff;
2228 insn[2] = symval >> 8;
2229 SNIP (2, 1, R_RL78_DIR16S);
2230 *again = TRUE;
2231 }
2232 else if (pcrel < 32767
2233 && pcrel > -32767)
2234 {
2235 insn[0] = 0xee;
2236 insn[1] = pcrel & 0xff;
2237 insn[2] = pcrel >> 8;
2238 SNIP (2, 1, R_RL78_DIR16S_PCREL);
2239 *again = TRUE;
2240 }
2241 break;
2242
2243 case 0xee: /* BR $!pcrel16 */
2244 case 0xed: /* BR $!abs16 */
2245 if (pcrel < 127
2246 && pcrel > -127)
2247 {
2248 insn[0] = 0xef;
2249 insn[1] = pcrel;
2250 SNIP (2, 1, R_RL78_DIR8S_PCREL);
2251 *again = TRUE;
2252 }
2253 break;
2254
2255 case 0xfc: /* CALL !!abs20 */
2256 if (symval < 65536)
2257 {
2258 insn[0] = 0xfd;
2259 insn[1] = symval & 0xff;
2260 insn[2] = symval >> 8;
2261 SNIP (2, 1, R_RL78_DIR16S);
2262 *again = TRUE;
2263 }
2264 else if (pcrel < 32767
2265 && pcrel > -32767)
2266 {
2267 insn[0] = 0xfe;
2268 insn[1] = pcrel & 0xff;
2269 insn[2] = pcrel >> 8;
2270 SNIP (2, 1, R_RL78_DIR16S_PCREL);
2271 *again = TRUE;
2272 }
2273 break;
2274
2275 case 0x61: /* PREFIX */
2276 /* For SKIP/BR, we change the BR opcode and delete the
2277 SKIP. That way, we don't have to find and change the
2278 relocation for the BR. */
2279 /* Note that, for the case where we're skipping some
2280 other insn, we have no "other" reloc but that's safe
2281 here anyway. */
2282 switch (insn[1])
2283 {
2284 case 0xc8: /* SKC */
2285 if (insn[2] == 0xef)
2286 {
2287 insn[2] = 0xde; /* BNC */
2288 SNIPNR (0, 2);
2289 }
2290 break;
2291
2292 case 0xd8: /* SKNC */
2293 if (insn[2] == 0xef)
2294 {
2295 insn[2] = 0xdc; /* BC */
2296 SNIPNR (0, 2);
2297 }
2298 break;
2299
2300 case 0xe8: /* SKZ */
2301 if (insn[2] == 0xef)
2302 {
2303 insn[2] = 0xdf; /* BNZ */
2304 SNIPNR (0, 2);
2305 }
2306 break;
2307
2308 case 0xf8: /* SKNZ */
2309 if (insn[2] == 0xef)
2310 {
2311 insn[2] = 0xdd; /* BZ */
2312 SNIPNR (0, 2);
2313 }
2314 break;
2315
2316 case 0xe3: /* SKH */
2317 if (insn[2] == 0xef)
2318 {
2319 insn[2] = 0xd3; /* BNH */
2320 SNIPNR (1, 1); /* we reuse the 0x61 prefix from the SKH */
2321 }
2322 break;
2323
2324 case 0xf3: /* SKNH */
2325 if (insn[2] == 0xef)
2326 {
2327 insn[2] = 0xc3; /* BH */
2328 SNIPNR (1, 1); /* we reuse the 0x61 prefix from the SKH */
2329 }
2330 break;
2331 }
2332 break;
2333 }
2334
2335 }
2336
2337 if ((irel->r_addend & RL78_RELAXA_MASK) == RL78_RELAXA_ADDR16)
2338 {
2339 /*----------------------------------------------------------------------*/
2340 /* Some insns have both a 16-bit address operand and an 8-bit
2341 variant if the address is within a special range:
2342
2343 Address 16-bit operand SADDR range SFR range
2344 FFF00-FFFFF 0xff00-0xffff 0x00-0xff
2345 FFE20-FFF1F 0xfe20-0xff1f 0x00-0xff
2346
2347 The RELAX_ADDR16[] array has the insn encodings for the
2348 16-bit operand version, as well as the SFR and SADDR
2349 variants. We only need to replace the encodings and
2350 adjust the operand.
2351
2352 Note: we intentionally do not attempt to decode and skip
2353 any ES: prefix, as adding ES: means the addr16 (likely)
2354 no longer points to saddr/sfr space.
2355 */
2356
2357 int is_sfr;
2358 int is_saddr;
2359 int idx;
2360 int poff;
2361
2362 GET_RELOC;
2363
2364 if (0xffe20 <= symval && symval <= 0xfffff)
2365 {
2366
2367 is_saddr = (0xffe20 <= symval && symval <= 0xfff1f);
2368 is_sfr = (0xfff00 <= symval && symval <= 0xfffff);
2369
2370 for (idx = 0; relax_addr16[idx].insn != -1; idx ++)
2371 {
2372 if (relax_addr16[idx].prefix != -1
2373 && insn[0] == relax_addr16[idx].prefix
2374 && insn[1] == relax_addr16[idx].insn)
2375 {
2376 poff = 1;
2377 }
2378 else if (relax_addr16[idx].prefix == -1
2379 && insn[0] == relax_addr16[idx].insn)
2380 {
2381 poff = 0;
2382 }
2383 else
2384 continue;
2385
2386 /* We have a matched insn, and poff is 0 or 1 depending
2387 on the base pattern size. */
2388
2389 if (is_sfr && relax_addr16[idx].insn_for_sfr != -1)
2390 {
2391 insn[poff] = relax_addr16[idx].insn_for_sfr;
2392 SNIP (poff+2, 1, R_RL78_RH_SFR);
2393 }
2394
2395 else if (is_saddr && relax_addr16[idx].insn_for_saddr != -1)
2396 {
2397 insn[poff] = relax_addr16[idx].insn_for_saddr;
2398 SNIP (poff+2, 1, R_RL78_RH_SADDR);
2399 }
2400
2401 }
2402 }
2403 }
2404
2405 /*----------------------------------------------------------------------*/
2406
2407 }
2408
2409 return TRUE;
2410
2411 error_return:
2412 if (free_relocs != NULL)
2413 free (free_relocs);
2414
2415 if (free_contents != NULL)
2416 free (free_contents);
2417
2418 if (shndx_buf != NULL)
2419 {
2420 shndx_hdr->contents = NULL;
2421 free (shndx_buf);
2422 }
2423
2424 if (free_intsyms != NULL)
2425 free (free_intsyms);
2426
2427 return TRUE;
2428 }
2429
2430
2431
2432 #define ELF_ARCH bfd_arch_rl78
2433 #define ELF_MACHINE_CODE EM_RL78
2434 #define ELF_MAXPAGESIZE 0x1000
2435
2436 #define TARGET_LITTLE_SYM rl78_elf32_vec
2437 #define TARGET_LITTLE_NAME "elf32-rl78"
2438
2439 #define elf_info_to_howto_rel NULL
2440 #define elf_info_to_howto rl78_info_to_howto_rela
2441 #define elf_backend_object_p rl78_elf_object_p
2442 #define elf_backend_relocate_section rl78_elf_relocate_section
2443 #define elf_symbol_leading_char ('_')
2444 #define elf_backend_can_gc_sections 1
2445
2446 #define bfd_elf32_bfd_reloc_type_lookup rl78_reloc_type_lookup
2447 #define bfd_elf32_bfd_reloc_name_lookup rl78_reloc_name_lookup
2448 #define bfd_elf32_bfd_set_private_flags rl78_elf_set_private_flags
2449 #define bfd_elf32_bfd_merge_private_bfd_data rl78_elf_merge_private_bfd_data
2450 #define bfd_elf32_bfd_print_private_bfd_data rl78_elf_print_private_bfd_data
2451
2452 #define bfd_elf32_bfd_relax_section rl78_elf_relax_section
2453 #define elf_backend_check_relocs rl78_elf_check_relocs
2454 #define elf_backend_always_size_sections \
2455 rl78_elf_always_size_sections
2456 #define elf_backend_finish_dynamic_sections \
2457 rl78_elf_finish_dynamic_sections
2458
2459 #include "elf32-target.h"
2460