1 /*
2 * Copyright (c) 2015 The WebM project authors. All Rights Reserved.
3 *
4 * Use of this source code is governed by a BSD-style license
5 * that can be found in the LICENSE file in the root of the source
6 * tree. An additional intellectual property rights grant can be found
7 * in the file PATENTS. All contributing project authors may
8 * be found in the AUTHORS file in the root of the source tree.
9 */
10
11 #include <assert.h>
12
13 #include "vp9/common/vp9_enums.h"
14 #include "vp9/encoder/mips/msa/vp9_fdct_msa.h"
15
vp9_fwht4x4_msa(const int16_t * input,int16_t * output,int32_t src_stride)16 void vp9_fwht4x4_msa(const int16_t *input, int16_t *output,
17 int32_t src_stride) {
18 v8i16 in0, in1, in2, in3, in4;
19
20 LD_SH4(input, src_stride, in0, in1, in2, in3);
21
22 in0 += in1;
23 in3 -= in2;
24 in4 = (in0 - in3) >> 1;
25 SUB2(in4, in1, in4, in2, in1, in2);
26 in0 -= in2;
27 in3 += in1;
28
29 TRANSPOSE4x4_SH_SH(in0, in2, in3, in1, in0, in2, in3, in1);
30
31 in0 += in2;
32 in1 -= in3;
33 in4 = (in0 - in1) >> 1;
34 SUB2(in4, in2, in4, in3, in2, in3);
35 in0 -= in3;
36 in1 += in2;
37
38 SLLI_4V(in0, in1, in2, in3, 2);
39
40 TRANSPOSE4x4_SH_SH(in0, in3, in1, in2, in0, in3, in1, in2);
41
42 ST4x2_UB(in0, output, 4);
43 ST4x2_UB(in3, output + 4, 4);
44 ST4x2_UB(in1, output + 8, 4);
45 ST4x2_UB(in2, output + 12, 4);
46 }
47
vp9_fht4x4_msa(const int16_t * input,int16_t * output,int32_t stride,int32_t tx_type)48 void vp9_fht4x4_msa(const int16_t *input, int16_t *output, int32_t stride,
49 int32_t tx_type) {
50 v8i16 in0, in1, in2, in3;
51
52 LD_SH4(input, stride, in0, in1, in2, in3);
53
54 /* fdct4 pre-process */
55 {
56 v8i16 temp, mask;
57 v16i8 zero = { 0 };
58 v16i8 one = __msa_ldi_b(1);
59
60 mask = (v8i16)__msa_sldi_b(zero, one, 15);
61 SLLI_4V(in0, in1, in2, in3, 4);
62 temp = __msa_ceqi_h(in0, 0);
63 temp = (v8i16)__msa_xori_b((v16u8)temp, 255);
64 temp = mask & temp;
65 in0 += temp;
66 }
67
68 switch (tx_type) {
69 case DCT_DCT:
70 VP9_FDCT4(in0, in1, in2, in3, in0, in1, in2, in3);
71 TRANSPOSE4x4_SH_SH(in0, in1, in2, in3, in0, in1, in2, in3);
72 VP9_FDCT4(in0, in1, in2, in3, in0, in1, in2, in3);
73 break;
74 case ADST_DCT:
75 VP9_FADST4(in0, in1, in2, in3, in0, in1, in2, in3);
76 TRANSPOSE4x4_SH_SH(in0, in1, in2, in3, in0, in1, in2, in3);
77 VP9_FDCT4(in0, in1, in2, in3, in0, in1, in2, in3);
78 break;
79 case DCT_ADST:
80 VP9_FDCT4(in0, in1, in2, in3, in0, in1, in2, in3);
81 TRANSPOSE4x4_SH_SH(in0, in1, in2, in3, in0, in1, in2, in3);
82 VP9_FADST4(in0, in1, in2, in3, in0, in1, in2, in3);
83 break;
84 case ADST_ADST:
85 VP9_FADST4(in0, in1, in2, in3, in0, in1, in2, in3);
86 TRANSPOSE4x4_SH_SH(in0, in1, in2, in3, in0, in1, in2, in3);
87 VP9_FADST4(in0, in1, in2, in3, in0, in1, in2, in3);
88 break;
89 default:
90 assert(0);
91 break;
92 }
93
94 TRANSPOSE4x4_SH_SH(in0, in1, in2, in3, in0, in1, in2, in3);
95 ADD4(in0, 1, in1, 1, in2, 1, in3, 1, in0, in1, in2, in3);
96 SRA_4V(in0, in1, in2, in3, 2);
97 PCKEV_D2_SH(in1, in0, in3, in2, in0, in2);
98 ST_SH2(in0, in2, output, 8);
99 }
100