1# source file to test assembly of mips32r2 *non-fp* instructions
2
3        .set noreorder
4	.set noat
5
6	.text
7text_label:
8
9      # unprivileged CPU instructions
10
11	ehb
12
13	ext	$4, $5, 6, 8
14
15	ins	$4, $5, 6, 8
16
17	jalr.hb	$8
18	jalr.hb $20, $9
19
20	jr.hb	$8
21
22	# Note, further testing of rdhwr is done in hwr-names-mips32r2.d
23	rdhwr	$10, $0
24	rdhwr	$11, $1
25	rdhwr	$12, $2
26	rdhwr	$13, $3
27	rdhwr	$14, $4
28	rdhwr	$15, $5
29
30	# This file checks that in fact HW rotate will
31	# be used for this arch, and checks assembly
32	# of the official MIPS mnemonics.  (Note that disassembly
33	# uses the traditional "ror" and "rorv" mnemonics.)
34	# Additional rotate tests are done by rol-hw.d.
35	rotl	$25, $10, 4
36	rotr	$25, $10, 4
37	rotl	$25, $10, $4
38	rotr	$25, $10, $4
39	rotrv	$25, $10, $4
40
41	seb	$7
42	seb	$8, $10
43
44	seh	$7
45	seh	$8, $10
46
47	synci	0x5555($10)
48
49	wsbh	$7
50	wsbh	$8, $10
51
52      # cp0 instructions
53
54	di
55	di	$0
56	di	$10
57
58	ei
59	ei	$0
60	ei	$10
61
62	rdpgpr	$10, $25
63
64	wrpgpr	$10, $25
65
66	pause
67
68# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ...
69	.space  8
70