1 /* 2 * Copyright (c) 2011 Intel Corporation. All Rights Reserved. 3 * Copyright (c) Imagination Technologies Limited, UK 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the 7 * "Software"), to deal in the Software without restriction, including 8 * without limitation the rights to use, copy, modify, merge, publish, 9 * distribute, sub license, and/or sell copies of the Software, and to 10 * permit persons to whom the Software is furnished to do so, subject to 11 * the following conditions: 12 * 13 * The above copyright notice and this permission notice (including the 14 * next paragraph) shall be included in all copies or substantial portions 15 * of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 18 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 20 * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR 21 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 22 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 23 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 24 */ 25 26 27 /****************************************************************************** 28 29 @File msvdx_rendec_vc1_reg_io2.h 30 31 @Title MSVDX Offsets 32 33 @Platform </b>\n 34 35 @Description </b>\n This file contains the MSVDX_RENDEC_VC1_REG_IO2_H 36 Defintions. 37 38 ******************************************************************************/ 39 #if !defined (__MSVDX_RENDEC_VC1_REG_IO2_H__) 40 #define __MSVDX_RENDEC_VC1_REG_IO2_H__ 41 42 #ifdef __cplusplus 43 extern "C" { 44 #endif 45 46 47 #define VC1_RENDEC_CMD_VC1GEN00_OFFSET (0x0000) 48 49 // VC1_RENDEC_CMD VC1GEN00 ADDRESS 50 #define VC1_RENDEC_CMD_VC1GEN00_ADDRESS_MASK (0x00FFFFFF) 51 #define VC1_RENDEC_CMD_VC1GEN00_ADDRESS_LSBMASK (0x00FFFFFF) 52 #define VC1_RENDEC_CMD_VC1GEN00_ADDRESS_SHIFT (0) 53 54 #define VC1_RENDEC_CMD_VC1SEQUENCE00_OFFSET (0x0004) 55 56 // VC1_RENDEC_CMD VC1SEQUENCE00 PICTURE_HEIGHT 57 #define VC1_RENDEC_CMD_VC1SEQUENCE00_PICTURE_HEIGHT_MASK (0x00FFF000) 58 #define VC1_RENDEC_CMD_VC1SEQUENCE00_PICTURE_HEIGHT_LSBMASK (0x00000FFF) 59 #define VC1_RENDEC_CMD_VC1SEQUENCE00_PICTURE_HEIGHT_SHIFT (12) 60 61 // VC1_RENDEC_CMD VC1SEQUENCE00 PICTURE_WIDTH 62 #define VC1_RENDEC_CMD_VC1SEQUENCE00_PICTURE_WIDTH_MASK (0x00000FFF) 63 #define VC1_RENDEC_CMD_VC1SEQUENCE00_PICTURE_WIDTH_LSBMASK (0x00000FFF) 64 #define VC1_RENDEC_CMD_VC1SEQUENCE00_PICTURE_WIDTH_SHIFT (0) 65 66 #define VC1_RENDEC_CMD_VC1SEQUENCE01_OFFSET (0x0008) 67 68 // VC1_RENDEC_CMD VC1SEQUENCE01 CHROMA_INTERLEAVED 69 #define VC1_RENDEC_CMD_VC1SEQUENCE01_CHROMA_INTERLEAVED_MASK (0x08000000) 70 #define VC1_RENDEC_CMD_VC1SEQUENCE01_CHROMA_INTERLEAVED_LSBMASK (0x00000001) 71 #define VC1_RENDEC_CMD_VC1SEQUENCE01_CHROMA_INTERLEAVED_SHIFT (27) 72 73 // VC1_RENDEC_CMD VC1SEQUENCE01 ROW_STRIDE 74 #define VC1_RENDEC_CMD_VC1SEQUENCE01_ROW_STRIDE_MASK (0x07000000) 75 #define VC1_RENDEC_CMD_VC1SEQUENCE01_ROW_STRIDE_LSBMASK (0x00000007) 76 #define VC1_RENDEC_CMD_VC1SEQUENCE01_ROW_STRIDE_SHIFT (24) 77 78 // VC1_RENDEC_CMD VC1SEQUENCE01 CODEC_PROFILE 79 #define VC1_RENDEC_CMD_VC1SEQUENCE01_CODEC_PROFILE_MASK (0x00300000) 80 #define VC1_RENDEC_CMD_VC1SEQUENCE01_CODEC_PROFILE_LSBMASK (0x00000003) 81 #define VC1_RENDEC_CMD_VC1SEQUENCE01_CODEC_PROFILE_SHIFT (20) 82 83 // VC1_RENDEC_CMD VC1SEQUENCE01 CODEC_MODE 84 #define VC1_RENDEC_CMD_VC1SEQUENCE01_CODEC_MODE_MASK (0x00070000) 85 #define VC1_RENDEC_CMD_VC1SEQUENCE01_CODEC_MODE_LSBMASK (0x00000007) 86 #define VC1_RENDEC_CMD_VC1SEQUENCE01_CODEC_MODE_SHIFT (16) 87 88 // VC1_RENDEC_CMD VC1SEQUENCE01 ASYNC_MODE 89 #define VC1_RENDEC_CMD_VC1SEQUENCE01_ASYNC_MODE_MASK (0x00006000) 90 #define VC1_RENDEC_CMD_VC1SEQUENCE01_ASYNC_MODE_LSBMASK (0x00000003) 91 #define VC1_RENDEC_CMD_VC1SEQUENCE01_ASYNC_MODE_SHIFT (13) 92 93 // VC1_RENDEC_CMD VC1SEQUENCE01 CHROMA_FORMAT 94 #define VC1_RENDEC_CMD_VC1SEQUENCE01_CHROMA_FORMAT_MASK (0x00001000) 95 #define VC1_RENDEC_CMD_VC1SEQUENCE01_CHROMA_FORMAT_LSBMASK (0x00000001) 96 #define VC1_RENDEC_CMD_VC1SEQUENCE01_CHROMA_FORMAT_SHIFT (12) 97 98 // VC1_RENDEC_CMD VC1SEQUENCE01 INTERLACED 99 #define VC1_RENDEC_CMD_VC1SEQUENCE01_INTERLACED_MASK (0x00000800) 100 #define VC1_RENDEC_CMD_VC1SEQUENCE01_INTERLACED_LSBMASK (0x00000001) 101 #define VC1_RENDEC_CMD_VC1SEQUENCE01_INTERLACED_SHIFT (11) 102 103 // VC1_RENDEC_CMD VC1SEQUENCE01 VC1_OVERLAP 104 #define VC1_RENDEC_CMD_VC1SEQUENCE01_VC1_OVERLAP_MASK (0x00000400) 105 #define VC1_RENDEC_CMD_VC1SEQUENCE01_VC1_OVERLAP_LSBMASK (0x00000001) 106 #define VC1_RENDEC_CMD_VC1SEQUENCE01_VC1_OVERLAP_SHIFT (10) 107 108 // VC1_RENDEC_CMD VC1SEQUENCE01 PIC_CONDOVER 109 #define VC1_RENDEC_CMD_VC1SEQUENCE01_PIC_CONDOVER_MASK (0x00000300) 110 #define VC1_RENDEC_CMD_VC1SEQUENCE01_PIC_CONDOVER_LSBMASK (0x00000003) 111 #define VC1_RENDEC_CMD_VC1SEQUENCE01_PIC_CONDOVER_SHIFT (8) 112 113 // VC1_RENDEC_CMD VC1SEQUENCE01 SEQ01_RESERVED 114 #define VC1_RENDEC_CMD_VC1SEQUENCE01_SEQ01_RESERVED_MASK (0x000000E0) 115 #define VC1_RENDEC_CMD_VC1SEQUENCE01_SEQ01_RESERVED_LSBMASK (0x00000007) 116 #define VC1_RENDEC_CMD_VC1SEQUENCE01_SEQ01_RESERVED_SHIFT (5) 117 118 // VC1_RENDEC_CMD VC1SEQUENCE01 PIC_QUANT 119 #define VC1_RENDEC_CMD_VC1SEQUENCE01_PIC_QUANT_MASK (0x0000001F) 120 #define VC1_RENDEC_CMD_VC1SEQUENCE01_PIC_QUANT_LSBMASK (0x0000001F) 121 #define VC1_RENDEC_CMD_VC1SEQUENCE01_PIC_QUANT_SHIFT (0) 122 123 #define VC1_RENDEC_CMD_VC1SLICE00_OFFSET (0x000C) 124 125 // VC1_RENDEC_CMD VC1SLICE00 CONFIG_REF_OFFSET 126 #define VC1_RENDEC_CMD_VC1SLICE00_CONFIG_REF_OFFSET_MASK (0x00FFF000) 127 #define VC1_RENDEC_CMD_VC1SLICE00_CONFIG_REF_OFFSET_LSBMASK (0x00000FFF) 128 #define VC1_RENDEC_CMD_VC1SLICE00_CONFIG_REF_OFFSET_SHIFT (12) 129 130 // VC1_RENDEC_CMD VC1SLICE00 CONFIG_ROW_OFFSET 131 #define VC1_RENDEC_CMD_VC1SLICE00_CONFIG_ROW_OFFSET_MASK (0x00000FFF) 132 #define VC1_RENDEC_CMD_VC1SLICE00_CONFIG_ROW_OFFSET_LSBMASK (0x00000FFF) 133 #define VC1_RENDEC_CMD_VC1SLICE00_CONFIG_ROW_OFFSET_SHIFT (0) 134 135 #define VC1_RENDEC_CMD_VC1SLICE01_OFFSET (0x0010) 136 137 // VC1_RENDEC_CMD VC1SLICE01 VC1_LUMSHIFT2 138 #define VC1_RENDEC_CMD_VC1SLICE01_VC1_LUMSHIFT2_MASK (0x00FC0000) 139 #define VC1_RENDEC_CMD_VC1SLICE01_VC1_LUMSHIFT2_LSBMASK (0x0000003F) 140 #define VC1_RENDEC_CMD_VC1SLICE01_VC1_LUMSHIFT2_SHIFT (18) 141 142 // VC1_RENDEC_CMD VC1SLICE01 VC1_LUMSCALE2 143 #define VC1_RENDEC_CMD_VC1SLICE01_VC1_LUMSCALE2_MASK (0x0003F000) 144 #define VC1_RENDEC_CMD_VC1SLICE01_VC1_LUMSCALE2_LSBMASK (0x0000003F) 145 #define VC1_RENDEC_CMD_VC1SLICE01_VC1_LUMSCALE2_SHIFT (12) 146 147 // VC1_RENDEC_CMD VC1SLICE01 VC1_LUMSHIFT1 148 #define VC1_RENDEC_CMD_VC1SLICE01_VC1_LUMSHIFT1_MASK (0x00000FC0) 149 #define VC1_RENDEC_CMD_VC1SLICE01_VC1_LUMSHIFT1_LSBMASK (0x0000003F) 150 #define VC1_RENDEC_CMD_VC1SLICE01_VC1_LUMSHIFT1_SHIFT (6) 151 152 // VC1_RENDEC_CMD VC1SLICE01 VC1_LUMSCALE1 153 #define VC1_RENDEC_CMD_VC1SLICE01_VC1_LUMSCALE1_MASK (0x0000003F) 154 #define VC1_RENDEC_CMD_VC1SLICE01_VC1_LUMSCALE1_LSBMASK (0x0000003F) 155 #define VC1_RENDEC_CMD_VC1SLICE01_VC1_LUMSCALE1_SHIFT (0) 156 157 #define VC1_RENDEC_CMD_VC1SLICE02_OFFSET (0x0014) 158 159 // VC1_RENDEC_CMD VC1SLICE02 VC1_PREV_INT_COMP 160 #define VC1_RENDEC_CMD_VC1SLICE02_VC1_PREV_INT_COMP_MASK (0x0C000000) 161 #define VC1_RENDEC_CMD_VC1SLICE02_VC1_PREV_INT_COMP_LSBMASK (0x00000003) 162 #define VC1_RENDEC_CMD_VC1SLICE02_VC1_PREV_INT_COMP_SHIFT (26) 163 164 // VC1_RENDEC_CMD VC1SLICE02 VC1_BACK_INT_COMP 165 #define VC1_RENDEC_CMD_VC1SLICE02_VC1_BACK_INT_COMP_MASK (0x03000000) 166 #define VC1_RENDEC_CMD_VC1SLICE02_VC1_BACK_INT_COMP_LSBMASK (0x00000003) 167 #define VC1_RENDEC_CMD_VC1SLICE02_VC1_BACK_INT_COMP_SHIFT (24) 168 169 // VC1_RENDEC_CMD VC1SLICE02 RND_CTRL_BIT 170 #define VC1_RENDEC_CMD_VC1SLICE02_RND_CTRL_BIT_MASK (0x00400000) 171 #define VC1_RENDEC_CMD_VC1SLICE02_RND_CTRL_BIT_LSBMASK (0x00000001) 172 #define VC1_RENDEC_CMD_VC1SLICE02_RND_CTRL_BIT_SHIFT (22) 173 174 // VC1_RENDEC_CMD VC1SLICE02 MODE_CONFIG 175 #define VC1_RENDEC_CMD_VC1SLICE02_MODE_CONFIG_MASK (0x003E0000) 176 #define VC1_RENDEC_CMD_VC1SLICE02_MODE_CONFIG_LSBMASK (0x0000001F) 177 #define VC1_RENDEC_CMD_VC1SLICE02_MODE_CONFIG_SHIFT (17) 178 179 // VC1_RENDEC_CMD VC1SLICE02 SUBPEL_FILTER_MODE 180 #define VC1_RENDEC_CMD_VC1SLICE02_SUBPEL_FILTER_MODE_MASK (0x00010000) 181 #define VC1_RENDEC_CMD_VC1SLICE02_SUBPEL_FILTER_MODE_LSBMASK (0x00000001) 182 #define VC1_RENDEC_CMD_VC1SLICE02_SUBPEL_FILTER_MODE_SHIFT (16) 183 184 // VC1_RENDEC_CMD VC1SLICE02 VC1_FASTUVMC 185 #define VC1_RENDEC_CMD_VC1SLICE02_VC1_FASTUVMC_MASK (0x00008000) 186 #define VC1_RENDEC_CMD_VC1SLICE02_VC1_FASTUVMC_LSBMASK (0x00000001) 187 #define VC1_RENDEC_CMD_VC1SLICE02_VC1_FASTUVMC_SHIFT (15) 188 189 // VC1_RENDEC_CMD VC1SLICE02 VC1_LOOPFILTER 190 #define VC1_RENDEC_CMD_VC1SLICE02_VC1_LOOPFILTER_MASK (0x00004000) 191 #define VC1_RENDEC_CMD_VC1SLICE02_VC1_LOOPFILTER_LSBMASK (0x00000001) 192 #define VC1_RENDEC_CMD_VC1SLICE02_VC1_LOOPFILTER_SHIFT (14) 193 194 // VC1_RENDEC_CMD VC1SLICE02 SLICE02_RESERVED 195 #define VC1_RENDEC_CMD_VC1SLICE02_SLICE02_RESERVED_MASK (0x00003FF0) 196 #define VC1_RENDEC_CMD_VC1SLICE02_SLICE02_RESERVED_LSBMASK (0x000003FF) 197 #define VC1_RENDEC_CMD_VC1SLICE02_SLICE02_RESERVED_SHIFT (4) 198 199 // VC1_RENDEC_CMD VC1SLICE02 SLICE_FIELD_TYPE 200 #define VC1_RENDEC_CMD_VC1SLICE02_SLICE_FIELD_TYPE_MASK (0x0000000C) 201 #define VC1_RENDEC_CMD_VC1SLICE02_SLICE_FIELD_TYPE_LSBMASK (0x00000003) 202 #define VC1_RENDEC_CMD_VC1SLICE02_SLICE_FIELD_TYPE_SHIFT (2) 203 204 // VC1_RENDEC_CMD VC1SLICE02 SLICE_CODE_TYPE 205 #define VC1_RENDEC_CMD_VC1SLICE02_SLICE_CODE_TYPE_MASK (0x00000003) 206 #define VC1_RENDEC_CMD_VC1SLICE02_SLICE_CODE_TYPE_LSBMASK (0x00000003) 207 #define VC1_RENDEC_CMD_VC1SLICE02_SLICE_CODE_TYPE_SHIFT (0) 208 209 #define VC1_RENDEC_CMD_VC1SLICE03_OFFSET (0x0018) 210 211 // VC1_RENDEC_CMD VC1SLICE03 RANGE_MAPUV_FLAG 212 #define VC1_RENDEC_CMD_VC1SLICE03_RANGE_MAPUV_FLAG_MASK (0x00000080) 213 #define VC1_RENDEC_CMD_VC1SLICE03_RANGE_MAPUV_FLAG_LSBMASK (0x00000001) 214 #define VC1_RENDEC_CMD_VC1SLICE03_RANGE_MAPUV_FLAG_SHIFT (7) 215 216 // VC1_RENDEC_CMD VC1SLICE03 RANGE_MAPUV 217 #define VC1_RENDEC_CMD_VC1SLICE03_RANGE_MAPUV_MASK (0x00000070) 218 #define VC1_RENDEC_CMD_VC1SLICE03_RANGE_MAPUV_LSBMASK (0x00000007) 219 #define VC1_RENDEC_CMD_VC1SLICE03_RANGE_MAPUV_SHIFT (4) 220 221 // VC1_RENDEC_CMD VC1SLICE03 RANGE_MAPY_FLAG 222 #define VC1_RENDEC_CMD_VC1SLICE03_RANGE_MAPY_FLAG_MASK (0x00000008) 223 #define VC1_RENDEC_CMD_VC1SLICE03_RANGE_MAPY_FLAG_LSBMASK (0x00000001) 224 #define VC1_RENDEC_CMD_VC1SLICE03_RANGE_MAPY_FLAG_SHIFT (3) 225 226 // VC1_RENDEC_CMD VC1SLICE03 RANGE_MAPY 227 #define VC1_RENDEC_CMD_VC1SLICE03_RANGE_MAPY_MASK (0x00000007) 228 #define VC1_RENDEC_CMD_VC1SLICE03_RANGE_MAPY_LSBMASK (0x00000007) 229 #define VC1_RENDEC_CMD_VC1SLICE03_RANGE_MAPY_SHIFT (0) 230 231 #define VC1_RENDEC_CMD_VC1SLICE04_OFFSET (0x001C) 232 233 // VC1_RENDEC_CMD VC1SLICE04 VC1_LUMSHIFT_PREV 234 #define VC1_RENDEC_CMD_VC1SLICE04_VC1_LUMSHIFT_PREV_MASK (0x00FC0000) 235 #define VC1_RENDEC_CMD_VC1SLICE04_VC1_LUMSHIFT_PREV_LSBMASK (0x0000003F) 236 #define VC1_RENDEC_CMD_VC1SLICE04_VC1_LUMSHIFT_PREV_SHIFT (18) 237 238 // VC1_RENDEC_CMD VC1SLICE04 VC1_LUMSCALE_PREV 239 #define VC1_RENDEC_CMD_VC1SLICE04_VC1_LUMSCALE_PREV_MASK (0x0003F000) 240 #define VC1_RENDEC_CMD_VC1SLICE04_VC1_LUMSCALE_PREV_LSBMASK (0x0000003F) 241 #define VC1_RENDEC_CMD_VC1SLICE04_VC1_LUMSCALE_PREV_SHIFT (12) 242 243 // VC1_RENDEC_CMD VC1SLICE04 VC1_LUMSHIFT_BACK 244 #define VC1_RENDEC_CMD_VC1SLICE04_VC1_LUMSHIFT_BACK_MASK (0x00000FC0) 245 #define VC1_RENDEC_CMD_VC1SLICE04_VC1_LUMSHIFT_BACK_LSBMASK (0x0000003F) 246 #define VC1_RENDEC_CMD_VC1SLICE04_VC1_LUMSHIFT_BACK_SHIFT (6) 247 248 // VC1_RENDEC_CMD VC1SLICE04 VC1_LUMSCALE_BACK 249 #define VC1_RENDEC_CMD_VC1SLICE04_VC1_LUMSCALE_BACK_MASK (0x0000003F) 250 #define VC1_RENDEC_CMD_VC1SLICE04_VC1_LUMSCALE_BACK_LSBMASK (0x0000003F) 251 #define VC1_RENDEC_CMD_VC1SLICE04_VC1_LUMSCALE_BACK_SHIFT (0) 252 253 254 255 #ifdef __cplusplus 256 } 257 #endif 258 259 #endif /* __MSVDX_RENDEC_VC1_REG_IO2_H__ */ 260