1 /* 2 * Copyright (c) 2011 Intel Corporation. All Rights Reserved. 3 * Copyright (c) Imagination Technologies Limited, UK 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the 7 * "Software"), to deal in the Software without restriction, including 8 * without limitation the rights to use, copy, modify, merge, publish, 9 * distribute, sub license, and/or sell copies of the Software, and to 10 * permit persons to whom the Software is furnished to do so, subject to 11 * the following conditions: 12 * 13 * The above copyright notice and this permission notice (including the 14 * next paragraph) shall be included in all copies or substantial portions 15 * of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 18 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 20 * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR 21 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 22 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 23 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 24 */ 25 26 27 /***************************************************************************** 28 29 @File msvdx_vec_vp8_line_store_mem_io2.h 30 31 @Title MSVDX Offsets 32 33 @Platform </b>\n 34 35 @Description </b>\n This file contains the MSVDX_VEC_VP8_LINE_STORE_MEM_IO2_H Defintions. 36 37 ******************************************************************************/ 38 39 #if !defined (__MSVDX_VEC_VP8_LINE_STORE_MEM_IO2_H__) 40 #define __MSVDX_VEC_VP8_LINE_STORE_MEM_IO2_H__ 41 42 #ifdef __cplusplus 43 extern "C" { 44 #endif 45 46 47 #define MSVDX_VEC_LINE_STORE_RAM_MB_START_PROBS_REG_00_OFFSET (0x0800) 48 49 // MSVDX_VEC_LINE_STORE_RAM, MB_START_PROBS_REG_00, SEGMENT_ID_PROBS_00 50 #define MSVDX_VEC_LINE_STORE_RAM_MB_START_PROBS_REG_00_SEGMENT_ID_PROBS_00_MASK (0x000000FF) 51 #define MSVDX_VEC_LINE_STORE_RAM_MB_START_PROBS_REG_00_SEGMENT_ID_PROBS_00_LSBMASK (0x000000FF) 52 #define MSVDX_VEC_LINE_STORE_RAM_MB_START_PROBS_REG_00_SEGMENT_ID_PROBS_00_SHIFT (0) 53 #define MSVDX_VEC_LINE_STORE_RAM_MB_START_PROBS_REG_00_SEGMENT_ID_PROBS_00_SIGNED_FIELD IMG_FALSE 54 55 // MSVDX_VEC_LINE_STORE_RAM, MB_START_PROBS_REG_00, SEGMENT_ID_PROBS_01 56 #define MSVDX_VEC_LINE_STORE_RAM_MB_START_PROBS_REG_00_SEGMENT_ID_PROBS_01_MASK (0x0000FF00) 57 #define MSVDX_VEC_LINE_STORE_RAM_MB_START_PROBS_REG_00_SEGMENT_ID_PROBS_01_LSBMASK (0x000000FF) 58 #define MSVDX_VEC_LINE_STORE_RAM_MB_START_PROBS_REG_00_SEGMENT_ID_PROBS_01_SHIFT (8) 59 #define MSVDX_VEC_LINE_STORE_RAM_MB_START_PROBS_REG_00_SEGMENT_ID_PROBS_01_SIGNED_FIELD IMG_FALSE 60 61 // MSVDX_VEC_LINE_STORE_RAM, MB_START_PROBS_REG_00, SEGMENT_ID_PROBS_02 62 #define MSVDX_VEC_LINE_STORE_RAM_MB_START_PROBS_REG_00_SEGMENT_ID_PROBS_02_MASK (0x00FF0000) 63 #define MSVDX_VEC_LINE_STORE_RAM_MB_START_PROBS_REG_00_SEGMENT_ID_PROBS_02_LSBMASK (0x000000FF) 64 #define MSVDX_VEC_LINE_STORE_RAM_MB_START_PROBS_REG_00_SEGMENT_ID_PROBS_02_SHIFT (16) 65 #define MSVDX_VEC_LINE_STORE_RAM_MB_START_PROBS_REG_00_SEGMENT_ID_PROBS_02_SIGNED_FIELD IMG_FALSE 66 67 // MSVDX_VEC_LINE_STORE_RAM, MB_START_PROBS_REG_00, SKIP_FALSE_PROBS_00 68 #define MSVDX_VEC_LINE_STORE_RAM_MB_START_PROBS_REG_00_SKIP_FALSE_PROBS_00_MASK (0xFF000000) 69 #define MSVDX_VEC_LINE_STORE_RAM_MB_START_PROBS_REG_00_SKIP_FALSE_PROBS_00_LSBMASK (0x000000FF) 70 #define MSVDX_VEC_LINE_STORE_RAM_MB_START_PROBS_REG_00_SKIP_FALSE_PROBS_00_SHIFT (24) 71 #define MSVDX_VEC_LINE_STORE_RAM_MB_START_PROBS_REG_00_SKIP_FALSE_PROBS_00_SIGNED_FIELD IMG_FALSE 72 73 #define MSVDX_VEC_LINE_STORE_RAM_Y_MODE_PROBS_REG_00_OFFSET (0x0804) 74 75 // MSVDX_VEC_LINE_STORE_RAM, Y_MODE_PROBS_REG_00, Y_MODE_PROBS_00 76 #define MSVDX_VEC_LINE_STORE_RAM_Y_MODE_PROBS_REG_00_Y_MODE_PROBS_00_MASK (0x000000FF) 77 #define MSVDX_VEC_LINE_STORE_RAM_Y_MODE_PROBS_REG_00_Y_MODE_PROBS_00_LSBMASK (0x000000FF) 78 #define MSVDX_VEC_LINE_STORE_RAM_Y_MODE_PROBS_REG_00_Y_MODE_PROBS_00_SHIFT (0) 79 #define MSVDX_VEC_LINE_STORE_RAM_Y_MODE_PROBS_REG_00_Y_MODE_PROBS_00_SIGNED_FIELD IMG_FALSE 80 81 // MSVDX_VEC_LINE_STORE_RAM, Y_MODE_PROBS_REG_00, Y_MODE_PROBS_01 82 #define MSVDX_VEC_LINE_STORE_RAM_Y_MODE_PROBS_REG_00_Y_MODE_PROBS_01_MASK (0x0000FF00) 83 #define MSVDX_VEC_LINE_STORE_RAM_Y_MODE_PROBS_REG_00_Y_MODE_PROBS_01_LSBMASK (0x000000FF) 84 #define MSVDX_VEC_LINE_STORE_RAM_Y_MODE_PROBS_REG_00_Y_MODE_PROBS_01_SHIFT (8) 85 #define MSVDX_VEC_LINE_STORE_RAM_Y_MODE_PROBS_REG_00_Y_MODE_PROBS_01_SIGNED_FIELD IMG_FALSE 86 87 // MSVDX_VEC_LINE_STORE_RAM, Y_MODE_PROBS_REG_00, Y_MODE_PROBS_02 88 #define MSVDX_VEC_LINE_STORE_RAM_Y_MODE_PROBS_REG_00_Y_MODE_PROBS_02_MASK (0x00FF0000) 89 #define MSVDX_VEC_LINE_STORE_RAM_Y_MODE_PROBS_REG_00_Y_MODE_PROBS_02_LSBMASK (0x000000FF) 90 #define MSVDX_VEC_LINE_STORE_RAM_Y_MODE_PROBS_REG_00_Y_MODE_PROBS_02_SHIFT (16) 91 #define MSVDX_VEC_LINE_STORE_RAM_Y_MODE_PROBS_REG_00_Y_MODE_PROBS_02_SIGNED_FIELD IMG_FALSE 92 93 // MSVDX_VEC_LINE_STORE_RAM, Y_MODE_PROBS_REG_00, Y_MODE_PROBS_03 94 #define MSVDX_VEC_LINE_STORE_RAM_Y_MODE_PROBS_REG_00_Y_MODE_PROBS_03_MASK (0xFF000000) 95 #define MSVDX_VEC_LINE_STORE_RAM_Y_MODE_PROBS_REG_00_Y_MODE_PROBS_03_LSBMASK (0x000000FF) 96 #define MSVDX_VEC_LINE_STORE_RAM_Y_MODE_PROBS_REG_00_Y_MODE_PROBS_03_SHIFT (24) 97 #define MSVDX_VEC_LINE_STORE_RAM_Y_MODE_PROBS_REG_00_Y_MODE_PROBS_03_SIGNED_FIELD IMG_FALSE 98 99 #define MSVDX_VEC_LINE_STORE_RAM_UV_MODE_PROBS_REG_00_OFFSET (0x0808) 100 101 // MSVDX_VEC_LINE_STORE_RAM, UV_MODE_PROBS_REG_00, UV_MODE_PROBS_00 102 #define MSVDX_VEC_LINE_STORE_RAM_UV_MODE_PROBS_REG_00_UV_MODE_PROBS_00_MASK (0x000000FF) 103 #define MSVDX_VEC_LINE_STORE_RAM_UV_MODE_PROBS_REG_00_UV_MODE_PROBS_00_LSBMASK (0x000000FF) 104 #define MSVDX_VEC_LINE_STORE_RAM_UV_MODE_PROBS_REG_00_UV_MODE_PROBS_00_SHIFT (0) 105 #define MSVDX_VEC_LINE_STORE_RAM_UV_MODE_PROBS_REG_00_UV_MODE_PROBS_00_SIGNED_FIELD IMG_FALSE 106 107 // MSVDX_VEC_LINE_STORE_RAM, UV_MODE_PROBS_REG_00, UV_MODE_PROBS_01 108 #define MSVDX_VEC_LINE_STORE_RAM_UV_MODE_PROBS_REG_00_UV_MODE_PROBS_01_MASK (0x0000FF00) 109 #define MSVDX_VEC_LINE_STORE_RAM_UV_MODE_PROBS_REG_00_UV_MODE_PROBS_01_LSBMASK (0x000000FF) 110 #define MSVDX_VEC_LINE_STORE_RAM_UV_MODE_PROBS_REG_00_UV_MODE_PROBS_01_SHIFT (8) 111 #define MSVDX_VEC_LINE_STORE_RAM_UV_MODE_PROBS_REG_00_UV_MODE_PROBS_01_SIGNED_FIELD IMG_FALSE 112 113 // MSVDX_VEC_LINE_STORE_RAM, UV_MODE_PROBS_REG_00, UV_MODE_PROBS_02 114 #define MSVDX_VEC_LINE_STORE_RAM_UV_MODE_PROBS_REG_00_UV_MODE_PROBS_02_MASK (0x00FF0000) 115 #define MSVDX_VEC_LINE_STORE_RAM_UV_MODE_PROBS_REG_00_UV_MODE_PROBS_02_LSBMASK (0x000000FF) 116 #define MSVDX_VEC_LINE_STORE_RAM_UV_MODE_PROBS_REG_00_UV_MODE_PROBS_02_SHIFT (16) 117 #define MSVDX_VEC_LINE_STORE_RAM_UV_MODE_PROBS_REG_00_UV_MODE_PROBS_02_SIGNED_FIELD IMG_FALSE 118 119 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_00_OFFSET (0x080C) 120 121 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_00, KF_B_MODE_PROBS_00 122 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_00_KF_B_MODE_PROBS_00_MASK (0x000000FF) 123 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_00_KF_B_MODE_PROBS_00_LSBMASK (0x000000FF) 124 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_00_KF_B_MODE_PROBS_00_SHIFT (0) 125 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_00_KF_B_MODE_PROBS_00_SIGNED_FIELD IMG_FALSE 126 127 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_00, KF_B_MODE_PROBS_01 128 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_00_KF_B_MODE_PROBS_01_MASK (0x0000FF00) 129 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_00_KF_B_MODE_PROBS_01_LSBMASK (0x000000FF) 130 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_00_KF_B_MODE_PROBS_01_SHIFT (8) 131 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_00_KF_B_MODE_PROBS_01_SIGNED_FIELD IMG_FALSE 132 133 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_00, KF_B_MODE_PROBS_02 134 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_00_KF_B_MODE_PROBS_02_MASK (0x00FF0000) 135 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_00_KF_B_MODE_PROBS_02_LSBMASK (0x000000FF) 136 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_00_KF_B_MODE_PROBS_02_SHIFT (16) 137 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_00_KF_B_MODE_PROBS_02_SIGNED_FIELD IMG_FALSE 138 139 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_00, KF_B_MODE_PROBS_03 140 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_00_KF_B_MODE_PROBS_03_MASK (0xFF000000) 141 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_00_KF_B_MODE_PROBS_03_LSBMASK (0x000000FF) 142 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_00_KF_B_MODE_PROBS_03_SHIFT (24) 143 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_00_KF_B_MODE_PROBS_03_SIGNED_FIELD IMG_FALSE 144 145 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_01_OFFSET (0x0810) 146 147 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_01, KF_B_MODE_PROBS_04 148 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_01_KF_B_MODE_PROBS_04_MASK (0x000000FF) 149 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_01_KF_B_MODE_PROBS_04_LSBMASK (0x000000FF) 150 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_01_KF_B_MODE_PROBS_04_SHIFT (0) 151 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_01_KF_B_MODE_PROBS_04_SIGNED_FIELD IMG_FALSE 152 153 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_01, KF_B_MODE_PROBS_05 154 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_01_KF_B_MODE_PROBS_05_MASK (0x0000FF00) 155 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_01_KF_B_MODE_PROBS_05_LSBMASK (0x000000FF) 156 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_01_KF_B_MODE_PROBS_05_SHIFT (8) 157 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_01_KF_B_MODE_PROBS_05_SIGNED_FIELD IMG_FALSE 158 159 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_01, KF_B_MODE_PROBS_06 160 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_01_KF_B_MODE_PROBS_06_MASK (0x00FF0000) 161 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_01_KF_B_MODE_PROBS_06_LSBMASK (0x000000FF) 162 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_01_KF_B_MODE_PROBS_06_SHIFT (16) 163 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_01_KF_B_MODE_PROBS_06_SIGNED_FIELD IMG_FALSE 164 165 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_01, KF_B_MODE_PROBS_07 166 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_01_KF_B_MODE_PROBS_07_MASK (0xFF000000) 167 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_01_KF_B_MODE_PROBS_07_LSBMASK (0x000000FF) 168 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_01_KF_B_MODE_PROBS_07_SHIFT (24) 169 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_01_KF_B_MODE_PROBS_07_SIGNED_FIELD IMG_FALSE 170 171 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_02_OFFSET (0x0814) 172 173 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_02, KF_B_MODE_PROBS_08 174 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_02_KF_B_MODE_PROBS_08_MASK (0x000000FF) 175 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_02_KF_B_MODE_PROBS_08_LSBMASK (0x000000FF) 176 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_02_KF_B_MODE_PROBS_08_SHIFT (0) 177 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_02_KF_B_MODE_PROBS_08_SIGNED_FIELD IMG_FALSE 178 179 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_02, KF_B_MODE_PROBS_09 180 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_02_KF_B_MODE_PROBS_09_MASK (0x0000FF00) 181 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_02_KF_B_MODE_PROBS_09_LSBMASK (0x000000FF) 182 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_02_KF_B_MODE_PROBS_09_SHIFT (8) 183 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_02_KF_B_MODE_PROBS_09_SIGNED_FIELD IMG_FALSE 184 185 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_02, KF_B_MODE_PROBS_10 186 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_02_KF_B_MODE_PROBS_10_MASK (0x00FF0000) 187 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_02_KF_B_MODE_PROBS_10_LSBMASK (0x000000FF) 188 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_02_KF_B_MODE_PROBS_10_SHIFT (16) 189 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_02_KF_B_MODE_PROBS_10_SIGNED_FIELD IMG_FALSE 190 191 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_02, KF_B_MODE_PROBS_11 192 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_02_KF_B_MODE_PROBS_11_MASK (0xFF000000) 193 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_02_KF_B_MODE_PROBS_11_LSBMASK (0x000000FF) 194 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_02_KF_B_MODE_PROBS_11_SHIFT (24) 195 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_02_KF_B_MODE_PROBS_11_SIGNED_FIELD IMG_FALSE 196 197 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_03_OFFSET (0x0818) 198 199 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_03, KF_B_MODE_PROBS_12 200 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_03_KF_B_MODE_PROBS_12_MASK (0x000000FF) 201 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_03_KF_B_MODE_PROBS_12_LSBMASK (0x000000FF) 202 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_03_KF_B_MODE_PROBS_12_SHIFT (0) 203 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_03_KF_B_MODE_PROBS_12_SIGNED_FIELD IMG_FALSE 204 205 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_03, KF_B_MODE_PROBS_13 206 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_03_KF_B_MODE_PROBS_13_MASK (0x0000FF00) 207 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_03_KF_B_MODE_PROBS_13_LSBMASK (0x000000FF) 208 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_03_KF_B_MODE_PROBS_13_SHIFT (8) 209 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_03_KF_B_MODE_PROBS_13_SIGNED_FIELD IMG_FALSE 210 211 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_03, KF_B_MODE_PROBS_14 212 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_03_KF_B_MODE_PROBS_14_MASK (0x00FF0000) 213 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_03_KF_B_MODE_PROBS_14_LSBMASK (0x000000FF) 214 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_03_KF_B_MODE_PROBS_14_SHIFT (16) 215 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_03_KF_B_MODE_PROBS_14_SIGNED_FIELD IMG_FALSE 216 217 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_03, KF_B_MODE_PROBS_15 218 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_03_KF_B_MODE_PROBS_15_MASK (0xFF000000) 219 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_03_KF_B_MODE_PROBS_15_LSBMASK (0x000000FF) 220 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_03_KF_B_MODE_PROBS_15_SHIFT (24) 221 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_03_KF_B_MODE_PROBS_15_SIGNED_FIELD IMG_FALSE 222 223 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_04_OFFSET (0x081C) 224 225 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_04, KF_B_MODE_PROBS_16 226 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_04_KF_B_MODE_PROBS_16_MASK (0x000000FF) 227 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_04_KF_B_MODE_PROBS_16_LSBMASK (0x000000FF) 228 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_04_KF_B_MODE_PROBS_16_SHIFT (0) 229 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_04_KF_B_MODE_PROBS_16_SIGNED_FIELD IMG_FALSE 230 231 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_04, KF_B_MODE_PROBS_17 232 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_04_KF_B_MODE_PROBS_17_MASK (0x0000FF00) 233 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_04_KF_B_MODE_PROBS_17_LSBMASK (0x000000FF) 234 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_04_KF_B_MODE_PROBS_17_SHIFT (8) 235 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_04_KF_B_MODE_PROBS_17_SIGNED_FIELD IMG_FALSE 236 237 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_04, KF_B_MODE_PROBS_18 238 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_04_KF_B_MODE_PROBS_18_MASK (0x00FF0000) 239 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_04_KF_B_MODE_PROBS_18_LSBMASK (0x000000FF) 240 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_04_KF_B_MODE_PROBS_18_SHIFT (16) 241 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_04_KF_B_MODE_PROBS_18_SIGNED_FIELD IMG_FALSE 242 243 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_04, KF_B_MODE_PROBS_19 244 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_04_KF_B_MODE_PROBS_19_MASK (0xFF000000) 245 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_04_KF_B_MODE_PROBS_19_LSBMASK (0x000000FF) 246 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_04_KF_B_MODE_PROBS_19_SHIFT (24) 247 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_04_KF_B_MODE_PROBS_19_SIGNED_FIELD IMG_FALSE 248 249 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_05_OFFSET (0x0820) 250 251 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_05, KF_B_MODE_PROBS_20 252 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_05_KF_B_MODE_PROBS_20_MASK (0x000000FF) 253 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_05_KF_B_MODE_PROBS_20_LSBMASK (0x000000FF) 254 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_05_KF_B_MODE_PROBS_20_SHIFT (0) 255 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_05_KF_B_MODE_PROBS_20_SIGNED_FIELD IMG_FALSE 256 257 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_05, KF_B_MODE_PROBS_21 258 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_05_KF_B_MODE_PROBS_21_MASK (0x0000FF00) 259 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_05_KF_B_MODE_PROBS_21_LSBMASK (0x000000FF) 260 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_05_KF_B_MODE_PROBS_21_SHIFT (8) 261 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_05_KF_B_MODE_PROBS_21_SIGNED_FIELD IMG_FALSE 262 263 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_05, KF_B_MODE_PROBS_22 264 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_05_KF_B_MODE_PROBS_22_MASK (0x00FF0000) 265 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_05_KF_B_MODE_PROBS_22_LSBMASK (0x000000FF) 266 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_05_KF_B_MODE_PROBS_22_SHIFT (16) 267 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_05_KF_B_MODE_PROBS_22_SIGNED_FIELD IMG_FALSE 268 269 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_05, KF_B_MODE_PROBS_23 270 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_05_KF_B_MODE_PROBS_23_MASK (0xFF000000) 271 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_05_KF_B_MODE_PROBS_23_LSBMASK (0x000000FF) 272 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_05_KF_B_MODE_PROBS_23_SHIFT (24) 273 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_05_KF_B_MODE_PROBS_23_SIGNED_FIELD IMG_FALSE 274 275 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_06_OFFSET (0x0824) 276 277 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_06, KF_B_MODE_PROBS_24 278 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_06_KF_B_MODE_PROBS_24_MASK (0x000000FF) 279 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_06_KF_B_MODE_PROBS_24_LSBMASK (0x000000FF) 280 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_06_KF_B_MODE_PROBS_24_SHIFT (0) 281 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_06_KF_B_MODE_PROBS_24_SIGNED_FIELD IMG_FALSE 282 283 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_06, KF_B_MODE_PROBS_25 284 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_06_KF_B_MODE_PROBS_25_MASK (0x0000FF00) 285 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_06_KF_B_MODE_PROBS_25_LSBMASK (0x000000FF) 286 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_06_KF_B_MODE_PROBS_25_SHIFT (8) 287 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_06_KF_B_MODE_PROBS_25_SIGNED_FIELD IMG_FALSE 288 289 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_06, KF_B_MODE_PROBS_26 290 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_06_KF_B_MODE_PROBS_26_MASK (0x00FF0000) 291 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_06_KF_B_MODE_PROBS_26_LSBMASK (0x000000FF) 292 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_06_KF_B_MODE_PROBS_26_SHIFT (16) 293 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_06_KF_B_MODE_PROBS_26_SIGNED_FIELD IMG_FALSE 294 295 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_06, KF_B_MODE_PROBS_27 296 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_06_KF_B_MODE_PROBS_27_MASK (0xFF000000) 297 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_06_KF_B_MODE_PROBS_27_LSBMASK (0x000000FF) 298 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_06_KF_B_MODE_PROBS_27_SHIFT (24) 299 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_06_KF_B_MODE_PROBS_27_SIGNED_FIELD IMG_FALSE 300 301 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_07_OFFSET (0x0828) 302 303 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_07, KF_B_MODE_PROBS_28 304 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_07_KF_B_MODE_PROBS_28_MASK (0x000000FF) 305 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_07_KF_B_MODE_PROBS_28_LSBMASK (0x000000FF) 306 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_07_KF_B_MODE_PROBS_28_SHIFT (0) 307 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_07_KF_B_MODE_PROBS_28_SIGNED_FIELD IMG_FALSE 308 309 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_07, KF_B_MODE_PROBS_29 310 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_07_KF_B_MODE_PROBS_29_MASK (0x0000FF00) 311 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_07_KF_B_MODE_PROBS_29_LSBMASK (0x000000FF) 312 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_07_KF_B_MODE_PROBS_29_SHIFT (8) 313 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_07_KF_B_MODE_PROBS_29_SIGNED_FIELD IMG_FALSE 314 315 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_07, KF_B_MODE_PROBS_30 316 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_07_KF_B_MODE_PROBS_30_MASK (0x00FF0000) 317 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_07_KF_B_MODE_PROBS_30_LSBMASK (0x000000FF) 318 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_07_KF_B_MODE_PROBS_30_SHIFT (16) 319 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_07_KF_B_MODE_PROBS_30_SIGNED_FIELD IMG_FALSE 320 321 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_07, KF_B_MODE_PROBS_31 322 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_07_KF_B_MODE_PROBS_31_MASK (0xFF000000) 323 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_07_KF_B_MODE_PROBS_31_LSBMASK (0x000000FF) 324 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_07_KF_B_MODE_PROBS_31_SHIFT (24) 325 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_07_KF_B_MODE_PROBS_31_SIGNED_FIELD IMG_FALSE 326 327 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_08_OFFSET (0x082C) 328 329 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_08, KF_B_MODE_PROBS_32 330 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_08_KF_B_MODE_PROBS_32_MASK (0x000000FF) 331 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_08_KF_B_MODE_PROBS_32_LSBMASK (0x000000FF) 332 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_08_KF_B_MODE_PROBS_32_SHIFT (0) 333 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_08_KF_B_MODE_PROBS_32_SIGNED_FIELD IMG_FALSE 334 335 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_08, KF_B_MODE_PROBS_33 336 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_08_KF_B_MODE_PROBS_33_MASK (0x0000FF00) 337 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_08_KF_B_MODE_PROBS_33_LSBMASK (0x000000FF) 338 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_08_KF_B_MODE_PROBS_33_SHIFT (8) 339 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_08_KF_B_MODE_PROBS_33_SIGNED_FIELD IMG_FALSE 340 341 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_08, KF_B_MODE_PROBS_34 342 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_08_KF_B_MODE_PROBS_34_MASK (0x00FF0000) 343 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_08_KF_B_MODE_PROBS_34_LSBMASK (0x000000FF) 344 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_08_KF_B_MODE_PROBS_34_SHIFT (16) 345 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_08_KF_B_MODE_PROBS_34_SIGNED_FIELD IMG_FALSE 346 347 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_08, KF_B_MODE_PROBS_35 348 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_08_KF_B_MODE_PROBS_35_MASK (0xFF000000) 349 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_08_KF_B_MODE_PROBS_35_LSBMASK (0x000000FF) 350 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_08_KF_B_MODE_PROBS_35_SHIFT (24) 351 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_08_KF_B_MODE_PROBS_35_SIGNED_FIELD IMG_FALSE 352 353 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_09_OFFSET (0x0830) 354 355 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_09, KF_B_MODE_PROBS_36 356 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_09_KF_B_MODE_PROBS_36_MASK (0x000000FF) 357 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_09_KF_B_MODE_PROBS_36_LSBMASK (0x000000FF) 358 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_09_KF_B_MODE_PROBS_36_SHIFT (0) 359 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_09_KF_B_MODE_PROBS_36_SIGNED_FIELD IMG_FALSE 360 361 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_09, KF_B_MODE_PROBS_37 362 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_09_KF_B_MODE_PROBS_37_MASK (0x0000FF00) 363 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_09_KF_B_MODE_PROBS_37_LSBMASK (0x000000FF) 364 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_09_KF_B_MODE_PROBS_37_SHIFT (8) 365 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_09_KF_B_MODE_PROBS_37_SIGNED_FIELD IMG_FALSE 366 367 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_09, KF_B_MODE_PROBS_38 368 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_09_KF_B_MODE_PROBS_38_MASK (0x00FF0000) 369 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_09_KF_B_MODE_PROBS_38_LSBMASK (0x000000FF) 370 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_09_KF_B_MODE_PROBS_38_SHIFT (16) 371 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_09_KF_B_MODE_PROBS_38_SIGNED_FIELD IMG_FALSE 372 373 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_09, KF_B_MODE_PROBS_39 374 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_09_KF_B_MODE_PROBS_39_MASK (0xFF000000) 375 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_09_KF_B_MODE_PROBS_39_LSBMASK (0x000000FF) 376 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_09_KF_B_MODE_PROBS_39_SHIFT (24) 377 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_09_KF_B_MODE_PROBS_39_SIGNED_FIELD IMG_FALSE 378 379 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_10_OFFSET (0x0834) 380 381 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_10, KF_B_MODE_PROBS_40 382 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_10_KF_B_MODE_PROBS_40_MASK (0x000000FF) 383 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_10_KF_B_MODE_PROBS_40_LSBMASK (0x000000FF) 384 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_10_KF_B_MODE_PROBS_40_SHIFT (0) 385 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_10_KF_B_MODE_PROBS_40_SIGNED_FIELD IMG_FALSE 386 387 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_10, KF_B_MODE_PROBS_41 388 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_10_KF_B_MODE_PROBS_41_MASK (0x0000FF00) 389 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_10_KF_B_MODE_PROBS_41_LSBMASK (0x000000FF) 390 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_10_KF_B_MODE_PROBS_41_SHIFT (8) 391 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_10_KF_B_MODE_PROBS_41_SIGNED_FIELD IMG_FALSE 392 393 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_10, KF_B_MODE_PROBS_42 394 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_10_KF_B_MODE_PROBS_42_MASK (0x00FF0000) 395 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_10_KF_B_MODE_PROBS_42_LSBMASK (0x000000FF) 396 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_10_KF_B_MODE_PROBS_42_SHIFT (16) 397 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_10_KF_B_MODE_PROBS_42_SIGNED_FIELD IMG_FALSE 398 399 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_10, KF_B_MODE_PROBS_43 400 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_10_KF_B_MODE_PROBS_43_MASK (0xFF000000) 401 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_10_KF_B_MODE_PROBS_43_LSBMASK (0x000000FF) 402 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_10_KF_B_MODE_PROBS_43_SHIFT (24) 403 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_10_KF_B_MODE_PROBS_43_SIGNED_FIELD IMG_FALSE 404 405 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_11_OFFSET (0x0838) 406 407 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_11, KF_B_MODE_PROBS_44 408 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_11_KF_B_MODE_PROBS_44_MASK (0x000000FF) 409 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_11_KF_B_MODE_PROBS_44_LSBMASK (0x000000FF) 410 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_11_KF_B_MODE_PROBS_44_SHIFT (0) 411 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_11_KF_B_MODE_PROBS_44_SIGNED_FIELD IMG_FALSE 412 413 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_11, KF_B_MODE_PROBS_45 414 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_11_KF_B_MODE_PROBS_45_MASK (0x0000FF00) 415 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_11_KF_B_MODE_PROBS_45_LSBMASK (0x000000FF) 416 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_11_KF_B_MODE_PROBS_45_SHIFT (8) 417 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_11_KF_B_MODE_PROBS_45_SIGNED_FIELD IMG_FALSE 418 419 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_11, KF_B_MODE_PROBS_46 420 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_11_KF_B_MODE_PROBS_46_MASK (0x00FF0000) 421 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_11_KF_B_MODE_PROBS_46_LSBMASK (0x000000FF) 422 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_11_KF_B_MODE_PROBS_46_SHIFT (16) 423 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_11_KF_B_MODE_PROBS_46_SIGNED_FIELD IMG_FALSE 424 425 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_11, KF_B_MODE_PROBS_47 426 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_11_KF_B_MODE_PROBS_47_MASK (0xFF000000) 427 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_11_KF_B_MODE_PROBS_47_LSBMASK (0x000000FF) 428 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_11_KF_B_MODE_PROBS_47_SHIFT (24) 429 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_11_KF_B_MODE_PROBS_47_SIGNED_FIELD IMG_FALSE 430 431 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_12_OFFSET (0x083C) 432 433 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_12, KF_B_MODE_PROBS_48 434 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_12_KF_B_MODE_PROBS_48_MASK (0x000000FF) 435 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_12_KF_B_MODE_PROBS_48_LSBMASK (0x000000FF) 436 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_12_KF_B_MODE_PROBS_48_SHIFT (0) 437 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_12_KF_B_MODE_PROBS_48_SIGNED_FIELD IMG_FALSE 438 439 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_12, KF_B_MODE_PROBS_49 440 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_12_KF_B_MODE_PROBS_49_MASK (0x0000FF00) 441 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_12_KF_B_MODE_PROBS_49_LSBMASK (0x000000FF) 442 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_12_KF_B_MODE_PROBS_49_SHIFT (8) 443 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_12_KF_B_MODE_PROBS_49_SIGNED_FIELD IMG_FALSE 444 445 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_12, KF_B_MODE_PROBS_50 446 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_12_KF_B_MODE_PROBS_50_MASK (0x00FF0000) 447 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_12_KF_B_MODE_PROBS_50_LSBMASK (0x000000FF) 448 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_12_KF_B_MODE_PROBS_50_SHIFT (16) 449 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_12_KF_B_MODE_PROBS_50_SIGNED_FIELD IMG_FALSE 450 451 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_12, KF_B_MODE_PROBS_51 452 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_12_KF_B_MODE_PROBS_51_MASK (0xFF000000) 453 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_12_KF_B_MODE_PROBS_51_LSBMASK (0x000000FF) 454 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_12_KF_B_MODE_PROBS_51_SHIFT (24) 455 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_12_KF_B_MODE_PROBS_51_SIGNED_FIELD IMG_FALSE 456 457 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_13_OFFSET (0x0840) 458 459 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_13, KF_B_MODE_PROBS_52 460 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_13_KF_B_MODE_PROBS_52_MASK (0x000000FF) 461 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_13_KF_B_MODE_PROBS_52_LSBMASK (0x000000FF) 462 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_13_KF_B_MODE_PROBS_52_SHIFT (0) 463 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_13_KF_B_MODE_PROBS_52_SIGNED_FIELD IMG_FALSE 464 465 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_13, KF_B_MODE_PROBS_53 466 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_13_KF_B_MODE_PROBS_53_MASK (0x0000FF00) 467 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_13_KF_B_MODE_PROBS_53_LSBMASK (0x000000FF) 468 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_13_KF_B_MODE_PROBS_53_SHIFT (8) 469 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_13_KF_B_MODE_PROBS_53_SIGNED_FIELD IMG_FALSE 470 471 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_13, KF_B_MODE_PROBS_54 472 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_13_KF_B_MODE_PROBS_54_MASK (0x00FF0000) 473 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_13_KF_B_MODE_PROBS_54_LSBMASK (0x000000FF) 474 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_13_KF_B_MODE_PROBS_54_SHIFT (16) 475 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_13_KF_B_MODE_PROBS_54_SIGNED_FIELD IMG_FALSE 476 477 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_13, KF_B_MODE_PROBS_55 478 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_13_KF_B_MODE_PROBS_55_MASK (0xFF000000) 479 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_13_KF_B_MODE_PROBS_55_LSBMASK (0x000000FF) 480 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_13_KF_B_MODE_PROBS_55_SHIFT (24) 481 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_13_KF_B_MODE_PROBS_55_SIGNED_FIELD IMG_FALSE 482 483 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_14_OFFSET (0x0844) 484 485 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_14, KF_B_MODE_PROBS_56 486 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_14_KF_B_MODE_PROBS_56_MASK (0x000000FF) 487 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_14_KF_B_MODE_PROBS_56_LSBMASK (0x000000FF) 488 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_14_KF_B_MODE_PROBS_56_SHIFT (0) 489 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_14_KF_B_MODE_PROBS_56_SIGNED_FIELD IMG_FALSE 490 491 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_14, KF_B_MODE_PROBS_57 492 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_14_KF_B_MODE_PROBS_57_MASK (0x0000FF00) 493 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_14_KF_B_MODE_PROBS_57_LSBMASK (0x000000FF) 494 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_14_KF_B_MODE_PROBS_57_SHIFT (8) 495 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_14_KF_B_MODE_PROBS_57_SIGNED_FIELD IMG_FALSE 496 497 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_14, KF_B_MODE_PROBS_58 498 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_14_KF_B_MODE_PROBS_58_MASK (0x00FF0000) 499 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_14_KF_B_MODE_PROBS_58_LSBMASK (0x000000FF) 500 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_14_KF_B_MODE_PROBS_58_SHIFT (16) 501 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_14_KF_B_MODE_PROBS_58_SIGNED_FIELD IMG_FALSE 502 503 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_14, KF_B_MODE_PROBS_59 504 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_14_KF_B_MODE_PROBS_59_MASK (0xFF000000) 505 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_14_KF_B_MODE_PROBS_59_LSBMASK (0x000000FF) 506 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_14_KF_B_MODE_PROBS_59_SHIFT (24) 507 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_14_KF_B_MODE_PROBS_59_SIGNED_FIELD IMG_FALSE 508 509 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_15_OFFSET (0x0848) 510 511 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_15, KF_B_MODE_PROBS_60 512 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_15_KF_B_MODE_PROBS_60_MASK (0x000000FF) 513 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_15_KF_B_MODE_PROBS_60_LSBMASK (0x000000FF) 514 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_15_KF_B_MODE_PROBS_60_SHIFT (0) 515 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_15_KF_B_MODE_PROBS_60_SIGNED_FIELD IMG_FALSE 516 517 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_15, KF_B_MODE_PROBS_61 518 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_15_KF_B_MODE_PROBS_61_MASK (0x0000FF00) 519 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_15_KF_B_MODE_PROBS_61_LSBMASK (0x000000FF) 520 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_15_KF_B_MODE_PROBS_61_SHIFT (8) 521 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_15_KF_B_MODE_PROBS_61_SIGNED_FIELD IMG_FALSE 522 523 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_15, KF_B_MODE_PROBS_62 524 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_15_KF_B_MODE_PROBS_62_MASK (0x00FF0000) 525 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_15_KF_B_MODE_PROBS_62_LSBMASK (0x000000FF) 526 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_15_KF_B_MODE_PROBS_62_SHIFT (16) 527 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_15_KF_B_MODE_PROBS_62_SIGNED_FIELD IMG_FALSE 528 529 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_15, KF_B_MODE_PROBS_63 530 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_15_KF_B_MODE_PROBS_63_MASK (0xFF000000) 531 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_15_KF_B_MODE_PROBS_63_LSBMASK (0x000000FF) 532 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_15_KF_B_MODE_PROBS_63_SHIFT (24) 533 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_15_KF_B_MODE_PROBS_63_SIGNED_FIELD IMG_FALSE 534 535 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_16_OFFSET (0x084C) 536 537 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_16, KF_B_MODE_PROBS_64 538 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_16_KF_B_MODE_PROBS_64_MASK (0x000000FF) 539 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_16_KF_B_MODE_PROBS_64_LSBMASK (0x000000FF) 540 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_16_KF_B_MODE_PROBS_64_SHIFT (0) 541 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_16_KF_B_MODE_PROBS_64_SIGNED_FIELD IMG_FALSE 542 543 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_16, KF_B_MODE_PROBS_65 544 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_16_KF_B_MODE_PROBS_65_MASK (0x0000FF00) 545 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_16_KF_B_MODE_PROBS_65_LSBMASK (0x000000FF) 546 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_16_KF_B_MODE_PROBS_65_SHIFT (8) 547 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_16_KF_B_MODE_PROBS_65_SIGNED_FIELD IMG_FALSE 548 549 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_16, KF_B_MODE_PROBS_66 550 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_16_KF_B_MODE_PROBS_66_MASK (0x00FF0000) 551 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_16_KF_B_MODE_PROBS_66_LSBMASK (0x000000FF) 552 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_16_KF_B_MODE_PROBS_66_SHIFT (16) 553 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_16_KF_B_MODE_PROBS_66_SIGNED_FIELD IMG_FALSE 554 555 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_16, KF_B_MODE_PROBS_67 556 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_16_KF_B_MODE_PROBS_67_MASK (0xFF000000) 557 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_16_KF_B_MODE_PROBS_67_LSBMASK (0x000000FF) 558 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_16_KF_B_MODE_PROBS_67_SHIFT (24) 559 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_16_KF_B_MODE_PROBS_67_SIGNED_FIELD IMG_FALSE 560 561 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_17_OFFSET (0x0850) 562 563 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_17, KF_B_MODE_PROBS_68 564 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_17_KF_B_MODE_PROBS_68_MASK (0x000000FF) 565 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_17_KF_B_MODE_PROBS_68_LSBMASK (0x000000FF) 566 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_17_KF_B_MODE_PROBS_68_SHIFT (0) 567 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_17_KF_B_MODE_PROBS_68_SIGNED_FIELD IMG_FALSE 568 569 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_17, KF_B_MODE_PROBS_69 570 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_17_KF_B_MODE_PROBS_69_MASK (0x0000FF00) 571 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_17_KF_B_MODE_PROBS_69_LSBMASK (0x000000FF) 572 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_17_KF_B_MODE_PROBS_69_SHIFT (8) 573 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_17_KF_B_MODE_PROBS_69_SIGNED_FIELD IMG_FALSE 574 575 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_17, KF_B_MODE_PROBS_70 576 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_17_KF_B_MODE_PROBS_70_MASK (0x00FF0000) 577 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_17_KF_B_MODE_PROBS_70_LSBMASK (0x000000FF) 578 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_17_KF_B_MODE_PROBS_70_SHIFT (16) 579 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_17_KF_B_MODE_PROBS_70_SIGNED_FIELD IMG_FALSE 580 581 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_17, KF_B_MODE_PROBS_71 582 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_17_KF_B_MODE_PROBS_71_MASK (0xFF000000) 583 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_17_KF_B_MODE_PROBS_71_LSBMASK (0x000000FF) 584 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_17_KF_B_MODE_PROBS_71_SHIFT (24) 585 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_17_KF_B_MODE_PROBS_71_SIGNED_FIELD IMG_FALSE 586 587 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_18_OFFSET (0x0854) 588 589 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_18, KF_B_MODE_PROBS_72 590 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_18_KF_B_MODE_PROBS_72_MASK (0x000000FF) 591 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_18_KF_B_MODE_PROBS_72_LSBMASK (0x000000FF) 592 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_18_KF_B_MODE_PROBS_72_SHIFT (0) 593 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_18_KF_B_MODE_PROBS_72_SIGNED_FIELD IMG_FALSE 594 595 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_18, KF_B_MODE_PROBS_73 596 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_18_KF_B_MODE_PROBS_73_MASK (0x0000FF00) 597 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_18_KF_B_MODE_PROBS_73_LSBMASK (0x000000FF) 598 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_18_KF_B_MODE_PROBS_73_SHIFT (8) 599 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_18_KF_B_MODE_PROBS_73_SIGNED_FIELD IMG_FALSE 600 601 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_18, KF_B_MODE_PROBS_74 602 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_18_KF_B_MODE_PROBS_74_MASK (0x00FF0000) 603 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_18_KF_B_MODE_PROBS_74_LSBMASK (0x000000FF) 604 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_18_KF_B_MODE_PROBS_74_SHIFT (16) 605 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_18_KF_B_MODE_PROBS_74_SIGNED_FIELD IMG_FALSE 606 607 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_18, KF_B_MODE_PROBS_75 608 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_18_KF_B_MODE_PROBS_75_MASK (0xFF000000) 609 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_18_KF_B_MODE_PROBS_75_LSBMASK (0x000000FF) 610 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_18_KF_B_MODE_PROBS_75_SHIFT (24) 611 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_18_KF_B_MODE_PROBS_75_SIGNED_FIELD IMG_FALSE 612 613 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_19_OFFSET (0x0858) 614 615 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_19, KF_B_MODE_PROBS_76 616 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_19_KF_B_MODE_PROBS_76_MASK (0x000000FF) 617 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_19_KF_B_MODE_PROBS_76_LSBMASK (0x000000FF) 618 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_19_KF_B_MODE_PROBS_76_SHIFT (0) 619 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_19_KF_B_MODE_PROBS_76_SIGNED_FIELD IMG_FALSE 620 621 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_19, KF_B_MODE_PROBS_77 622 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_19_KF_B_MODE_PROBS_77_MASK (0x0000FF00) 623 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_19_KF_B_MODE_PROBS_77_LSBMASK (0x000000FF) 624 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_19_KF_B_MODE_PROBS_77_SHIFT (8) 625 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_19_KF_B_MODE_PROBS_77_SIGNED_FIELD IMG_FALSE 626 627 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_19, KF_B_MODE_PROBS_78 628 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_19_KF_B_MODE_PROBS_78_MASK (0x00FF0000) 629 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_19_KF_B_MODE_PROBS_78_LSBMASK (0x000000FF) 630 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_19_KF_B_MODE_PROBS_78_SHIFT (16) 631 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_19_KF_B_MODE_PROBS_78_SIGNED_FIELD IMG_FALSE 632 633 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_19, KF_B_MODE_PROBS_79 634 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_19_KF_B_MODE_PROBS_79_MASK (0xFF000000) 635 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_19_KF_B_MODE_PROBS_79_LSBMASK (0x000000FF) 636 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_19_KF_B_MODE_PROBS_79_SHIFT (24) 637 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_19_KF_B_MODE_PROBS_79_SIGNED_FIELD IMG_FALSE 638 639 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_20_OFFSET (0x085C) 640 641 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_20, KF_B_MODE_PROBS_80 642 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_20_KF_B_MODE_PROBS_80_MASK (0x000000FF) 643 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_20_KF_B_MODE_PROBS_80_LSBMASK (0x000000FF) 644 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_20_KF_B_MODE_PROBS_80_SHIFT (0) 645 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_20_KF_B_MODE_PROBS_80_SIGNED_FIELD IMG_FALSE 646 647 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_20, KF_B_MODE_PROBS_81 648 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_20_KF_B_MODE_PROBS_81_MASK (0x0000FF00) 649 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_20_KF_B_MODE_PROBS_81_LSBMASK (0x000000FF) 650 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_20_KF_B_MODE_PROBS_81_SHIFT (8) 651 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_20_KF_B_MODE_PROBS_81_SIGNED_FIELD IMG_FALSE 652 653 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_20, KF_B_MODE_PROBS_82 654 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_20_KF_B_MODE_PROBS_82_MASK (0x00FF0000) 655 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_20_KF_B_MODE_PROBS_82_LSBMASK (0x000000FF) 656 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_20_KF_B_MODE_PROBS_82_SHIFT (16) 657 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_20_KF_B_MODE_PROBS_82_SIGNED_FIELD IMG_FALSE 658 659 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_20, KF_B_MODE_PROBS_83 660 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_20_KF_B_MODE_PROBS_83_MASK (0xFF000000) 661 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_20_KF_B_MODE_PROBS_83_LSBMASK (0x000000FF) 662 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_20_KF_B_MODE_PROBS_83_SHIFT (24) 663 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_20_KF_B_MODE_PROBS_83_SIGNED_FIELD IMG_FALSE 664 665 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_21_OFFSET (0x0860) 666 667 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_21, KF_B_MODE_PROBS_84 668 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_21_KF_B_MODE_PROBS_84_MASK (0x000000FF) 669 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_21_KF_B_MODE_PROBS_84_LSBMASK (0x000000FF) 670 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_21_KF_B_MODE_PROBS_84_SHIFT (0) 671 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_21_KF_B_MODE_PROBS_84_SIGNED_FIELD IMG_FALSE 672 673 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_21, KF_B_MODE_PROBS_85 674 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_21_KF_B_MODE_PROBS_85_MASK (0x0000FF00) 675 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_21_KF_B_MODE_PROBS_85_LSBMASK (0x000000FF) 676 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_21_KF_B_MODE_PROBS_85_SHIFT (8) 677 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_21_KF_B_MODE_PROBS_85_SIGNED_FIELD IMG_FALSE 678 679 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_21, KF_B_MODE_PROBS_86 680 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_21_KF_B_MODE_PROBS_86_MASK (0x00FF0000) 681 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_21_KF_B_MODE_PROBS_86_LSBMASK (0x000000FF) 682 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_21_KF_B_MODE_PROBS_86_SHIFT (16) 683 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_21_KF_B_MODE_PROBS_86_SIGNED_FIELD IMG_FALSE 684 685 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_21, KF_B_MODE_PROBS_87 686 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_21_KF_B_MODE_PROBS_87_MASK (0xFF000000) 687 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_21_KF_B_MODE_PROBS_87_LSBMASK (0x000000FF) 688 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_21_KF_B_MODE_PROBS_87_SHIFT (24) 689 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_21_KF_B_MODE_PROBS_87_SIGNED_FIELD IMG_FALSE 690 691 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_22_OFFSET (0x0864) 692 693 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_22, KF_B_MODE_PROBS_88 694 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_22_KF_B_MODE_PROBS_88_MASK (0x000000FF) 695 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_22_KF_B_MODE_PROBS_88_LSBMASK (0x000000FF) 696 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_22_KF_B_MODE_PROBS_88_SHIFT (0) 697 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_22_KF_B_MODE_PROBS_88_SIGNED_FIELD IMG_FALSE 698 699 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_22, KF_B_MODE_PROBS_89 700 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_22_KF_B_MODE_PROBS_89_MASK (0x0000FF00) 701 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_22_KF_B_MODE_PROBS_89_LSBMASK (0x000000FF) 702 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_22_KF_B_MODE_PROBS_89_SHIFT (8) 703 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_22_KF_B_MODE_PROBS_89_SIGNED_FIELD IMG_FALSE 704 705 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_22, KF_B_MODE_PROBS_90 706 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_22_KF_B_MODE_PROBS_90_MASK (0x00FF0000) 707 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_22_KF_B_MODE_PROBS_90_LSBMASK (0x000000FF) 708 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_22_KF_B_MODE_PROBS_90_SHIFT (16) 709 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_22_KF_B_MODE_PROBS_90_SIGNED_FIELD IMG_FALSE 710 711 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_22, KF_B_MODE_PROBS_91 712 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_22_KF_B_MODE_PROBS_91_MASK (0xFF000000) 713 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_22_KF_B_MODE_PROBS_91_LSBMASK (0x000000FF) 714 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_22_KF_B_MODE_PROBS_91_SHIFT (24) 715 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_22_KF_B_MODE_PROBS_91_SIGNED_FIELD IMG_FALSE 716 717 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_23_OFFSET (0x0868) 718 719 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_23, KF_B_MODE_PROBS_92 720 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_23_KF_B_MODE_PROBS_92_MASK (0x000000FF) 721 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_23_KF_B_MODE_PROBS_92_LSBMASK (0x000000FF) 722 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_23_KF_B_MODE_PROBS_92_SHIFT (0) 723 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_23_KF_B_MODE_PROBS_92_SIGNED_FIELD IMG_FALSE 724 725 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_23, KF_B_MODE_PROBS_93 726 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_23_KF_B_MODE_PROBS_93_MASK (0x0000FF00) 727 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_23_KF_B_MODE_PROBS_93_LSBMASK (0x000000FF) 728 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_23_KF_B_MODE_PROBS_93_SHIFT (8) 729 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_23_KF_B_MODE_PROBS_93_SIGNED_FIELD IMG_FALSE 730 731 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_23, KF_B_MODE_PROBS_94 732 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_23_KF_B_MODE_PROBS_94_MASK (0x00FF0000) 733 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_23_KF_B_MODE_PROBS_94_LSBMASK (0x000000FF) 734 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_23_KF_B_MODE_PROBS_94_SHIFT (16) 735 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_23_KF_B_MODE_PROBS_94_SIGNED_FIELD IMG_FALSE 736 737 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_23, KF_B_MODE_PROBS_95 738 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_23_KF_B_MODE_PROBS_95_MASK (0xFF000000) 739 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_23_KF_B_MODE_PROBS_95_LSBMASK (0x000000FF) 740 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_23_KF_B_MODE_PROBS_95_SHIFT (24) 741 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_23_KF_B_MODE_PROBS_95_SIGNED_FIELD IMG_FALSE 742 743 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_24_OFFSET (0x086C) 744 745 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_24, KF_B_MODE_PROBS_96 746 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_24_KF_B_MODE_PROBS_96_MASK (0x000000FF) 747 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_24_KF_B_MODE_PROBS_96_LSBMASK (0x000000FF) 748 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_24_KF_B_MODE_PROBS_96_SHIFT (0) 749 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_24_KF_B_MODE_PROBS_96_SIGNED_FIELD IMG_FALSE 750 751 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_24, KF_B_MODE_PROBS_97 752 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_24_KF_B_MODE_PROBS_97_MASK (0x0000FF00) 753 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_24_KF_B_MODE_PROBS_97_LSBMASK (0x000000FF) 754 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_24_KF_B_MODE_PROBS_97_SHIFT (8) 755 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_24_KF_B_MODE_PROBS_97_SIGNED_FIELD IMG_FALSE 756 757 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_24, KF_B_MODE_PROBS_98 758 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_24_KF_B_MODE_PROBS_98_MASK (0x00FF0000) 759 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_24_KF_B_MODE_PROBS_98_LSBMASK (0x000000FF) 760 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_24_KF_B_MODE_PROBS_98_SHIFT (16) 761 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_24_KF_B_MODE_PROBS_98_SIGNED_FIELD IMG_FALSE 762 763 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_24, KF_B_MODE_PROBS_99 764 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_24_KF_B_MODE_PROBS_99_MASK (0xFF000000) 765 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_24_KF_B_MODE_PROBS_99_LSBMASK (0x000000FF) 766 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_24_KF_B_MODE_PROBS_99_SHIFT (24) 767 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_24_KF_B_MODE_PROBS_99_SIGNED_FIELD IMG_FALSE 768 769 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_25_OFFSET (0x0870) 770 771 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_25, KF_B_MODE_PROBS_100 772 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_25_KF_B_MODE_PROBS_100_MASK (0x000000FF) 773 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_25_KF_B_MODE_PROBS_100_LSBMASK (0x000000FF) 774 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_25_KF_B_MODE_PROBS_100_SHIFT (0) 775 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_25_KF_B_MODE_PROBS_100_SIGNED_FIELD IMG_FALSE 776 777 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_25, KF_B_MODE_PROBS_101 778 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_25_KF_B_MODE_PROBS_101_MASK (0x0000FF00) 779 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_25_KF_B_MODE_PROBS_101_LSBMASK (0x000000FF) 780 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_25_KF_B_MODE_PROBS_101_SHIFT (8) 781 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_25_KF_B_MODE_PROBS_101_SIGNED_FIELD IMG_FALSE 782 783 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_25, KF_B_MODE_PROBS_102 784 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_25_KF_B_MODE_PROBS_102_MASK (0x00FF0000) 785 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_25_KF_B_MODE_PROBS_102_LSBMASK (0x000000FF) 786 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_25_KF_B_MODE_PROBS_102_SHIFT (16) 787 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_25_KF_B_MODE_PROBS_102_SIGNED_FIELD IMG_FALSE 788 789 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_25, KF_B_MODE_PROBS_103 790 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_25_KF_B_MODE_PROBS_103_MASK (0xFF000000) 791 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_25_KF_B_MODE_PROBS_103_LSBMASK (0x000000FF) 792 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_25_KF_B_MODE_PROBS_103_SHIFT (24) 793 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_25_KF_B_MODE_PROBS_103_SIGNED_FIELD IMG_FALSE 794 795 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_26_OFFSET (0x0874) 796 797 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_26, KF_B_MODE_PROBS_104 798 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_26_KF_B_MODE_PROBS_104_MASK (0x000000FF) 799 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_26_KF_B_MODE_PROBS_104_LSBMASK (0x000000FF) 800 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_26_KF_B_MODE_PROBS_104_SHIFT (0) 801 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_26_KF_B_MODE_PROBS_104_SIGNED_FIELD IMG_FALSE 802 803 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_26, KF_B_MODE_PROBS_105 804 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_26_KF_B_MODE_PROBS_105_MASK (0x0000FF00) 805 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_26_KF_B_MODE_PROBS_105_LSBMASK (0x000000FF) 806 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_26_KF_B_MODE_PROBS_105_SHIFT (8) 807 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_26_KF_B_MODE_PROBS_105_SIGNED_FIELD IMG_FALSE 808 809 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_26, KF_B_MODE_PROBS_106 810 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_26_KF_B_MODE_PROBS_106_MASK (0x00FF0000) 811 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_26_KF_B_MODE_PROBS_106_LSBMASK (0x000000FF) 812 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_26_KF_B_MODE_PROBS_106_SHIFT (16) 813 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_26_KF_B_MODE_PROBS_106_SIGNED_FIELD IMG_FALSE 814 815 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_26, KF_B_MODE_PROBS_107 816 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_26_KF_B_MODE_PROBS_107_MASK (0xFF000000) 817 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_26_KF_B_MODE_PROBS_107_LSBMASK (0x000000FF) 818 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_26_KF_B_MODE_PROBS_107_SHIFT (24) 819 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_26_KF_B_MODE_PROBS_107_SIGNED_FIELD IMG_FALSE 820 821 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_27_OFFSET (0x0878) 822 823 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_27, KF_B_MODE_PROBS_108 824 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_27_KF_B_MODE_PROBS_108_MASK (0x000000FF) 825 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_27_KF_B_MODE_PROBS_108_LSBMASK (0x000000FF) 826 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_27_KF_B_MODE_PROBS_108_SHIFT (0) 827 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_27_KF_B_MODE_PROBS_108_SIGNED_FIELD IMG_FALSE 828 829 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_27, KF_B_MODE_PROBS_109 830 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_27_KF_B_MODE_PROBS_109_MASK (0x0000FF00) 831 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_27_KF_B_MODE_PROBS_109_LSBMASK (0x000000FF) 832 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_27_KF_B_MODE_PROBS_109_SHIFT (8) 833 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_27_KF_B_MODE_PROBS_109_SIGNED_FIELD IMG_FALSE 834 835 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_27, KF_B_MODE_PROBS_110 836 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_27_KF_B_MODE_PROBS_110_MASK (0x00FF0000) 837 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_27_KF_B_MODE_PROBS_110_LSBMASK (0x000000FF) 838 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_27_KF_B_MODE_PROBS_110_SHIFT (16) 839 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_27_KF_B_MODE_PROBS_110_SIGNED_FIELD IMG_FALSE 840 841 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_27, KF_B_MODE_PROBS_111 842 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_27_KF_B_MODE_PROBS_111_MASK (0xFF000000) 843 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_27_KF_B_MODE_PROBS_111_LSBMASK (0x000000FF) 844 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_27_KF_B_MODE_PROBS_111_SHIFT (24) 845 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_27_KF_B_MODE_PROBS_111_SIGNED_FIELD IMG_FALSE 846 847 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_28_OFFSET (0x087C) 848 849 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_28, KF_B_MODE_PROBS_112 850 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_28_KF_B_MODE_PROBS_112_MASK (0x000000FF) 851 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_28_KF_B_MODE_PROBS_112_LSBMASK (0x000000FF) 852 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_28_KF_B_MODE_PROBS_112_SHIFT (0) 853 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_28_KF_B_MODE_PROBS_112_SIGNED_FIELD IMG_FALSE 854 855 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_28, KF_B_MODE_PROBS_113 856 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_28_KF_B_MODE_PROBS_113_MASK (0x0000FF00) 857 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_28_KF_B_MODE_PROBS_113_LSBMASK (0x000000FF) 858 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_28_KF_B_MODE_PROBS_113_SHIFT (8) 859 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_28_KF_B_MODE_PROBS_113_SIGNED_FIELD IMG_FALSE 860 861 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_28, KF_B_MODE_PROBS_114 862 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_28_KF_B_MODE_PROBS_114_MASK (0x00FF0000) 863 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_28_KF_B_MODE_PROBS_114_LSBMASK (0x000000FF) 864 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_28_KF_B_MODE_PROBS_114_SHIFT (16) 865 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_28_KF_B_MODE_PROBS_114_SIGNED_FIELD IMG_FALSE 866 867 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_28, KF_B_MODE_PROBS_115 868 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_28_KF_B_MODE_PROBS_115_MASK (0xFF000000) 869 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_28_KF_B_MODE_PROBS_115_LSBMASK (0x000000FF) 870 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_28_KF_B_MODE_PROBS_115_SHIFT (24) 871 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_28_KF_B_MODE_PROBS_115_SIGNED_FIELD IMG_FALSE 872 873 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_29_OFFSET (0x0880) 874 875 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_29, KF_B_MODE_PROBS_116 876 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_29_KF_B_MODE_PROBS_116_MASK (0x000000FF) 877 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_29_KF_B_MODE_PROBS_116_LSBMASK (0x000000FF) 878 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_29_KF_B_MODE_PROBS_116_SHIFT (0) 879 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_29_KF_B_MODE_PROBS_116_SIGNED_FIELD IMG_FALSE 880 881 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_29, KF_B_MODE_PROBS_117 882 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_29_KF_B_MODE_PROBS_117_MASK (0x0000FF00) 883 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_29_KF_B_MODE_PROBS_117_LSBMASK (0x000000FF) 884 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_29_KF_B_MODE_PROBS_117_SHIFT (8) 885 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_29_KF_B_MODE_PROBS_117_SIGNED_FIELD IMG_FALSE 886 887 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_29, KF_B_MODE_PROBS_118 888 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_29_KF_B_MODE_PROBS_118_MASK (0x00FF0000) 889 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_29_KF_B_MODE_PROBS_118_LSBMASK (0x000000FF) 890 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_29_KF_B_MODE_PROBS_118_SHIFT (16) 891 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_29_KF_B_MODE_PROBS_118_SIGNED_FIELD IMG_FALSE 892 893 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_29, KF_B_MODE_PROBS_119 894 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_29_KF_B_MODE_PROBS_119_MASK (0xFF000000) 895 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_29_KF_B_MODE_PROBS_119_LSBMASK (0x000000FF) 896 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_29_KF_B_MODE_PROBS_119_SHIFT (24) 897 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_29_KF_B_MODE_PROBS_119_SIGNED_FIELD IMG_FALSE 898 899 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_30_OFFSET (0x0884) 900 901 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_30, KF_B_MODE_PROBS_120 902 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_30_KF_B_MODE_PROBS_120_MASK (0x000000FF) 903 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_30_KF_B_MODE_PROBS_120_LSBMASK (0x000000FF) 904 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_30_KF_B_MODE_PROBS_120_SHIFT (0) 905 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_30_KF_B_MODE_PROBS_120_SIGNED_FIELD IMG_FALSE 906 907 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_30, KF_B_MODE_PROBS_121 908 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_30_KF_B_MODE_PROBS_121_MASK (0x0000FF00) 909 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_30_KF_B_MODE_PROBS_121_LSBMASK (0x000000FF) 910 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_30_KF_B_MODE_PROBS_121_SHIFT (8) 911 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_30_KF_B_MODE_PROBS_121_SIGNED_FIELD IMG_FALSE 912 913 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_30, KF_B_MODE_PROBS_122 914 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_30_KF_B_MODE_PROBS_122_MASK (0x00FF0000) 915 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_30_KF_B_MODE_PROBS_122_LSBMASK (0x000000FF) 916 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_30_KF_B_MODE_PROBS_122_SHIFT (16) 917 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_30_KF_B_MODE_PROBS_122_SIGNED_FIELD IMG_FALSE 918 919 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_30, KF_B_MODE_PROBS_123 920 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_30_KF_B_MODE_PROBS_123_MASK (0xFF000000) 921 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_30_KF_B_MODE_PROBS_123_LSBMASK (0x000000FF) 922 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_30_KF_B_MODE_PROBS_123_SHIFT (24) 923 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_30_KF_B_MODE_PROBS_123_SIGNED_FIELD IMG_FALSE 924 925 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_31_OFFSET (0x0888) 926 927 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_31, KF_B_MODE_PROBS_124 928 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_31_KF_B_MODE_PROBS_124_MASK (0x000000FF) 929 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_31_KF_B_MODE_PROBS_124_LSBMASK (0x000000FF) 930 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_31_KF_B_MODE_PROBS_124_SHIFT (0) 931 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_31_KF_B_MODE_PROBS_124_SIGNED_FIELD IMG_FALSE 932 933 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_31, KF_B_MODE_PROBS_125 934 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_31_KF_B_MODE_PROBS_125_MASK (0x0000FF00) 935 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_31_KF_B_MODE_PROBS_125_LSBMASK (0x000000FF) 936 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_31_KF_B_MODE_PROBS_125_SHIFT (8) 937 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_31_KF_B_MODE_PROBS_125_SIGNED_FIELD IMG_FALSE 938 939 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_31, KF_B_MODE_PROBS_126 940 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_31_KF_B_MODE_PROBS_126_MASK (0x00FF0000) 941 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_31_KF_B_MODE_PROBS_126_LSBMASK (0x000000FF) 942 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_31_KF_B_MODE_PROBS_126_SHIFT (16) 943 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_31_KF_B_MODE_PROBS_126_SIGNED_FIELD IMG_FALSE 944 945 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_31, KF_B_MODE_PROBS_127 946 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_31_KF_B_MODE_PROBS_127_MASK (0xFF000000) 947 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_31_KF_B_MODE_PROBS_127_LSBMASK (0x000000FF) 948 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_31_KF_B_MODE_PROBS_127_SHIFT (24) 949 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_31_KF_B_MODE_PROBS_127_SIGNED_FIELD IMG_FALSE 950 951 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_32_OFFSET (0x088C) 952 953 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_32, KF_B_MODE_PROBS_128 954 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_32_KF_B_MODE_PROBS_128_MASK (0x000000FF) 955 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_32_KF_B_MODE_PROBS_128_LSBMASK (0x000000FF) 956 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_32_KF_B_MODE_PROBS_128_SHIFT (0) 957 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_32_KF_B_MODE_PROBS_128_SIGNED_FIELD IMG_FALSE 958 959 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_32, KF_B_MODE_PROBS_129 960 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_32_KF_B_MODE_PROBS_129_MASK (0x0000FF00) 961 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_32_KF_B_MODE_PROBS_129_LSBMASK (0x000000FF) 962 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_32_KF_B_MODE_PROBS_129_SHIFT (8) 963 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_32_KF_B_MODE_PROBS_129_SIGNED_FIELD IMG_FALSE 964 965 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_32, KF_B_MODE_PROBS_130 966 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_32_KF_B_MODE_PROBS_130_MASK (0x00FF0000) 967 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_32_KF_B_MODE_PROBS_130_LSBMASK (0x000000FF) 968 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_32_KF_B_MODE_PROBS_130_SHIFT (16) 969 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_32_KF_B_MODE_PROBS_130_SIGNED_FIELD IMG_FALSE 970 971 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_32, KF_B_MODE_PROBS_131 972 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_32_KF_B_MODE_PROBS_131_MASK (0xFF000000) 973 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_32_KF_B_MODE_PROBS_131_LSBMASK (0x000000FF) 974 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_32_KF_B_MODE_PROBS_131_SHIFT (24) 975 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_32_KF_B_MODE_PROBS_131_SIGNED_FIELD IMG_FALSE 976 977 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_33_OFFSET (0x0890) 978 979 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_33, KF_B_MODE_PROBS_132 980 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_33_KF_B_MODE_PROBS_132_MASK (0x000000FF) 981 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_33_KF_B_MODE_PROBS_132_LSBMASK (0x000000FF) 982 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_33_KF_B_MODE_PROBS_132_SHIFT (0) 983 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_33_KF_B_MODE_PROBS_132_SIGNED_FIELD IMG_FALSE 984 985 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_33, KF_B_MODE_PROBS_133 986 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_33_KF_B_MODE_PROBS_133_MASK (0x0000FF00) 987 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_33_KF_B_MODE_PROBS_133_LSBMASK (0x000000FF) 988 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_33_KF_B_MODE_PROBS_133_SHIFT (8) 989 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_33_KF_B_MODE_PROBS_133_SIGNED_FIELD IMG_FALSE 990 991 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_33, KF_B_MODE_PROBS_134 992 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_33_KF_B_MODE_PROBS_134_MASK (0x00FF0000) 993 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_33_KF_B_MODE_PROBS_134_LSBMASK (0x000000FF) 994 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_33_KF_B_MODE_PROBS_134_SHIFT (16) 995 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_33_KF_B_MODE_PROBS_134_SIGNED_FIELD IMG_FALSE 996 997 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_33, KF_B_MODE_PROBS_135 998 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_33_KF_B_MODE_PROBS_135_MASK (0xFF000000) 999 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_33_KF_B_MODE_PROBS_135_LSBMASK (0x000000FF) 1000 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_33_KF_B_MODE_PROBS_135_SHIFT (24) 1001 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_33_KF_B_MODE_PROBS_135_SIGNED_FIELD IMG_FALSE 1002 1003 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_34_OFFSET (0x0894) 1004 1005 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_34, KF_B_MODE_PROBS_136 1006 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_34_KF_B_MODE_PROBS_136_MASK (0x000000FF) 1007 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_34_KF_B_MODE_PROBS_136_LSBMASK (0x000000FF) 1008 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_34_KF_B_MODE_PROBS_136_SHIFT (0) 1009 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_34_KF_B_MODE_PROBS_136_SIGNED_FIELD IMG_FALSE 1010 1011 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_34, KF_B_MODE_PROBS_137 1012 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_34_KF_B_MODE_PROBS_137_MASK (0x0000FF00) 1013 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_34_KF_B_MODE_PROBS_137_LSBMASK (0x000000FF) 1014 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_34_KF_B_MODE_PROBS_137_SHIFT (8) 1015 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_34_KF_B_MODE_PROBS_137_SIGNED_FIELD IMG_FALSE 1016 1017 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_34, KF_B_MODE_PROBS_138 1018 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_34_KF_B_MODE_PROBS_138_MASK (0x00FF0000) 1019 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_34_KF_B_MODE_PROBS_138_LSBMASK (0x000000FF) 1020 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_34_KF_B_MODE_PROBS_138_SHIFT (16) 1021 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_34_KF_B_MODE_PROBS_138_SIGNED_FIELD IMG_FALSE 1022 1023 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_34, KF_B_MODE_PROBS_139 1024 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_34_KF_B_MODE_PROBS_139_MASK (0xFF000000) 1025 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_34_KF_B_MODE_PROBS_139_LSBMASK (0x000000FF) 1026 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_34_KF_B_MODE_PROBS_139_SHIFT (24) 1027 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_34_KF_B_MODE_PROBS_139_SIGNED_FIELD IMG_FALSE 1028 1029 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_35_OFFSET (0x0898) 1030 1031 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_35, KF_B_MODE_PROBS_140 1032 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_35_KF_B_MODE_PROBS_140_MASK (0x000000FF) 1033 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_35_KF_B_MODE_PROBS_140_LSBMASK (0x000000FF) 1034 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_35_KF_B_MODE_PROBS_140_SHIFT (0) 1035 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_35_KF_B_MODE_PROBS_140_SIGNED_FIELD IMG_FALSE 1036 1037 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_35, KF_B_MODE_PROBS_141 1038 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_35_KF_B_MODE_PROBS_141_MASK (0x0000FF00) 1039 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_35_KF_B_MODE_PROBS_141_LSBMASK (0x000000FF) 1040 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_35_KF_B_MODE_PROBS_141_SHIFT (8) 1041 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_35_KF_B_MODE_PROBS_141_SIGNED_FIELD IMG_FALSE 1042 1043 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_35, KF_B_MODE_PROBS_142 1044 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_35_KF_B_MODE_PROBS_142_MASK (0x00FF0000) 1045 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_35_KF_B_MODE_PROBS_142_LSBMASK (0x000000FF) 1046 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_35_KF_B_MODE_PROBS_142_SHIFT (16) 1047 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_35_KF_B_MODE_PROBS_142_SIGNED_FIELD IMG_FALSE 1048 1049 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_35, KF_B_MODE_PROBS_143 1050 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_35_KF_B_MODE_PROBS_143_MASK (0xFF000000) 1051 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_35_KF_B_MODE_PROBS_143_LSBMASK (0x000000FF) 1052 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_35_KF_B_MODE_PROBS_143_SHIFT (24) 1053 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_35_KF_B_MODE_PROBS_143_SIGNED_FIELD IMG_FALSE 1054 1055 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_36_OFFSET (0x089C) 1056 1057 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_36, KF_B_MODE_PROBS_144 1058 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_36_KF_B_MODE_PROBS_144_MASK (0x000000FF) 1059 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_36_KF_B_MODE_PROBS_144_LSBMASK (0x000000FF) 1060 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_36_KF_B_MODE_PROBS_144_SHIFT (0) 1061 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_36_KF_B_MODE_PROBS_144_SIGNED_FIELD IMG_FALSE 1062 1063 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_36, KF_B_MODE_PROBS_145 1064 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_36_KF_B_MODE_PROBS_145_MASK (0x0000FF00) 1065 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_36_KF_B_MODE_PROBS_145_LSBMASK (0x000000FF) 1066 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_36_KF_B_MODE_PROBS_145_SHIFT (8) 1067 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_36_KF_B_MODE_PROBS_145_SIGNED_FIELD IMG_FALSE 1068 1069 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_36, KF_B_MODE_PROBS_146 1070 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_36_KF_B_MODE_PROBS_146_MASK (0x00FF0000) 1071 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_36_KF_B_MODE_PROBS_146_LSBMASK (0x000000FF) 1072 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_36_KF_B_MODE_PROBS_146_SHIFT (16) 1073 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_36_KF_B_MODE_PROBS_146_SIGNED_FIELD IMG_FALSE 1074 1075 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_36, KF_B_MODE_PROBS_147 1076 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_36_KF_B_MODE_PROBS_147_MASK (0xFF000000) 1077 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_36_KF_B_MODE_PROBS_147_LSBMASK (0x000000FF) 1078 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_36_KF_B_MODE_PROBS_147_SHIFT (24) 1079 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_36_KF_B_MODE_PROBS_147_SIGNED_FIELD IMG_FALSE 1080 1081 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_37_OFFSET (0x08A0) 1082 1083 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_37, KF_B_MODE_PROBS_148 1084 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_37_KF_B_MODE_PROBS_148_MASK (0x000000FF) 1085 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_37_KF_B_MODE_PROBS_148_LSBMASK (0x000000FF) 1086 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_37_KF_B_MODE_PROBS_148_SHIFT (0) 1087 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_37_KF_B_MODE_PROBS_148_SIGNED_FIELD IMG_FALSE 1088 1089 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_37, KF_B_MODE_PROBS_149 1090 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_37_KF_B_MODE_PROBS_149_MASK (0x0000FF00) 1091 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_37_KF_B_MODE_PROBS_149_LSBMASK (0x000000FF) 1092 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_37_KF_B_MODE_PROBS_149_SHIFT (8) 1093 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_37_KF_B_MODE_PROBS_149_SIGNED_FIELD IMG_FALSE 1094 1095 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_37, KF_B_MODE_PROBS_150 1096 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_37_KF_B_MODE_PROBS_150_MASK (0x00FF0000) 1097 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_37_KF_B_MODE_PROBS_150_LSBMASK (0x000000FF) 1098 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_37_KF_B_MODE_PROBS_150_SHIFT (16) 1099 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_37_KF_B_MODE_PROBS_150_SIGNED_FIELD IMG_FALSE 1100 1101 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_37, KF_B_MODE_PROBS_151 1102 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_37_KF_B_MODE_PROBS_151_MASK (0xFF000000) 1103 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_37_KF_B_MODE_PROBS_151_LSBMASK (0x000000FF) 1104 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_37_KF_B_MODE_PROBS_151_SHIFT (24) 1105 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_37_KF_B_MODE_PROBS_151_SIGNED_FIELD IMG_FALSE 1106 1107 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_38_OFFSET (0x08A4) 1108 1109 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_38, KF_B_MODE_PROBS_152 1110 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_38_KF_B_MODE_PROBS_152_MASK (0x000000FF) 1111 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_38_KF_B_MODE_PROBS_152_LSBMASK (0x000000FF) 1112 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_38_KF_B_MODE_PROBS_152_SHIFT (0) 1113 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_38_KF_B_MODE_PROBS_152_SIGNED_FIELD IMG_FALSE 1114 1115 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_38, KF_B_MODE_PROBS_153 1116 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_38_KF_B_MODE_PROBS_153_MASK (0x0000FF00) 1117 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_38_KF_B_MODE_PROBS_153_LSBMASK (0x000000FF) 1118 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_38_KF_B_MODE_PROBS_153_SHIFT (8) 1119 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_38_KF_B_MODE_PROBS_153_SIGNED_FIELD IMG_FALSE 1120 1121 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_38, KF_B_MODE_PROBS_154 1122 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_38_KF_B_MODE_PROBS_154_MASK (0x00FF0000) 1123 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_38_KF_B_MODE_PROBS_154_LSBMASK (0x000000FF) 1124 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_38_KF_B_MODE_PROBS_154_SHIFT (16) 1125 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_38_KF_B_MODE_PROBS_154_SIGNED_FIELD IMG_FALSE 1126 1127 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_38, KF_B_MODE_PROBS_155 1128 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_38_KF_B_MODE_PROBS_155_MASK (0xFF000000) 1129 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_38_KF_B_MODE_PROBS_155_LSBMASK (0x000000FF) 1130 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_38_KF_B_MODE_PROBS_155_SHIFT (24) 1131 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_38_KF_B_MODE_PROBS_155_SIGNED_FIELD IMG_FALSE 1132 1133 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_39_OFFSET (0x08A8) 1134 1135 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_39, KF_B_MODE_PROBS_156 1136 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_39_KF_B_MODE_PROBS_156_MASK (0x000000FF) 1137 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_39_KF_B_MODE_PROBS_156_LSBMASK (0x000000FF) 1138 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_39_KF_B_MODE_PROBS_156_SHIFT (0) 1139 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_39_KF_B_MODE_PROBS_156_SIGNED_FIELD IMG_FALSE 1140 1141 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_39, KF_B_MODE_PROBS_157 1142 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_39_KF_B_MODE_PROBS_157_MASK (0x0000FF00) 1143 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_39_KF_B_MODE_PROBS_157_LSBMASK (0x000000FF) 1144 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_39_KF_B_MODE_PROBS_157_SHIFT (8) 1145 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_39_KF_B_MODE_PROBS_157_SIGNED_FIELD IMG_FALSE 1146 1147 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_39, KF_B_MODE_PROBS_158 1148 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_39_KF_B_MODE_PROBS_158_MASK (0x00FF0000) 1149 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_39_KF_B_MODE_PROBS_158_LSBMASK (0x000000FF) 1150 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_39_KF_B_MODE_PROBS_158_SHIFT (16) 1151 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_39_KF_B_MODE_PROBS_158_SIGNED_FIELD IMG_FALSE 1152 1153 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_39, KF_B_MODE_PROBS_159 1154 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_39_KF_B_MODE_PROBS_159_MASK (0xFF000000) 1155 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_39_KF_B_MODE_PROBS_159_LSBMASK (0x000000FF) 1156 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_39_KF_B_MODE_PROBS_159_SHIFT (24) 1157 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_39_KF_B_MODE_PROBS_159_SIGNED_FIELD IMG_FALSE 1158 1159 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_40_OFFSET (0x08AC) 1160 1161 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_40, KF_B_MODE_PROBS_160 1162 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_40_KF_B_MODE_PROBS_160_MASK (0x000000FF) 1163 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_40_KF_B_MODE_PROBS_160_LSBMASK (0x000000FF) 1164 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_40_KF_B_MODE_PROBS_160_SHIFT (0) 1165 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_40_KF_B_MODE_PROBS_160_SIGNED_FIELD IMG_FALSE 1166 1167 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_40, KF_B_MODE_PROBS_161 1168 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_40_KF_B_MODE_PROBS_161_MASK (0x0000FF00) 1169 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_40_KF_B_MODE_PROBS_161_LSBMASK (0x000000FF) 1170 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_40_KF_B_MODE_PROBS_161_SHIFT (8) 1171 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_40_KF_B_MODE_PROBS_161_SIGNED_FIELD IMG_FALSE 1172 1173 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_40, KF_B_MODE_PROBS_162 1174 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_40_KF_B_MODE_PROBS_162_MASK (0x00FF0000) 1175 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_40_KF_B_MODE_PROBS_162_LSBMASK (0x000000FF) 1176 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_40_KF_B_MODE_PROBS_162_SHIFT (16) 1177 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_40_KF_B_MODE_PROBS_162_SIGNED_FIELD IMG_FALSE 1178 1179 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_40, KF_B_MODE_PROBS_163 1180 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_40_KF_B_MODE_PROBS_163_MASK (0xFF000000) 1181 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_40_KF_B_MODE_PROBS_163_LSBMASK (0x000000FF) 1182 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_40_KF_B_MODE_PROBS_163_SHIFT (24) 1183 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_40_KF_B_MODE_PROBS_163_SIGNED_FIELD IMG_FALSE 1184 1185 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_41_OFFSET (0x08B0) 1186 1187 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_41, KF_B_MODE_PROBS_164 1188 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_41_KF_B_MODE_PROBS_164_MASK (0x000000FF) 1189 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_41_KF_B_MODE_PROBS_164_LSBMASK (0x000000FF) 1190 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_41_KF_B_MODE_PROBS_164_SHIFT (0) 1191 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_41_KF_B_MODE_PROBS_164_SIGNED_FIELD IMG_FALSE 1192 1193 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_41, KF_B_MODE_PROBS_165 1194 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_41_KF_B_MODE_PROBS_165_MASK (0x0000FF00) 1195 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_41_KF_B_MODE_PROBS_165_LSBMASK (0x000000FF) 1196 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_41_KF_B_MODE_PROBS_165_SHIFT (8) 1197 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_41_KF_B_MODE_PROBS_165_SIGNED_FIELD IMG_FALSE 1198 1199 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_41, KF_B_MODE_PROBS_166 1200 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_41_KF_B_MODE_PROBS_166_MASK (0x00FF0000) 1201 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_41_KF_B_MODE_PROBS_166_LSBMASK (0x000000FF) 1202 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_41_KF_B_MODE_PROBS_166_SHIFT (16) 1203 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_41_KF_B_MODE_PROBS_166_SIGNED_FIELD IMG_FALSE 1204 1205 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_41, KF_B_MODE_PROBS_167 1206 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_41_KF_B_MODE_PROBS_167_MASK (0xFF000000) 1207 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_41_KF_B_MODE_PROBS_167_LSBMASK (0x000000FF) 1208 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_41_KF_B_MODE_PROBS_167_SHIFT (24) 1209 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_41_KF_B_MODE_PROBS_167_SIGNED_FIELD IMG_FALSE 1210 1211 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_42_OFFSET (0x08B4) 1212 1213 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_42, KF_B_MODE_PROBS_168 1214 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_42_KF_B_MODE_PROBS_168_MASK (0x000000FF) 1215 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_42_KF_B_MODE_PROBS_168_LSBMASK (0x000000FF) 1216 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_42_KF_B_MODE_PROBS_168_SHIFT (0) 1217 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_42_KF_B_MODE_PROBS_168_SIGNED_FIELD IMG_FALSE 1218 1219 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_42, KF_B_MODE_PROBS_169 1220 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_42_KF_B_MODE_PROBS_169_MASK (0x0000FF00) 1221 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_42_KF_B_MODE_PROBS_169_LSBMASK (0x000000FF) 1222 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_42_KF_B_MODE_PROBS_169_SHIFT (8) 1223 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_42_KF_B_MODE_PROBS_169_SIGNED_FIELD IMG_FALSE 1224 1225 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_42, KF_B_MODE_PROBS_170 1226 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_42_KF_B_MODE_PROBS_170_MASK (0x00FF0000) 1227 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_42_KF_B_MODE_PROBS_170_LSBMASK (0x000000FF) 1228 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_42_KF_B_MODE_PROBS_170_SHIFT (16) 1229 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_42_KF_B_MODE_PROBS_170_SIGNED_FIELD IMG_FALSE 1230 1231 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_42, KF_B_MODE_PROBS_171 1232 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_42_KF_B_MODE_PROBS_171_MASK (0xFF000000) 1233 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_42_KF_B_MODE_PROBS_171_LSBMASK (0x000000FF) 1234 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_42_KF_B_MODE_PROBS_171_SHIFT (24) 1235 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_42_KF_B_MODE_PROBS_171_SIGNED_FIELD IMG_FALSE 1236 1237 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_43_OFFSET (0x08B8) 1238 1239 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_43, KF_B_MODE_PROBS_172 1240 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_43_KF_B_MODE_PROBS_172_MASK (0x000000FF) 1241 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_43_KF_B_MODE_PROBS_172_LSBMASK (0x000000FF) 1242 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_43_KF_B_MODE_PROBS_172_SHIFT (0) 1243 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_43_KF_B_MODE_PROBS_172_SIGNED_FIELD IMG_FALSE 1244 1245 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_43, KF_B_MODE_PROBS_173 1246 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_43_KF_B_MODE_PROBS_173_MASK (0x0000FF00) 1247 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_43_KF_B_MODE_PROBS_173_LSBMASK (0x000000FF) 1248 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_43_KF_B_MODE_PROBS_173_SHIFT (8) 1249 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_43_KF_B_MODE_PROBS_173_SIGNED_FIELD IMG_FALSE 1250 1251 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_43, KF_B_MODE_PROBS_174 1252 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_43_KF_B_MODE_PROBS_174_MASK (0x00FF0000) 1253 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_43_KF_B_MODE_PROBS_174_LSBMASK (0x000000FF) 1254 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_43_KF_B_MODE_PROBS_174_SHIFT (16) 1255 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_43_KF_B_MODE_PROBS_174_SIGNED_FIELD IMG_FALSE 1256 1257 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_43, KF_B_MODE_PROBS_175 1258 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_43_KF_B_MODE_PROBS_175_MASK (0xFF000000) 1259 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_43_KF_B_MODE_PROBS_175_LSBMASK (0x000000FF) 1260 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_43_KF_B_MODE_PROBS_175_SHIFT (24) 1261 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_43_KF_B_MODE_PROBS_175_SIGNED_FIELD IMG_FALSE 1262 1263 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_44_OFFSET (0x08BC) 1264 1265 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_44, KF_B_MODE_PROBS_176 1266 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_44_KF_B_MODE_PROBS_176_MASK (0x000000FF) 1267 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_44_KF_B_MODE_PROBS_176_LSBMASK (0x000000FF) 1268 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_44_KF_B_MODE_PROBS_176_SHIFT (0) 1269 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_44_KF_B_MODE_PROBS_176_SIGNED_FIELD IMG_FALSE 1270 1271 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_44, KF_B_MODE_PROBS_177 1272 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_44_KF_B_MODE_PROBS_177_MASK (0x0000FF00) 1273 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_44_KF_B_MODE_PROBS_177_LSBMASK (0x000000FF) 1274 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_44_KF_B_MODE_PROBS_177_SHIFT (8) 1275 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_44_KF_B_MODE_PROBS_177_SIGNED_FIELD IMG_FALSE 1276 1277 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_44, KF_B_MODE_PROBS_178 1278 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_44_KF_B_MODE_PROBS_178_MASK (0x00FF0000) 1279 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_44_KF_B_MODE_PROBS_178_LSBMASK (0x000000FF) 1280 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_44_KF_B_MODE_PROBS_178_SHIFT (16) 1281 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_44_KF_B_MODE_PROBS_178_SIGNED_FIELD IMG_FALSE 1282 1283 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_44, KF_B_MODE_PROBS_179 1284 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_44_KF_B_MODE_PROBS_179_MASK (0xFF000000) 1285 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_44_KF_B_MODE_PROBS_179_LSBMASK (0x000000FF) 1286 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_44_KF_B_MODE_PROBS_179_SHIFT (24) 1287 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_44_KF_B_MODE_PROBS_179_SIGNED_FIELD IMG_FALSE 1288 1289 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_45_OFFSET (0x08C0) 1290 1291 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_45, KF_B_MODE_PROBS_180 1292 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_45_KF_B_MODE_PROBS_180_MASK (0x000000FF) 1293 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_45_KF_B_MODE_PROBS_180_LSBMASK (0x000000FF) 1294 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_45_KF_B_MODE_PROBS_180_SHIFT (0) 1295 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_45_KF_B_MODE_PROBS_180_SIGNED_FIELD IMG_FALSE 1296 1297 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_45, KF_B_MODE_PROBS_181 1298 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_45_KF_B_MODE_PROBS_181_MASK (0x0000FF00) 1299 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_45_KF_B_MODE_PROBS_181_LSBMASK (0x000000FF) 1300 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_45_KF_B_MODE_PROBS_181_SHIFT (8) 1301 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_45_KF_B_MODE_PROBS_181_SIGNED_FIELD IMG_FALSE 1302 1303 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_45, KF_B_MODE_PROBS_182 1304 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_45_KF_B_MODE_PROBS_182_MASK (0x00FF0000) 1305 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_45_KF_B_MODE_PROBS_182_LSBMASK (0x000000FF) 1306 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_45_KF_B_MODE_PROBS_182_SHIFT (16) 1307 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_45_KF_B_MODE_PROBS_182_SIGNED_FIELD IMG_FALSE 1308 1309 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_45, KF_B_MODE_PROBS_183 1310 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_45_KF_B_MODE_PROBS_183_MASK (0xFF000000) 1311 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_45_KF_B_MODE_PROBS_183_LSBMASK (0x000000FF) 1312 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_45_KF_B_MODE_PROBS_183_SHIFT (24) 1313 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_45_KF_B_MODE_PROBS_183_SIGNED_FIELD IMG_FALSE 1314 1315 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_46_OFFSET (0x08C4) 1316 1317 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_46, KF_B_MODE_PROBS_184 1318 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_46_KF_B_MODE_PROBS_184_MASK (0x000000FF) 1319 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_46_KF_B_MODE_PROBS_184_LSBMASK (0x000000FF) 1320 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_46_KF_B_MODE_PROBS_184_SHIFT (0) 1321 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_46_KF_B_MODE_PROBS_184_SIGNED_FIELD IMG_FALSE 1322 1323 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_46, KF_B_MODE_PROBS_185 1324 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_46_KF_B_MODE_PROBS_185_MASK (0x0000FF00) 1325 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_46_KF_B_MODE_PROBS_185_LSBMASK (0x000000FF) 1326 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_46_KF_B_MODE_PROBS_185_SHIFT (8) 1327 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_46_KF_B_MODE_PROBS_185_SIGNED_FIELD IMG_FALSE 1328 1329 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_46, KF_B_MODE_PROBS_186 1330 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_46_KF_B_MODE_PROBS_186_MASK (0x00FF0000) 1331 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_46_KF_B_MODE_PROBS_186_LSBMASK (0x000000FF) 1332 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_46_KF_B_MODE_PROBS_186_SHIFT (16) 1333 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_46_KF_B_MODE_PROBS_186_SIGNED_FIELD IMG_FALSE 1334 1335 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_46, KF_B_MODE_PROBS_187 1336 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_46_KF_B_MODE_PROBS_187_MASK (0xFF000000) 1337 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_46_KF_B_MODE_PROBS_187_LSBMASK (0x000000FF) 1338 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_46_KF_B_MODE_PROBS_187_SHIFT (24) 1339 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_46_KF_B_MODE_PROBS_187_SIGNED_FIELD IMG_FALSE 1340 1341 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_47_OFFSET (0x08C8) 1342 1343 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_47, KF_B_MODE_PROBS_188 1344 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_47_KF_B_MODE_PROBS_188_MASK (0x000000FF) 1345 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_47_KF_B_MODE_PROBS_188_LSBMASK (0x000000FF) 1346 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_47_KF_B_MODE_PROBS_188_SHIFT (0) 1347 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_47_KF_B_MODE_PROBS_188_SIGNED_FIELD IMG_FALSE 1348 1349 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_47, KF_B_MODE_PROBS_189 1350 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_47_KF_B_MODE_PROBS_189_MASK (0x0000FF00) 1351 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_47_KF_B_MODE_PROBS_189_LSBMASK (0x000000FF) 1352 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_47_KF_B_MODE_PROBS_189_SHIFT (8) 1353 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_47_KF_B_MODE_PROBS_189_SIGNED_FIELD IMG_FALSE 1354 1355 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_47, KF_B_MODE_PROBS_190 1356 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_47_KF_B_MODE_PROBS_190_MASK (0x00FF0000) 1357 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_47_KF_B_MODE_PROBS_190_LSBMASK (0x000000FF) 1358 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_47_KF_B_MODE_PROBS_190_SHIFT (16) 1359 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_47_KF_B_MODE_PROBS_190_SIGNED_FIELD IMG_FALSE 1360 1361 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_47, KF_B_MODE_PROBS_191 1362 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_47_KF_B_MODE_PROBS_191_MASK (0xFF000000) 1363 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_47_KF_B_MODE_PROBS_191_LSBMASK (0x000000FF) 1364 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_47_KF_B_MODE_PROBS_191_SHIFT (24) 1365 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_47_KF_B_MODE_PROBS_191_SIGNED_FIELD IMG_FALSE 1366 1367 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_48_OFFSET (0x08CC) 1368 1369 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_48, KF_B_MODE_PROBS_192 1370 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_48_KF_B_MODE_PROBS_192_MASK (0x000000FF) 1371 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_48_KF_B_MODE_PROBS_192_LSBMASK (0x000000FF) 1372 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_48_KF_B_MODE_PROBS_192_SHIFT (0) 1373 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_48_KF_B_MODE_PROBS_192_SIGNED_FIELD IMG_FALSE 1374 1375 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_48, KF_B_MODE_PROBS_193 1376 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_48_KF_B_MODE_PROBS_193_MASK (0x0000FF00) 1377 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_48_KF_B_MODE_PROBS_193_LSBMASK (0x000000FF) 1378 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_48_KF_B_MODE_PROBS_193_SHIFT (8) 1379 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_48_KF_B_MODE_PROBS_193_SIGNED_FIELD IMG_FALSE 1380 1381 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_48, KF_B_MODE_PROBS_194 1382 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_48_KF_B_MODE_PROBS_194_MASK (0x00FF0000) 1383 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_48_KF_B_MODE_PROBS_194_LSBMASK (0x000000FF) 1384 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_48_KF_B_MODE_PROBS_194_SHIFT (16) 1385 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_48_KF_B_MODE_PROBS_194_SIGNED_FIELD IMG_FALSE 1386 1387 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_48, KF_B_MODE_PROBS_195 1388 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_48_KF_B_MODE_PROBS_195_MASK (0xFF000000) 1389 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_48_KF_B_MODE_PROBS_195_LSBMASK (0x000000FF) 1390 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_48_KF_B_MODE_PROBS_195_SHIFT (24) 1391 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_48_KF_B_MODE_PROBS_195_SIGNED_FIELD IMG_FALSE 1392 1393 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_49_OFFSET (0x08D0) 1394 1395 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_49, KF_B_MODE_PROBS_196 1396 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_49_KF_B_MODE_PROBS_196_MASK (0x000000FF) 1397 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_49_KF_B_MODE_PROBS_196_LSBMASK (0x000000FF) 1398 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_49_KF_B_MODE_PROBS_196_SHIFT (0) 1399 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_49_KF_B_MODE_PROBS_196_SIGNED_FIELD IMG_FALSE 1400 1401 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_49, KF_B_MODE_PROBS_197 1402 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_49_KF_B_MODE_PROBS_197_MASK (0x0000FF00) 1403 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_49_KF_B_MODE_PROBS_197_LSBMASK (0x000000FF) 1404 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_49_KF_B_MODE_PROBS_197_SHIFT (8) 1405 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_49_KF_B_MODE_PROBS_197_SIGNED_FIELD IMG_FALSE 1406 1407 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_49, KF_B_MODE_PROBS_198 1408 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_49_KF_B_MODE_PROBS_198_MASK (0x00FF0000) 1409 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_49_KF_B_MODE_PROBS_198_LSBMASK (0x000000FF) 1410 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_49_KF_B_MODE_PROBS_198_SHIFT (16) 1411 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_49_KF_B_MODE_PROBS_198_SIGNED_FIELD IMG_FALSE 1412 1413 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_49, KF_B_MODE_PROBS_199 1414 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_49_KF_B_MODE_PROBS_199_MASK (0xFF000000) 1415 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_49_KF_B_MODE_PROBS_199_LSBMASK (0x000000FF) 1416 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_49_KF_B_MODE_PROBS_199_SHIFT (24) 1417 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_49_KF_B_MODE_PROBS_199_SIGNED_FIELD IMG_FALSE 1418 1419 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_50_OFFSET (0x08D4) 1420 1421 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_50, KF_B_MODE_PROBS_200 1422 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_50_KF_B_MODE_PROBS_200_MASK (0x000000FF) 1423 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_50_KF_B_MODE_PROBS_200_LSBMASK (0x000000FF) 1424 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_50_KF_B_MODE_PROBS_200_SHIFT (0) 1425 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_50_KF_B_MODE_PROBS_200_SIGNED_FIELD IMG_FALSE 1426 1427 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_50, KF_B_MODE_PROBS_201 1428 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_50_KF_B_MODE_PROBS_201_MASK (0x0000FF00) 1429 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_50_KF_B_MODE_PROBS_201_LSBMASK (0x000000FF) 1430 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_50_KF_B_MODE_PROBS_201_SHIFT (8) 1431 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_50_KF_B_MODE_PROBS_201_SIGNED_FIELD IMG_FALSE 1432 1433 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_50, KF_B_MODE_PROBS_202 1434 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_50_KF_B_MODE_PROBS_202_MASK (0x00FF0000) 1435 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_50_KF_B_MODE_PROBS_202_LSBMASK (0x000000FF) 1436 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_50_KF_B_MODE_PROBS_202_SHIFT (16) 1437 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_50_KF_B_MODE_PROBS_202_SIGNED_FIELD IMG_FALSE 1438 1439 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_50, KF_B_MODE_PROBS_203 1440 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_50_KF_B_MODE_PROBS_203_MASK (0xFF000000) 1441 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_50_KF_B_MODE_PROBS_203_LSBMASK (0x000000FF) 1442 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_50_KF_B_MODE_PROBS_203_SHIFT (24) 1443 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_50_KF_B_MODE_PROBS_203_SIGNED_FIELD IMG_FALSE 1444 1445 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_51_OFFSET (0x08D8) 1446 1447 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_51, KF_B_MODE_PROBS_204 1448 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_51_KF_B_MODE_PROBS_204_MASK (0x000000FF) 1449 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_51_KF_B_MODE_PROBS_204_LSBMASK (0x000000FF) 1450 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_51_KF_B_MODE_PROBS_204_SHIFT (0) 1451 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_51_KF_B_MODE_PROBS_204_SIGNED_FIELD IMG_FALSE 1452 1453 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_51, KF_B_MODE_PROBS_205 1454 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_51_KF_B_MODE_PROBS_205_MASK (0x0000FF00) 1455 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_51_KF_B_MODE_PROBS_205_LSBMASK (0x000000FF) 1456 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_51_KF_B_MODE_PROBS_205_SHIFT (8) 1457 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_51_KF_B_MODE_PROBS_205_SIGNED_FIELD IMG_FALSE 1458 1459 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_51, KF_B_MODE_PROBS_206 1460 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_51_KF_B_MODE_PROBS_206_MASK (0x00FF0000) 1461 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_51_KF_B_MODE_PROBS_206_LSBMASK (0x000000FF) 1462 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_51_KF_B_MODE_PROBS_206_SHIFT (16) 1463 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_51_KF_B_MODE_PROBS_206_SIGNED_FIELD IMG_FALSE 1464 1465 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_51, KF_B_MODE_PROBS_207 1466 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_51_KF_B_MODE_PROBS_207_MASK (0xFF000000) 1467 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_51_KF_B_MODE_PROBS_207_LSBMASK (0x000000FF) 1468 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_51_KF_B_MODE_PROBS_207_SHIFT (24) 1469 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_51_KF_B_MODE_PROBS_207_SIGNED_FIELD IMG_FALSE 1470 1471 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_52_OFFSET (0x08DC) 1472 1473 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_52, KF_B_MODE_PROBS_208 1474 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_52_KF_B_MODE_PROBS_208_MASK (0x000000FF) 1475 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_52_KF_B_MODE_PROBS_208_LSBMASK (0x000000FF) 1476 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_52_KF_B_MODE_PROBS_208_SHIFT (0) 1477 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_52_KF_B_MODE_PROBS_208_SIGNED_FIELD IMG_FALSE 1478 1479 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_52, KF_B_MODE_PROBS_209 1480 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_52_KF_B_MODE_PROBS_209_MASK (0x0000FF00) 1481 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_52_KF_B_MODE_PROBS_209_LSBMASK (0x000000FF) 1482 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_52_KF_B_MODE_PROBS_209_SHIFT (8) 1483 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_52_KF_B_MODE_PROBS_209_SIGNED_FIELD IMG_FALSE 1484 1485 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_52, KF_B_MODE_PROBS_210 1486 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_52_KF_B_MODE_PROBS_210_MASK (0x00FF0000) 1487 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_52_KF_B_MODE_PROBS_210_LSBMASK (0x000000FF) 1488 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_52_KF_B_MODE_PROBS_210_SHIFT (16) 1489 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_52_KF_B_MODE_PROBS_210_SIGNED_FIELD IMG_FALSE 1490 1491 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_52, KF_B_MODE_PROBS_211 1492 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_52_KF_B_MODE_PROBS_211_MASK (0xFF000000) 1493 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_52_KF_B_MODE_PROBS_211_LSBMASK (0x000000FF) 1494 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_52_KF_B_MODE_PROBS_211_SHIFT (24) 1495 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_52_KF_B_MODE_PROBS_211_SIGNED_FIELD IMG_FALSE 1496 1497 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_53_OFFSET (0x08E0) 1498 1499 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_53, KF_B_MODE_PROBS_212 1500 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_53_KF_B_MODE_PROBS_212_MASK (0x000000FF) 1501 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_53_KF_B_MODE_PROBS_212_LSBMASK (0x000000FF) 1502 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_53_KF_B_MODE_PROBS_212_SHIFT (0) 1503 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_53_KF_B_MODE_PROBS_212_SIGNED_FIELD IMG_FALSE 1504 1505 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_53, KF_B_MODE_PROBS_213 1506 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_53_KF_B_MODE_PROBS_213_MASK (0x0000FF00) 1507 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_53_KF_B_MODE_PROBS_213_LSBMASK (0x000000FF) 1508 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_53_KF_B_MODE_PROBS_213_SHIFT (8) 1509 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_53_KF_B_MODE_PROBS_213_SIGNED_FIELD IMG_FALSE 1510 1511 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_53, KF_B_MODE_PROBS_214 1512 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_53_KF_B_MODE_PROBS_214_MASK (0x00FF0000) 1513 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_53_KF_B_MODE_PROBS_214_LSBMASK (0x000000FF) 1514 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_53_KF_B_MODE_PROBS_214_SHIFT (16) 1515 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_53_KF_B_MODE_PROBS_214_SIGNED_FIELD IMG_FALSE 1516 1517 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_53, KF_B_MODE_PROBS_215 1518 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_53_KF_B_MODE_PROBS_215_MASK (0xFF000000) 1519 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_53_KF_B_MODE_PROBS_215_LSBMASK (0x000000FF) 1520 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_53_KF_B_MODE_PROBS_215_SHIFT (24) 1521 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_53_KF_B_MODE_PROBS_215_SIGNED_FIELD IMG_FALSE 1522 1523 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_54_OFFSET (0x08E4) 1524 1525 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_54, KF_B_MODE_PROBS_216 1526 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_54_KF_B_MODE_PROBS_216_MASK (0x000000FF) 1527 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_54_KF_B_MODE_PROBS_216_LSBMASK (0x000000FF) 1528 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_54_KF_B_MODE_PROBS_216_SHIFT (0) 1529 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_54_KF_B_MODE_PROBS_216_SIGNED_FIELD IMG_FALSE 1530 1531 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_54, KF_B_MODE_PROBS_217 1532 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_54_KF_B_MODE_PROBS_217_MASK (0x0000FF00) 1533 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_54_KF_B_MODE_PROBS_217_LSBMASK (0x000000FF) 1534 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_54_KF_B_MODE_PROBS_217_SHIFT (8) 1535 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_54_KF_B_MODE_PROBS_217_SIGNED_FIELD IMG_FALSE 1536 1537 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_54, KF_B_MODE_PROBS_218 1538 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_54_KF_B_MODE_PROBS_218_MASK (0x00FF0000) 1539 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_54_KF_B_MODE_PROBS_218_LSBMASK (0x000000FF) 1540 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_54_KF_B_MODE_PROBS_218_SHIFT (16) 1541 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_54_KF_B_MODE_PROBS_218_SIGNED_FIELD IMG_FALSE 1542 1543 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_54, KF_B_MODE_PROBS_219 1544 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_54_KF_B_MODE_PROBS_219_MASK (0xFF000000) 1545 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_54_KF_B_MODE_PROBS_219_LSBMASK (0x000000FF) 1546 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_54_KF_B_MODE_PROBS_219_SHIFT (24) 1547 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_54_KF_B_MODE_PROBS_219_SIGNED_FIELD IMG_FALSE 1548 1549 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_55_OFFSET (0x08E8) 1550 1551 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_55, KF_B_MODE_PROBS_220 1552 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_55_KF_B_MODE_PROBS_220_MASK (0x000000FF) 1553 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_55_KF_B_MODE_PROBS_220_LSBMASK (0x000000FF) 1554 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_55_KF_B_MODE_PROBS_220_SHIFT (0) 1555 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_55_KF_B_MODE_PROBS_220_SIGNED_FIELD IMG_FALSE 1556 1557 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_55, KF_B_MODE_PROBS_221 1558 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_55_KF_B_MODE_PROBS_221_MASK (0x0000FF00) 1559 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_55_KF_B_MODE_PROBS_221_LSBMASK (0x000000FF) 1560 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_55_KF_B_MODE_PROBS_221_SHIFT (8) 1561 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_55_KF_B_MODE_PROBS_221_SIGNED_FIELD IMG_FALSE 1562 1563 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_55, KF_B_MODE_PROBS_222 1564 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_55_KF_B_MODE_PROBS_222_MASK (0x00FF0000) 1565 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_55_KF_B_MODE_PROBS_222_LSBMASK (0x000000FF) 1566 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_55_KF_B_MODE_PROBS_222_SHIFT (16) 1567 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_55_KF_B_MODE_PROBS_222_SIGNED_FIELD IMG_FALSE 1568 1569 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_55, KF_B_MODE_PROBS_223 1570 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_55_KF_B_MODE_PROBS_223_MASK (0xFF000000) 1571 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_55_KF_B_MODE_PROBS_223_LSBMASK (0x000000FF) 1572 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_55_KF_B_MODE_PROBS_223_SHIFT (24) 1573 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_55_KF_B_MODE_PROBS_223_SIGNED_FIELD IMG_FALSE 1574 1575 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_56_OFFSET (0x08EC) 1576 1577 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_56, KF_B_MODE_PROBS_224 1578 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_56_KF_B_MODE_PROBS_224_MASK (0x000000FF) 1579 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_56_KF_B_MODE_PROBS_224_LSBMASK (0x000000FF) 1580 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_56_KF_B_MODE_PROBS_224_SHIFT (0) 1581 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_56_KF_B_MODE_PROBS_224_SIGNED_FIELD IMG_FALSE 1582 1583 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_56, KF_B_MODE_PROBS_225 1584 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_56_KF_B_MODE_PROBS_225_MASK (0x0000FF00) 1585 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_56_KF_B_MODE_PROBS_225_LSBMASK (0x000000FF) 1586 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_56_KF_B_MODE_PROBS_225_SHIFT (8) 1587 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_56_KF_B_MODE_PROBS_225_SIGNED_FIELD IMG_FALSE 1588 1589 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_56, KF_B_MODE_PROBS_226 1590 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_56_KF_B_MODE_PROBS_226_MASK (0x00FF0000) 1591 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_56_KF_B_MODE_PROBS_226_LSBMASK (0x000000FF) 1592 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_56_KF_B_MODE_PROBS_226_SHIFT (16) 1593 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_56_KF_B_MODE_PROBS_226_SIGNED_FIELD IMG_FALSE 1594 1595 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_56, KF_B_MODE_PROBS_227 1596 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_56_KF_B_MODE_PROBS_227_MASK (0xFF000000) 1597 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_56_KF_B_MODE_PROBS_227_LSBMASK (0x000000FF) 1598 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_56_KF_B_MODE_PROBS_227_SHIFT (24) 1599 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_56_KF_B_MODE_PROBS_227_SIGNED_FIELD IMG_FALSE 1600 1601 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_57_OFFSET (0x08F0) 1602 1603 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_57, KF_B_MODE_PROBS_228 1604 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_57_KF_B_MODE_PROBS_228_MASK (0x000000FF) 1605 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_57_KF_B_MODE_PROBS_228_LSBMASK (0x000000FF) 1606 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_57_KF_B_MODE_PROBS_228_SHIFT (0) 1607 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_57_KF_B_MODE_PROBS_228_SIGNED_FIELD IMG_FALSE 1608 1609 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_57, KF_B_MODE_PROBS_229 1610 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_57_KF_B_MODE_PROBS_229_MASK (0x0000FF00) 1611 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_57_KF_B_MODE_PROBS_229_LSBMASK (0x000000FF) 1612 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_57_KF_B_MODE_PROBS_229_SHIFT (8) 1613 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_57_KF_B_MODE_PROBS_229_SIGNED_FIELD IMG_FALSE 1614 1615 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_57, KF_B_MODE_PROBS_230 1616 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_57_KF_B_MODE_PROBS_230_MASK (0x00FF0000) 1617 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_57_KF_B_MODE_PROBS_230_LSBMASK (0x000000FF) 1618 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_57_KF_B_MODE_PROBS_230_SHIFT (16) 1619 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_57_KF_B_MODE_PROBS_230_SIGNED_FIELD IMG_FALSE 1620 1621 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_57, KF_B_MODE_PROBS_231 1622 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_57_KF_B_MODE_PROBS_231_MASK (0xFF000000) 1623 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_57_KF_B_MODE_PROBS_231_LSBMASK (0x000000FF) 1624 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_57_KF_B_MODE_PROBS_231_SHIFT (24) 1625 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_57_KF_B_MODE_PROBS_231_SIGNED_FIELD IMG_FALSE 1626 1627 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_58_OFFSET (0x08F4) 1628 1629 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_58, KF_B_MODE_PROBS_232 1630 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_58_KF_B_MODE_PROBS_232_MASK (0x000000FF) 1631 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_58_KF_B_MODE_PROBS_232_LSBMASK (0x000000FF) 1632 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_58_KF_B_MODE_PROBS_232_SHIFT (0) 1633 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_58_KF_B_MODE_PROBS_232_SIGNED_FIELD IMG_FALSE 1634 1635 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_58, KF_B_MODE_PROBS_233 1636 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_58_KF_B_MODE_PROBS_233_MASK (0x0000FF00) 1637 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_58_KF_B_MODE_PROBS_233_LSBMASK (0x000000FF) 1638 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_58_KF_B_MODE_PROBS_233_SHIFT (8) 1639 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_58_KF_B_MODE_PROBS_233_SIGNED_FIELD IMG_FALSE 1640 1641 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_58, KF_B_MODE_PROBS_234 1642 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_58_KF_B_MODE_PROBS_234_MASK (0x00FF0000) 1643 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_58_KF_B_MODE_PROBS_234_LSBMASK (0x000000FF) 1644 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_58_KF_B_MODE_PROBS_234_SHIFT (16) 1645 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_58_KF_B_MODE_PROBS_234_SIGNED_FIELD IMG_FALSE 1646 1647 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_58, KF_B_MODE_PROBS_235 1648 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_58_KF_B_MODE_PROBS_235_MASK (0xFF000000) 1649 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_58_KF_B_MODE_PROBS_235_LSBMASK (0x000000FF) 1650 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_58_KF_B_MODE_PROBS_235_SHIFT (24) 1651 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_58_KF_B_MODE_PROBS_235_SIGNED_FIELD IMG_FALSE 1652 1653 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_59_OFFSET (0x08F8) 1654 1655 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_59, KF_B_MODE_PROBS_236 1656 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_59_KF_B_MODE_PROBS_236_MASK (0x000000FF) 1657 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_59_KF_B_MODE_PROBS_236_LSBMASK (0x000000FF) 1658 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_59_KF_B_MODE_PROBS_236_SHIFT (0) 1659 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_59_KF_B_MODE_PROBS_236_SIGNED_FIELD IMG_FALSE 1660 1661 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_59, KF_B_MODE_PROBS_237 1662 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_59_KF_B_MODE_PROBS_237_MASK (0x0000FF00) 1663 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_59_KF_B_MODE_PROBS_237_LSBMASK (0x000000FF) 1664 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_59_KF_B_MODE_PROBS_237_SHIFT (8) 1665 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_59_KF_B_MODE_PROBS_237_SIGNED_FIELD IMG_FALSE 1666 1667 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_59, KF_B_MODE_PROBS_238 1668 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_59_KF_B_MODE_PROBS_238_MASK (0x00FF0000) 1669 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_59_KF_B_MODE_PROBS_238_LSBMASK (0x000000FF) 1670 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_59_KF_B_MODE_PROBS_238_SHIFT (16) 1671 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_59_KF_B_MODE_PROBS_238_SIGNED_FIELD IMG_FALSE 1672 1673 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_59, KF_B_MODE_PROBS_239 1674 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_59_KF_B_MODE_PROBS_239_MASK (0xFF000000) 1675 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_59_KF_B_MODE_PROBS_239_LSBMASK (0x000000FF) 1676 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_59_KF_B_MODE_PROBS_239_SHIFT (24) 1677 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_59_KF_B_MODE_PROBS_239_SIGNED_FIELD IMG_FALSE 1678 1679 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_60_OFFSET (0x08FC) 1680 1681 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_60, KF_B_MODE_PROBS_240 1682 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_60_KF_B_MODE_PROBS_240_MASK (0x000000FF) 1683 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_60_KF_B_MODE_PROBS_240_LSBMASK (0x000000FF) 1684 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_60_KF_B_MODE_PROBS_240_SHIFT (0) 1685 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_60_KF_B_MODE_PROBS_240_SIGNED_FIELD IMG_FALSE 1686 1687 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_60, KF_B_MODE_PROBS_241 1688 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_60_KF_B_MODE_PROBS_241_MASK (0x0000FF00) 1689 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_60_KF_B_MODE_PROBS_241_LSBMASK (0x000000FF) 1690 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_60_KF_B_MODE_PROBS_241_SHIFT (8) 1691 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_60_KF_B_MODE_PROBS_241_SIGNED_FIELD IMG_FALSE 1692 1693 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_60, KF_B_MODE_PROBS_242 1694 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_60_KF_B_MODE_PROBS_242_MASK (0x00FF0000) 1695 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_60_KF_B_MODE_PROBS_242_LSBMASK (0x000000FF) 1696 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_60_KF_B_MODE_PROBS_242_SHIFT (16) 1697 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_60_KF_B_MODE_PROBS_242_SIGNED_FIELD IMG_FALSE 1698 1699 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_60, KF_B_MODE_PROBS_243 1700 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_60_KF_B_MODE_PROBS_243_MASK (0xFF000000) 1701 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_60_KF_B_MODE_PROBS_243_LSBMASK (0x000000FF) 1702 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_60_KF_B_MODE_PROBS_243_SHIFT (24) 1703 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_60_KF_B_MODE_PROBS_243_SIGNED_FIELD IMG_FALSE 1704 1705 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_61_OFFSET (0x0900) 1706 1707 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_61, KF_B_MODE_PROBS_244 1708 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_61_KF_B_MODE_PROBS_244_MASK (0x000000FF) 1709 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_61_KF_B_MODE_PROBS_244_LSBMASK (0x000000FF) 1710 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_61_KF_B_MODE_PROBS_244_SHIFT (0) 1711 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_61_KF_B_MODE_PROBS_244_SIGNED_FIELD IMG_FALSE 1712 1713 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_61, KF_B_MODE_PROBS_245 1714 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_61_KF_B_MODE_PROBS_245_MASK (0x0000FF00) 1715 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_61_KF_B_MODE_PROBS_245_LSBMASK (0x000000FF) 1716 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_61_KF_B_MODE_PROBS_245_SHIFT (8) 1717 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_61_KF_B_MODE_PROBS_245_SIGNED_FIELD IMG_FALSE 1718 1719 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_61, KF_B_MODE_PROBS_246 1720 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_61_KF_B_MODE_PROBS_246_MASK (0x00FF0000) 1721 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_61_KF_B_MODE_PROBS_246_LSBMASK (0x000000FF) 1722 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_61_KF_B_MODE_PROBS_246_SHIFT (16) 1723 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_61_KF_B_MODE_PROBS_246_SIGNED_FIELD IMG_FALSE 1724 1725 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_61, KF_B_MODE_PROBS_247 1726 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_61_KF_B_MODE_PROBS_247_MASK (0xFF000000) 1727 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_61_KF_B_MODE_PROBS_247_LSBMASK (0x000000FF) 1728 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_61_KF_B_MODE_PROBS_247_SHIFT (24) 1729 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_61_KF_B_MODE_PROBS_247_SIGNED_FIELD IMG_FALSE 1730 1731 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_62_OFFSET (0x0904) 1732 1733 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_62, KF_B_MODE_PROBS_248 1734 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_62_KF_B_MODE_PROBS_248_MASK (0x000000FF) 1735 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_62_KF_B_MODE_PROBS_248_LSBMASK (0x000000FF) 1736 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_62_KF_B_MODE_PROBS_248_SHIFT (0) 1737 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_62_KF_B_MODE_PROBS_248_SIGNED_FIELD IMG_FALSE 1738 1739 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_62, KF_B_MODE_PROBS_249 1740 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_62_KF_B_MODE_PROBS_249_MASK (0x0000FF00) 1741 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_62_KF_B_MODE_PROBS_249_LSBMASK (0x000000FF) 1742 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_62_KF_B_MODE_PROBS_249_SHIFT (8) 1743 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_62_KF_B_MODE_PROBS_249_SIGNED_FIELD IMG_FALSE 1744 1745 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_62, KF_B_MODE_PROBS_250 1746 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_62_KF_B_MODE_PROBS_250_MASK (0x00FF0000) 1747 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_62_KF_B_MODE_PROBS_250_LSBMASK (0x000000FF) 1748 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_62_KF_B_MODE_PROBS_250_SHIFT (16) 1749 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_62_KF_B_MODE_PROBS_250_SIGNED_FIELD IMG_FALSE 1750 1751 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_62, KF_B_MODE_PROBS_251 1752 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_62_KF_B_MODE_PROBS_251_MASK (0xFF000000) 1753 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_62_KF_B_MODE_PROBS_251_LSBMASK (0x000000FF) 1754 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_62_KF_B_MODE_PROBS_251_SHIFT (24) 1755 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_62_KF_B_MODE_PROBS_251_SIGNED_FIELD IMG_FALSE 1756 1757 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_63_OFFSET (0x0908) 1758 1759 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_63, KF_B_MODE_PROBS_252 1760 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_63_KF_B_MODE_PROBS_252_MASK (0x000000FF) 1761 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_63_KF_B_MODE_PROBS_252_LSBMASK (0x000000FF) 1762 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_63_KF_B_MODE_PROBS_252_SHIFT (0) 1763 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_63_KF_B_MODE_PROBS_252_SIGNED_FIELD IMG_FALSE 1764 1765 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_63, KF_B_MODE_PROBS_253 1766 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_63_KF_B_MODE_PROBS_253_MASK (0x0000FF00) 1767 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_63_KF_B_MODE_PROBS_253_LSBMASK (0x000000FF) 1768 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_63_KF_B_MODE_PROBS_253_SHIFT (8) 1769 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_63_KF_B_MODE_PROBS_253_SIGNED_FIELD IMG_FALSE 1770 1771 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_63, KF_B_MODE_PROBS_254 1772 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_63_KF_B_MODE_PROBS_254_MASK (0x00FF0000) 1773 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_63_KF_B_MODE_PROBS_254_LSBMASK (0x000000FF) 1774 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_63_KF_B_MODE_PROBS_254_SHIFT (16) 1775 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_63_KF_B_MODE_PROBS_254_SIGNED_FIELD IMG_FALSE 1776 1777 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_63, KF_B_MODE_PROBS_255 1778 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_63_KF_B_MODE_PROBS_255_MASK (0xFF000000) 1779 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_63_KF_B_MODE_PROBS_255_LSBMASK (0x000000FF) 1780 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_63_KF_B_MODE_PROBS_255_SHIFT (24) 1781 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_63_KF_B_MODE_PROBS_255_SIGNED_FIELD IMG_FALSE 1782 1783 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_64_OFFSET (0x090C) 1784 1785 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_64, KF_B_MODE_PROBS_256 1786 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_64_KF_B_MODE_PROBS_256_MASK (0x000000FF) 1787 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_64_KF_B_MODE_PROBS_256_LSBMASK (0x000000FF) 1788 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_64_KF_B_MODE_PROBS_256_SHIFT (0) 1789 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_64_KF_B_MODE_PROBS_256_SIGNED_FIELD IMG_FALSE 1790 1791 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_64, KF_B_MODE_PROBS_257 1792 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_64_KF_B_MODE_PROBS_257_MASK (0x0000FF00) 1793 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_64_KF_B_MODE_PROBS_257_LSBMASK (0x000000FF) 1794 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_64_KF_B_MODE_PROBS_257_SHIFT (8) 1795 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_64_KF_B_MODE_PROBS_257_SIGNED_FIELD IMG_FALSE 1796 1797 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_64, KF_B_MODE_PROBS_258 1798 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_64_KF_B_MODE_PROBS_258_MASK (0x00FF0000) 1799 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_64_KF_B_MODE_PROBS_258_LSBMASK (0x000000FF) 1800 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_64_KF_B_MODE_PROBS_258_SHIFT (16) 1801 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_64_KF_B_MODE_PROBS_258_SIGNED_FIELD IMG_FALSE 1802 1803 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_64, KF_B_MODE_PROBS_259 1804 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_64_KF_B_MODE_PROBS_259_MASK (0xFF000000) 1805 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_64_KF_B_MODE_PROBS_259_LSBMASK (0x000000FF) 1806 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_64_KF_B_MODE_PROBS_259_SHIFT (24) 1807 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_64_KF_B_MODE_PROBS_259_SIGNED_FIELD IMG_FALSE 1808 1809 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_65_OFFSET (0x0910) 1810 1811 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_65, KF_B_MODE_PROBS_260 1812 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_65_KF_B_MODE_PROBS_260_MASK (0x000000FF) 1813 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_65_KF_B_MODE_PROBS_260_LSBMASK (0x000000FF) 1814 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_65_KF_B_MODE_PROBS_260_SHIFT (0) 1815 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_65_KF_B_MODE_PROBS_260_SIGNED_FIELD IMG_FALSE 1816 1817 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_65, KF_B_MODE_PROBS_261 1818 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_65_KF_B_MODE_PROBS_261_MASK (0x0000FF00) 1819 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_65_KF_B_MODE_PROBS_261_LSBMASK (0x000000FF) 1820 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_65_KF_B_MODE_PROBS_261_SHIFT (8) 1821 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_65_KF_B_MODE_PROBS_261_SIGNED_FIELD IMG_FALSE 1822 1823 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_65, KF_B_MODE_PROBS_262 1824 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_65_KF_B_MODE_PROBS_262_MASK (0x00FF0000) 1825 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_65_KF_B_MODE_PROBS_262_LSBMASK (0x000000FF) 1826 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_65_KF_B_MODE_PROBS_262_SHIFT (16) 1827 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_65_KF_B_MODE_PROBS_262_SIGNED_FIELD IMG_FALSE 1828 1829 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_65, KF_B_MODE_PROBS_263 1830 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_65_KF_B_MODE_PROBS_263_MASK (0xFF000000) 1831 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_65_KF_B_MODE_PROBS_263_LSBMASK (0x000000FF) 1832 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_65_KF_B_MODE_PROBS_263_SHIFT (24) 1833 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_65_KF_B_MODE_PROBS_263_SIGNED_FIELD IMG_FALSE 1834 1835 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_66_OFFSET (0x0914) 1836 1837 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_66, KF_B_MODE_PROBS_264 1838 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_66_KF_B_MODE_PROBS_264_MASK (0x000000FF) 1839 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_66_KF_B_MODE_PROBS_264_LSBMASK (0x000000FF) 1840 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_66_KF_B_MODE_PROBS_264_SHIFT (0) 1841 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_66_KF_B_MODE_PROBS_264_SIGNED_FIELD IMG_FALSE 1842 1843 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_66, KF_B_MODE_PROBS_265 1844 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_66_KF_B_MODE_PROBS_265_MASK (0x0000FF00) 1845 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_66_KF_B_MODE_PROBS_265_LSBMASK (0x000000FF) 1846 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_66_KF_B_MODE_PROBS_265_SHIFT (8) 1847 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_66_KF_B_MODE_PROBS_265_SIGNED_FIELD IMG_FALSE 1848 1849 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_66, KF_B_MODE_PROBS_266 1850 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_66_KF_B_MODE_PROBS_266_MASK (0x00FF0000) 1851 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_66_KF_B_MODE_PROBS_266_LSBMASK (0x000000FF) 1852 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_66_KF_B_MODE_PROBS_266_SHIFT (16) 1853 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_66_KF_B_MODE_PROBS_266_SIGNED_FIELD IMG_FALSE 1854 1855 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_66, KF_B_MODE_PROBS_267 1856 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_66_KF_B_MODE_PROBS_267_MASK (0xFF000000) 1857 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_66_KF_B_MODE_PROBS_267_LSBMASK (0x000000FF) 1858 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_66_KF_B_MODE_PROBS_267_SHIFT (24) 1859 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_66_KF_B_MODE_PROBS_267_SIGNED_FIELD IMG_FALSE 1860 1861 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_67_OFFSET (0x0918) 1862 1863 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_67, KF_B_MODE_PROBS_268 1864 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_67_KF_B_MODE_PROBS_268_MASK (0x000000FF) 1865 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_67_KF_B_MODE_PROBS_268_LSBMASK (0x000000FF) 1866 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_67_KF_B_MODE_PROBS_268_SHIFT (0) 1867 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_67_KF_B_MODE_PROBS_268_SIGNED_FIELD IMG_FALSE 1868 1869 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_67, KF_B_MODE_PROBS_269 1870 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_67_KF_B_MODE_PROBS_269_MASK (0x0000FF00) 1871 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_67_KF_B_MODE_PROBS_269_LSBMASK (0x000000FF) 1872 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_67_KF_B_MODE_PROBS_269_SHIFT (8) 1873 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_67_KF_B_MODE_PROBS_269_SIGNED_FIELD IMG_FALSE 1874 1875 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_67, KF_B_MODE_PROBS_270 1876 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_67_KF_B_MODE_PROBS_270_MASK (0x00FF0000) 1877 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_67_KF_B_MODE_PROBS_270_LSBMASK (0x000000FF) 1878 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_67_KF_B_MODE_PROBS_270_SHIFT (16) 1879 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_67_KF_B_MODE_PROBS_270_SIGNED_FIELD IMG_FALSE 1880 1881 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_67, KF_B_MODE_PROBS_271 1882 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_67_KF_B_MODE_PROBS_271_MASK (0xFF000000) 1883 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_67_KF_B_MODE_PROBS_271_LSBMASK (0x000000FF) 1884 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_67_KF_B_MODE_PROBS_271_SHIFT (24) 1885 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_67_KF_B_MODE_PROBS_271_SIGNED_FIELD IMG_FALSE 1886 1887 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_68_OFFSET (0x091C) 1888 1889 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_68, KF_B_MODE_PROBS_272 1890 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_68_KF_B_MODE_PROBS_272_MASK (0x000000FF) 1891 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_68_KF_B_MODE_PROBS_272_LSBMASK (0x000000FF) 1892 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_68_KF_B_MODE_PROBS_272_SHIFT (0) 1893 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_68_KF_B_MODE_PROBS_272_SIGNED_FIELD IMG_FALSE 1894 1895 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_68, KF_B_MODE_PROBS_273 1896 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_68_KF_B_MODE_PROBS_273_MASK (0x0000FF00) 1897 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_68_KF_B_MODE_PROBS_273_LSBMASK (0x000000FF) 1898 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_68_KF_B_MODE_PROBS_273_SHIFT (8) 1899 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_68_KF_B_MODE_PROBS_273_SIGNED_FIELD IMG_FALSE 1900 1901 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_68, KF_B_MODE_PROBS_274 1902 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_68_KF_B_MODE_PROBS_274_MASK (0x00FF0000) 1903 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_68_KF_B_MODE_PROBS_274_LSBMASK (0x000000FF) 1904 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_68_KF_B_MODE_PROBS_274_SHIFT (16) 1905 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_68_KF_B_MODE_PROBS_274_SIGNED_FIELD IMG_FALSE 1906 1907 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_68, KF_B_MODE_PROBS_275 1908 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_68_KF_B_MODE_PROBS_275_MASK (0xFF000000) 1909 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_68_KF_B_MODE_PROBS_275_LSBMASK (0x000000FF) 1910 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_68_KF_B_MODE_PROBS_275_SHIFT (24) 1911 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_68_KF_B_MODE_PROBS_275_SIGNED_FIELD IMG_FALSE 1912 1913 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_69_OFFSET (0x0920) 1914 1915 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_69, KF_B_MODE_PROBS_276 1916 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_69_KF_B_MODE_PROBS_276_MASK (0x000000FF) 1917 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_69_KF_B_MODE_PROBS_276_LSBMASK (0x000000FF) 1918 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_69_KF_B_MODE_PROBS_276_SHIFT (0) 1919 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_69_KF_B_MODE_PROBS_276_SIGNED_FIELD IMG_FALSE 1920 1921 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_69, KF_B_MODE_PROBS_277 1922 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_69_KF_B_MODE_PROBS_277_MASK (0x0000FF00) 1923 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_69_KF_B_MODE_PROBS_277_LSBMASK (0x000000FF) 1924 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_69_KF_B_MODE_PROBS_277_SHIFT (8) 1925 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_69_KF_B_MODE_PROBS_277_SIGNED_FIELD IMG_FALSE 1926 1927 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_69, KF_B_MODE_PROBS_278 1928 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_69_KF_B_MODE_PROBS_278_MASK (0x00FF0000) 1929 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_69_KF_B_MODE_PROBS_278_LSBMASK (0x000000FF) 1930 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_69_KF_B_MODE_PROBS_278_SHIFT (16) 1931 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_69_KF_B_MODE_PROBS_278_SIGNED_FIELD IMG_FALSE 1932 1933 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_69, KF_B_MODE_PROBS_279 1934 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_69_KF_B_MODE_PROBS_279_MASK (0xFF000000) 1935 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_69_KF_B_MODE_PROBS_279_LSBMASK (0x000000FF) 1936 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_69_KF_B_MODE_PROBS_279_SHIFT (24) 1937 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_69_KF_B_MODE_PROBS_279_SIGNED_FIELD IMG_FALSE 1938 1939 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_70_OFFSET (0x0924) 1940 1941 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_70, KF_B_MODE_PROBS_280 1942 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_70_KF_B_MODE_PROBS_280_MASK (0x000000FF) 1943 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_70_KF_B_MODE_PROBS_280_LSBMASK (0x000000FF) 1944 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_70_KF_B_MODE_PROBS_280_SHIFT (0) 1945 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_70_KF_B_MODE_PROBS_280_SIGNED_FIELD IMG_FALSE 1946 1947 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_70, KF_B_MODE_PROBS_281 1948 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_70_KF_B_MODE_PROBS_281_MASK (0x0000FF00) 1949 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_70_KF_B_MODE_PROBS_281_LSBMASK (0x000000FF) 1950 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_70_KF_B_MODE_PROBS_281_SHIFT (8) 1951 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_70_KF_B_MODE_PROBS_281_SIGNED_FIELD IMG_FALSE 1952 1953 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_70, KF_B_MODE_PROBS_282 1954 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_70_KF_B_MODE_PROBS_282_MASK (0x00FF0000) 1955 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_70_KF_B_MODE_PROBS_282_LSBMASK (0x000000FF) 1956 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_70_KF_B_MODE_PROBS_282_SHIFT (16) 1957 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_70_KF_B_MODE_PROBS_282_SIGNED_FIELD IMG_FALSE 1958 1959 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_70, KF_B_MODE_PROBS_283 1960 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_70_KF_B_MODE_PROBS_283_MASK (0xFF000000) 1961 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_70_KF_B_MODE_PROBS_283_LSBMASK (0x000000FF) 1962 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_70_KF_B_MODE_PROBS_283_SHIFT (24) 1963 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_70_KF_B_MODE_PROBS_283_SIGNED_FIELD IMG_FALSE 1964 1965 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_71_OFFSET (0x0928) 1966 1967 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_71, KF_B_MODE_PROBS_284 1968 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_71_KF_B_MODE_PROBS_284_MASK (0x000000FF) 1969 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_71_KF_B_MODE_PROBS_284_LSBMASK (0x000000FF) 1970 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_71_KF_B_MODE_PROBS_284_SHIFT (0) 1971 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_71_KF_B_MODE_PROBS_284_SIGNED_FIELD IMG_FALSE 1972 1973 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_71, KF_B_MODE_PROBS_285 1974 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_71_KF_B_MODE_PROBS_285_MASK (0x0000FF00) 1975 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_71_KF_B_MODE_PROBS_285_LSBMASK (0x000000FF) 1976 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_71_KF_B_MODE_PROBS_285_SHIFT (8) 1977 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_71_KF_B_MODE_PROBS_285_SIGNED_FIELD IMG_FALSE 1978 1979 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_71, KF_B_MODE_PROBS_286 1980 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_71_KF_B_MODE_PROBS_286_MASK (0x00FF0000) 1981 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_71_KF_B_MODE_PROBS_286_LSBMASK (0x000000FF) 1982 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_71_KF_B_MODE_PROBS_286_SHIFT (16) 1983 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_71_KF_B_MODE_PROBS_286_SIGNED_FIELD IMG_FALSE 1984 1985 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_71, KF_B_MODE_PROBS_287 1986 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_71_KF_B_MODE_PROBS_287_MASK (0xFF000000) 1987 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_71_KF_B_MODE_PROBS_287_LSBMASK (0x000000FF) 1988 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_71_KF_B_MODE_PROBS_287_SHIFT (24) 1989 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_71_KF_B_MODE_PROBS_287_SIGNED_FIELD IMG_FALSE 1990 1991 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_72_OFFSET (0x092C) 1992 1993 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_72, KF_B_MODE_PROBS_288 1994 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_72_KF_B_MODE_PROBS_288_MASK (0x000000FF) 1995 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_72_KF_B_MODE_PROBS_288_LSBMASK (0x000000FF) 1996 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_72_KF_B_MODE_PROBS_288_SHIFT (0) 1997 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_72_KF_B_MODE_PROBS_288_SIGNED_FIELD IMG_FALSE 1998 1999 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_72, KF_B_MODE_PROBS_289 2000 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_72_KF_B_MODE_PROBS_289_MASK (0x0000FF00) 2001 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_72_KF_B_MODE_PROBS_289_LSBMASK (0x000000FF) 2002 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_72_KF_B_MODE_PROBS_289_SHIFT (8) 2003 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_72_KF_B_MODE_PROBS_289_SIGNED_FIELD IMG_FALSE 2004 2005 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_72, KF_B_MODE_PROBS_290 2006 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_72_KF_B_MODE_PROBS_290_MASK (0x00FF0000) 2007 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_72_KF_B_MODE_PROBS_290_LSBMASK (0x000000FF) 2008 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_72_KF_B_MODE_PROBS_290_SHIFT (16) 2009 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_72_KF_B_MODE_PROBS_290_SIGNED_FIELD IMG_FALSE 2010 2011 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_72, KF_B_MODE_PROBS_291 2012 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_72_KF_B_MODE_PROBS_291_MASK (0xFF000000) 2013 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_72_KF_B_MODE_PROBS_291_LSBMASK (0x000000FF) 2014 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_72_KF_B_MODE_PROBS_291_SHIFT (24) 2015 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_72_KF_B_MODE_PROBS_291_SIGNED_FIELD IMG_FALSE 2016 2017 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_73_OFFSET (0x0930) 2018 2019 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_73, KF_B_MODE_PROBS_292 2020 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_73_KF_B_MODE_PROBS_292_MASK (0x000000FF) 2021 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_73_KF_B_MODE_PROBS_292_LSBMASK (0x000000FF) 2022 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_73_KF_B_MODE_PROBS_292_SHIFT (0) 2023 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_73_KF_B_MODE_PROBS_292_SIGNED_FIELD IMG_FALSE 2024 2025 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_73, KF_B_MODE_PROBS_293 2026 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_73_KF_B_MODE_PROBS_293_MASK (0x0000FF00) 2027 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_73_KF_B_MODE_PROBS_293_LSBMASK (0x000000FF) 2028 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_73_KF_B_MODE_PROBS_293_SHIFT (8) 2029 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_73_KF_B_MODE_PROBS_293_SIGNED_FIELD IMG_FALSE 2030 2031 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_73, KF_B_MODE_PROBS_294 2032 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_73_KF_B_MODE_PROBS_294_MASK (0x00FF0000) 2033 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_73_KF_B_MODE_PROBS_294_LSBMASK (0x000000FF) 2034 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_73_KF_B_MODE_PROBS_294_SHIFT (16) 2035 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_73_KF_B_MODE_PROBS_294_SIGNED_FIELD IMG_FALSE 2036 2037 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_73, KF_B_MODE_PROBS_295 2038 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_73_KF_B_MODE_PROBS_295_MASK (0xFF000000) 2039 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_73_KF_B_MODE_PROBS_295_LSBMASK (0x000000FF) 2040 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_73_KF_B_MODE_PROBS_295_SHIFT (24) 2041 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_73_KF_B_MODE_PROBS_295_SIGNED_FIELD IMG_FALSE 2042 2043 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_74_OFFSET (0x0934) 2044 2045 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_74, KF_B_MODE_PROBS_296 2046 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_74_KF_B_MODE_PROBS_296_MASK (0x000000FF) 2047 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_74_KF_B_MODE_PROBS_296_LSBMASK (0x000000FF) 2048 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_74_KF_B_MODE_PROBS_296_SHIFT (0) 2049 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_74_KF_B_MODE_PROBS_296_SIGNED_FIELD IMG_FALSE 2050 2051 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_74, KF_B_MODE_PROBS_297 2052 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_74_KF_B_MODE_PROBS_297_MASK (0x0000FF00) 2053 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_74_KF_B_MODE_PROBS_297_LSBMASK (0x000000FF) 2054 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_74_KF_B_MODE_PROBS_297_SHIFT (8) 2055 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_74_KF_B_MODE_PROBS_297_SIGNED_FIELD IMG_FALSE 2056 2057 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_74, KF_B_MODE_PROBS_298 2058 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_74_KF_B_MODE_PROBS_298_MASK (0x00FF0000) 2059 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_74_KF_B_MODE_PROBS_298_LSBMASK (0x000000FF) 2060 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_74_KF_B_MODE_PROBS_298_SHIFT (16) 2061 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_74_KF_B_MODE_PROBS_298_SIGNED_FIELD IMG_FALSE 2062 2063 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_74, KF_B_MODE_PROBS_299 2064 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_74_KF_B_MODE_PROBS_299_MASK (0xFF000000) 2065 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_74_KF_B_MODE_PROBS_299_LSBMASK (0x000000FF) 2066 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_74_KF_B_MODE_PROBS_299_SHIFT (24) 2067 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_74_KF_B_MODE_PROBS_299_SIGNED_FIELD IMG_FALSE 2068 2069 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_75_OFFSET (0x0938) 2070 2071 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_75, KF_B_MODE_PROBS_300 2072 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_75_KF_B_MODE_PROBS_300_MASK (0x000000FF) 2073 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_75_KF_B_MODE_PROBS_300_LSBMASK (0x000000FF) 2074 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_75_KF_B_MODE_PROBS_300_SHIFT (0) 2075 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_75_KF_B_MODE_PROBS_300_SIGNED_FIELD IMG_FALSE 2076 2077 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_75, KF_B_MODE_PROBS_301 2078 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_75_KF_B_MODE_PROBS_301_MASK (0x0000FF00) 2079 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_75_KF_B_MODE_PROBS_301_LSBMASK (0x000000FF) 2080 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_75_KF_B_MODE_PROBS_301_SHIFT (8) 2081 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_75_KF_B_MODE_PROBS_301_SIGNED_FIELD IMG_FALSE 2082 2083 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_75, KF_B_MODE_PROBS_302 2084 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_75_KF_B_MODE_PROBS_302_MASK (0x00FF0000) 2085 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_75_KF_B_MODE_PROBS_302_LSBMASK (0x000000FF) 2086 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_75_KF_B_MODE_PROBS_302_SHIFT (16) 2087 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_75_KF_B_MODE_PROBS_302_SIGNED_FIELD IMG_FALSE 2088 2089 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_75, KF_B_MODE_PROBS_303 2090 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_75_KF_B_MODE_PROBS_303_MASK (0xFF000000) 2091 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_75_KF_B_MODE_PROBS_303_LSBMASK (0x000000FF) 2092 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_75_KF_B_MODE_PROBS_303_SHIFT (24) 2093 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_75_KF_B_MODE_PROBS_303_SIGNED_FIELD IMG_FALSE 2094 2095 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_76_OFFSET (0x093C) 2096 2097 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_76, KF_B_MODE_PROBS_304 2098 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_76_KF_B_MODE_PROBS_304_MASK (0x000000FF) 2099 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_76_KF_B_MODE_PROBS_304_LSBMASK (0x000000FF) 2100 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_76_KF_B_MODE_PROBS_304_SHIFT (0) 2101 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_76_KF_B_MODE_PROBS_304_SIGNED_FIELD IMG_FALSE 2102 2103 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_76, KF_B_MODE_PROBS_305 2104 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_76_KF_B_MODE_PROBS_305_MASK (0x0000FF00) 2105 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_76_KF_B_MODE_PROBS_305_LSBMASK (0x000000FF) 2106 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_76_KF_B_MODE_PROBS_305_SHIFT (8) 2107 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_76_KF_B_MODE_PROBS_305_SIGNED_FIELD IMG_FALSE 2108 2109 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_76, KF_B_MODE_PROBS_306 2110 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_76_KF_B_MODE_PROBS_306_MASK (0x00FF0000) 2111 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_76_KF_B_MODE_PROBS_306_LSBMASK (0x000000FF) 2112 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_76_KF_B_MODE_PROBS_306_SHIFT (16) 2113 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_76_KF_B_MODE_PROBS_306_SIGNED_FIELD IMG_FALSE 2114 2115 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_76, KF_B_MODE_PROBS_307 2116 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_76_KF_B_MODE_PROBS_307_MASK (0xFF000000) 2117 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_76_KF_B_MODE_PROBS_307_LSBMASK (0x000000FF) 2118 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_76_KF_B_MODE_PROBS_307_SHIFT (24) 2119 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_76_KF_B_MODE_PROBS_307_SIGNED_FIELD IMG_FALSE 2120 2121 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_77_OFFSET (0x0940) 2122 2123 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_77, KF_B_MODE_PROBS_308 2124 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_77_KF_B_MODE_PROBS_308_MASK (0x000000FF) 2125 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_77_KF_B_MODE_PROBS_308_LSBMASK (0x000000FF) 2126 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_77_KF_B_MODE_PROBS_308_SHIFT (0) 2127 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_77_KF_B_MODE_PROBS_308_SIGNED_FIELD IMG_FALSE 2128 2129 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_77, KF_B_MODE_PROBS_309 2130 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_77_KF_B_MODE_PROBS_309_MASK (0x0000FF00) 2131 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_77_KF_B_MODE_PROBS_309_LSBMASK (0x000000FF) 2132 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_77_KF_B_MODE_PROBS_309_SHIFT (8) 2133 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_77_KF_B_MODE_PROBS_309_SIGNED_FIELD IMG_FALSE 2134 2135 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_77, KF_B_MODE_PROBS_310 2136 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_77_KF_B_MODE_PROBS_310_MASK (0x00FF0000) 2137 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_77_KF_B_MODE_PROBS_310_LSBMASK (0x000000FF) 2138 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_77_KF_B_MODE_PROBS_310_SHIFT (16) 2139 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_77_KF_B_MODE_PROBS_310_SIGNED_FIELD IMG_FALSE 2140 2141 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_77, KF_B_MODE_PROBS_311 2142 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_77_KF_B_MODE_PROBS_311_MASK (0xFF000000) 2143 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_77_KF_B_MODE_PROBS_311_LSBMASK (0x000000FF) 2144 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_77_KF_B_MODE_PROBS_311_SHIFT (24) 2145 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_77_KF_B_MODE_PROBS_311_SIGNED_FIELD IMG_FALSE 2146 2147 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_78_OFFSET (0x0944) 2148 2149 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_78, KF_B_MODE_PROBS_312 2150 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_78_KF_B_MODE_PROBS_312_MASK (0x000000FF) 2151 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_78_KF_B_MODE_PROBS_312_LSBMASK (0x000000FF) 2152 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_78_KF_B_MODE_PROBS_312_SHIFT (0) 2153 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_78_KF_B_MODE_PROBS_312_SIGNED_FIELD IMG_FALSE 2154 2155 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_78, KF_B_MODE_PROBS_313 2156 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_78_KF_B_MODE_PROBS_313_MASK (0x0000FF00) 2157 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_78_KF_B_MODE_PROBS_313_LSBMASK (0x000000FF) 2158 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_78_KF_B_MODE_PROBS_313_SHIFT (8) 2159 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_78_KF_B_MODE_PROBS_313_SIGNED_FIELD IMG_FALSE 2160 2161 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_78, KF_B_MODE_PROBS_314 2162 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_78_KF_B_MODE_PROBS_314_MASK (0x00FF0000) 2163 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_78_KF_B_MODE_PROBS_314_LSBMASK (0x000000FF) 2164 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_78_KF_B_MODE_PROBS_314_SHIFT (16) 2165 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_78_KF_B_MODE_PROBS_314_SIGNED_FIELD IMG_FALSE 2166 2167 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_78, KF_B_MODE_PROBS_315 2168 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_78_KF_B_MODE_PROBS_315_MASK (0xFF000000) 2169 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_78_KF_B_MODE_PROBS_315_LSBMASK (0x000000FF) 2170 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_78_KF_B_MODE_PROBS_315_SHIFT (24) 2171 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_78_KF_B_MODE_PROBS_315_SIGNED_FIELD IMG_FALSE 2172 2173 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_79_OFFSET (0x0948) 2174 2175 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_79, KF_B_MODE_PROBS_316 2176 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_79_KF_B_MODE_PROBS_316_MASK (0x000000FF) 2177 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_79_KF_B_MODE_PROBS_316_LSBMASK (0x000000FF) 2178 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_79_KF_B_MODE_PROBS_316_SHIFT (0) 2179 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_79_KF_B_MODE_PROBS_316_SIGNED_FIELD IMG_FALSE 2180 2181 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_79, KF_B_MODE_PROBS_317 2182 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_79_KF_B_MODE_PROBS_317_MASK (0x0000FF00) 2183 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_79_KF_B_MODE_PROBS_317_LSBMASK (0x000000FF) 2184 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_79_KF_B_MODE_PROBS_317_SHIFT (8) 2185 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_79_KF_B_MODE_PROBS_317_SIGNED_FIELD IMG_FALSE 2186 2187 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_79, KF_B_MODE_PROBS_318 2188 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_79_KF_B_MODE_PROBS_318_MASK (0x00FF0000) 2189 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_79_KF_B_MODE_PROBS_318_LSBMASK (0x000000FF) 2190 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_79_KF_B_MODE_PROBS_318_SHIFT (16) 2191 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_79_KF_B_MODE_PROBS_318_SIGNED_FIELD IMG_FALSE 2192 2193 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_79, KF_B_MODE_PROBS_319 2194 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_79_KF_B_MODE_PROBS_319_MASK (0xFF000000) 2195 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_79_KF_B_MODE_PROBS_319_LSBMASK (0x000000FF) 2196 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_79_KF_B_MODE_PROBS_319_SHIFT (24) 2197 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_79_KF_B_MODE_PROBS_319_SIGNED_FIELD IMG_FALSE 2198 2199 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_80_OFFSET (0x094C) 2200 2201 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_80, KF_B_MODE_PROBS_320 2202 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_80_KF_B_MODE_PROBS_320_MASK (0x000000FF) 2203 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_80_KF_B_MODE_PROBS_320_LSBMASK (0x000000FF) 2204 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_80_KF_B_MODE_PROBS_320_SHIFT (0) 2205 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_80_KF_B_MODE_PROBS_320_SIGNED_FIELD IMG_FALSE 2206 2207 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_80, KF_B_MODE_PROBS_321 2208 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_80_KF_B_MODE_PROBS_321_MASK (0x0000FF00) 2209 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_80_KF_B_MODE_PROBS_321_LSBMASK (0x000000FF) 2210 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_80_KF_B_MODE_PROBS_321_SHIFT (8) 2211 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_80_KF_B_MODE_PROBS_321_SIGNED_FIELD IMG_FALSE 2212 2213 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_80, KF_B_MODE_PROBS_322 2214 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_80_KF_B_MODE_PROBS_322_MASK (0x00FF0000) 2215 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_80_KF_B_MODE_PROBS_322_LSBMASK (0x000000FF) 2216 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_80_KF_B_MODE_PROBS_322_SHIFT (16) 2217 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_80_KF_B_MODE_PROBS_322_SIGNED_FIELD IMG_FALSE 2218 2219 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_80, KF_B_MODE_PROBS_323 2220 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_80_KF_B_MODE_PROBS_323_MASK (0xFF000000) 2221 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_80_KF_B_MODE_PROBS_323_LSBMASK (0x000000FF) 2222 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_80_KF_B_MODE_PROBS_323_SHIFT (24) 2223 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_80_KF_B_MODE_PROBS_323_SIGNED_FIELD IMG_FALSE 2224 2225 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_81_OFFSET (0x0950) 2226 2227 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_81, KF_B_MODE_PROBS_324 2228 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_81_KF_B_MODE_PROBS_324_MASK (0x000000FF) 2229 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_81_KF_B_MODE_PROBS_324_LSBMASK (0x000000FF) 2230 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_81_KF_B_MODE_PROBS_324_SHIFT (0) 2231 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_81_KF_B_MODE_PROBS_324_SIGNED_FIELD IMG_FALSE 2232 2233 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_81, KF_B_MODE_PROBS_325 2234 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_81_KF_B_MODE_PROBS_325_MASK (0x0000FF00) 2235 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_81_KF_B_MODE_PROBS_325_LSBMASK (0x000000FF) 2236 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_81_KF_B_MODE_PROBS_325_SHIFT (8) 2237 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_81_KF_B_MODE_PROBS_325_SIGNED_FIELD IMG_FALSE 2238 2239 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_81, KF_B_MODE_PROBS_326 2240 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_81_KF_B_MODE_PROBS_326_MASK (0x00FF0000) 2241 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_81_KF_B_MODE_PROBS_326_LSBMASK (0x000000FF) 2242 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_81_KF_B_MODE_PROBS_326_SHIFT (16) 2243 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_81_KF_B_MODE_PROBS_326_SIGNED_FIELD IMG_FALSE 2244 2245 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_81, KF_B_MODE_PROBS_327 2246 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_81_KF_B_MODE_PROBS_327_MASK (0xFF000000) 2247 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_81_KF_B_MODE_PROBS_327_LSBMASK (0x000000FF) 2248 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_81_KF_B_MODE_PROBS_327_SHIFT (24) 2249 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_81_KF_B_MODE_PROBS_327_SIGNED_FIELD IMG_FALSE 2250 2251 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_82_OFFSET (0x0954) 2252 2253 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_82, KF_B_MODE_PROBS_328 2254 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_82_KF_B_MODE_PROBS_328_MASK (0x000000FF) 2255 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_82_KF_B_MODE_PROBS_328_LSBMASK (0x000000FF) 2256 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_82_KF_B_MODE_PROBS_328_SHIFT (0) 2257 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_82_KF_B_MODE_PROBS_328_SIGNED_FIELD IMG_FALSE 2258 2259 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_82, KF_B_MODE_PROBS_329 2260 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_82_KF_B_MODE_PROBS_329_MASK (0x0000FF00) 2261 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_82_KF_B_MODE_PROBS_329_LSBMASK (0x000000FF) 2262 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_82_KF_B_MODE_PROBS_329_SHIFT (8) 2263 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_82_KF_B_MODE_PROBS_329_SIGNED_FIELD IMG_FALSE 2264 2265 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_82, KF_B_MODE_PROBS_330 2266 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_82_KF_B_MODE_PROBS_330_MASK (0x00FF0000) 2267 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_82_KF_B_MODE_PROBS_330_LSBMASK (0x000000FF) 2268 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_82_KF_B_MODE_PROBS_330_SHIFT (16) 2269 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_82_KF_B_MODE_PROBS_330_SIGNED_FIELD IMG_FALSE 2270 2271 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_82, KF_B_MODE_PROBS_331 2272 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_82_KF_B_MODE_PROBS_331_MASK (0xFF000000) 2273 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_82_KF_B_MODE_PROBS_331_LSBMASK (0x000000FF) 2274 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_82_KF_B_MODE_PROBS_331_SHIFT (24) 2275 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_82_KF_B_MODE_PROBS_331_SIGNED_FIELD IMG_FALSE 2276 2277 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_83_OFFSET (0x0958) 2278 2279 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_83, KF_B_MODE_PROBS_332 2280 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_83_KF_B_MODE_PROBS_332_MASK (0x000000FF) 2281 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_83_KF_B_MODE_PROBS_332_LSBMASK (0x000000FF) 2282 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_83_KF_B_MODE_PROBS_332_SHIFT (0) 2283 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_83_KF_B_MODE_PROBS_332_SIGNED_FIELD IMG_FALSE 2284 2285 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_83, KF_B_MODE_PROBS_333 2286 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_83_KF_B_MODE_PROBS_333_MASK (0x0000FF00) 2287 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_83_KF_B_MODE_PROBS_333_LSBMASK (0x000000FF) 2288 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_83_KF_B_MODE_PROBS_333_SHIFT (8) 2289 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_83_KF_B_MODE_PROBS_333_SIGNED_FIELD IMG_FALSE 2290 2291 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_83, KF_B_MODE_PROBS_334 2292 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_83_KF_B_MODE_PROBS_334_MASK (0x00FF0000) 2293 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_83_KF_B_MODE_PROBS_334_LSBMASK (0x000000FF) 2294 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_83_KF_B_MODE_PROBS_334_SHIFT (16) 2295 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_83_KF_B_MODE_PROBS_334_SIGNED_FIELD IMG_FALSE 2296 2297 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_83, KF_B_MODE_PROBS_335 2298 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_83_KF_B_MODE_PROBS_335_MASK (0xFF000000) 2299 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_83_KF_B_MODE_PROBS_335_LSBMASK (0x000000FF) 2300 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_83_KF_B_MODE_PROBS_335_SHIFT (24) 2301 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_83_KF_B_MODE_PROBS_335_SIGNED_FIELD IMG_FALSE 2302 2303 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_84_OFFSET (0x095C) 2304 2305 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_84, KF_B_MODE_PROBS_336 2306 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_84_KF_B_MODE_PROBS_336_MASK (0x000000FF) 2307 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_84_KF_B_MODE_PROBS_336_LSBMASK (0x000000FF) 2308 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_84_KF_B_MODE_PROBS_336_SHIFT (0) 2309 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_84_KF_B_MODE_PROBS_336_SIGNED_FIELD IMG_FALSE 2310 2311 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_84, KF_B_MODE_PROBS_337 2312 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_84_KF_B_MODE_PROBS_337_MASK (0x0000FF00) 2313 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_84_KF_B_MODE_PROBS_337_LSBMASK (0x000000FF) 2314 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_84_KF_B_MODE_PROBS_337_SHIFT (8) 2315 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_84_KF_B_MODE_PROBS_337_SIGNED_FIELD IMG_FALSE 2316 2317 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_84, KF_B_MODE_PROBS_338 2318 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_84_KF_B_MODE_PROBS_338_MASK (0x00FF0000) 2319 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_84_KF_B_MODE_PROBS_338_LSBMASK (0x000000FF) 2320 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_84_KF_B_MODE_PROBS_338_SHIFT (16) 2321 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_84_KF_B_MODE_PROBS_338_SIGNED_FIELD IMG_FALSE 2322 2323 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_84, KF_B_MODE_PROBS_339 2324 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_84_KF_B_MODE_PROBS_339_MASK (0xFF000000) 2325 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_84_KF_B_MODE_PROBS_339_LSBMASK (0x000000FF) 2326 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_84_KF_B_MODE_PROBS_339_SHIFT (24) 2327 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_84_KF_B_MODE_PROBS_339_SIGNED_FIELD IMG_FALSE 2328 2329 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_85_OFFSET (0x0960) 2330 2331 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_85, KF_B_MODE_PROBS_340 2332 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_85_KF_B_MODE_PROBS_340_MASK (0x000000FF) 2333 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_85_KF_B_MODE_PROBS_340_LSBMASK (0x000000FF) 2334 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_85_KF_B_MODE_PROBS_340_SHIFT (0) 2335 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_85_KF_B_MODE_PROBS_340_SIGNED_FIELD IMG_FALSE 2336 2337 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_85, KF_B_MODE_PROBS_341 2338 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_85_KF_B_MODE_PROBS_341_MASK (0x0000FF00) 2339 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_85_KF_B_MODE_PROBS_341_LSBMASK (0x000000FF) 2340 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_85_KF_B_MODE_PROBS_341_SHIFT (8) 2341 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_85_KF_B_MODE_PROBS_341_SIGNED_FIELD IMG_FALSE 2342 2343 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_85, KF_B_MODE_PROBS_342 2344 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_85_KF_B_MODE_PROBS_342_MASK (0x00FF0000) 2345 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_85_KF_B_MODE_PROBS_342_LSBMASK (0x000000FF) 2346 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_85_KF_B_MODE_PROBS_342_SHIFT (16) 2347 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_85_KF_B_MODE_PROBS_342_SIGNED_FIELD IMG_FALSE 2348 2349 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_85, KF_B_MODE_PROBS_343 2350 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_85_KF_B_MODE_PROBS_343_MASK (0xFF000000) 2351 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_85_KF_B_MODE_PROBS_343_LSBMASK (0x000000FF) 2352 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_85_KF_B_MODE_PROBS_343_SHIFT (24) 2353 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_85_KF_B_MODE_PROBS_343_SIGNED_FIELD IMG_FALSE 2354 2355 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_86_OFFSET (0x0964) 2356 2357 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_86, KF_B_MODE_PROBS_344 2358 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_86_KF_B_MODE_PROBS_344_MASK (0x000000FF) 2359 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_86_KF_B_MODE_PROBS_344_LSBMASK (0x000000FF) 2360 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_86_KF_B_MODE_PROBS_344_SHIFT (0) 2361 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_86_KF_B_MODE_PROBS_344_SIGNED_FIELD IMG_FALSE 2362 2363 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_86, KF_B_MODE_PROBS_345 2364 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_86_KF_B_MODE_PROBS_345_MASK (0x0000FF00) 2365 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_86_KF_B_MODE_PROBS_345_LSBMASK (0x000000FF) 2366 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_86_KF_B_MODE_PROBS_345_SHIFT (8) 2367 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_86_KF_B_MODE_PROBS_345_SIGNED_FIELD IMG_FALSE 2368 2369 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_86, KF_B_MODE_PROBS_346 2370 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_86_KF_B_MODE_PROBS_346_MASK (0x00FF0000) 2371 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_86_KF_B_MODE_PROBS_346_LSBMASK (0x000000FF) 2372 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_86_KF_B_MODE_PROBS_346_SHIFT (16) 2373 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_86_KF_B_MODE_PROBS_346_SIGNED_FIELD IMG_FALSE 2374 2375 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_86, KF_B_MODE_PROBS_347 2376 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_86_KF_B_MODE_PROBS_347_MASK (0xFF000000) 2377 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_86_KF_B_MODE_PROBS_347_LSBMASK (0x000000FF) 2378 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_86_KF_B_MODE_PROBS_347_SHIFT (24) 2379 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_86_KF_B_MODE_PROBS_347_SIGNED_FIELD IMG_FALSE 2380 2381 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_87_OFFSET (0x0968) 2382 2383 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_87, KF_B_MODE_PROBS_348 2384 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_87_KF_B_MODE_PROBS_348_MASK (0x000000FF) 2385 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_87_KF_B_MODE_PROBS_348_LSBMASK (0x000000FF) 2386 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_87_KF_B_MODE_PROBS_348_SHIFT (0) 2387 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_87_KF_B_MODE_PROBS_348_SIGNED_FIELD IMG_FALSE 2388 2389 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_87, KF_B_MODE_PROBS_349 2390 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_87_KF_B_MODE_PROBS_349_MASK (0x0000FF00) 2391 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_87_KF_B_MODE_PROBS_349_LSBMASK (0x000000FF) 2392 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_87_KF_B_MODE_PROBS_349_SHIFT (8) 2393 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_87_KF_B_MODE_PROBS_349_SIGNED_FIELD IMG_FALSE 2394 2395 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_87, KF_B_MODE_PROBS_350 2396 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_87_KF_B_MODE_PROBS_350_MASK (0x00FF0000) 2397 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_87_KF_B_MODE_PROBS_350_LSBMASK (0x000000FF) 2398 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_87_KF_B_MODE_PROBS_350_SHIFT (16) 2399 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_87_KF_B_MODE_PROBS_350_SIGNED_FIELD IMG_FALSE 2400 2401 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_87, KF_B_MODE_PROBS_351 2402 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_87_KF_B_MODE_PROBS_351_MASK (0xFF000000) 2403 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_87_KF_B_MODE_PROBS_351_LSBMASK (0x000000FF) 2404 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_87_KF_B_MODE_PROBS_351_SHIFT (24) 2405 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_87_KF_B_MODE_PROBS_351_SIGNED_FIELD IMG_FALSE 2406 2407 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_88_OFFSET (0x096C) 2408 2409 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_88, KF_B_MODE_PROBS_352 2410 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_88_KF_B_MODE_PROBS_352_MASK (0x000000FF) 2411 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_88_KF_B_MODE_PROBS_352_LSBMASK (0x000000FF) 2412 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_88_KF_B_MODE_PROBS_352_SHIFT (0) 2413 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_88_KF_B_MODE_PROBS_352_SIGNED_FIELD IMG_FALSE 2414 2415 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_88, KF_B_MODE_PROBS_353 2416 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_88_KF_B_MODE_PROBS_353_MASK (0x0000FF00) 2417 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_88_KF_B_MODE_PROBS_353_LSBMASK (0x000000FF) 2418 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_88_KF_B_MODE_PROBS_353_SHIFT (8) 2419 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_88_KF_B_MODE_PROBS_353_SIGNED_FIELD IMG_FALSE 2420 2421 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_88, KF_B_MODE_PROBS_354 2422 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_88_KF_B_MODE_PROBS_354_MASK (0x00FF0000) 2423 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_88_KF_B_MODE_PROBS_354_LSBMASK (0x000000FF) 2424 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_88_KF_B_MODE_PROBS_354_SHIFT (16) 2425 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_88_KF_B_MODE_PROBS_354_SIGNED_FIELD IMG_FALSE 2426 2427 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_88, KF_B_MODE_PROBS_355 2428 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_88_KF_B_MODE_PROBS_355_MASK (0xFF000000) 2429 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_88_KF_B_MODE_PROBS_355_LSBMASK (0x000000FF) 2430 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_88_KF_B_MODE_PROBS_355_SHIFT (24) 2431 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_88_KF_B_MODE_PROBS_355_SIGNED_FIELD IMG_FALSE 2432 2433 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_89_OFFSET (0x0970) 2434 2435 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_89, KF_B_MODE_PROBS_356 2436 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_89_KF_B_MODE_PROBS_356_MASK (0x000000FF) 2437 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_89_KF_B_MODE_PROBS_356_LSBMASK (0x000000FF) 2438 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_89_KF_B_MODE_PROBS_356_SHIFT (0) 2439 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_89_KF_B_MODE_PROBS_356_SIGNED_FIELD IMG_FALSE 2440 2441 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_89, KF_B_MODE_PROBS_357 2442 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_89_KF_B_MODE_PROBS_357_MASK (0x0000FF00) 2443 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_89_KF_B_MODE_PROBS_357_LSBMASK (0x000000FF) 2444 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_89_KF_B_MODE_PROBS_357_SHIFT (8) 2445 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_89_KF_B_MODE_PROBS_357_SIGNED_FIELD IMG_FALSE 2446 2447 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_89, KF_B_MODE_PROBS_358 2448 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_89_KF_B_MODE_PROBS_358_MASK (0x00FF0000) 2449 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_89_KF_B_MODE_PROBS_358_LSBMASK (0x000000FF) 2450 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_89_KF_B_MODE_PROBS_358_SHIFT (16) 2451 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_89_KF_B_MODE_PROBS_358_SIGNED_FIELD IMG_FALSE 2452 2453 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_89, KF_B_MODE_PROBS_359 2454 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_89_KF_B_MODE_PROBS_359_MASK (0xFF000000) 2455 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_89_KF_B_MODE_PROBS_359_LSBMASK (0x000000FF) 2456 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_89_KF_B_MODE_PROBS_359_SHIFT (24) 2457 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_89_KF_B_MODE_PROBS_359_SIGNED_FIELD IMG_FALSE 2458 2459 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_90_OFFSET (0x0974) 2460 2461 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_90, KF_B_MODE_PROBS_360 2462 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_90_KF_B_MODE_PROBS_360_MASK (0x000000FF) 2463 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_90_KF_B_MODE_PROBS_360_LSBMASK (0x000000FF) 2464 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_90_KF_B_MODE_PROBS_360_SHIFT (0) 2465 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_90_KF_B_MODE_PROBS_360_SIGNED_FIELD IMG_FALSE 2466 2467 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_90, KF_B_MODE_PROBS_361 2468 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_90_KF_B_MODE_PROBS_361_MASK (0x0000FF00) 2469 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_90_KF_B_MODE_PROBS_361_LSBMASK (0x000000FF) 2470 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_90_KF_B_MODE_PROBS_361_SHIFT (8) 2471 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_90_KF_B_MODE_PROBS_361_SIGNED_FIELD IMG_FALSE 2472 2473 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_90, KF_B_MODE_PROBS_362 2474 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_90_KF_B_MODE_PROBS_362_MASK (0x00FF0000) 2475 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_90_KF_B_MODE_PROBS_362_LSBMASK (0x000000FF) 2476 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_90_KF_B_MODE_PROBS_362_SHIFT (16) 2477 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_90_KF_B_MODE_PROBS_362_SIGNED_FIELD IMG_FALSE 2478 2479 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_90, KF_B_MODE_PROBS_363 2480 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_90_KF_B_MODE_PROBS_363_MASK (0xFF000000) 2481 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_90_KF_B_MODE_PROBS_363_LSBMASK (0x000000FF) 2482 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_90_KF_B_MODE_PROBS_363_SHIFT (24) 2483 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_90_KF_B_MODE_PROBS_363_SIGNED_FIELD IMG_FALSE 2484 2485 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_91_OFFSET (0x0978) 2486 2487 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_91, KF_B_MODE_PROBS_364 2488 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_91_KF_B_MODE_PROBS_364_MASK (0x000000FF) 2489 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_91_KF_B_MODE_PROBS_364_LSBMASK (0x000000FF) 2490 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_91_KF_B_MODE_PROBS_364_SHIFT (0) 2491 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_91_KF_B_MODE_PROBS_364_SIGNED_FIELD IMG_FALSE 2492 2493 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_91, KF_B_MODE_PROBS_365 2494 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_91_KF_B_MODE_PROBS_365_MASK (0x0000FF00) 2495 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_91_KF_B_MODE_PROBS_365_LSBMASK (0x000000FF) 2496 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_91_KF_B_MODE_PROBS_365_SHIFT (8) 2497 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_91_KF_B_MODE_PROBS_365_SIGNED_FIELD IMG_FALSE 2498 2499 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_91, KF_B_MODE_PROBS_366 2500 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_91_KF_B_MODE_PROBS_366_MASK (0x00FF0000) 2501 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_91_KF_B_MODE_PROBS_366_LSBMASK (0x000000FF) 2502 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_91_KF_B_MODE_PROBS_366_SHIFT (16) 2503 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_91_KF_B_MODE_PROBS_366_SIGNED_FIELD IMG_FALSE 2504 2505 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_91, KF_B_MODE_PROBS_367 2506 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_91_KF_B_MODE_PROBS_367_MASK (0xFF000000) 2507 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_91_KF_B_MODE_PROBS_367_LSBMASK (0x000000FF) 2508 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_91_KF_B_MODE_PROBS_367_SHIFT (24) 2509 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_91_KF_B_MODE_PROBS_367_SIGNED_FIELD IMG_FALSE 2510 2511 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_92_OFFSET (0x097C) 2512 2513 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_92, KF_B_MODE_PROBS_368 2514 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_92_KF_B_MODE_PROBS_368_MASK (0x000000FF) 2515 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_92_KF_B_MODE_PROBS_368_LSBMASK (0x000000FF) 2516 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_92_KF_B_MODE_PROBS_368_SHIFT (0) 2517 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_92_KF_B_MODE_PROBS_368_SIGNED_FIELD IMG_FALSE 2518 2519 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_92, KF_B_MODE_PROBS_369 2520 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_92_KF_B_MODE_PROBS_369_MASK (0x0000FF00) 2521 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_92_KF_B_MODE_PROBS_369_LSBMASK (0x000000FF) 2522 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_92_KF_B_MODE_PROBS_369_SHIFT (8) 2523 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_92_KF_B_MODE_PROBS_369_SIGNED_FIELD IMG_FALSE 2524 2525 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_92, KF_B_MODE_PROBS_370 2526 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_92_KF_B_MODE_PROBS_370_MASK (0x00FF0000) 2527 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_92_KF_B_MODE_PROBS_370_LSBMASK (0x000000FF) 2528 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_92_KF_B_MODE_PROBS_370_SHIFT (16) 2529 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_92_KF_B_MODE_PROBS_370_SIGNED_FIELD IMG_FALSE 2530 2531 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_92, KF_B_MODE_PROBS_371 2532 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_92_KF_B_MODE_PROBS_371_MASK (0xFF000000) 2533 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_92_KF_B_MODE_PROBS_371_LSBMASK (0x000000FF) 2534 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_92_KF_B_MODE_PROBS_371_SHIFT (24) 2535 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_92_KF_B_MODE_PROBS_371_SIGNED_FIELD IMG_FALSE 2536 2537 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_93_OFFSET (0x0980) 2538 2539 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_93, KF_B_MODE_PROBS_372 2540 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_93_KF_B_MODE_PROBS_372_MASK (0x000000FF) 2541 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_93_KF_B_MODE_PROBS_372_LSBMASK (0x000000FF) 2542 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_93_KF_B_MODE_PROBS_372_SHIFT (0) 2543 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_93_KF_B_MODE_PROBS_372_SIGNED_FIELD IMG_FALSE 2544 2545 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_93, KF_B_MODE_PROBS_373 2546 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_93_KF_B_MODE_PROBS_373_MASK (0x0000FF00) 2547 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_93_KF_B_MODE_PROBS_373_LSBMASK (0x000000FF) 2548 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_93_KF_B_MODE_PROBS_373_SHIFT (8) 2549 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_93_KF_B_MODE_PROBS_373_SIGNED_FIELD IMG_FALSE 2550 2551 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_93, KF_B_MODE_PROBS_374 2552 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_93_KF_B_MODE_PROBS_374_MASK (0x00FF0000) 2553 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_93_KF_B_MODE_PROBS_374_LSBMASK (0x000000FF) 2554 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_93_KF_B_MODE_PROBS_374_SHIFT (16) 2555 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_93_KF_B_MODE_PROBS_374_SIGNED_FIELD IMG_FALSE 2556 2557 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_93, KF_B_MODE_PROBS_375 2558 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_93_KF_B_MODE_PROBS_375_MASK (0xFF000000) 2559 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_93_KF_B_MODE_PROBS_375_LSBMASK (0x000000FF) 2560 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_93_KF_B_MODE_PROBS_375_SHIFT (24) 2561 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_93_KF_B_MODE_PROBS_375_SIGNED_FIELD IMG_FALSE 2562 2563 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_94_OFFSET (0x0984) 2564 2565 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_94, KF_B_MODE_PROBS_376 2566 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_94_KF_B_MODE_PROBS_376_MASK (0x000000FF) 2567 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_94_KF_B_MODE_PROBS_376_LSBMASK (0x000000FF) 2568 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_94_KF_B_MODE_PROBS_376_SHIFT (0) 2569 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_94_KF_B_MODE_PROBS_376_SIGNED_FIELD IMG_FALSE 2570 2571 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_94, KF_B_MODE_PROBS_377 2572 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_94_KF_B_MODE_PROBS_377_MASK (0x0000FF00) 2573 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_94_KF_B_MODE_PROBS_377_LSBMASK (0x000000FF) 2574 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_94_KF_B_MODE_PROBS_377_SHIFT (8) 2575 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_94_KF_B_MODE_PROBS_377_SIGNED_FIELD IMG_FALSE 2576 2577 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_94, KF_B_MODE_PROBS_378 2578 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_94_KF_B_MODE_PROBS_378_MASK (0x00FF0000) 2579 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_94_KF_B_MODE_PROBS_378_LSBMASK (0x000000FF) 2580 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_94_KF_B_MODE_PROBS_378_SHIFT (16) 2581 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_94_KF_B_MODE_PROBS_378_SIGNED_FIELD IMG_FALSE 2582 2583 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_94, KF_B_MODE_PROBS_379 2584 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_94_KF_B_MODE_PROBS_379_MASK (0xFF000000) 2585 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_94_KF_B_MODE_PROBS_379_LSBMASK (0x000000FF) 2586 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_94_KF_B_MODE_PROBS_379_SHIFT (24) 2587 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_94_KF_B_MODE_PROBS_379_SIGNED_FIELD IMG_FALSE 2588 2589 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_95_OFFSET (0x0988) 2590 2591 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_95, KF_B_MODE_PROBS_380 2592 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_95_KF_B_MODE_PROBS_380_MASK (0x000000FF) 2593 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_95_KF_B_MODE_PROBS_380_LSBMASK (0x000000FF) 2594 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_95_KF_B_MODE_PROBS_380_SHIFT (0) 2595 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_95_KF_B_MODE_PROBS_380_SIGNED_FIELD IMG_FALSE 2596 2597 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_95, KF_B_MODE_PROBS_381 2598 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_95_KF_B_MODE_PROBS_381_MASK (0x0000FF00) 2599 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_95_KF_B_MODE_PROBS_381_LSBMASK (0x000000FF) 2600 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_95_KF_B_MODE_PROBS_381_SHIFT (8) 2601 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_95_KF_B_MODE_PROBS_381_SIGNED_FIELD IMG_FALSE 2602 2603 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_95, KF_B_MODE_PROBS_382 2604 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_95_KF_B_MODE_PROBS_382_MASK (0x00FF0000) 2605 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_95_KF_B_MODE_PROBS_382_LSBMASK (0x000000FF) 2606 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_95_KF_B_MODE_PROBS_382_SHIFT (16) 2607 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_95_KF_B_MODE_PROBS_382_SIGNED_FIELD IMG_FALSE 2608 2609 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_95, KF_B_MODE_PROBS_383 2610 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_95_KF_B_MODE_PROBS_383_MASK (0xFF000000) 2611 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_95_KF_B_MODE_PROBS_383_LSBMASK (0x000000FF) 2612 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_95_KF_B_MODE_PROBS_383_SHIFT (24) 2613 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_95_KF_B_MODE_PROBS_383_SIGNED_FIELD IMG_FALSE 2614 2615 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_96_OFFSET (0x098C) 2616 2617 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_96, KF_B_MODE_PROBS_384 2618 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_96_KF_B_MODE_PROBS_384_MASK (0x000000FF) 2619 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_96_KF_B_MODE_PROBS_384_LSBMASK (0x000000FF) 2620 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_96_KF_B_MODE_PROBS_384_SHIFT (0) 2621 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_96_KF_B_MODE_PROBS_384_SIGNED_FIELD IMG_FALSE 2622 2623 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_96, KF_B_MODE_PROBS_385 2624 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_96_KF_B_MODE_PROBS_385_MASK (0x0000FF00) 2625 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_96_KF_B_MODE_PROBS_385_LSBMASK (0x000000FF) 2626 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_96_KF_B_MODE_PROBS_385_SHIFT (8) 2627 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_96_KF_B_MODE_PROBS_385_SIGNED_FIELD IMG_FALSE 2628 2629 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_96, KF_B_MODE_PROBS_386 2630 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_96_KF_B_MODE_PROBS_386_MASK (0x00FF0000) 2631 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_96_KF_B_MODE_PROBS_386_LSBMASK (0x000000FF) 2632 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_96_KF_B_MODE_PROBS_386_SHIFT (16) 2633 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_96_KF_B_MODE_PROBS_386_SIGNED_FIELD IMG_FALSE 2634 2635 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_96, KF_B_MODE_PROBS_387 2636 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_96_KF_B_MODE_PROBS_387_MASK (0xFF000000) 2637 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_96_KF_B_MODE_PROBS_387_LSBMASK (0x000000FF) 2638 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_96_KF_B_MODE_PROBS_387_SHIFT (24) 2639 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_96_KF_B_MODE_PROBS_387_SIGNED_FIELD IMG_FALSE 2640 2641 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_97_OFFSET (0x0990) 2642 2643 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_97, KF_B_MODE_PROBS_388 2644 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_97_KF_B_MODE_PROBS_388_MASK (0x000000FF) 2645 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_97_KF_B_MODE_PROBS_388_LSBMASK (0x000000FF) 2646 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_97_KF_B_MODE_PROBS_388_SHIFT (0) 2647 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_97_KF_B_MODE_PROBS_388_SIGNED_FIELD IMG_FALSE 2648 2649 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_97, KF_B_MODE_PROBS_389 2650 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_97_KF_B_MODE_PROBS_389_MASK (0x0000FF00) 2651 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_97_KF_B_MODE_PROBS_389_LSBMASK (0x000000FF) 2652 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_97_KF_B_MODE_PROBS_389_SHIFT (8) 2653 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_97_KF_B_MODE_PROBS_389_SIGNED_FIELD IMG_FALSE 2654 2655 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_97, KF_B_MODE_PROBS_390 2656 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_97_KF_B_MODE_PROBS_390_MASK (0x00FF0000) 2657 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_97_KF_B_MODE_PROBS_390_LSBMASK (0x000000FF) 2658 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_97_KF_B_MODE_PROBS_390_SHIFT (16) 2659 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_97_KF_B_MODE_PROBS_390_SIGNED_FIELD IMG_FALSE 2660 2661 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_97, KF_B_MODE_PROBS_391 2662 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_97_KF_B_MODE_PROBS_391_MASK (0xFF000000) 2663 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_97_KF_B_MODE_PROBS_391_LSBMASK (0x000000FF) 2664 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_97_KF_B_MODE_PROBS_391_SHIFT (24) 2665 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_97_KF_B_MODE_PROBS_391_SIGNED_FIELD IMG_FALSE 2666 2667 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_98_OFFSET (0x0994) 2668 2669 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_98, KF_B_MODE_PROBS_392 2670 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_98_KF_B_MODE_PROBS_392_MASK (0x000000FF) 2671 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_98_KF_B_MODE_PROBS_392_LSBMASK (0x000000FF) 2672 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_98_KF_B_MODE_PROBS_392_SHIFT (0) 2673 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_98_KF_B_MODE_PROBS_392_SIGNED_FIELD IMG_FALSE 2674 2675 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_98, KF_B_MODE_PROBS_393 2676 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_98_KF_B_MODE_PROBS_393_MASK (0x0000FF00) 2677 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_98_KF_B_MODE_PROBS_393_LSBMASK (0x000000FF) 2678 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_98_KF_B_MODE_PROBS_393_SHIFT (8) 2679 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_98_KF_B_MODE_PROBS_393_SIGNED_FIELD IMG_FALSE 2680 2681 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_98, KF_B_MODE_PROBS_394 2682 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_98_KF_B_MODE_PROBS_394_MASK (0x00FF0000) 2683 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_98_KF_B_MODE_PROBS_394_LSBMASK (0x000000FF) 2684 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_98_KF_B_MODE_PROBS_394_SHIFT (16) 2685 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_98_KF_B_MODE_PROBS_394_SIGNED_FIELD IMG_FALSE 2686 2687 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_98, KF_B_MODE_PROBS_395 2688 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_98_KF_B_MODE_PROBS_395_MASK (0xFF000000) 2689 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_98_KF_B_MODE_PROBS_395_LSBMASK (0x000000FF) 2690 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_98_KF_B_MODE_PROBS_395_SHIFT (24) 2691 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_98_KF_B_MODE_PROBS_395_SIGNED_FIELD IMG_FALSE 2692 2693 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_99_OFFSET (0x0998) 2694 2695 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_99, KF_B_MODE_PROBS_396 2696 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_99_KF_B_MODE_PROBS_396_MASK (0x000000FF) 2697 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_99_KF_B_MODE_PROBS_396_LSBMASK (0x000000FF) 2698 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_99_KF_B_MODE_PROBS_396_SHIFT (0) 2699 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_99_KF_B_MODE_PROBS_396_SIGNED_FIELD IMG_FALSE 2700 2701 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_99, KF_B_MODE_PROBS_397 2702 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_99_KF_B_MODE_PROBS_397_MASK (0x0000FF00) 2703 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_99_KF_B_MODE_PROBS_397_LSBMASK (0x000000FF) 2704 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_99_KF_B_MODE_PROBS_397_SHIFT (8) 2705 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_99_KF_B_MODE_PROBS_397_SIGNED_FIELD IMG_FALSE 2706 2707 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_99, KF_B_MODE_PROBS_398 2708 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_99_KF_B_MODE_PROBS_398_MASK (0x00FF0000) 2709 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_99_KF_B_MODE_PROBS_398_LSBMASK (0x000000FF) 2710 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_99_KF_B_MODE_PROBS_398_SHIFT (16) 2711 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_99_KF_B_MODE_PROBS_398_SIGNED_FIELD IMG_FALSE 2712 2713 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_99, KF_B_MODE_PROBS_399 2714 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_99_KF_B_MODE_PROBS_399_MASK (0xFF000000) 2715 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_99_KF_B_MODE_PROBS_399_LSBMASK (0x000000FF) 2716 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_99_KF_B_MODE_PROBS_399_SHIFT (24) 2717 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_99_KF_B_MODE_PROBS_399_SIGNED_FIELD IMG_FALSE 2718 2719 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_100_OFFSET (0x099C) 2720 2721 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_100, KF_B_MODE_PROBS_400 2722 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_100_KF_B_MODE_PROBS_400_MASK (0x000000FF) 2723 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_100_KF_B_MODE_PROBS_400_LSBMASK (0x000000FF) 2724 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_100_KF_B_MODE_PROBS_400_SHIFT (0) 2725 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_100_KF_B_MODE_PROBS_400_SIGNED_FIELD IMG_FALSE 2726 2727 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_100, KF_B_MODE_PROBS_401 2728 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_100_KF_B_MODE_PROBS_401_MASK (0x0000FF00) 2729 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_100_KF_B_MODE_PROBS_401_LSBMASK (0x000000FF) 2730 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_100_KF_B_MODE_PROBS_401_SHIFT (8) 2731 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_100_KF_B_MODE_PROBS_401_SIGNED_FIELD IMG_FALSE 2732 2733 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_100, KF_B_MODE_PROBS_402 2734 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_100_KF_B_MODE_PROBS_402_MASK (0x00FF0000) 2735 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_100_KF_B_MODE_PROBS_402_LSBMASK (0x000000FF) 2736 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_100_KF_B_MODE_PROBS_402_SHIFT (16) 2737 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_100_KF_B_MODE_PROBS_402_SIGNED_FIELD IMG_FALSE 2738 2739 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_100, KF_B_MODE_PROBS_403 2740 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_100_KF_B_MODE_PROBS_403_MASK (0xFF000000) 2741 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_100_KF_B_MODE_PROBS_403_LSBMASK (0x000000FF) 2742 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_100_KF_B_MODE_PROBS_403_SHIFT (24) 2743 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_100_KF_B_MODE_PROBS_403_SIGNED_FIELD IMG_FALSE 2744 2745 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_101_OFFSET (0x09A0) 2746 2747 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_101, KF_B_MODE_PROBS_404 2748 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_101_KF_B_MODE_PROBS_404_MASK (0x000000FF) 2749 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_101_KF_B_MODE_PROBS_404_LSBMASK (0x000000FF) 2750 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_101_KF_B_MODE_PROBS_404_SHIFT (0) 2751 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_101_KF_B_MODE_PROBS_404_SIGNED_FIELD IMG_FALSE 2752 2753 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_101, KF_B_MODE_PROBS_405 2754 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_101_KF_B_MODE_PROBS_405_MASK (0x0000FF00) 2755 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_101_KF_B_MODE_PROBS_405_LSBMASK (0x000000FF) 2756 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_101_KF_B_MODE_PROBS_405_SHIFT (8) 2757 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_101_KF_B_MODE_PROBS_405_SIGNED_FIELD IMG_FALSE 2758 2759 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_101, KF_B_MODE_PROBS_406 2760 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_101_KF_B_MODE_PROBS_406_MASK (0x00FF0000) 2761 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_101_KF_B_MODE_PROBS_406_LSBMASK (0x000000FF) 2762 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_101_KF_B_MODE_PROBS_406_SHIFT (16) 2763 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_101_KF_B_MODE_PROBS_406_SIGNED_FIELD IMG_FALSE 2764 2765 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_101, KF_B_MODE_PROBS_407 2766 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_101_KF_B_MODE_PROBS_407_MASK (0xFF000000) 2767 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_101_KF_B_MODE_PROBS_407_LSBMASK (0x000000FF) 2768 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_101_KF_B_MODE_PROBS_407_SHIFT (24) 2769 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_101_KF_B_MODE_PROBS_407_SIGNED_FIELD IMG_FALSE 2770 2771 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_102_OFFSET (0x09A4) 2772 2773 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_102, KF_B_MODE_PROBS_408 2774 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_102_KF_B_MODE_PROBS_408_MASK (0x000000FF) 2775 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_102_KF_B_MODE_PROBS_408_LSBMASK (0x000000FF) 2776 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_102_KF_B_MODE_PROBS_408_SHIFT (0) 2777 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_102_KF_B_MODE_PROBS_408_SIGNED_FIELD IMG_FALSE 2778 2779 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_102, KF_B_MODE_PROBS_409 2780 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_102_KF_B_MODE_PROBS_409_MASK (0x0000FF00) 2781 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_102_KF_B_MODE_PROBS_409_LSBMASK (0x000000FF) 2782 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_102_KF_B_MODE_PROBS_409_SHIFT (8) 2783 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_102_KF_B_MODE_PROBS_409_SIGNED_FIELD IMG_FALSE 2784 2785 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_102, KF_B_MODE_PROBS_410 2786 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_102_KF_B_MODE_PROBS_410_MASK (0x00FF0000) 2787 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_102_KF_B_MODE_PROBS_410_LSBMASK (0x000000FF) 2788 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_102_KF_B_MODE_PROBS_410_SHIFT (16) 2789 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_102_KF_B_MODE_PROBS_410_SIGNED_FIELD IMG_FALSE 2790 2791 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_102, KF_B_MODE_PROBS_411 2792 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_102_KF_B_MODE_PROBS_411_MASK (0xFF000000) 2793 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_102_KF_B_MODE_PROBS_411_LSBMASK (0x000000FF) 2794 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_102_KF_B_MODE_PROBS_411_SHIFT (24) 2795 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_102_KF_B_MODE_PROBS_411_SIGNED_FIELD IMG_FALSE 2796 2797 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_103_OFFSET (0x09A8) 2798 2799 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_103, KF_B_MODE_PROBS_412 2800 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_103_KF_B_MODE_PROBS_412_MASK (0x000000FF) 2801 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_103_KF_B_MODE_PROBS_412_LSBMASK (0x000000FF) 2802 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_103_KF_B_MODE_PROBS_412_SHIFT (0) 2803 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_103_KF_B_MODE_PROBS_412_SIGNED_FIELD IMG_FALSE 2804 2805 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_103, KF_B_MODE_PROBS_413 2806 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_103_KF_B_MODE_PROBS_413_MASK (0x0000FF00) 2807 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_103_KF_B_MODE_PROBS_413_LSBMASK (0x000000FF) 2808 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_103_KF_B_MODE_PROBS_413_SHIFT (8) 2809 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_103_KF_B_MODE_PROBS_413_SIGNED_FIELD IMG_FALSE 2810 2811 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_103, KF_B_MODE_PROBS_414 2812 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_103_KF_B_MODE_PROBS_414_MASK (0x00FF0000) 2813 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_103_KF_B_MODE_PROBS_414_LSBMASK (0x000000FF) 2814 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_103_KF_B_MODE_PROBS_414_SHIFT (16) 2815 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_103_KF_B_MODE_PROBS_414_SIGNED_FIELD IMG_FALSE 2816 2817 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_103, KF_B_MODE_PROBS_415 2818 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_103_KF_B_MODE_PROBS_415_MASK (0xFF000000) 2819 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_103_KF_B_MODE_PROBS_415_LSBMASK (0x000000FF) 2820 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_103_KF_B_MODE_PROBS_415_SHIFT (24) 2821 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_103_KF_B_MODE_PROBS_415_SIGNED_FIELD IMG_FALSE 2822 2823 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_104_OFFSET (0x09AC) 2824 2825 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_104, KF_B_MODE_PROBS_416 2826 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_104_KF_B_MODE_PROBS_416_MASK (0x000000FF) 2827 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_104_KF_B_MODE_PROBS_416_LSBMASK (0x000000FF) 2828 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_104_KF_B_MODE_PROBS_416_SHIFT (0) 2829 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_104_KF_B_MODE_PROBS_416_SIGNED_FIELD IMG_FALSE 2830 2831 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_104, KF_B_MODE_PROBS_417 2832 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_104_KF_B_MODE_PROBS_417_MASK (0x0000FF00) 2833 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_104_KF_B_MODE_PROBS_417_LSBMASK (0x000000FF) 2834 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_104_KF_B_MODE_PROBS_417_SHIFT (8) 2835 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_104_KF_B_MODE_PROBS_417_SIGNED_FIELD IMG_FALSE 2836 2837 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_104, KF_B_MODE_PROBS_418 2838 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_104_KF_B_MODE_PROBS_418_MASK (0x00FF0000) 2839 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_104_KF_B_MODE_PROBS_418_LSBMASK (0x000000FF) 2840 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_104_KF_B_MODE_PROBS_418_SHIFT (16) 2841 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_104_KF_B_MODE_PROBS_418_SIGNED_FIELD IMG_FALSE 2842 2843 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_104, KF_B_MODE_PROBS_419 2844 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_104_KF_B_MODE_PROBS_419_MASK (0xFF000000) 2845 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_104_KF_B_MODE_PROBS_419_LSBMASK (0x000000FF) 2846 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_104_KF_B_MODE_PROBS_419_SHIFT (24) 2847 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_104_KF_B_MODE_PROBS_419_SIGNED_FIELD IMG_FALSE 2848 2849 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_105_OFFSET (0x09B0) 2850 2851 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_105, KF_B_MODE_PROBS_420 2852 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_105_KF_B_MODE_PROBS_420_MASK (0x000000FF) 2853 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_105_KF_B_MODE_PROBS_420_LSBMASK (0x000000FF) 2854 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_105_KF_B_MODE_PROBS_420_SHIFT (0) 2855 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_105_KF_B_MODE_PROBS_420_SIGNED_FIELD IMG_FALSE 2856 2857 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_105, KF_B_MODE_PROBS_421 2858 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_105_KF_B_MODE_PROBS_421_MASK (0x0000FF00) 2859 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_105_KF_B_MODE_PROBS_421_LSBMASK (0x000000FF) 2860 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_105_KF_B_MODE_PROBS_421_SHIFT (8) 2861 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_105_KF_B_MODE_PROBS_421_SIGNED_FIELD IMG_FALSE 2862 2863 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_105, KF_B_MODE_PROBS_422 2864 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_105_KF_B_MODE_PROBS_422_MASK (0x00FF0000) 2865 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_105_KF_B_MODE_PROBS_422_LSBMASK (0x000000FF) 2866 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_105_KF_B_MODE_PROBS_422_SHIFT (16) 2867 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_105_KF_B_MODE_PROBS_422_SIGNED_FIELD IMG_FALSE 2868 2869 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_105, KF_B_MODE_PROBS_423 2870 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_105_KF_B_MODE_PROBS_423_MASK (0xFF000000) 2871 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_105_KF_B_MODE_PROBS_423_LSBMASK (0x000000FF) 2872 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_105_KF_B_MODE_PROBS_423_SHIFT (24) 2873 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_105_KF_B_MODE_PROBS_423_SIGNED_FIELD IMG_FALSE 2874 2875 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_106_OFFSET (0x09B4) 2876 2877 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_106, KF_B_MODE_PROBS_424 2878 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_106_KF_B_MODE_PROBS_424_MASK (0x000000FF) 2879 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_106_KF_B_MODE_PROBS_424_LSBMASK (0x000000FF) 2880 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_106_KF_B_MODE_PROBS_424_SHIFT (0) 2881 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_106_KF_B_MODE_PROBS_424_SIGNED_FIELD IMG_FALSE 2882 2883 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_106, KF_B_MODE_PROBS_425 2884 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_106_KF_B_MODE_PROBS_425_MASK (0x0000FF00) 2885 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_106_KF_B_MODE_PROBS_425_LSBMASK (0x000000FF) 2886 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_106_KF_B_MODE_PROBS_425_SHIFT (8) 2887 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_106_KF_B_MODE_PROBS_425_SIGNED_FIELD IMG_FALSE 2888 2889 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_106, KF_B_MODE_PROBS_426 2890 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_106_KF_B_MODE_PROBS_426_MASK (0x00FF0000) 2891 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_106_KF_B_MODE_PROBS_426_LSBMASK (0x000000FF) 2892 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_106_KF_B_MODE_PROBS_426_SHIFT (16) 2893 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_106_KF_B_MODE_PROBS_426_SIGNED_FIELD IMG_FALSE 2894 2895 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_106, KF_B_MODE_PROBS_427 2896 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_106_KF_B_MODE_PROBS_427_MASK (0xFF000000) 2897 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_106_KF_B_MODE_PROBS_427_LSBMASK (0x000000FF) 2898 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_106_KF_B_MODE_PROBS_427_SHIFT (24) 2899 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_106_KF_B_MODE_PROBS_427_SIGNED_FIELD IMG_FALSE 2900 2901 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_107_OFFSET (0x09B8) 2902 2903 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_107, KF_B_MODE_PROBS_428 2904 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_107_KF_B_MODE_PROBS_428_MASK (0x000000FF) 2905 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_107_KF_B_MODE_PROBS_428_LSBMASK (0x000000FF) 2906 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_107_KF_B_MODE_PROBS_428_SHIFT (0) 2907 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_107_KF_B_MODE_PROBS_428_SIGNED_FIELD IMG_FALSE 2908 2909 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_107, KF_B_MODE_PROBS_429 2910 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_107_KF_B_MODE_PROBS_429_MASK (0x0000FF00) 2911 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_107_KF_B_MODE_PROBS_429_LSBMASK (0x000000FF) 2912 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_107_KF_B_MODE_PROBS_429_SHIFT (8) 2913 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_107_KF_B_MODE_PROBS_429_SIGNED_FIELD IMG_FALSE 2914 2915 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_107, KF_B_MODE_PROBS_430 2916 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_107_KF_B_MODE_PROBS_430_MASK (0x00FF0000) 2917 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_107_KF_B_MODE_PROBS_430_LSBMASK (0x000000FF) 2918 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_107_KF_B_MODE_PROBS_430_SHIFT (16) 2919 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_107_KF_B_MODE_PROBS_430_SIGNED_FIELD IMG_FALSE 2920 2921 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_107, KF_B_MODE_PROBS_431 2922 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_107_KF_B_MODE_PROBS_431_MASK (0xFF000000) 2923 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_107_KF_B_MODE_PROBS_431_LSBMASK (0x000000FF) 2924 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_107_KF_B_MODE_PROBS_431_SHIFT (24) 2925 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_107_KF_B_MODE_PROBS_431_SIGNED_FIELD IMG_FALSE 2926 2927 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_108_OFFSET (0x09BC) 2928 2929 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_108, KF_B_MODE_PROBS_432 2930 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_108_KF_B_MODE_PROBS_432_MASK (0x000000FF) 2931 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_108_KF_B_MODE_PROBS_432_LSBMASK (0x000000FF) 2932 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_108_KF_B_MODE_PROBS_432_SHIFT (0) 2933 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_108_KF_B_MODE_PROBS_432_SIGNED_FIELD IMG_FALSE 2934 2935 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_108, KF_B_MODE_PROBS_433 2936 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_108_KF_B_MODE_PROBS_433_MASK (0x0000FF00) 2937 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_108_KF_B_MODE_PROBS_433_LSBMASK (0x000000FF) 2938 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_108_KF_B_MODE_PROBS_433_SHIFT (8) 2939 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_108_KF_B_MODE_PROBS_433_SIGNED_FIELD IMG_FALSE 2940 2941 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_108, KF_B_MODE_PROBS_434 2942 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_108_KF_B_MODE_PROBS_434_MASK (0x00FF0000) 2943 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_108_KF_B_MODE_PROBS_434_LSBMASK (0x000000FF) 2944 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_108_KF_B_MODE_PROBS_434_SHIFT (16) 2945 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_108_KF_B_MODE_PROBS_434_SIGNED_FIELD IMG_FALSE 2946 2947 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_108, KF_B_MODE_PROBS_435 2948 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_108_KF_B_MODE_PROBS_435_MASK (0xFF000000) 2949 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_108_KF_B_MODE_PROBS_435_LSBMASK (0x000000FF) 2950 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_108_KF_B_MODE_PROBS_435_SHIFT (24) 2951 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_108_KF_B_MODE_PROBS_435_SIGNED_FIELD IMG_FALSE 2952 2953 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_109_OFFSET (0x09C0) 2954 2955 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_109, KF_B_MODE_PROBS_436 2956 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_109_KF_B_MODE_PROBS_436_MASK (0x000000FF) 2957 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_109_KF_B_MODE_PROBS_436_LSBMASK (0x000000FF) 2958 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_109_KF_B_MODE_PROBS_436_SHIFT (0) 2959 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_109_KF_B_MODE_PROBS_436_SIGNED_FIELD IMG_FALSE 2960 2961 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_109, KF_B_MODE_PROBS_437 2962 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_109_KF_B_MODE_PROBS_437_MASK (0x0000FF00) 2963 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_109_KF_B_MODE_PROBS_437_LSBMASK (0x000000FF) 2964 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_109_KF_B_MODE_PROBS_437_SHIFT (8) 2965 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_109_KF_B_MODE_PROBS_437_SIGNED_FIELD IMG_FALSE 2966 2967 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_109, KF_B_MODE_PROBS_438 2968 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_109_KF_B_MODE_PROBS_438_MASK (0x00FF0000) 2969 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_109_KF_B_MODE_PROBS_438_LSBMASK (0x000000FF) 2970 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_109_KF_B_MODE_PROBS_438_SHIFT (16) 2971 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_109_KF_B_MODE_PROBS_438_SIGNED_FIELD IMG_FALSE 2972 2973 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_109, KF_B_MODE_PROBS_439 2974 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_109_KF_B_MODE_PROBS_439_MASK (0xFF000000) 2975 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_109_KF_B_MODE_PROBS_439_LSBMASK (0x000000FF) 2976 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_109_KF_B_MODE_PROBS_439_SHIFT (24) 2977 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_109_KF_B_MODE_PROBS_439_SIGNED_FIELD IMG_FALSE 2978 2979 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_110_OFFSET (0x09C4) 2980 2981 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_110, KF_B_MODE_PROBS_440 2982 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_110_KF_B_MODE_PROBS_440_MASK (0x000000FF) 2983 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_110_KF_B_MODE_PROBS_440_LSBMASK (0x000000FF) 2984 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_110_KF_B_MODE_PROBS_440_SHIFT (0) 2985 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_110_KF_B_MODE_PROBS_440_SIGNED_FIELD IMG_FALSE 2986 2987 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_110, KF_B_MODE_PROBS_441 2988 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_110_KF_B_MODE_PROBS_441_MASK (0x0000FF00) 2989 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_110_KF_B_MODE_PROBS_441_LSBMASK (0x000000FF) 2990 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_110_KF_B_MODE_PROBS_441_SHIFT (8) 2991 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_110_KF_B_MODE_PROBS_441_SIGNED_FIELD IMG_FALSE 2992 2993 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_110, KF_B_MODE_PROBS_442 2994 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_110_KF_B_MODE_PROBS_442_MASK (0x00FF0000) 2995 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_110_KF_B_MODE_PROBS_442_LSBMASK (0x000000FF) 2996 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_110_KF_B_MODE_PROBS_442_SHIFT (16) 2997 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_110_KF_B_MODE_PROBS_442_SIGNED_FIELD IMG_FALSE 2998 2999 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_110, KF_B_MODE_PROBS_443 3000 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_110_KF_B_MODE_PROBS_443_MASK (0xFF000000) 3001 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_110_KF_B_MODE_PROBS_443_LSBMASK (0x000000FF) 3002 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_110_KF_B_MODE_PROBS_443_SHIFT (24) 3003 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_110_KF_B_MODE_PROBS_443_SIGNED_FIELD IMG_FALSE 3004 3005 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_111_OFFSET (0x09C8) 3006 3007 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_111, KF_B_MODE_PROBS_444 3008 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_111_KF_B_MODE_PROBS_444_MASK (0x000000FF) 3009 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_111_KF_B_MODE_PROBS_444_LSBMASK (0x000000FF) 3010 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_111_KF_B_MODE_PROBS_444_SHIFT (0) 3011 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_111_KF_B_MODE_PROBS_444_SIGNED_FIELD IMG_FALSE 3012 3013 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_111, KF_B_MODE_PROBS_445 3014 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_111_KF_B_MODE_PROBS_445_MASK (0x0000FF00) 3015 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_111_KF_B_MODE_PROBS_445_LSBMASK (0x000000FF) 3016 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_111_KF_B_MODE_PROBS_445_SHIFT (8) 3017 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_111_KF_B_MODE_PROBS_445_SIGNED_FIELD IMG_FALSE 3018 3019 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_111, KF_B_MODE_PROBS_446 3020 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_111_KF_B_MODE_PROBS_446_MASK (0x00FF0000) 3021 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_111_KF_B_MODE_PROBS_446_LSBMASK (0x000000FF) 3022 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_111_KF_B_MODE_PROBS_446_SHIFT (16) 3023 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_111_KF_B_MODE_PROBS_446_SIGNED_FIELD IMG_FALSE 3024 3025 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_111, KF_B_MODE_PROBS_447 3026 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_111_KF_B_MODE_PROBS_447_MASK (0xFF000000) 3027 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_111_KF_B_MODE_PROBS_447_LSBMASK (0x000000FF) 3028 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_111_KF_B_MODE_PROBS_447_SHIFT (24) 3029 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_111_KF_B_MODE_PROBS_447_SIGNED_FIELD IMG_FALSE 3030 3031 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_112_OFFSET (0x09CC) 3032 3033 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_112, KF_B_MODE_PROBS_448 3034 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_112_KF_B_MODE_PROBS_448_MASK (0x000000FF) 3035 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_112_KF_B_MODE_PROBS_448_LSBMASK (0x000000FF) 3036 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_112_KF_B_MODE_PROBS_448_SHIFT (0) 3037 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_112_KF_B_MODE_PROBS_448_SIGNED_FIELD IMG_FALSE 3038 3039 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_112, KF_B_MODE_PROBS_449 3040 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_112_KF_B_MODE_PROBS_449_MASK (0x0000FF00) 3041 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_112_KF_B_MODE_PROBS_449_LSBMASK (0x000000FF) 3042 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_112_KF_B_MODE_PROBS_449_SHIFT (8) 3043 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_112_KF_B_MODE_PROBS_449_SIGNED_FIELD IMG_FALSE 3044 3045 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_112, KF_B_MODE_PROBS_450 3046 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_112_KF_B_MODE_PROBS_450_MASK (0x00FF0000) 3047 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_112_KF_B_MODE_PROBS_450_LSBMASK (0x000000FF) 3048 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_112_KF_B_MODE_PROBS_450_SHIFT (16) 3049 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_112_KF_B_MODE_PROBS_450_SIGNED_FIELD IMG_FALSE 3050 3051 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_112, KF_B_MODE_PROBS_451 3052 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_112_KF_B_MODE_PROBS_451_MASK (0xFF000000) 3053 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_112_KF_B_MODE_PROBS_451_LSBMASK (0x000000FF) 3054 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_112_KF_B_MODE_PROBS_451_SHIFT (24) 3055 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_112_KF_B_MODE_PROBS_451_SIGNED_FIELD IMG_FALSE 3056 3057 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_113_OFFSET (0x09D0) 3058 3059 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_113, KF_B_MODE_PROBS_452 3060 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_113_KF_B_MODE_PROBS_452_MASK (0x000000FF) 3061 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_113_KF_B_MODE_PROBS_452_LSBMASK (0x000000FF) 3062 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_113_KF_B_MODE_PROBS_452_SHIFT (0) 3063 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_113_KF_B_MODE_PROBS_452_SIGNED_FIELD IMG_FALSE 3064 3065 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_113, KF_B_MODE_PROBS_453 3066 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_113_KF_B_MODE_PROBS_453_MASK (0x0000FF00) 3067 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_113_KF_B_MODE_PROBS_453_LSBMASK (0x000000FF) 3068 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_113_KF_B_MODE_PROBS_453_SHIFT (8) 3069 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_113_KF_B_MODE_PROBS_453_SIGNED_FIELD IMG_FALSE 3070 3071 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_113, KF_B_MODE_PROBS_454 3072 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_113_KF_B_MODE_PROBS_454_MASK (0x00FF0000) 3073 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_113_KF_B_MODE_PROBS_454_LSBMASK (0x000000FF) 3074 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_113_KF_B_MODE_PROBS_454_SHIFT (16) 3075 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_113_KF_B_MODE_PROBS_454_SIGNED_FIELD IMG_FALSE 3076 3077 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_113, KF_B_MODE_PROBS_455 3078 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_113_KF_B_MODE_PROBS_455_MASK (0xFF000000) 3079 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_113_KF_B_MODE_PROBS_455_LSBMASK (0x000000FF) 3080 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_113_KF_B_MODE_PROBS_455_SHIFT (24) 3081 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_113_KF_B_MODE_PROBS_455_SIGNED_FIELD IMG_FALSE 3082 3083 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_114_OFFSET (0x09D4) 3084 3085 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_114, KF_B_MODE_PROBS_456 3086 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_114_KF_B_MODE_PROBS_456_MASK (0x000000FF) 3087 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_114_KF_B_MODE_PROBS_456_LSBMASK (0x000000FF) 3088 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_114_KF_B_MODE_PROBS_456_SHIFT (0) 3089 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_114_KF_B_MODE_PROBS_456_SIGNED_FIELD IMG_FALSE 3090 3091 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_114, KF_B_MODE_PROBS_457 3092 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_114_KF_B_MODE_PROBS_457_MASK (0x0000FF00) 3093 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_114_KF_B_MODE_PROBS_457_LSBMASK (0x000000FF) 3094 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_114_KF_B_MODE_PROBS_457_SHIFT (8) 3095 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_114_KF_B_MODE_PROBS_457_SIGNED_FIELD IMG_FALSE 3096 3097 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_114, KF_B_MODE_PROBS_458 3098 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_114_KF_B_MODE_PROBS_458_MASK (0x00FF0000) 3099 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_114_KF_B_MODE_PROBS_458_LSBMASK (0x000000FF) 3100 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_114_KF_B_MODE_PROBS_458_SHIFT (16) 3101 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_114_KF_B_MODE_PROBS_458_SIGNED_FIELD IMG_FALSE 3102 3103 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_114, KF_B_MODE_PROBS_459 3104 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_114_KF_B_MODE_PROBS_459_MASK (0xFF000000) 3105 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_114_KF_B_MODE_PROBS_459_LSBMASK (0x000000FF) 3106 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_114_KF_B_MODE_PROBS_459_SHIFT (24) 3107 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_114_KF_B_MODE_PROBS_459_SIGNED_FIELD IMG_FALSE 3108 3109 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_115_OFFSET (0x09D8) 3110 3111 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_115, KF_B_MODE_PROBS_460 3112 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_115_KF_B_MODE_PROBS_460_MASK (0x000000FF) 3113 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_115_KF_B_MODE_PROBS_460_LSBMASK (0x000000FF) 3114 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_115_KF_B_MODE_PROBS_460_SHIFT (0) 3115 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_115_KF_B_MODE_PROBS_460_SIGNED_FIELD IMG_FALSE 3116 3117 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_115, KF_B_MODE_PROBS_461 3118 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_115_KF_B_MODE_PROBS_461_MASK (0x0000FF00) 3119 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_115_KF_B_MODE_PROBS_461_LSBMASK (0x000000FF) 3120 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_115_KF_B_MODE_PROBS_461_SHIFT (8) 3121 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_115_KF_B_MODE_PROBS_461_SIGNED_FIELD IMG_FALSE 3122 3123 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_115, KF_B_MODE_PROBS_462 3124 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_115_KF_B_MODE_PROBS_462_MASK (0x00FF0000) 3125 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_115_KF_B_MODE_PROBS_462_LSBMASK (0x000000FF) 3126 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_115_KF_B_MODE_PROBS_462_SHIFT (16) 3127 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_115_KF_B_MODE_PROBS_462_SIGNED_FIELD IMG_FALSE 3128 3129 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_115, KF_B_MODE_PROBS_463 3130 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_115_KF_B_MODE_PROBS_463_MASK (0xFF000000) 3131 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_115_KF_B_MODE_PROBS_463_LSBMASK (0x000000FF) 3132 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_115_KF_B_MODE_PROBS_463_SHIFT (24) 3133 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_115_KF_B_MODE_PROBS_463_SIGNED_FIELD IMG_FALSE 3134 3135 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_116_OFFSET (0x09DC) 3136 3137 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_116, KF_B_MODE_PROBS_464 3138 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_116_KF_B_MODE_PROBS_464_MASK (0x000000FF) 3139 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_116_KF_B_MODE_PROBS_464_LSBMASK (0x000000FF) 3140 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_116_KF_B_MODE_PROBS_464_SHIFT (0) 3141 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_116_KF_B_MODE_PROBS_464_SIGNED_FIELD IMG_FALSE 3142 3143 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_116, KF_B_MODE_PROBS_465 3144 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_116_KF_B_MODE_PROBS_465_MASK (0x0000FF00) 3145 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_116_KF_B_MODE_PROBS_465_LSBMASK (0x000000FF) 3146 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_116_KF_B_MODE_PROBS_465_SHIFT (8) 3147 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_116_KF_B_MODE_PROBS_465_SIGNED_FIELD IMG_FALSE 3148 3149 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_116, KF_B_MODE_PROBS_466 3150 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_116_KF_B_MODE_PROBS_466_MASK (0x00FF0000) 3151 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_116_KF_B_MODE_PROBS_466_LSBMASK (0x000000FF) 3152 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_116_KF_B_MODE_PROBS_466_SHIFT (16) 3153 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_116_KF_B_MODE_PROBS_466_SIGNED_FIELD IMG_FALSE 3154 3155 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_116, KF_B_MODE_PROBS_467 3156 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_116_KF_B_MODE_PROBS_467_MASK (0xFF000000) 3157 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_116_KF_B_MODE_PROBS_467_LSBMASK (0x000000FF) 3158 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_116_KF_B_MODE_PROBS_467_SHIFT (24) 3159 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_116_KF_B_MODE_PROBS_467_SIGNED_FIELD IMG_FALSE 3160 3161 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_117_OFFSET (0x09E0) 3162 3163 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_117, KF_B_MODE_PROBS_468 3164 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_117_KF_B_MODE_PROBS_468_MASK (0x000000FF) 3165 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_117_KF_B_MODE_PROBS_468_LSBMASK (0x000000FF) 3166 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_117_KF_B_MODE_PROBS_468_SHIFT (0) 3167 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_117_KF_B_MODE_PROBS_468_SIGNED_FIELD IMG_FALSE 3168 3169 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_117, KF_B_MODE_PROBS_469 3170 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_117_KF_B_MODE_PROBS_469_MASK (0x0000FF00) 3171 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_117_KF_B_MODE_PROBS_469_LSBMASK (0x000000FF) 3172 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_117_KF_B_MODE_PROBS_469_SHIFT (8) 3173 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_117_KF_B_MODE_PROBS_469_SIGNED_FIELD IMG_FALSE 3174 3175 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_117, KF_B_MODE_PROBS_470 3176 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_117_KF_B_MODE_PROBS_470_MASK (0x00FF0000) 3177 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_117_KF_B_MODE_PROBS_470_LSBMASK (0x000000FF) 3178 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_117_KF_B_MODE_PROBS_470_SHIFT (16) 3179 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_117_KF_B_MODE_PROBS_470_SIGNED_FIELD IMG_FALSE 3180 3181 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_117, KF_B_MODE_PROBS_471 3182 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_117_KF_B_MODE_PROBS_471_MASK (0xFF000000) 3183 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_117_KF_B_MODE_PROBS_471_LSBMASK (0x000000FF) 3184 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_117_KF_B_MODE_PROBS_471_SHIFT (24) 3185 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_117_KF_B_MODE_PROBS_471_SIGNED_FIELD IMG_FALSE 3186 3187 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_118_OFFSET (0x09E4) 3188 3189 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_118, KF_B_MODE_PROBS_472 3190 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_118_KF_B_MODE_PROBS_472_MASK (0x000000FF) 3191 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_118_KF_B_MODE_PROBS_472_LSBMASK (0x000000FF) 3192 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_118_KF_B_MODE_PROBS_472_SHIFT (0) 3193 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_118_KF_B_MODE_PROBS_472_SIGNED_FIELD IMG_FALSE 3194 3195 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_118, KF_B_MODE_PROBS_473 3196 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_118_KF_B_MODE_PROBS_473_MASK (0x0000FF00) 3197 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_118_KF_B_MODE_PROBS_473_LSBMASK (0x000000FF) 3198 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_118_KF_B_MODE_PROBS_473_SHIFT (8) 3199 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_118_KF_B_MODE_PROBS_473_SIGNED_FIELD IMG_FALSE 3200 3201 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_118, KF_B_MODE_PROBS_474 3202 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_118_KF_B_MODE_PROBS_474_MASK (0x00FF0000) 3203 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_118_KF_B_MODE_PROBS_474_LSBMASK (0x000000FF) 3204 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_118_KF_B_MODE_PROBS_474_SHIFT (16) 3205 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_118_KF_B_MODE_PROBS_474_SIGNED_FIELD IMG_FALSE 3206 3207 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_118, KF_B_MODE_PROBS_475 3208 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_118_KF_B_MODE_PROBS_475_MASK (0xFF000000) 3209 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_118_KF_B_MODE_PROBS_475_LSBMASK (0x000000FF) 3210 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_118_KF_B_MODE_PROBS_475_SHIFT (24) 3211 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_118_KF_B_MODE_PROBS_475_SIGNED_FIELD IMG_FALSE 3212 3213 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_119_OFFSET (0x09E8) 3214 3215 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_119, KF_B_MODE_PROBS_476 3216 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_119_KF_B_MODE_PROBS_476_MASK (0x000000FF) 3217 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_119_KF_B_MODE_PROBS_476_LSBMASK (0x000000FF) 3218 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_119_KF_B_MODE_PROBS_476_SHIFT (0) 3219 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_119_KF_B_MODE_PROBS_476_SIGNED_FIELD IMG_FALSE 3220 3221 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_119, KF_B_MODE_PROBS_477 3222 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_119_KF_B_MODE_PROBS_477_MASK (0x0000FF00) 3223 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_119_KF_B_MODE_PROBS_477_LSBMASK (0x000000FF) 3224 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_119_KF_B_MODE_PROBS_477_SHIFT (8) 3225 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_119_KF_B_MODE_PROBS_477_SIGNED_FIELD IMG_FALSE 3226 3227 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_119, KF_B_MODE_PROBS_478 3228 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_119_KF_B_MODE_PROBS_478_MASK (0x00FF0000) 3229 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_119_KF_B_MODE_PROBS_478_LSBMASK (0x000000FF) 3230 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_119_KF_B_MODE_PROBS_478_SHIFT (16) 3231 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_119_KF_B_MODE_PROBS_478_SIGNED_FIELD IMG_FALSE 3232 3233 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_119, KF_B_MODE_PROBS_479 3234 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_119_KF_B_MODE_PROBS_479_MASK (0xFF000000) 3235 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_119_KF_B_MODE_PROBS_479_LSBMASK (0x000000FF) 3236 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_119_KF_B_MODE_PROBS_479_SHIFT (24) 3237 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_119_KF_B_MODE_PROBS_479_SIGNED_FIELD IMG_FALSE 3238 3239 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_120_OFFSET (0x09EC) 3240 3241 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_120, KF_B_MODE_PROBS_480 3242 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_120_KF_B_MODE_PROBS_480_MASK (0x000000FF) 3243 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_120_KF_B_MODE_PROBS_480_LSBMASK (0x000000FF) 3244 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_120_KF_B_MODE_PROBS_480_SHIFT (0) 3245 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_120_KF_B_MODE_PROBS_480_SIGNED_FIELD IMG_FALSE 3246 3247 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_120, KF_B_MODE_PROBS_481 3248 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_120_KF_B_MODE_PROBS_481_MASK (0x0000FF00) 3249 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_120_KF_B_MODE_PROBS_481_LSBMASK (0x000000FF) 3250 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_120_KF_B_MODE_PROBS_481_SHIFT (8) 3251 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_120_KF_B_MODE_PROBS_481_SIGNED_FIELD IMG_FALSE 3252 3253 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_120, KF_B_MODE_PROBS_482 3254 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_120_KF_B_MODE_PROBS_482_MASK (0x00FF0000) 3255 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_120_KF_B_MODE_PROBS_482_LSBMASK (0x000000FF) 3256 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_120_KF_B_MODE_PROBS_482_SHIFT (16) 3257 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_120_KF_B_MODE_PROBS_482_SIGNED_FIELD IMG_FALSE 3258 3259 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_120, KF_B_MODE_PROBS_483 3260 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_120_KF_B_MODE_PROBS_483_MASK (0xFF000000) 3261 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_120_KF_B_MODE_PROBS_483_LSBMASK (0x000000FF) 3262 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_120_KF_B_MODE_PROBS_483_SHIFT (24) 3263 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_120_KF_B_MODE_PROBS_483_SIGNED_FIELD IMG_FALSE 3264 3265 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_121_OFFSET (0x09F0) 3266 3267 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_121, KF_B_MODE_PROBS_484 3268 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_121_KF_B_MODE_PROBS_484_MASK (0x000000FF) 3269 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_121_KF_B_MODE_PROBS_484_LSBMASK (0x000000FF) 3270 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_121_KF_B_MODE_PROBS_484_SHIFT (0) 3271 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_121_KF_B_MODE_PROBS_484_SIGNED_FIELD IMG_FALSE 3272 3273 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_121, KF_B_MODE_PROBS_485 3274 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_121_KF_B_MODE_PROBS_485_MASK (0x0000FF00) 3275 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_121_KF_B_MODE_PROBS_485_LSBMASK (0x000000FF) 3276 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_121_KF_B_MODE_PROBS_485_SHIFT (8) 3277 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_121_KF_B_MODE_PROBS_485_SIGNED_FIELD IMG_FALSE 3278 3279 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_121, KF_B_MODE_PROBS_486 3280 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_121_KF_B_MODE_PROBS_486_MASK (0x00FF0000) 3281 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_121_KF_B_MODE_PROBS_486_LSBMASK (0x000000FF) 3282 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_121_KF_B_MODE_PROBS_486_SHIFT (16) 3283 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_121_KF_B_MODE_PROBS_486_SIGNED_FIELD IMG_FALSE 3284 3285 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_121, KF_B_MODE_PROBS_487 3286 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_121_KF_B_MODE_PROBS_487_MASK (0xFF000000) 3287 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_121_KF_B_MODE_PROBS_487_LSBMASK (0x000000FF) 3288 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_121_KF_B_MODE_PROBS_487_SHIFT (24) 3289 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_121_KF_B_MODE_PROBS_487_SIGNED_FIELD IMG_FALSE 3290 3291 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_122_OFFSET (0x09F4) 3292 3293 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_122, KF_B_MODE_PROBS_488 3294 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_122_KF_B_MODE_PROBS_488_MASK (0x000000FF) 3295 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_122_KF_B_MODE_PROBS_488_LSBMASK (0x000000FF) 3296 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_122_KF_B_MODE_PROBS_488_SHIFT (0) 3297 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_122_KF_B_MODE_PROBS_488_SIGNED_FIELD IMG_FALSE 3298 3299 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_122, KF_B_MODE_PROBS_489 3300 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_122_KF_B_MODE_PROBS_489_MASK (0x0000FF00) 3301 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_122_KF_B_MODE_PROBS_489_LSBMASK (0x000000FF) 3302 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_122_KF_B_MODE_PROBS_489_SHIFT (8) 3303 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_122_KF_B_MODE_PROBS_489_SIGNED_FIELD IMG_FALSE 3304 3305 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_122, KF_B_MODE_PROBS_490 3306 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_122_KF_B_MODE_PROBS_490_MASK (0x00FF0000) 3307 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_122_KF_B_MODE_PROBS_490_LSBMASK (0x000000FF) 3308 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_122_KF_B_MODE_PROBS_490_SHIFT (16) 3309 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_122_KF_B_MODE_PROBS_490_SIGNED_FIELD IMG_FALSE 3310 3311 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_122, KF_B_MODE_PROBS_491 3312 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_122_KF_B_MODE_PROBS_491_MASK (0xFF000000) 3313 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_122_KF_B_MODE_PROBS_491_LSBMASK (0x000000FF) 3314 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_122_KF_B_MODE_PROBS_491_SHIFT (24) 3315 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_122_KF_B_MODE_PROBS_491_SIGNED_FIELD IMG_FALSE 3316 3317 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_123_OFFSET (0x09F8) 3318 3319 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_123, KF_B_MODE_PROBS_492 3320 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_123_KF_B_MODE_PROBS_492_MASK (0x000000FF) 3321 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_123_KF_B_MODE_PROBS_492_LSBMASK (0x000000FF) 3322 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_123_KF_B_MODE_PROBS_492_SHIFT (0) 3323 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_123_KF_B_MODE_PROBS_492_SIGNED_FIELD IMG_FALSE 3324 3325 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_123, KF_B_MODE_PROBS_493 3326 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_123_KF_B_MODE_PROBS_493_MASK (0x0000FF00) 3327 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_123_KF_B_MODE_PROBS_493_LSBMASK (0x000000FF) 3328 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_123_KF_B_MODE_PROBS_493_SHIFT (8) 3329 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_123_KF_B_MODE_PROBS_493_SIGNED_FIELD IMG_FALSE 3330 3331 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_123, KF_B_MODE_PROBS_494 3332 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_123_KF_B_MODE_PROBS_494_MASK (0x00FF0000) 3333 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_123_KF_B_MODE_PROBS_494_LSBMASK (0x000000FF) 3334 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_123_KF_B_MODE_PROBS_494_SHIFT (16) 3335 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_123_KF_B_MODE_PROBS_494_SIGNED_FIELD IMG_FALSE 3336 3337 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_123, KF_B_MODE_PROBS_495 3338 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_123_KF_B_MODE_PROBS_495_MASK (0xFF000000) 3339 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_123_KF_B_MODE_PROBS_495_LSBMASK (0x000000FF) 3340 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_123_KF_B_MODE_PROBS_495_SHIFT (24) 3341 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_123_KF_B_MODE_PROBS_495_SIGNED_FIELD IMG_FALSE 3342 3343 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_124_OFFSET (0x09FC) 3344 3345 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_124, KF_B_MODE_PROBS_496 3346 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_124_KF_B_MODE_PROBS_496_MASK (0x000000FF) 3347 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_124_KF_B_MODE_PROBS_496_LSBMASK (0x000000FF) 3348 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_124_KF_B_MODE_PROBS_496_SHIFT (0) 3349 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_124_KF_B_MODE_PROBS_496_SIGNED_FIELD IMG_FALSE 3350 3351 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_124, KF_B_MODE_PROBS_497 3352 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_124_KF_B_MODE_PROBS_497_MASK (0x0000FF00) 3353 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_124_KF_B_MODE_PROBS_497_LSBMASK (0x000000FF) 3354 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_124_KF_B_MODE_PROBS_497_SHIFT (8) 3355 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_124_KF_B_MODE_PROBS_497_SIGNED_FIELD IMG_FALSE 3356 3357 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_124, KF_B_MODE_PROBS_498 3358 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_124_KF_B_MODE_PROBS_498_MASK (0x00FF0000) 3359 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_124_KF_B_MODE_PROBS_498_LSBMASK (0x000000FF) 3360 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_124_KF_B_MODE_PROBS_498_SHIFT (16) 3361 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_124_KF_B_MODE_PROBS_498_SIGNED_FIELD IMG_FALSE 3362 3363 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_124, KF_B_MODE_PROBS_499 3364 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_124_KF_B_MODE_PROBS_499_MASK (0xFF000000) 3365 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_124_KF_B_MODE_PROBS_499_LSBMASK (0x000000FF) 3366 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_124_KF_B_MODE_PROBS_499_SHIFT (24) 3367 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_124_KF_B_MODE_PROBS_499_SIGNED_FIELD IMG_FALSE 3368 3369 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_125_OFFSET (0x0A00) 3370 3371 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_125, KF_B_MODE_PROBS_500 3372 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_125_KF_B_MODE_PROBS_500_MASK (0x000000FF) 3373 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_125_KF_B_MODE_PROBS_500_LSBMASK (0x000000FF) 3374 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_125_KF_B_MODE_PROBS_500_SHIFT (0) 3375 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_125_KF_B_MODE_PROBS_500_SIGNED_FIELD IMG_FALSE 3376 3377 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_125, KF_B_MODE_PROBS_501 3378 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_125_KF_B_MODE_PROBS_501_MASK (0x0000FF00) 3379 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_125_KF_B_MODE_PROBS_501_LSBMASK (0x000000FF) 3380 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_125_KF_B_MODE_PROBS_501_SHIFT (8) 3381 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_125_KF_B_MODE_PROBS_501_SIGNED_FIELD IMG_FALSE 3382 3383 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_125, KF_B_MODE_PROBS_502 3384 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_125_KF_B_MODE_PROBS_502_MASK (0x00FF0000) 3385 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_125_KF_B_MODE_PROBS_502_LSBMASK (0x000000FF) 3386 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_125_KF_B_MODE_PROBS_502_SHIFT (16) 3387 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_125_KF_B_MODE_PROBS_502_SIGNED_FIELD IMG_FALSE 3388 3389 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_125, KF_B_MODE_PROBS_503 3390 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_125_KF_B_MODE_PROBS_503_MASK (0xFF000000) 3391 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_125_KF_B_MODE_PROBS_503_LSBMASK (0x000000FF) 3392 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_125_KF_B_MODE_PROBS_503_SHIFT (24) 3393 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_125_KF_B_MODE_PROBS_503_SIGNED_FIELD IMG_FALSE 3394 3395 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_126_OFFSET (0x0A04) 3396 3397 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_126, KF_B_MODE_PROBS_504 3398 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_126_KF_B_MODE_PROBS_504_MASK (0x000000FF) 3399 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_126_KF_B_MODE_PROBS_504_LSBMASK (0x000000FF) 3400 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_126_KF_B_MODE_PROBS_504_SHIFT (0) 3401 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_126_KF_B_MODE_PROBS_504_SIGNED_FIELD IMG_FALSE 3402 3403 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_126, KF_B_MODE_PROBS_505 3404 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_126_KF_B_MODE_PROBS_505_MASK (0x0000FF00) 3405 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_126_KF_B_MODE_PROBS_505_LSBMASK (0x000000FF) 3406 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_126_KF_B_MODE_PROBS_505_SHIFT (8) 3407 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_126_KF_B_MODE_PROBS_505_SIGNED_FIELD IMG_FALSE 3408 3409 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_126, KF_B_MODE_PROBS_506 3410 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_126_KF_B_MODE_PROBS_506_MASK (0x00FF0000) 3411 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_126_KF_B_MODE_PROBS_506_LSBMASK (0x000000FF) 3412 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_126_KF_B_MODE_PROBS_506_SHIFT (16) 3413 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_126_KF_B_MODE_PROBS_506_SIGNED_FIELD IMG_FALSE 3414 3415 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_126, KF_B_MODE_PROBS_507 3416 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_126_KF_B_MODE_PROBS_507_MASK (0xFF000000) 3417 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_126_KF_B_MODE_PROBS_507_LSBMASK (0x000000FF) 3418 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_126_KF_B_MODE_PROBS_507_SHIFT (24) 3419 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_126_KF_B_MODE_PROBS_507_SIGNED_FIELD IMG_FALSE 3420 3421 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_127_OFFSET (0x0A08) 3422 3423 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_127, KF_B_MODE_PROBS_508 3424 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_127_KF_B_MODE_PROBS_508_MASK (0x000000FF) 3425 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_127_KF_B_MODE_PROBS_508_LSBMASK (0x000000FF) 3426 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_127_KF_B_MODE_PROBS_508_SHIFT (0) 3427 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_127_KF_B_MODE_PROBS_508_SIGNED_FIELD IMG_FALSE 3428 3429 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_127, KF_B_MODE_PROBS_509 3430 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_127_KF_B_MODE_PROBS_509_MASK (0x0000FF00) 3431 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_127_KF_B_MODE_PROBS_509_LSBMASK (0x000000FF) 3432 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_127_KF_B_MODE_PROBS_509_SHIFT (8) 3433 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_127_KF_B_MODE_PROBS_509_SIGNED_FIELD IMG_FALSE 3434 3435 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_127, KF_B_MODE_PROBS_510 3436 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_127_KF_B_MODE_PROBS_510_MASK (0x00FF0000) 3437 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_127_KF_B_MODE_PROBS_510_LSBMASK (0x000000FF) 3438 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_127_KF_B_MODE_PROBS_510_SHIFT (16) 3439 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_127_KF_B_MODE_PROBS_510_SIGNED_FIELD IMG_FALSE 3440 3441 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_127, KF_B_MODE_PROBS_511 3442 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_127_KF_B_MODE_PROBS_511_MASK (0xFF000000) 3443 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_127_KF_B_MODE_PROBS_511_LSBMASK (0x000000FF) 3444 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_127_KF_B_MODE_PROBS_511_SHIFT (24) 3445 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_127_KF_B_MODE_PROBS_511_SIGNED_FIELD IMG_FALSE 3446 3447 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_128_OFFSET (0x0A0C) 3448 3449 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_128, KF_B_MODE_PROBS_512 3450 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_128_KF_B_MODE_PROBS_512_MASK (0x000000FF) 3451 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_128_KF_B_MODE_PROBS_512_LSBMASK (0x000000FF) 3452 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_128_KF_B_MODE_PROBS_512_SHIFT (0) 3453 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_128_KF_B_MODE_PROBS_512_SIGNED_FIELD IMG_FALSE 3454 3455 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_128, KF_B_MODE_PROBS_513 3456 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_128_KF_B_MODE_PROBS_513_MASK (0x0000FF00) 3457 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_128_KF_B_MODE_PROBS_513_LSBMASK (0x000000FF) 3458 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_128_KF_B_MODE_PROBS_513_SHIFT (8) 3459 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_128_KF_B_MODE_PROBS_513_SIGNED_FIELD IMG_FALSE 3460 3461 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_128, KF_B_MODE_PROBS_514 3462 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_128_KF_B_MODE_PROBS_514_MASK (0x00FF0000) 3463 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_128_KF_B_MODE_PROBS_514_LSBMASK (0x000000FF) 3464 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_128_KF_B_MODE_PROBS_514_SHIFT (16) 3465 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_128_KF_B_MODE_PROBS_514_SIGNED_FIELD IMG_FALSE 3466 3467 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_128, KF_B_MODE_PROBS_515 3468 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_128_KF_B_MODE_PROBS_515_MASK (0xFF000000) 3469 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_128_KF_B_MODE_PROBS_515_LSBMASK (0x000000FF) 3470 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_128_KF_B_MODE_PROBS_515_SHIFT (24) 3471 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_128_KF_B_MODE_PROBS_515_SIGNED_FIELD IMG_FALSE 3472 3473 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_129_OFFSET (0x0A10) 3474 3475 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_129, KF_B_MODE_PROBS_516 3476 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_129_KF_B_MODE_PROBS_516_MASK (0x000000FF) 3477 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_129_KF_B_MODE_PROBS_516_LSBMASK (0x000000FF) 3478 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_129_KF_B_MODE_PROBS_516_SHIFT (0) 3479 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_129_KF_B_MODE_PROBS_516_SIGNED_FIELD IMG_FALSE 3480 3481 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_129, KF_B_MODE_PROBS_517 3482 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_129_KF_B_MODE_PROBS_517_MASK (0x0000FF00) 3483 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_129_KF_B_MODE_PROBS_517_LSBMASK (0x000000FF) 3484 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_129_KF_B_MODE_PROBS_517_SHIFT (8) 3485 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_129_KF_B_MODE_PROBS_517_SIGNED_FIELD IMG_FALSE 3486 3487 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_129, KF_B_MODE_PROBS_518 3488 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_129_KF_B_MODE_PROBS_518_MASK (0x00FF0000) 3489 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_129_KF_B_MODE_PROBS_518_LSBMASK (0x000000FF) 3490 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_129_KF_B_MODE_PROBS_518_SHIFT (16) 3491 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_129_KF_B_MODE_PROBS_518_SIGNED_FIELD IMG_FALSE 3492 3493 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_129, KF_B_MODE_PROBS_519 3494 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_129_KF_B_MODE_PROBS_519_MASK (0xFF000000) 3495 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_129_KF_B_MODE_PROBS_519_LSBMASK (0x000000FF) 3496 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_129_KF_B_MODE_PROBS_519_SHIFT (24) 3497 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_129_KF_B_MODE_PROBS_519_SIGNED_FIELD IMG_FALSE 3498 3499 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_130_OFFSET (0x0A14) 3500 3501 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_130, KF_B_MODE_PROBS_520 3502 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_130_KF_B_MODE_PROBS_520_MASK (0x000000FF) 3503 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_130_KF_B_MODE_PROBS_520_LSBMASK (0x000000FF) 3504 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_130_KF_B_MODE_PROBS_520_SHIFT (0) 3505 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_130_KF_B_MODE_PROBS_520_SIGNED_FIELD IMG_FALSE 3506 3507 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_130, KF_B_MODE_PROBS_521 3508 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_130_KF_B_MODE_PROBS_521_MASK (0x0000FF00) 3509 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_130_KF_B_MODE_PROBS_521_LSBMASK (0x000000FF) 3510 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_130_KF_B_MODE_PROBS_521_SHIFT (8) 3511 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_130_KF_B_MODE_PROBS_521_SIGNED_FIELD IMG_FALSE 3512 3513 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_130, KF_B_MODE_PROBS_522 3514 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_130_KF_B_MODE_PROBS_522_MASK (0x00FF0000) 3515 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_130_KF_B_MODE_PROBS_522_LSBMASK (0x000000FF) 3516 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_130_KF_B_MODE_PROBS_522_SHIFT (16) 3517 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_130_KF_B_MODE_PROBS_522_SIGNED_FIELD IMG_FALSE 3518 3519 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_130, KF_B_MODE_PROBS_523 3520 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_130_KF_B_MODE_PROBS_523_MASK (0xFF000000) 3521 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_130_KF_B_MODE_PROBS_523_LSBMASK (0x000000FF) 3522 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_130_KF_B_MODE_PROBS_523_SHIFT (24) 3523 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_130_KF_B_MODE_PROBS_523_SIGNED_FIELD IMG_FALSE 3524 3525 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_131_OFFSET (0x0A18) 3526 3527 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_131, KF_B_MODE_PROBS_524 3528 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_131_KF_B_MODE_PROBS_524_MASK (0x000000FF) 3529 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_131_KF_B_MODE_PROBS_524_LSBMASK (0x000000FF) 3530 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_131_KF_B_MODE_PROBS_524_SHIFT (0) 3531 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_131_KF_B_MODE_PROBS_524_SIGNED_FIELD IMG_FALSE 3532 3533 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_131, KF_B_MODE_PROBS_525 3534 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_131_KF_B_MODE_PROBS_525_MASK (0x0000FF00) 3535 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_131_KF_B_MODE_PROBS_525_LSBMASK (0x000000FF) 3536 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_131_KF_B_MODE_PROBS_525_SHIFT (8) 3537 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_131_KF_B_MODE_PROBS_525_SIGNED_FIELD IMG_FALSE 3538 3539 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_131, KF_B_MODE_PROBS_526 3540 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_131_KF_B_MODE_PROBS_526_MASK (0x00FF0000) 3541 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_131_KF_B_MODE_PROBS_526_LSBMASK (0x000000FF) 3542 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_131_KF_B_MODE_PROBS_526_SHIFT (16) 3543 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_131_KF_B_MODE_PROBS_526_SIGNED_FIELD IMG_FALSE 3544 3545 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_131, KF_B_MODE_PROBS_527 3546 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_131_KF_B_MODE_PROBS_527_MASK (0xFF000000) 3547 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_131_KF_B_MODE_PROBS_527_LSBMASK (0x000000FF) 3548 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_131_KF_B_MODE_PROBS_527_SHIFT (24) 3549 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_131_KF_B_MODE_PROBS_527_SIGNED_FIELD IMG_FALSE 3550 3551 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_132_OFFSET (0x0A1C) 3552 3553 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_132, KF_B_MODE_PROBS_528 3554 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_132_KF_B_MODE_PROBS_528_MASK (0x000000FF) 3555 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_132_KF_B_MODE_PROBS_528_LSBMASK (0x000000FF) 3556 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_132_KF_B_MODE_PROBS_528_SHIFT (0) 3557 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_132_KF_B_MODE_PROBS_528_SIGNED_FIELD IMG_FALSE 3558 3559 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_132, KF_B_MODE_PROBS_529 3560 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_132_KF_B_MODE_PROBS_529_MASK (0x0000FF00) 3561 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_132_KF_B_MODE_PROBS_529_LSBMASK (0x000000FF) 3562 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_132_KF_B_MODE_PROBS_529_SHIFT (8) 3563 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_132_KF_B_MODE_PROBS_529_SIGNED_FIELD IMG_FALSE 3564 3565 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_132, KF_B_MODE_PROBS_530 3566 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_132_KF_B_MODE_PROBS_530_MASK (0x00FF0000) 3567 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_132_KF_B_MODE_PROBS_530_LSBMASK (0x000000FF) 3568 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_132_KF_B_MODE_PROBS_530_SHIFT (16) 3569 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_132_KF_B_MODE_PROBS_530_SIGNED_FIELD IMG_FALSE 3570 3571 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_132, KF_B_MODE_PROBS_531 3572 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_132_KF_B_MODE_PROBS_531_MASK (0xFF000000) 3573 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_132_KF_B_MODE_PROBS_531_LSBMASK (0x000000FF) 3574 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_132_KF_B_MODE_PROBS_531_SHIFT (24) 3575 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_132_KF_B_MODE_PROBS_531_SIGNED_FIELD IMG_FALSE 3576 3577 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_133_OFFSET (0x0A20) 3578 3579 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_133, KF_B_MODE_PROBS_532 3580 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_133_KF_B_MODE_PROBS_532_MASK (0x000000FF) 3581 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_133_KF_B_MODE_PROBS_532_LSBMASK (0x000000FF) 3582 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_133_KF_B_MODE_PROBS_532_SHIFT (0) 3583 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_133_KF_B_MODE_PROBS_532_SIGNED_FIELD IMG_FALSE 3584 3585 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_133, KF_B_MODE_PROBS_533 3586 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_133_KF_B_MODE_PROBS_533_MASK (0x0000FF00) 3587 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_133_KF_B_MODE_PROBS_533_LSBMASK (0x000000FF) 3588 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_133_KF_B_MODE_PROBS_533_SHIFT (8) 3589 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_133_KF_B_MODE_PROBS_533_SIGNED_FIELD IMG_FALSE 3590 3591 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_133, KF_B_MODE_PROBS_534 3592 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_133_KF_B_MODE_PROBS_534_MASK (0x00FF0000) 3593 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_133_KF_B_MODE_PROBS_534_LSBMASK (0x000000FF) 3594 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_133_KF_B_MODE_PROBS_534_SHIFT (16) 3595 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_133_KF_B_MODE_PROBS_534_SIGNED_FIELD IMG_FALSE 3596 3597 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_133, KF_B_MODE_PROBS_535 3598 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_133_KF_B_MODE_PROBS_535_MASK (0xFF000000) 3599 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_133_KF_B_MODE_PROBS_535_LSBMASK (0x000000FF) 3600 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_133_KF_B_MODE_PROBS_535_SHIFT (24) 3601 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_133_KF_B_MODE_PROBS_535_SIGNED_FIELD IMG_FALSE 3602 3603 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_134_OFFSET (0x0A24) 3604 3605 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_134, KF_B_MODE_PROBS_536 3606 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_134_KF_B_MODE_PROBS_536_MASK (0x000000FF) 3607 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_134_KF_B_MODE_PROBS_536_LSBMASK (0x000000FF) 3608 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_134_KF_B_MODE_PROBS_536_SHIFT (0) 3609 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_134_KF_B_MODE_PROBS_536_SIGNED_FIELD IMG_FALSE 3610 3611 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_134, KF_B_MODE_PROBS_537 3612 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_134_KF_B_MODE_PROBS_537_MASK (0x0000FF00) 3613 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_134_KF_B_MODE_PROBS_537_LSBMASK (0x000000FF) 3614 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_134_KF_B_MODE_PROBS_537_SHIFT (8) 3615 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_134_KF_B_MODE_PROBS_537_SIGNED_FIELD IMG_FALSE 3616 3617 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_134, KF_B_MODE_PROBS_538 3618 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_134_KF_B_MODE_PROBS_538_MASK (0x00FF0000) 3619 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_134_KF_B_MODE_PROBS_538_LSBMASK (0x000000FF) 3620 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_134_KF_B_MODE_PROBS_538_SHIFT (16) 3621 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_134_KF_B_MODE_PROBS_538_SIGNED_FIELD IMG_FALSE 3622 3623 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_134, KF_B_MODE_PROBS_539 3624 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_134_KF_B_MODE_PROBS_539_MASK (0xFF000000) 3625 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_134_KF_B_MODE_PROBS_539_LSBMASK (0x000000FF) 3626 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_134_KF_B_MODE_PROBS_539_SHIFT (24) 3627 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_134_KF_B_MODE_PROBS_539_SIGNED_FIELD IMG_FALSE 3628 3629 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_135_OFFSET (0x0A28) 3630 3631 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_135, KF_B_MODE_PROBS_540 3632 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_135_KF_B_MODE_PROBS_540_MASK (0x000000FF) 3633 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_135_KF_B_MODE_PROBS_540_LSBMASK (0x000000FF) 3634 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_135_KF_B_MODE_PROBS_540_SHIFT (0) 3635 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_135_KF_B_MODE_PROBS_540_SIGNED_FIELD IMG_FALSE 3636 3637 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_135, KF_B_MODE_PROBS_541 3638 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_135_KF_B_MODE_PROBS_541_MASK (0x0000FF00) 3639 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_135_KF_B_MODE_PROBS_541_LSBMASK (0x000000FF) 3640 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_135_KF_B_MODE_PROBS_541_SHIFT (8) 3641 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_135_KF_B_MODE_PROBS_541_SIGNED_FIELD IMG_FALSE 3642 3643 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_135, KF_B_MODE_PROBS_542 3644 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_135_KF_B_MODE_PROBS_542_MASK (0x00FF0000) 3645 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_135_KF_B_MODE_PROBS_542_LSBMASK (0x000000FF) 3646 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_135_KF_B_MODE_PROBS_542_SHIFT (16) 3647 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_135_KF_B_MODE_PROBS_542_SIGNED_FIELD IMG_FALSE 3648 3649 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_135, KF_B_MODE_PROBS_543 3650 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_135_KF_B_MODE_PROBS_543_MASK (0xFF000000) 3651 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_135_KF_B_MODE_PROBS_543_LSBMASK (0x000000FF) 3652 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_135_KF_B_MODE_PROBS_543_SHIFT (24) 3653 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_135_KF_B_MODE_PROBS_543_SIGNED_FIELD IMG_FALSE 3654 3655 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_136_OFFSET (0x0A2C) 3656 3657 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_136, KF_B_MODE_PROBS_544 3658 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_136_KF_B_MODE_PROBS_544_MASK (0x000000FF) 3659 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_136_KF_B_MODE_PROBS_544_LSBMASK (0x000000FF) 3660 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_136_KF_B_MODE_PROBS_544_SHIFT (0) 3661 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_136_KF_B_MODE_PROBS_544_SIGNED_FIELD IMG_FALSE 3662 3663 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_136, KF_B_MODE_PROBS_545 3664 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_136_KF_B_MODE_PROBS_545_MASK (0x0000FF00) 3665 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_136_KF_B_MODE_PROBS_545_LSBMASK (0x000000FF) 3666 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_136_KF_B_MODE_PROBS_545_SHIFT (8) 3667 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_136_KF_B_MODE_PROBS_545_SIGNED_FIELD IMG_FALSE 3668 3669 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_136, KF_B_MODE_PROBS_546 3670 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_136_KF_B_MODE_PROBS_546_MASK (0x00FF0000) 3671 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_136_KF_B_MODE_PROBS_546_LSBMASK (0x000000FF) 3672 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_136_KF_B_MODE_PROBS_546_SHIFT (16) 3673 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_136_KF_B_MODE_PROBS_546_SIGNED_FIELD IMG_FALSE 3674 3675 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_136, KF_B_MODE_PROBS_547 3676 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_136_KF_B_MODE_PROBS_547_MASK (0xFF000000) 3677 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_136_KF_B_MODE_PROBS_547_LSBMASK (0x000000FF) 3678 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_136_KF_B_MODE_PROBS_547_SHIFT (24) 3679 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_136_KF_B_MODE_PROBS_547_SIGNED_FIELD IMG_FALSE 3680 3681 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_137_OFFSET (0x0A30) 3682 3683 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_137, KF_B_MODE_PROBS_548 3684 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_137_KF_B_MODE_PROBS_548_MASK (0x000000FF) 3685 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_137_KF_B_MODE_PROBS_548_LSBMASK (0x000000FF) 3686 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_137_KF_B_MODE_PROBS_548_SHIFT (0) 3687 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_137_KF_B_MODE_PROBS_548_SIGNED_FIELD IMG_FALSE 3688 3689 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_137, KF_B_MODE_PROBS_549 3690 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_137_KF_B_MODE_PROBS_549_MASK (0x0000FF00) 3691 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_137_KF_B_MODE_PROBS_549_LSBMASK (0x000000FF) 3692 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_137_KF_B_MODE_PROBS_549_SHIFT (8) 3693 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_137_KF_B_MODE_PROBS_549_SIGNED_FIELD IMG_FALSE 3694 3695 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_137, KF_B_MODE_PROBS_550 3696 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_137_KF_B_MODE_PROBS_550_MASK (0x00FF0000) 3697 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_137_KF_B_MODE_PROBS_550_LSBMASK (0x000000FF) 3698 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_137_KF_B_MODE_PROBS_550_SHIFT (16) 3699 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_137_KF_B_MODE_PROBS_550_SIGNED_FIELD IMG_FALSE 3700 3701 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_137, KF_B_MODE_PROBS_551 3702 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_137_KF_B_MODE_PROBS_551_MASK (0xFF000000) 3703 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_137_KF_B_MODE_PROBS_551_LSBMASK (0x000000FF) 3704 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_137_KF_B_MODE_PROBS_551_SHIFT (24) 3705 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_137_KF_B_MODE_PROBS_551_SIGNED_FIELD IMG_FALSE 3706 3707 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_138_OFFSET (0x0A34) 3708 3709 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_138, KF_B_MODE_PROBS_552 3710 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_138_KF_B_MODE_PROBS_552_MASK (0x000000FF) 3711 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_138_KF_B_MODE_PROBS_552_LSBMASK (0x000000FF) 3712 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_138_KF_B_MODE_PROBS_552_SHIFT (0) 3713 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_138_KF_B_MODE_PROBS_552_SIGNED_FIELD IMG_FALSE 3714 3715 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_138, KF_B_MODE_PROBS_553 3716 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_138_KF_B_MODE_PROBS_553_MASK (0x0000FF00) 3717 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_138_KF_B_MODE_PROBS_553_LSBMASK (0x000000FF) 3718 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_138_KF_B_MODE_PROBS_553_SHIFT (8) 3719 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_138_KF_B_MODE_PROBS_553_SIGNED_FIELD IMG_FALSE 3720 3721 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_138, KF_B_MODE_PROBS_554 3722 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_138_KF_B_MODE_PROBS_554_MASK (0x00FF0000) 3723 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_138_KF_B_MODE_PROBS_554_LSBMASK (0x000000FF) 3724 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_138_KF_B_MODE_PROBS_554_SHIFT (16) 3725 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_138_KF_B_MODE_PROBS_554_SIGNED_FIELD IMG_FALSE 3726 3727 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_138, KF_B_MODE_PROBS_555 3728 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_138_KF_B_MODE_PROBS_555_MASK (0xFF000000) 3729 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_138_KF_B_MODE_PROBS_555_LSBMASK (0x000000FF) 3730 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_138_KF_B_MODE_PROBS_555_SHIFT (24) 3731 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_138_KF_B_MODE_PROBS_555_SIGNED_FIELD IMG_FALSE 3732 3733 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_139_OFFSET (0x0A38) 3734 3735 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_139, KF_B_MODE_PROBS_556 3736 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_139_KF_B_MODE_PROBS_556_MASK (0x000000FF) 3737 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_139_KF_B_MODE_PROBS_556_LSBMASK (0x000000FF) 3738 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_139_KF_B_MODE_PROBS_556_SHIFT (0) 3739 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_139_KF_B_MODE_PROBS_556_SIGNED_FIELD IMG_FALSE 3740 3741 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_139, KF_B_MODE_PROBS_557 3742 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_139_KF_B_MODE_PROBS_557_MASK (0x0000FF00) 3743 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_139_KF_B_MODE_PROBS_557_LSBMASK (0x000000FF) 3744 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_139_KF_B_MODE_PROBS_557_SHIFT (8) 3745 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_139_KF_B_MODE_PROBS_557_SIGNED_FIELD IMG_FALSE 3746 3747 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_139, KF_B_MODE_PROBS_558 3748 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_139_KF_B_MODE_PROBS_558_MASK (0x00FF0000) 3749 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_139_KF_B_MODE_PROBS_558_LSBMASK (0x000000FF) 3750 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_139_KF_B_MODE_PROBS_558_SHIFT (16) 3751 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_139_KF_B_MODE_PROBS_558_SIGNED_FIELD IMG_FALSE 3752 3753 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_139, KF_B_MODE_PROBS_559 3754 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_139_KF_B_MODE_PROBS_559_MASK (0xFF000000) 3755 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_139_KF_B_MODE_PROBS_559_LSBMASK (0x000000FF) 3756 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_139_KF_B_MODE_PROBS_559_SHIFT (24) 3757 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_139_KF_B_MODE_PROBS_559_SIGNED_FIELD IMG_FALSE 3758 3759 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_140_OFFSET (0x0A3C) 3760 3761 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_140, KF_B_MODE_PROBS_560 3762 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_140_KF_B_MODE_PROBS_560_MASK (0x000000FF) 3763 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_140_KF_B_MODE_PROBS_560_LSBMASK (0x000000FF) 3764 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_140_KF_B_MODE_PROBS_560_SHIFT (0) 3765 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_140_KF_B_MODE_PROBS_560_SIGNED_FIELD IMG_FALSE 3766 3767 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_140, KF_B_MODE_PROBS_561 3768 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_140_KF_B_MODE_PROBS_561_MASK (0x0000FF00) 3769 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_140_KF_B_MODE_PROBS_561_LSBMASK (0x000000FF) 3770 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_140_KF_B_MODE_PROBS_561_SHIFT (8) 3771 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_140_KF_B_MODE_PROBS_561_SIGNED_FIELD IMG_FALSE 3772 3773 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_140, KF_B_MODE_PROBS_562 3774 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_140_KF_B_MODE_PROBS_562_MASK (0x00FF0000) 3775 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_140_KF_B_MODE_PROBS_562_LSBMASK (0x000000FF) 3776 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_140_KF_B_MODE_PROBS_562_SHIFT (16) 3777 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_140_KF_B_MODE_PROBS_562_SIGNED_FIELD IMG_FALSE 3778 3779 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_140, KF_B_MODE_PROBS_563 3780 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_140_KF_B_MODE_PROBS_563_MASK (0xFF000000) 3781 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_140_KF_B_MODE_PROBS_563_LSBMASK (0x000000FF) 3782 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_140_KF_B_MODE_PROBS_563_SHIFT (24) 3783 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_140_KF_B_MODE_PROBS_563_SIGNED_FIELD IMG_FALSE 3784 3785 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_141_OFFSET (0x0A40) 3786 3787 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_141, KF_B_MODE_PROBS_564 3788 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_141_KF_B_MODE_PROBS_564_MASK (0x000000FF) 3789 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_141_KF_B_MODE_PROBS_564_LSBMASK (0x000000FF) 3790 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_141_KF_B_MODE_PROBS_564_SHIFT (0) 3791 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_141_KF_B_MODE_PROBS_564_SIGNED_FIELD IMG_FALSE 3792 3793 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_141, KF_B_MODE_PROBS_565 3794 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_141_KF_B_MODE_PROBS_565_MASK (0x0000FF00) 3795 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_141_KF_B_MODE_PROBS_565_LSBMASK (0x000000FF) 3796 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_141_KF_B_MODE_PROBS_565_SHIFT (8) 3797 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_141_KF_B_MODE_PROBS_565_SIGNED_FIELD IMG_FALSE 3798 3799 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_141, KF_B_MODE_PROBS_566 3800 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_141_KF_B_MODE_PROBS_566_MASK (0x00FF0000) 3801 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_141_KF_B_MODE_PROBS_566_LSBMASK (0x000000FF) 3802 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_141_KF_B_MODE_PROBS_566_SHIFT (16) 3803 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_141_KF_B_MODE_PROBS_566_SIGNED_FIELD IMG_FALSE 3804 3805 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_141, KF_B_MODE_PROBS_567 3806 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_141_KF_B_MODE_PROBS_567_MASK (0xFF000000) 3807 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_141_KF_B_MODE_PROBS_567_LSBMASK (0x000000FF) 3808 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_141_KF_B_MODE_PROBS_567_SHIFT (24) 3809 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_141_KF_B_MODE_PROBS_567_SIGNED_FIELD IMG_FALSE 3810 3811 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_142_OFFSET (0x0A44) 3812 3813 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_142, KF_B_MODE_PROBS_568 3814 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_142_KF_B_MODE_PROBS_568_MASK (0x000000FF) 3815 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_142_KF_B_MODE_PROBS_568_LSBMASK (0x000000FF) 3816 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_142_KF_B_MODE_PROBS_568_SHIFT (0) 3817 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_142_KF_B_MODE_PROBS_568_SIGNED_FIELD IMG_FALSE 3818 3819 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_142, KF_B_MODE_PROBS_569 3820 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_142_KF_B_MODE_PROBS_569_MASK (0x0000FF00) 3821 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_142_KF_B_MODE_PROBS_569_LSBMASK (0x000000FF) 3822 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_142_KF_B_MODE_PROBS_569_SHIFT (8) 3823 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_142_KF_B_MODE_PROBS_569_SIGNED_FIELD IMG_FALSE 3824 3825 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_142, KF_B_MODE_PROBS_570 3826 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_142_KF_B_MODE_PROBS_570_MASK (0x00FF0000) 3827 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_142_KF_B_MODE_PROBS_570_LSBMASK (0x000000FF) 3828 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_142_KF_B_MODE_PROBS_570_SHIFT (16) 3829 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_142_KF_B_MODE_PROBS_570_SIGNED_FIELD IMG_FALSE 3830 3831 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_142, KF_B_MODE_PROBS_571 3832 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_142_KF_B_MODE_PROBS_571_MASK (0xFF000000) 3833 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_142_KF_B_MODE_PROBS_571_LSBMASK (0x000000FF) 3834 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_142_KF_B_MODE_PROBS_571_SHIFT (24) 3835 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_142_KF_B_MODE_PROBS_571_SIGNED_FIELD IMG_FALSE 3836 3837 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_143_OFFSET (0x0A48) 3838 3839 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_143, KF_B_MODE_PROBS_572 3840 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_143_KF_B_MODE_PROBS_572_MASK (0x000000FF) 3841 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_143_KF_B_MODE_PROBS_572_LSBMASK (0x000000FF) 3842 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_143_KF_B_MODE_PROBS_572_SHIFT (0) 3843 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_143_KF_B_MODE_PROBS_572_SIGNED_FIELD IMG_FALSE 3844 3845 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_143, KF_B_MODE_PROBS_573 3846 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_143_KF_B_MODE_PROBS_573_MASK (0x0000FF00) 3847 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_143_KF_B_MODE_PROBS_573_LSBMASK (0x000000FF) 3848 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_143_KF_B_MODE_PROBS_573_SHIFT (8) 3849 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_143_KF_B_MODE_PROBS_573_SIGNED_FIELD IMG_FALSE 3850 3851 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_143, KF_B_MODE_PROBS_574 3852 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_143_KF_B_MODE_PROBS_574_MASK (0x00FF0000) 3853 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_143_KF_B_MODE_PROBS_574_LSBMASK (0x000000FF) 3854 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_143_KF_B_MODE_PROBS_574_SHIFT (16) 3855 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_143_KF_B_MODE_PROBS_574_SIGNED_FIELD IMG_FALSE 3856 3857 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_143, KF_B_MODE_PROBS_575 3858 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_143_KF_B_MODE_PROBS_575_MASK (0xFF000000) 3859 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_143_KF_B_MODE_PROBS_575_LSBMASK (0x000000FF) 3860 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_143_KF_B_MODE_PROBS_575_SHIFT (24) 3861 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_143_KF_B_MODE_PROBS_575_SIGNED_FIELD IMG_FALSE 3862 3863 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_144_OFFSET (0x0A4C) 3864 3865 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_144, KF_B_MODE_PROBS_576 3866 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_144_KF_B_MODE_PROBS_576_MASK (0x000000FF) 3867 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_144_KF_B_MODE_PROBS_576_LSBMASK (0x000000FF) 3868 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_144_KF_B_MODE_PROBS_576_SHIFT (0) 3869 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_144_KF_B_MODE_PROBS_576_SIGNED_FIELD IMG_FALSE 3870 3871 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_144, KF_B_MODE_PROBS_577 3872 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_144_KF_B_MODE_PROBS_577_MASK (0x0000FF00) 3873 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_144_KF_B_MODE_PROBS_577_LSBMASK (0x000000FF) 3874 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_144_KF_B_MODE_PROBS_577_SHIFT (8) 3875 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_144_KF_B_MODE_PROBS_577_SIGNED_FIELD IMG_FALSE 3876 3877 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_144, KF_B_MODE_PROBS_578 3878 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_144_KF_B_MODE_PROBS_578_MASK (0x00FF0000) 3879 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_144_KF_B_MODE_PROBS_578_LSBMASK (0x000000FF) 3880 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_144_KF_B_MODE_PROBS_578_SHIFT (16) 3881 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_144_KF_B_MODE_PROBS_578_SIGNED_FIELD IMG_FALSE 3882 3883 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_144, KF_B_MODE_PROBS_579 3884 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_144_KF_B_MODE_PROBS_579_MASK (0xFF000000) 3885 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_144_KF_B_MODE_PROBS_579_LSBMASK (0x000000FF) 3886 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_144_KF_B_MODE_PROBS_579_SHIFT (24) 3887 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_144_KF_B_MODE_PROBS_579_SIGNED_FIELD IMG_FALSE 3888 3889 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_145_OFFSET (0x0A50) 3890 3891 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_145, KF_B_MODE_PROBS_580 3892 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_145_KF_B_MODE_PROBS_580_MASK (0x000000FF) 3893 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_145_KF_B_MODE_PROBS_580_LSBMASK (0x000000FF) 3894 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_145_KF_B_MODE_PROBS_580_SHIFT (0) 3895 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_145_KF_B_MODE_PROBS_580_SIGNED_FIELD IMG_FALSE 3896 3897 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_145, KF_B_MODE_PROBS_581 3898 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_145_KF_B_MODE_PROBS_581_MASK (0x0000FF00) 3899 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_145_KF_B_MODE_PROBS_581_LSBMASK (0x000000FF) 3900 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_145_KF_B_MODE_PROBS_581_SHIFT (8) 3901 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_145_KF_B_MODE_PROBS_581_SIGNED_FIELD IMG_FALSE 3902 3903 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_145, KF_B_MODE_PROBS_582 3904 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_145_KF_B_MODE_PROBS_582_MASK (0x00FF0000) 3905 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_145_KF_B_MODE_PROBS_582_LSBMASK (0x000000FF) 3906 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_145_KF_B_MODE_PROBS_582_SHIFT (16) 3907 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_145_KF_B_MODE_PROBS_582_SIGNED_FIELD IMG_FALSE 3908 3909 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_145, KF_B_MODE_PROBS_583 3910 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_145_KF_B_MODE_PROBS_583_MASK (0xFF000000) 3911 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_145_KF_B_MODE_PROBS_583_LSBMASK (0x000000FF) 3912 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_145_KF_B_MODE_PROBS_583_SHIFT (24) 3913 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_145_KF_B_MODE_PROBS_583_SIGNED_FIELD IMG_FALSE 3914 3915 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_146_OFFSET (0x0A54) 3916 3917 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_146, KF_B_MODE_PROBS_584 3918 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_146_KF_B_MODE_PROBS_584_MASK (0x000000FF) 3919 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_146_KF_B_MODE_PROBS_584_LSBMASK (0x000000FF) 3920 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_146_KF_B_MODE_PROBS_584_SHIFT (0) 3921 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_146_KF_B_MODE_PROBS_584_SIGNED_FIELD IMG_FALSE 3922 3923 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_146, KF_B_MODE_PROBS_585 3924 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_146_KF_B_MODE_PROBS_585_MASK (0x0000FF00) 3925 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_146_KF_B_MODE_PROBS_585_LSBMASK (0x000000FF) 3926 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_146_KF_B_MODE_PROBS_585_SHIFT (8) 3927 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_146_KF_B_MODE_PROBS_585_SIGNED_FIELD IMG_FALSE 3928 3929 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_146, KF_B_MODE_PROBS_586 3930 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_146_KF_B_MODE_PROBS_586_MASK (0x00FF0000) 3931 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_146_KF_B_MODE_PROBS_586_LSBMASK (0x000000FF) 3932 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_146_KF_B_MODE_PROBS_586_SHIFT (16) 3933 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_146_KF_B_MODE_PROBS_586_SIGNED_FIELD IMG_FALSE 3934 3935 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_146, KF_B_MODE_PROBS_587 3936 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_146_KF_B_MODE_PROBS_587_MASK (0xFF000000) 3937 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_146_KF_B_MODE_PROBS_587_LSBMASK (0x000000FF) 3938 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_146_KF_B_MODE_PROBS_587_SHIFT (24) 3939 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_146_KF_B_MODE_PROBS_587_SIGNED_FIELD IMG_FALSE 3940 3941 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_147_OFFSET (0x0A58) 3942 3943 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_147, KF_B_MODE_PROBS_588 3944 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_147_KF_B_MODE_PROBS_588_MASK (0x000000FF) 3945 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_147_KF_B_MODE_PROBS_588_LSBMASK (0x000000FF) 3946 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_147_KF_B_MODE_PROBS_588_SHIFT (0) 3947 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_147_KF_B_MODE_PROBS_588_SIGNED_FIELD IMG_FALSE 3948 3949 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_147, KF_B_MODE_PROBS_589 3950 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_147_KF_B_MODE_PROBS_589_MASK (0x0000FF00) 3951 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_147_KF_B_MODE_PROBS_589_LSBMASK (0x000000FF) 3952 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_147_KF_B_MODE_PROBS_589_SHIFT (8) 3953 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_147_KF_B_MODE_PROBS_589_SIGNED_FIELD IMG_FALSE 3954 3955 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_147, KF_B_MODE_PROBS_590 3956 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_147_KF_B_MODE_PROBS_590_MASK (0x00FF0000) 3957 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_147_KF_B_MODE_PROBS_590_LSBMASK (0x000000FF) 3958 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_147_KF_B_MODE_PROBS_590_SHIFT (16) 3959 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_147_KF_B_MODE_PROBS_590_SIGNED_FIELD IMG_FALSE 3960 3961 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_147, KF_B_MODE_PROBS_591 3962 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_147_KF_B_MODE_PROBS_591_MASK (0xFF000000) 3963 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_147_KF_B_MODE_PROBS_591_LSBMASK (0x000000FF) 3964 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_147_KF_B_MODE_PROBS_591_SHIFT (24) 3965 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_147_KF_B_MODE_PROBS_591_SIGNED_FIELD IMG_FALSE 3966 3967 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_148_OFFSET (0x0A5C) 3968 3969 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_148, KF_B_MODE_PROBS_592 3970 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_148_KF_B_MODE_PROBS_592_MASK (0x000000FF) 3971 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_148_KF_B_MODE_PROBS_592_LSBMASK (0x000000FF) 3972 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_148_KF_B_MODE_PROBS_592_SHIFT (0) 3973 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_148_KF_B_MODE_PROBS_592_SIGNED_FIELD IMG_FALSE 3974 3975 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_148, KF_B_MODE_PROBS_593 3976 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_148_KF_B_MODE_PROBS_593_MASK (0x0000FF00) 3977 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_148_KF_B_MODE_PROBS_593_LSBMASK (0x000000FF) 3978 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_148_KF_B_MODE_PROBS_593_SHIFT (8) 3979 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_148_KF_B_MODE_PROBS_593_SIGNED_FIELD IMG_FALSE 3980 3981 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_148, KF_B_MODE_PROBS_594 3982 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_148_KF_B_MODE_PROBS_594_MASK (0x00FF0000) 3983 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_148_KF_B_MODE_PROBS_594_LSBMASK (0x000000FF) 3984 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_148_KF_B_MODE_PROBS_594_SHIFT (16) 3985 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_148_KF_B_MODE_PROBS_594_SIGNED_FIELD IMG_FALSE 3986 3987 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_148, KF_B_MODE_PROBS_595 3988 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_148_KF_B_MODE_PROBS_595_MASK (0xFF000000) 3989 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_148_KF_B_MODE_PROBS_595_LSBMASK (0x000000FF) 3990 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_148_KF_B_MODE_PROBS_595_SHIFT (24) 3991 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_148_KF_B_MODE_PROBS_595_SIGNED_FIELD IMG_FALSE 3992 3993 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_149_OFFSET (0x0A60) 3994 3995 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_149, KF_B_MODE_PROBS_596 3996 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_149_KF_B_MODE_PROBS_596_MASK (0x000000FF) 3997 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_149_KF_B_MODE_PROBS_596_LSBMASK (0x000000FF) 3998 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_149_KF_B_MODE_PROBS_596_SHIFT (0) 3999 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_149_KF_B_MODE_PROBS_596_SIGNED_FIELD IMG_FALSE 4000 4001 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_149, KF_B_MODE_PROBS_597 4002 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_149_KF_B_MODE_PROBS_597_MASK (0x0000FF00) 4003 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_149_KF_B_MODE_PROBS_597_LSBMASK (0x000000FF) 4004 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_149_KF_B_MODE_PROBS_597_SHIFT (8) 4005 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_149_KF_B_MODE_PROBS_597_SIGNED_FIELD IMG_FALSE 4006 4007 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_149, KF_B_MODE_PROBS_598 4008 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_149_KF_B_MODE_PROBS_598_MASK (0x00FF0000) 4009 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_149_KF_B_MODE_PROBS_598_LSBMASK (0x000000FF) 4010 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_149_KF_B_MODE_PROBS_598_SHIFT (16) 4011 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_149_KF_B_MODE_PROBS_598_SIGNED_FIELD IMG_FALSE 4012 4013 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_149, KF_B_MODE_PROBS_599 4014 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_149_KF_B_MODE_PROBS_599_MASK (0xFF000000) 4015 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_149_KF_B_MODE_PROBS_599_LSBMASK (0x000000FF) 4016 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_149_KF_B_MODE_PROBS_599_SHIFT (24) 4017 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_149_KF_B_MODE_PROBS_599_SIGNED_FIELD IMG_FALSE 4018 4019 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_150_OFFSET (0x0A64) 4020 4021 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_150, KF_B_MODE_PROBS_600 4022 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_150_KF_B_MODE_PROBS_600_MASK (0x000000FF) 4023 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_150_KF_B_MODE_PROBS_600_LSBMASK (0x000000FF) 4024 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_150_KF_B_MODE_PROBS_600_SHIFT (0) 4025 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_150_KF_B_MODE_PROBS_600_SIGNED_FIELD IMG_FALSE 4026 4027 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_150, KF_B_MODE_PROBS_601 4028 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_150_KF_B_MODE_PROBS_601_MASK (0x0000FF00) 4029 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_150_KF_B_MODE_PROBS_601_LSBMASK (0x000000FF) 4030 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_150_KF_B_MODE_PROBS_601_SHIFT (8) 4031 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_150_KF_B_MODE_PROBS_601_SIGNED_FIELD IMG_FALSE 4032 4033 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_150, KF_B_MODE_PROBS_602 4034 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_150_KF_B_MODE_PROBS_602_MASK (0x00FF0000) 4035 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_150_KF_B_MODE_PROBS_602_LSBMASK (0x000000FF) 4036 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_150_KF_B_MODE_PROBS_602_SHIFT (16) 4037 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_150_KF_B_MODE_PROBS_602_SIGNED_FIELD IMG_FALSE 4038 4039 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_150, KF_B_MODE_PROBS_603 4040 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_150_KF_B_MODE_PROBS_603_MASK (0xFF000000) 4041 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_150_KF_B_MODE_PROBS_603_LSBMASK (0x000000FF) 4042 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_150_KF_B_MODE_PROBS_603_SHIFT (24) 4043 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_150_KF_B_MODE_PROBS_603_SIGNED_FIELD IMG_FALSE 4044 4045 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_151_OFFSET (0x0A68) 4046 4047 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_151, KF_B_MODE_PROBS_604 4048 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_151_KF_B_MODE_PROBS_604_MASK (0x000000FF) 4049 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_151_KF_B_MODE_PROBS_604_LSBMASK (0x000000FF) 4050 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_151_KF_B_MODE_PROBS_604_SHIFT (0) 4051 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_151_KF_B_MODE_PROBS_604_SIGNED_FIELD IMG_FALSE 4052 4053 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_151, KF_B_MODE_PROBS_605 4054 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_151_KF_B_MODE_PROBS_605_MASK (0x0000FF00) 4055 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_151_KF_B_MODE_PROBS_605_LSBMASK (0x000000FF) 4056 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_151_KF_B_MODE_PROBS_605_SHIFT (8) 4057 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_151_KF_B_MODE_PROBS_605_SIGNED_FIELD IMG_FALSE 4058 4059 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_151, KF_B_MODE_PROBS_606 4060 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_151_KF_B_MODE_PROBS_606_MASK (0x00FF0000) 4061 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_151_KF_B_MODE_PROBS_606_LSBMASK (0x000000FF) 4062 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_151_KF_B_MODE_PROBS_606_SHIFT (16) 4063 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_151_KF_B_MODE_PROBS_606_SIGNED_FIELD IMG_FALSE 4064 4065 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_151, KF_B_MODE_PROBS_607 4066 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_151_KF_B_MODE_PROBS_607_MASK (0xFF000000) 4067 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_151_KF_B_MODE_PROBS_607_LSBMASK (0x000000FF) 4068 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_151_KF_B_MODE_PROBS_607_SHIFT (24) 4069 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_151_KF_B_MODE_PROBS_607_SIGNED_FIELD IMG_FALSE 4070 4071 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_152_OFFSET (0x0A6C) 4072 4073 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_152, KF_B_MODE_PROBS_608 4074 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_152_KF_B_MODE_PROBS_608_MASK (0x000000FF) 4075 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_152_KF_B_MODE_PROBS_608_LSBMASK (0x000000FF) 4076 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_152_KF_B_MODE_PROBS_608_SHIFT (0) 4077 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_152_KF_B_MODE_PROBS_608_SIGNED_FIELD IMG_FALSE 4078 4079 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_152, KF_B_MODE_PROBS_609 4080 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_152_KF_B_MODE_PROBS_609_MASK (0x0000FF00) 4081 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_152_KF_B_MODE_PROBS_609_LSBMASK (0x000000FF) 4082 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_152_KF_B_MODE_PROBS_609_SHIFT (8) 4083 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_152_KF_B_MODE_PROBS_609_SIGNED_FIELD IMG_FALSE 4084 4085 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_152, KF_B_MODE_PROBS_610 4086 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_152_KF_B_MODE_PROBS_610_MASK (0x00FF0000) 4087 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_152_KF_B_MODE_PROBS_610_LSBMASK (0x000000FF) 4088 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_152_KF_B_MODE_PROBS_610_SHIFT (16) 4089 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_152_KF_B_MODE_PROBS_610_SIGNED_FIELD IMG_FALSE 4090 4091 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_152, KF_B_MODE_PROBS_611 4092 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_152_KF_B_MODE_PROBS_611_MASK (0xFF000000) 4093 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_152_KF_B_MODE_PROBS_611_LSBMASK (0x000000FF) 4094 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_152_KF_B_MODE_PROBS_611_SHIFT (24) 4095 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_152_KF_B_MODE_PROBS_611_SIGNED_FIELD IMG_FALSE 4096 4097 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_153_OFFSET (0x0A70) 4098 4099 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_153, KF_B_MODE_PROBS_612 4100 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_153_KF_B_MODE_PROBS_612_MASK (0x000000FF) 4101 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_153_KF_B_MODE_PROBS_612_LSBMASK (0x000000FF) 4102 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_153_KF_B_MODE_PROBS_612_SHIFT (0) 4103 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_153_KF_B_MODE_PROBS_612_SIGNED_FIELD IMG_FALSE 4104 4105 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_153, KF_B_MODE_PROBS_613 4106 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_153_KF_B_MODE_PROBS_613_MASK (0x0000FF00) 4107 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_153_KF_B_MODE_PROBS_613_LSBMASK (0x000000FF) 4108 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_153_KF_B_MODE_PROBS_613_SHIFT (8) 4109 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_153_KF_B_MODE_PROBS_613_SIGNED_FIELD IMG_FALSE 4110 4111 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_153, KF_B_MODE_PROBS_614 4112 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_153_KF_B_MODE_PROBS_614_MASK (0x00FF0000) 4113 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_153_KF_B_MODE_PROBS_614_LSBMASK (0x000000FF) 4114 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_153_KF_B_MODE_PROBS_614_SHIFT (16) 4115 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_153_KF_B_MODE_PROBS_614_SIGNED_FIELD IMG_FALSE 4116 4117 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_153, KF_B_MODE_PROBS_615 4118 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_153_KF_B_MODE_PROBS_615_MASK (0xFF000000) 4119 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_153_KF_B_MODE_PROBS_615_LSBMASK (0x000000FF) 4120 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_153_KF_B_MODE_PROBS_615_SHIFT (24) 4121 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_153_KF_B_MODE_PROBS_615_SIGNED_FIELD IMG_FALSE 4122 4123 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_154_OFFSET (0x0A74) 4124 4125 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_154, KF_B_MODE_PROBS_616 4126 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_154_KF_B_MODE_PROBS_616_MASK (0x000000FF) 4127 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_154_KF_B_MODE_PROBS_616_LSBMASK (0x000000FF) 4128 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_154_KF_B_MODE_PROBS_616_SHIFT (0) 4129 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_154_KF_B_MODE_PROBS_616_SIGNED_FIELD IMG_FALSE 4130 4131 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_154, KF_B_MODE_PROBS_617 4132 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_154_KF_B_MODE_PROBS_617_MASK (0x0000FF00) 4133 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_154_KF_B_MODE_PROBS_617_LSBMASK (0x000000FF) 4134 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_154_KF_B_MODE_PROBS_617_SHIFT (8) 4135 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_154_KF_B_MODE_PROBS_617_SIGNED_FIELD IMG_FALSE 4136 4137 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_154, KF_B_MODE_PROBS_618 4138 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_154_KF_B_MODE_PROBS_618_MASK (0x00FF0000) 4139 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_154_KF_B_MODE_PROBS_618_LSBMASK (0x000000FF) 4140 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_154_KF_B_MODE_PROBS_618_SHIFT (16) 4141 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_154_KF_B_MODE_PROBS_618_SIGNED_FIELD IMG_FALSE 4142 4143 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_154, KF_B_MODE_PROBS_619 4144 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_154_KF_B_MODE_PROBS_619_MASK (0xFF000000) 4145 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_154_KF_B_MODE_PROBS_619_LSBMASK (0x000000FF) 4146 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_154_KF_B_MODE_PROBS_619_SHIFT (24) 4147 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_154_KF_B_MODE_PROBS_619_SIGNED_FIELD IMG_FALSE 4148 4149 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_155_OFFSET (0x0A78) 4150 4151 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_155, KF_B_MODE_PROBS_620 4152 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_155_KF_B_MODE_PROBS_620_MASK (0x000000FF) 4153 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_155_KF_B_MODE_PROBS_620_LSBMASK (0x000000FF) 4154 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_155_KF_B_MODE_PROBS_620_SHIFT (0) 4155 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_155_KF_B_MODE_PROBS_620_SIGNED_FIELD IMG_FALSE 4156 4157 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_155, KF_B_MODE_PROBS_621 4158 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_155_KF_B_MODE_PROBS_621_MASK (0x0000FF00) 4159 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_155_KF_B_MODE_PROBS_621_LSBMASK (0x000000FF) 4160 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_155_KF_B_MODE_PROBS_621_SHIFT (8) 4161 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_155_KF_B_MODE_PROBS_621_SIGNED_FIELD IMG_FALSE 4162 4163 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_155, KF_B_MODE_PROBS_622 4164 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_155_KF_B_MODE_PROBS_622_MASK (0x00FF0000) 4165 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_155_KF_B_MODE_PROBS_622_LSBMASK (0x000000FF) 4166 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_155_KF_B_MODE_PROBS_622_SHIFT (16) 4167 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_155_KF_B_MODE_PROBS_622_SIGNED_FIELD IMG_FALSE 4168 4169 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_155, KF_B_MODE_PROBS_623 4170 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_155_KF_B_MODE_PROBS_623_MASK (0xFF000000) 4171 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_155_KF_B_MODE_PROBS_623_LSBMASK (0x000000FF) 4172 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_155_KF_B_MODE_PROBS_623_SHIFT (24) 4173 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_155_KF_B_MODE_PROBS_623_SIGNED_FIELD IMG_FALSE 4174 4175 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_156_OFFSET (0x0A7C) 4176 4177 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_156, KF_B_MODE_PROBS_624 4178 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_156_KF_B_MODE_PROBS_624_MASK (0x000000FF) 4179 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_156_KF_B_MODE_PROBS_624_LSBMASK (0x000000FF) 4180 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_156_KF_B_MODE_PROBS_624_SHIFT (0) 4181 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_156_KF_B_MODE_PROBS_624_SIGNED_FIELD IMG_FALSE 4182 4183 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_156, KF_B_MODE_PROBS_625 4184 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_156_KF_B_MODE_PROBS_625_MASK (0x0000FF00) 4185 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_156_KF_B_MODE_PROBS_625_LSBMASK (0x000000FF) 4186 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_156_KF_B_MODE_PROBS_625_SHIFT (8) 4187 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_156_KF_B_MODE_PROBS_625_SIGNED_FIELD IMG_FALSE 4188 4189 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_156, KF_B_MODE_PROBS_626 4190 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_156_KF_B_MODE_PROBS_626_MASK (0x00FF0000) 4191 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_156_KF_B_MODE_PROBS_626_LSBMASK (0x000000FF) 4192 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_156_KF_B_MODE_PROBS_626_SHIFT (16) 4193 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_156_KF_B_MODE_PROBS_626_SIGNED_FIELD IMG_FALSE 4194 4195 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_156, KF_B_MODE_PROBS_627 4196 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_156_KF_B_MODE_PROBS_627_MASK (0xFF000000) 4197 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_156_KF_B_MODE_PROBS_627_LSBMASK (0x000000FF) 4198 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_156_KF_B_MODE_PROBS_627_SHIFT (24) 4199 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_156_KF_B_MODE_PROBS_627_SIGNED_FIELD IMG_FALSE 4200 4201 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_157_OFFSET (0x0A80) 4202 4203 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_157, KF_B_MODE_PROBS_628 4204 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_157_KF_B_MODE_PROBS_628_MASK (0x000000FF) 4205 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_157_KF_B_MODE_PROBS_628_LSBMASK (0x000000FF) 4206 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_157_KF_B_MODE_PROBS_628_SHIFT (0) 4207 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_157_KF_B_MODE_PROBS_628_SIGNED_FIELD IMG_FALSE 4208 4209 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_157, KF_B_MODE_PROBS_629 4210 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_157_KF_B_MODE_PROBS_629_MASK (0x0000FF00) 4211 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_157_KF_B_MODE_PROBS_629_LSBMASK (0x000000FF) 4212 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_157_KF_B_MODE_PROBS_629_SHIFT (8) 4213 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_157_KF_B_MODE_PROBS_629_SIGNED_FIELD IMG_FALSE 4214 4215 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_157, KF_B_MODE_PROBS_630 4216 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_157_KF_B_MODE_PROBS_630_MASK (0x00FF0000) 4217 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_157_KF_B_MODE_PROBS_630_LSBMASK (0x000000FF) 4218 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_157_KF_B_MODE_PROBS_630_SHIFT (16) 4219 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_157_KF_B_MODE_PROBS_630_SIGNED_FIELD IMG_FALSE 4220 4221 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_157, KF_B_MODE_PROBS_631 4222 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_157_KF_B_MODE_PROBS_631_MASK (0xFF000000) 4223 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_157_KF_B_MODE_PROBS_631_LSBMASK (0x000000FF) 4224 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_157_KF_B_MODE_PROBS_631_SHIFT (24) 4225 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_157_KF_B_MODE_PROBS_631_SIGNED_FIELD IMG_FALSE 4226 4227 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_158_OFFSET (0x0A84) 4228 4229 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_158, KF_B_MODE_PROBS_632 4230 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_158_KF_B_MODE_PROBS_632_MASK (0x000000FF) 4231 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_158_KF_B_MODE_PROBS_632_LSBMASK (0x000000FF) 4232 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_158_KF_B_MODE_PROBS_632_SHIFT (0) 4233 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_158_KF_B_MODE_PROBS_632_SIGNED_FIELD IMG_FALSE 4234 4235 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_158, KF_B_MODE_PROBS_633 4236 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_158_KF_B_MODE_PROBS_633_MASK (0x0000FF00) 4237 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_158_KF_B_MODE_PROBS_633_LSBMASK (0x000000FF) 4238 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_158_KF_B_MODE_PROBS_633_SHIFT (8) 4239 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_158_KF_B_MODE_PROBS_633_SIGNED_FIELD IMG_FALSE 4240 4241 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_158, KF_B_MODE_PROBS_634 4242 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_158_KF_B_MODE_PROBS_634_MASK (0x00FF0000) 4243 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_158_KF_B_MODE_PROBS_634_LSBMASK (0x000000FF) 4244 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_158_KF_B_MODE_PROBS_634_SHIFT (16) 4245 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_158_KF_B_MODE_PROBS_634_SIGNED_FIELD IMG_FALSE 4246 4247 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_158, KF_B_MODE_PROBS_635 4248 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_158_KF_B_MODE_PROBS_635_MASK (0xFF000000) 4249 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_158_KF_B_MODE_PROBS_635_LSBMASK (0x000000FF) 4250 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_158_KF_B_MODE_PROBS_635_SHIFT (24) 4251 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_158_KF_B_MODE_PROBS_635_SIGNED_FIELD IMG_FALSE 4252 4253 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_159_OFFSET (0x0A88) 4254 4255 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_159, KF_B_MODE_PROBS_636 4256 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_159_KF_B_MODE_PROBS_636_MASK (0x000000FF) 4257 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_159_KF_B_MODE_PROBS_636_LSBMASK (0x000000FF) 4258 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_159_KF_B_MODE_PROBS_636_SHIFT (0) 4259 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_159_KF_B_MODE_PROBS_636_SIGNED_FIELD IMG_FALSE 4260 4261 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_159, KF_B_MODE_PROBS_637 4262 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_159_KF_B_MODE_PROBS_637_MASK (0x0000FF00) 4263 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_159_KF_B_MODE_PROBS_637_LSBMASK (0x000000FF) 4264 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_159_KF_B_MODE_PROBS_637_SHIFT (8) 4265 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_159_KF_B_MODE_PROBS_637_SIGNED_FIELD IMG_FALSE 4266 4267 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_159, KF_B_MODE_PROBS_638 4268 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_159_KF_B_MODE_PROBS_638_MASK (0x00FF0000) 4269 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_159_KF_B_MODE_PROBS_638_LSBMASK (0x000000FF) 4270 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_159_KF_B_MODE_PROBS_638_SHIFT (16) 4271 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_159_KF_B_MODE_PROBS_638_SIGNED_FIELD IMG_FALSE 4272 4273 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_159, KF_B_MODE_PROBS_639 4274 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_159_KF_B_MODE_PROBS_639_MASK (0xFF000000) 4275 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_159_KF_B_MODE_PROBS_639_LSBMASK (0x000000FF) 4276 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_159_KF_B_MODE_PROBS_639_SHIFT (24) 4277 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_159_KF_B_MODE_PROBS_639_SIGNED_FIELD IMG_FALSE 4278 4279 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_160_OFFSET (0x0A8C) 4280 4281 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_160, KF_B_MODE_PROBS_640 4282 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_160_KF_B_MODE_PROBS_640_MASK (0x000000FF) 4283 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_160_KF_B_MODE_PROBS_640_LSBMASK (0x000000FF) 4284 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_160_KF_B_MODE_PROBS_640_SHIFT (0) 4285 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_160_KF_B_MODE_PROBS_640_SIGNED_FIELD IMG_FALSE 4286 4287 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_160, KF_B_MODE_PROBS_641 4288 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_160_KF_B_MODE_PROBS_641_MASK (0x0000FF00) 4289 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_160_KF_B_MODE_PROBS_641_LSBMASK (0x000000FF) 4290 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_160_KF_B_MODE_PROBS_641_SHIFT (8) 4291 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_160_KF_B_MODE_PROBS_641_SIGNED_FIELD IMG_FALSE 4292 4293 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_160, KF_B_MODE_PROBS_642 4294 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_160_KF_B_MODE_PROBS_642_MASK (0x00FF0000) 4295 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_160_KF_B_MODE_PROBS_642_LSBMASK (0x000000FF) 4296 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_160_KF_B_MODE_PROBS_642_SHIFT (16) 4297 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_160_KF_B_MODE_PROBS_642_SIGNED_FIELD IMG_FALSE 4298 4299 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_160, KF_B_MODE_PROBS_643 4300 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_160_KF_B_MODE_PROBS_643_MASK (0xFF000000) 4301 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_160_KF_B_MODE_PROBS_643_LSBMASK (0x000000FF) 4302 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_160_KF_B_MODE_PROBS_643_SHIFT (24) 4303 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_160_KF_B_MODE_PROBS_643_SIGNED_FIELD IMG_FALSE 4304 4305 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_161_OFFSET (0x0A90) 4306 4307 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_161, KF_B_MODE_PROBS_644 4308 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_161_KF_B_MODE_PROBS_644_MASK (0x000000FF) 4309 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_161_KF_B_MODE_PROBS_644_LSBMASK (0x000000FF) 4310 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_161_KF_B_MODE_PROBS_644_SHIFT (0) 4311 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_161_KF_B_MODE_PROBS_644_SIGNED_FIELD IMG_FALSE 4312 4313 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_161, KF_B_MODE_PROBS_645 4314 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_161_KF_B_MODE_PROBS_645_MASK (0x0000FF00) 4315 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_161_KF_B_MODE_PROBS_645_LSBMASK (0x000000FF) 4316 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_161_KF_B_MODE_PROBS_645_SHIFT (8) 4317 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_161_KF_B_MODE_PROBS_645_SIGNED_FIELD IMG_FALSE 4318 4319 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_161, KF_B_MODE_PROBS_646 4320 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_161_KF_B_MODE_PROBS_646_MASK (0x00FF0000) 4321 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_161_KF_B_MODE_PROBS_646_LSBMASK (0x000000FF) 4322 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_161_KF_B_MODE_PROBS_646_SHIFT (16) 4323 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_161_KF_B_MODE_PROBS_646_SIGNED_FIELD IMG_FALSE 4324 4325 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_161, KF_B_MODE_PROBS_647 4326 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_161_KF_B_MODE_PROBS_647_MASK (0xFF000000) 4327 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_161_KF_B_MODE_PROBS_647_LSBMASK (0x000000FF) 4328 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_161_KF_B_MODE_PROBS_647_SHIFT (24) 4329 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_161_KF_B_MODE_PROBS_647_SIGNED_FIELD IMG_FALSE 4330 4331 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_162_OFFSET (0x0A94) 4332 4333 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_162, KF_B_MODE_PROBS_648 4334 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_162_KF_B_MODE_PROBS_648_MASK (0x000000FF) 4335 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_162_KF_B_MODE_PROBS_648_LSBMASK (0x000000FF) 4336 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_162_KF_B_MODE_PROBS_648_SHIFT (0) 4337 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_162_KF_B_MODE_PROBS_648_SIGNED_FIELD IMG_FALSE 4338 4339 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_162, KF_B_MODE_PROBS_649 4340 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_162_KF_B_MODE_PROBS_649_MASK (0x0000FF00) 4341 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_162_KF_B_MODE_PROBS_649_LSBMASK (0x000000FF) 4342 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_162_KF_B_MODE_PROBS_649_SHIFT (8) 4343 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_162_KF_B_MODE_PROBS_649_SIGNED_FIELD IMG_FALSE 4344 4345 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_162, KF_B_MODE_PROBS_650 4346 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_162_KF_B_MODE_PROBS_650_MASK (0x00FF0000) 4347 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_162_KF_B_MODE_PROBS_650_LSBMASK (0x000000FF) 4348 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_162_KF_B_MODE_PROBS_650_SHIFT (16) 4349 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_162_KF_B_MODE_PROBS_650_SIGNED_FIELD IMG_FALSE 4350 4351 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_162, KF_B_MODE_PROBS_651 4352 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_162_KF_B_MODE_PROBS_651_MASK (0xFF000000) 4353 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_162_KF_B_MODE_PROBS_651_LSBMASK (0x000000FF) 4354 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_162_KF_B_MODE_PROBS_651_SHIFT (24) 4355 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_162_KF_B_MODE_PROBS_651_SIGNED_FIELD IMG_FALSE 4356 4357 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_163_OFFSET (0x0A98) 4358 4359 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_163, KF_B_MODE_PROBS_652 4360 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_163_KF_B_MODE_PROBS_652_MASK (0x000000FF) 4361 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_163_KF_B_MODE_PROBS_652_LSBMASK (0x000000FF) 4362 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_163_KF_B_MODE_PROBS_652_SHIFT (0) 4363 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_163_KF_B_MODE_PROBS_652_SIGNED_FIELD IMG_FALSE 4364 4365 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_163, KF_B_MODE_PROBS_653 4366 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_163_KF_B_MODE_PROBS_653_MASK (0x0000FF00) 4367 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_163_KF_B_MODE_PROBS_653_LSBMASK (0x000000FF) 4368 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_163_KF_B_MODE_PROBS_653_SHIFT (8) 4369 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_163_KF_B_MODE_PROBS_653_SIGNED_FIELD IMG_FALSE 4370 4371 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_163, KF_B_MODE_PROBS_654 4372 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_163_KF_B_MODE_PROBS_654_MASK (0x00FF0000) 4373 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_163_KF_B_MODE_PROBS_654_LSBMASK (0x000000FF) 4374 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_163_KF_B_MODE_PROBS_654_SHIFT (16) 4375 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_163_KF_B_MODE_PROBS_654_SIGNED_FIELD IMG_FALSE 4376 4377 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_163, KF_B_MODE_PROBS_655 4378 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_163_KF_B_MODE_PROBS_655_MASK (0xFF000000) 4379 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_163_KF_B_MODE_PROBS_655_LSBMASK (0x000000FF) 4380 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_163_KF_B_MODE_PROBS_655_SHIFT (24) 4381 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_163_KF_B_MODE_PROBS_655_SIGNED_FIELD IMG_FALSE 4382 4383 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_164_OFFSET (0x0A9C) 4384 4385 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_164, KF_B_MODE_PROBS_656 4386 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_164_KF_B_MODE_PROBS_656_MASK (0x000000FF) 4387 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_164_KF_B_MODE_PROBS_656_LSBMASK (0x000000FF) 4388 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_164_KF_B_MODE_PROBS_656_SHIFT (0) 4389 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_164_KF_B_MODE_PROBS_656_SIGNED_FIELD IMG_FALSE 4390 4391 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_164, KF_B_MODE_PROBS_657 4392 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_164_KF_B_MODE_PROBS_657_MASK (0x0000FF00) 4393 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_164_KF_B_MODE_PROBS_657_LSBMASK (0x000000FF) 4394 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_164_KF_B_MODE_PROBS_657_SHIFT (8) 4395 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_164_KF_B_MODE_PROBS_657_SIGNED_FIELD IMG_FALSE 4396 4397 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_164, KF_B_MODE_PROBS_658 4398 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_164_KF_B_MODE_PROBS_658_MASK (0x00FF0000) 4399 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_164_KF_B_MODE_PROBS_658_LSBMASK (0x000000FF) 4400 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_164_KF_B_MODE_PROBS_658_SHIFT (16) 4401 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_164_KF_B_MODE_PROBS_658_SIGNED_FIELD IMG_FALSE 4402 4403 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_164, KF_B_MODE_PROBS_659 4404 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_164_KF_B_MODE_PROBS_659_MASK (0xFF000000) 4405 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_164_KF_B_MODE_PROBS_659_LSBMASK (0x000000FF) 4406 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_164_KF_B_MODE_PROBS_659_SHIFT (24) 4407 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_164_KF_B_MODE_PROBS_659_SIGNED_FIELD IMG_FALSE 4408 4409 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_165_OFFSET (0x0AA0) 4410 4411 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_165, KF_B_MODE_PROBS_660 4412 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_165_KF_B_MODE_PROBS_660_MASK (0x000000FF) 4413 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_165_KF_B_MODE_PROBS_660_LSBMASK (0x000000FF) 4414 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_165_KF_B_MODE_PROBS_660_SHIFT (0) 4415 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_165_KF_B_MODE_PROBS_660_SIGNED_FIELD IMG_FALSE 4416 4417 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_165, KF_B_MODE_PROBS_661 4418 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_165_KF_B_MODE_PROBS_661_MASK (0x0000FF00) 4419 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_165_KF_B_MODE_PROBS_661_LSBMASK (0x000000FF) 4420 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_165_KF_B_MODE_PROBS_661_SHIFT (8) 4421 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_165_KF_B_MODE_PROBS_661_SIGNED_FIELD IMG_FALSE 4422 4423 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_165, KF_B_MODE_PROBS_662 4424 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_165_KF_B_MODE_PROBS_662_MASK (0x00FF0000) 4425 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_165_KF_B_MODE_PROBS_662_LSBMASK (0x000000FF) 4426 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_165_KF_B_MODE_PROBS_662_SHIFT (16) 4427 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_165_KF_B_MODE_PROBS_662_SIGNED_FIELD IMG_FALSE 4428 4429 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_165, KF_B_MODE_PROBS_663 4430 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_165_KF_B_MODE_PROBS_663_MASK (0xFF000000) 4431 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_165_KF_B_MODE_PROBS_663_LSBMASK (0x000000FF) 4432 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_165_KF_B_MODE_PROBS_663_SHIFT (24) 4433 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_165_KF_B_MODE_PROBS_663_SIGNED_FIELD IMG_FALSE 4434 4435 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_166_OFFSET (0x0AA4) 4436 4437 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_166, KF_B_MODE_PROBS_664 4438 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_166_KF_B_MODE_PROBS_664_MASK (0x000000FF) 4439 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_166_KF_B_MODE_PROBS_664_LSBMASK (0x000000FF) 4440 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_166_KF_B_MODE_PROBS_664_SHIFT (0) 4441 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_166_KF_B_MODE_PROBS_664_SIGNED_FIELD IMG_FALSE 4442 4443 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_166, KF_B_MODE_PROBS_665 4444 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_166_KF_B_MODE_PROBS_665_MASK (0x0000FF00) 4445 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_166_KF_B_MODE_PROBS_665_LSBMASK (0x000000FF) 4446 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_166_KF_B_MODE_PROBS_665_SHIFT (8) 4447 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_166_KF_B_MODE_PROBS_665_SIGNED_FIELD IMG_FALSE 4448 4449 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_166, KF_B_MODE_PROBS_666 4450 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_166_KF_B_MODE_PROBS_666_MASK (0x00FF0000) 4451 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_166_KF_B_MODE_PROBS_666_LSBMASK (0x000000FF) 4452 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_166_KF_B_MODE_PROBS_666_SHIFT (16) 4453 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_166_KF_B_MODE_PROBS_666_SIGNED_FIELD IMG_FALSE 4454 4455 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_166, KF_B_MODE_PROBS_667 4456 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_166_KF_B_MODE_PROBS_667_MASK (0xFF000000) 4457 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_166_KF_B_MODE_PROBS_667_LSBMASK (0x000000FF) 4458 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_166_KF_B_MODE_PROBS_667_SHIFT (24) 4459 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_166_KF_B_MODE_PROBS_667_SIGNED_FIELD IMG_FALSE 4460 4461 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_167_OFFSET (0x0AA8) 4462 4463 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_167, KF_B_MODE_PROBS_668 4464 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_167_KF_B_MODE_PROBS_668_MASK (0x000000FF) 4465 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_167_KF_B_MODE_PROBS_668_LSBMASK (0x000000FF) 4466 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_167_KF_B_MODE_PROBS_668_SHIFT (0) 4467 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_167_KF_B_MODE_PROBS_668_SIGNED_FIELD IMG_FALSE 4468 4469 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_167, KF_B_MODE_PROBS_669 4470 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_167_KF_B_MODE_PROBS_669_MASK (0x0000FF00) 4471 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_167_KF_B_MODE_PROBS_669_LSBMASK (0x000000FF) 4472 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_167_KF_B_MODE_PROBS_669_SHIFT (8) 4473 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_167_KF_B_MODE_PROBS_669_SIGNED_FIELD IMG_FALSE 4474 4475 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_167, KF_B_MODE_PROBS_670 4476 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_167_KF_B_MODE_PROBS_670_MASK (0x00FF0000) 4477 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_167_KF_B_MODE_PROBS_670_LSBMASK (0x000000FF) 4478 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_167_KF_B_MODE_PROBS_670_SHIFT (16) 4479 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_167_KF_B_MODE_PROBS_670_SIGNED_FIELD IMG_FALSE 4480 4481 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_167, KF_B_MODE_PROBS_671 4482 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_167_KF_B_MODE_PROBS_671_MASK (0xFF000000) 4483 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_167_KF_B_MODE_PROBS_671_LSBMASK (0x000000FF) 4484 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_167_KF_B_MODE_PROBS_671_SHIFT (24) 4485 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_167_KF_B_MODE_PROBS_671_SIGNED_FIELD IMG_FALSE 4486 4487 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_168_OFFSET (0x0AAC) 4488 4489 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_168, KF_B_MODE_PROBS_672 4490 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_168_KF_B_MODE_PROBS_672_MASK (0x000000FF) 4491 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_168_KF_B_MODE_PROBS_672_LSBMASK (0x000000FF) 4492 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_168_KF_B_MODE_PROBS_672_SHIFT (0) 4493 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_168_KF_B_MODE_PROBS_672_SIGNED_FIELD IMG_FALSE 4494 4495 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_168, KF_B_MODE_PROBS_673 4496 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_168_KF_B_MODE_PROBS_673_MASK (0x0000FF00) 4497 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_168_KF_B_MODE_PROBS_673_LSBMASK (0x000000FF) 4498 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_168_KF_B_MODE_PROBS_673_SHIFT (8) 4499 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_168_KF_B_MODE_PROBS_673_SIGNED_FIELD IMG_FALSE 4500 4501 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_168, KF_B_MODE_PROBS_674 4502 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_168_KF_B_MODE_PROBS_674_MASK (0x00FF0000) 4503 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_168_KF_B_MODE_PROBS_674_LSBMASK (0x000000FF) 4504 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_168_KF_B_MODE_PROBS_674_SHIFT (16) 4505 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_168_KF_B_MODE_PROBS_674_SIGNED_FIELD IMG_FALSE 4506 4507 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_168, KF_B_MODE_PROBS_675 4508 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_168_KF_B_MODE_PROBS_675_MASK (0xFF000000) 4509 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_168_KF_B_MODE_PROBS_675_LSBMASK (0x000000FF) 4510 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_168_KF_B_MODE_PROBS_675_SHIFT (24) 4511 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_168_KF_B_MODE_PROBS_675_SIGNED_FIELD IMG_FALSE 4512 4513 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_169_OFFSET (0x0AB0) 4514 4515 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_169, KF_B_MODE_PROBS_676 4516 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_169_KF_B_MODE_PROBS_676_MASK (0x000000FF) 4517 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_169_KF_B_MODE_PROBS_676_LSBMASK (0x000000FF) 4518 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_169_KF_B_MODE_PROBS_676_SHIFT (0) 4519 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_169_KF_B_MODE_PROBS_676_SIGNED_FIELD IMG_FALSE 4520 4521 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_169, KF_B_MODE_PROBS_677 4522 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_169_KF_B_MODE_PROBS_677_MASK (0x0000FF00) 4523 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_169_KF_B_MODE_PROBS_677_LSBMASK (0x000000FF) 4524 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_169_KF_B_MODE_PROBS_677_SHIFT (8) 4525 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_169_KF_B_MODE_PROBS_677_SIGNED_FIELD IMG_FALSE 4526 4527 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_169, KF_B_MODE_PROBS_678 4528 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_169_KF_B_MODE_PROBS_678_MASK (0x00FF0000) 4529 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_169_KF_B_MODE_PROBS_678_LSBMASK (0x000000FF) 4530 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_169_KF_B_MODE_PROBS_678_SHIFT (16) 4531 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_169_KF_B_MODE_PROBS_678_SIGNED_FIELD IMG_FALSE 4532 4533 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_169, KF_B_MODE_PROBS_679 4534 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_169_KF_B_MODE_PROBS_679_MASK (0xFF000000) 4535 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_169_KF_B_MODE_PROBS_679_LSBMASK (0x000000FF) 4536 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_169_KF_B_MODE_PROBS_679_SHIFT (24) 4537 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_169_KF_B_MODE_PROBS_679_SIGNED_FIELD IMG_FALSE 4538 4539 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_170_OFFSET (0x0AB4) 4540 4541 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_170, KF_B_MODE_PROBS_680 4542 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_170_KF_B_MODE_PROBS_680_MASK (0x000000FF) 4543 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_170_KF_B_MODE_PROBS_680_LSBMASK (0x000000FF) 4544 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_170_KF_B_MODE_PROBS_680_SHIFT (0) 4545 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_170_KF_B_MODE_PROBS_680_SIGNED_FIELD IMG_FALSE 4546 4547 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_170, KF_B_MODE_PROBS_681 4548 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_170_KF_B_MODE_PROBS_681_MASK (0x0000FF00) 4549 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_170_KF_B_MODE_PROBS_681_LSBMASK (0x000000FF) 4550 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_170_KF_B_MODE_PROBS_681_SHIFT (8) 4551 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_170_KF_B_MODE_PROBS_681_SIGNED_FIELD IMG_FALSE 4552 4553 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_170, KF_B_MODE_PROBS_682 4554 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_170_KF_B_MODE_PROBS_682_MASK (0x00FF0000) 4555 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_170_KF_B_MODE_PROBS_682_LSBMASK (0x000000FF) 4556 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_170_KF_B_MODE_PROBS_682_SHIFT (16) 4557 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_170_KF_B_MODE_PROBS_682_SIGNED_FIELD IMG_FALSE 4558 4559 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_170, KF_B_MODE_PROBS_683 4560 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_170_KF_B_MODE_PROBS_683_MASK (0xFF000000) 4561 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_170_KF_B_MODE_PROBS_683_LSBMASK (0x000000FF) 4562 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_170_KF_B_MODE_PROBS_683_SHIFT (24) 4563 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_170_KF_B_MODE_PROBS_683_SIGNED_FIELD IMG_FALSE 4564 4565 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_171_OFFSET (0x0AB8) 4566 4567 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_171, KF_B_MODE_PROBS_684 4568 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_171_KF_B_MODE_PROBS_684_MASK (0x000000FF) 4569 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_171_KF_B_MODE_PROBS_684_LSBMASK (0x000000FF) 4570 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_171_KF_B_MODE_PROBS_684_SHIFT (0) 4571 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_171_KF_B_MODE_PROBS_684_SIGNED_FIELD IMG_FALSE 4572 4573 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_171, KF_B_MODE_PROBS_685 4574 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_171_KF_B_MODE_PROBS_685_MASK (0x0000FF00) 4575 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_171_KF_B_MODE_PROBS_685_LSBMASK (0x000000FF) 4576 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_171_KF_B_MODE_PROBS_685_SHIFT (8) 4577 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_171_KF_B_MODE_PROBS_685_SIGNED_FIELD IMG_FALSE 4578 4579 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_171, KF_B_MODE_PROBS_686 4580 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_171_KF_B_MODE_PROBS_686_MASK (0x00FF0000) 4581 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_171_KF_B_MODE_PROBS_686_LSBMASK (0x000000FF) 4582 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_171_KF_B_MODE_PROBS_686_SHIFT (16) 4583 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_171_KF_B_MODE_PROBS_686_SIGNED_FIELD IMG_FALSE 4584 4585 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_171, KF_B_MODE_PROBS_687 4586 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_171_KF_B_MODE_PROBS_687_MASK (0xFF000000) 4587 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_171_KF_B_MODE_PROBS_687_LSBMASK (0x000000FF) 4588 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_171_KF_B_MODE_PROBS_687_SHIFT (24) 4589 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_171_KF_B_MODE_PROBS_687_SIGNED_FIELD IMG_FALSE 4590 4591 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_172_OFFSET (0x0ABC) 4592 4593 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_172, KF_B_MODE_PROBS_688 4594 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_172_KF_B_MODE_PROBS_688_MASK (0x000000FF) 4595 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_172_KF_B_MODE_PROBS_688_LSBMASK (0x000000FF) 4596 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_172_KF_B_MODE_PROBS_688_SHIFT (0) 4597 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_172_KF_B_MODE_PROBS_688_SIGNED_FIELD IMG_FALSE 4598 4599 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_172, KF_B_MODE_PROBS_689 4600 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_172_KF_B_MODE_PROBS_689_MASK (0x0000FF00) 4601 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_172_KF_B_MODE_PROBS_689_LSBMASK (0x000000FF) 4602 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_172_KF_B_MODE_PROBS_689_SHIFT (8) 4603 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_172_KF_B_MODE_PROBS_689_SIGNED_FIELD IMG_FALSE 4604 4605 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_172, KF_B_MODE_PROBS_690 4606 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_172_KF_B_MODE_PROBS_690_MASK (0x00FF0000) 4607 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_172_KF_B_MODE_PROBS_690_LSBMASK (0x000000FF) 4608 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_172_KF_B_MODE_PROBS_690_SHIFT (16) 4609 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_172_KF_B_MODE_PROBS_690_SIGNED_FIELD IMG_FALSE 4610 4611 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_172, KF_B_MODE_PROBS_691 4612 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_172_KF_B_MODE_PROBS_691_MASK (0xFF000000) 4613 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_172_KF_B_MODE_PROBS_691_LSBMASK (0x000000FF) 4614 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_172_KF_B_MODE_PROBS_691_SHIFT (24) 4615 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_172_KF_B_MODE_PROBS_691_SIGNED_FIELD IMG_FALSE 4616 4617 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_173_OFFSET (0x0AC0) 4618 4619 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_173, KF_B_MODE_PROBS_692 4620 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_173_KF_B_MODE_PROBS_692_MASK (0x000000FF) 4621 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_173_KF_B_MODE_PROBS_692_LSBMASK (0x000000FF) 4622 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_173_KF_B_MODE_PROBS_692_SHIFT (0) 4623 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_173_KF_B_MODE_PROBS_692_SIGNED_FIELD IMG_FALSE 4624 4625 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_173, KF_B_MODE_PROBS_693 4626 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_173_KF_B_MODE_PROBS_693_MASK (0x0000FF00) 4627 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_173_KF_B_MODE_PROBS_693_LSBMASK (0x000000FF) 4628 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_173_KF_B_MODE_PROBS_693_SHIFT (8) 4629 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_173_KF_B_MODE_PROBS_693_SIGNED_FIELD IMG_FALSE 4630 4631 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_173, KF_B_MODE_PROBS_694 4632 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_173_KF_B_MODE_PROBS_694_MASK (0x00FF0000) 4633 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_173_KF_B_MODE_PROBS_694_LSBMASK (0x000000FF) 4634 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_173_KF_B_MODE_PROBS_694_SHIFT (16) 4635 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_173_KF_B_MODE_PROBS_694_SIGNED_FIELD IMG_FALSE 4636 4637 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_173, KF_B_MODE_PROBS_695 4638 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_173_KF_B_MODE_PROBS_695_MASK (0xFF000000) 4639 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_173_KF_B_MODE_PROBS_695_LSBMASK (0x000000FF) 4640 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_173_KF_B_MODE_PROBS_695_SHIFT (24) 4641 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_173_KF_B_MODE_PROBS_695_SIGNED_FIELD IMG_FALSE 4642 4643 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_174_OFFSET (0x0AC4) 4644 4645 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_174, KF_B_MODE_PROBS_696 4646 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_174_KF_B_MODE_PROBS_696_MASK (0x000000FF) 4647 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_174_KF_B_MODE_PROBS_696_LSBMASK (0x000000FF) 4648 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_174_KF_B_MODE_PROBS_696_SHIFT (0) 4649 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_174_KF_B_MODE_PROBS_696_SIGNED_FIELD IMG_FALSE 4650 4651 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_174, KF_B_MODE_PROBS_697 4652 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_174_KF_B_MODE_PROBS_697_MASK (0x0000FF00) 4653 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_174_KF_B_MODE_PROBS_697_LSBMASK (0x000000FF) 4654 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_174_KF_B_MODE_PROBS_697_SHIFT (8) 4655 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_174_KF_B_MODE_PROBS_697_SIGNED_FIELD IMG_FALSE 4656 4657 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_174, KF_B_MODE_PROBS_698 4658 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_174_KF_B_MODE_PROBS_698_MASK (0x00FF0000) 4659 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_174_KF_B_MODE_PROBS_698_LSBMASK (0x000000FF) 4660 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_174_KF_B_MODE_PROBS_698_SHIFT (16) 4661 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_174_KF_B_MODE_PROBS_698_SIGNED_FIELD IMG_FALSE 4662 4663 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_174, KF_B_MODE_PROBS_699 4664 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_174_KF_B_MODE_PROBS_699_MASK (0xFF000000) 4665 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_174_KF_B_MODE_PROBS_699_LSBMASK (0x000000FF) 4666 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_174_KF_B_MODE_PROBS_699_SHIFT (24) 4667 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_174_KF_B_MODE_PROBS_699_SIGNED_FIELD IMG_FALSE 4668 4669 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_175_OFFSET (0x0AC8) 4670 4671 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_175, KF_B_MODE_PROBS_700 4672 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_175_KF_B_MODE_PROBS_700_MASK (0x000000FF) 4673 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_175_KF_B_MODE_PROBS_700_LSBMASK (0x000000FF) 4674 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_175_KF_B_MODE_PROBS_700_SHIFT (0) 4675 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_175_KF_B_MODE_PROBS_700_SIGNED_FIELD IMG_FALSE 4676 4677 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_175, KF_B_MODE_PROBS_701 4678 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_175_KF_B_MODE_PROBS_701_MASK (0x0000FF00) 4679 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_175_KF_B_MODE_PROBS_701_LSBMASK (0x000000FF) 4680 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_175_KF_B_MODE_PROBS_701_SHIFT (8) 4681 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_175_KF_B_MODE_PROBS_701_SIGNED_FIELD IMG_FALSE 4682 4683 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_175, KF_B_MODE_PROBS_702 4684 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_175_KF_B_MODE_PROBS_702_MASK (0x00FF0000) 4685 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_175_KF_B_MODE_PROBS_702_LSBMASK (0x000000FF) 4686 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_175_KF_B_MODE_PROBS_702_SHIFT (16) 4687 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_175_KF_B_MODE_PROBS_702_SIGNED_FIELD IMG_FALSE 4688 4689 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_175, KF_B_MODE_PROBS_703 4690 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_175_KF_B_MODE_PROBS_703_MASK (0xFF000000) 4691 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_175_KF_B_MODE_PROBS_703_LSBMASK (0x000000FF) 4692 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_175_KF_B_MODE_PROBS_703_SHIFT (24) 4693 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_175_KF_B_MODE_PROBS_703_SIGNED_FIELD IMG_FALSE 4694 4695 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_176_OFFSET (0x0ACC) 4696 4697 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_176, KF_B_MODE_PROBS_704 4698 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_176_KF_B_MODE_PROBS_704_MASK (0x000000FF) 4699 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_176_KF_B_MODE_PROBS_704_LSBMASK (0x000000FF) 4700 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_176_KF_B_MODE_PROBS_704_SHIFT (0) 4701 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_176_KF_B_MODE_PROBS_704_SIGNED_FIELD IMG_FALSE 4702 4703 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_176, KF_B_MODE_PROBS_705 4704 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_176_KF_B_MODE_PROBS_705_MASK (0x0000FF00) 4705 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_176_KF_B_MODE_PROBS_705_LSBMASK (0x000000FF) 4706 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_176_KF_B_MODE_PROBS_705_SHIFT (8) 4707 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_176_KF_B_MODE_PROBS_705_SIGNED_FIELD IMG_FALSE 4708 4709 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_176, KF_B_MODE_PROBS_706 4710 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_176_KF_B_MODE_PROBS_706_MASK (0x00FF0000) 4711 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_176_KF_B_MODE_PROBS_706_LSBMASK (0x000000FF) 4712 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_176_KF_B_MODE_PROBS_706_SHIFT (16) 4713 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_176_KF_B_MODE_PROBS_706_SIGNED_FIELD IMG_FALSE 4714 4715 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_176, KF_B_MODE_PROBS_707 4716 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_176_KF_B_MODE_PROBS_707_MASK (0xFF000000) 4717 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_176_KF_B_MODE_PROBS_707_LSBMASK (0x000000FF) 4718 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_176_KF_B_MODE_PROBS_707_SHIFT (24) 4719 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_176_KF_B_MODE_PROBS_707_SIGNED_FIELD IMG_FALSE 4720 4721 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_177_OFFSET (0x0AD0) 4722 4723 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_177, KF_B_MODE_PROBS_708 4724 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_177_KF_B_MODE_PROBS_708_MASK (0x000000FF) 4725 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_177_KF_B_MODE_PROBS_708_LSBMASK (0x000000FF) 4726 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_177_KF_B_MODE_PROBS_708_SHIFT (0) 4727 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_177_KF_B_MODE_PROBS_708_SIGNED_FIELD IMG_FALSE 4728 4729 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_177, KF_B_MODE_PROBS_709 4730 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_177_KF_B_MODE_PROBS_709_MASK (0x0000FF00) 4731 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_177_KF_B_MODE_PROBS_709_LSBMASK (0x000000FF) 4732 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_177_KF_B_MODE_PROBS_709_SHIFT (8) 4733 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_177_KF_B_MODE_PROBS_709_SIGNED_FIELD IMG_FALSE 4734 4735 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_177, KF_B_MODE_PROBS_710 4736 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_177_KF_B_MODE_PROBS_710_MASK (0x00FF0000) 4737 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_177_KF_B_MODE_PROBS_710_LSBMASK (0x000000FF) 4738 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_177_KF_B_MODE_PROBS_710_SHIFT (16) 4739 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_177_KF_B_MODE_PROBS_710_SIGNED_FIELD IMG_FALSE 4740 4741 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_177, KF_B_MODE_PROBS_711 4742 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_177_KF_B_MODE_PROBS_711_MASK (0xFF000000) 4743 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_177_KF_B_MODE_PROBS_711_LSBMASK (0x000000FF) 4744 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_177_KF_B_MODE_PROBS_711_SHIFT (24) 4745 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_177_KF_B_MODE_PROBS_711_SIGNED_FIELD IMG_FALSE 4746 4747 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_178_OFFSET (0x0AD4) 4748 4749 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_178, KF_B_MODE_PROBS_712 4750 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_178_KF_B_MODE_PROBS_712_MASK (0x000000FF) 4751 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_178_KF_B_MODE_PROBS_712_LSBMASK (0x000000FF) 4752 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_178_KF_B_MODE_PROBS_712_SHIFT (0) 4753 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_178_KF_B_MODE_PROBS_712_SIGNED_FIELD IMG_FALSE 4754 4755 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_178, KF_B_MODE_PROBS_713 4756 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_178_KF_B_MODE_PROBS_713_MASK (0x0000FF00) 4757 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_178_KF_B_MODE_PROBS_713_LSBMASK (0x000000FF) 4758 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_178_KF_B_MODE_PROBS_713_SHIFT (8) 4759 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_178_KF_B_MODE_PROBS_713_SIGNED_FIELD IMG_FALSE 4760 4761 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_178, KF_B_MODE_PROBS_714 4762 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_178_KF_B_MODE_PROBS_714_MASK (0x00FF0000) 4763 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_178_KF_B_MODE_PROBS_714_LSBMASK (0x000000FF) 4764 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_178_KF_B_MODE_PROBS_714_SHIFT (16) 4765 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_178_KF_B_MODE_PROBS_714_SIGNED_FIELD IMG_FALSE 4766 4767 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_178, KF_B_MODE_PROBS_715 4768 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_178_KF_B_MODE_PROBS_715_MASK (0xFF000000) 4769 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_178_KF_B_MODE_PROBS_715_LSBMASK (0x000000FF) 4770 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_178_KF_B_MODE_PROBS_715_SHIFT (24) 4771 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_178_KF_B_MODE_PROBS_715_SIGNED_FIELD IMG_FALSE 4772 4773 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_179_OFFSET (0x0AD8) 4774 4775 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_179, KF_B_MODE_PROBS_716 4776 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_179_KF_B_MODE_PROBS_716_MASK (0x000000FF) 4777 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_179_KF_B_MODE_PROBS_716_LSBMASK (0x000000FF) 4778 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_179_KF_B_MODE_PROBS_716_SHIFT (0) 4779 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_179_KF_B_MODE_PROBS_716_SIGNED_FIELD IMG_FALSE 4780 4781 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_179, KF_B_MODE_PROBS_717 4782 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_179_KF_B_MODE_PROBS_717_MASK (0x0000FF00) 4783 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_179_KF_B_MODE_PROBS_717_LSBMASK (0x000000FF) 4784 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_179_KF_B_MODE_PROBS_717_SHIFT (8) 4785 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_179_KF_B_MODE_PROBS_717_SIGNED_FIELD IMG_FALSE 4786 4787 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_179, KF_B_MODE_PROBS_718 4788 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_179_KF_B_MODE_PROBS_718_MASK (0x00FF0000) 4789 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_179_KF_B_MODE_PROBS_718_LSBMASK (0x000000FF) 4790 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_179_KF_B_MODE_PROBS_718_SHIFT (16) 4791 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_179_KF_B_MODE_PROBS_718_SIGNED_FIELD IMG_FALSE 4792 4793 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_179, KF_B_MODE_PROBS_719 4794 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_179_KF_B_MODE_PROBS_719_MASK (0xFF000000) 4795 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_179_KF_B_MODE_PROBS_719_LSBMASK (0x000000FF) 4796 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_179_KF_B_MODE_PROBS_719_SHIFT (24) 4797 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_179_KF_B_MODE_PROBS_719_SIGNED_FIELD IMG_FALSE 4798 4799 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_180_OFFSET (0x0ADC) 4800 4801 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_180, KF_B_MODE_PROBS_720 4802 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_180_KF_B_MODE_PROBS_720_MASK (0x000000FF) 4803 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_180_KF_B_MODE_PROBS_720_LSBMASK (0x000000FF) 4804 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_180_KF_B_MODE_PROBS_720_SHIFT (0) 4805 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_180_KF_B_MODE_PROBS_720_SIGNED_FIELD IMG_FALSE 4806 4807 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_180, KF_B_MODE_PROBS_721 4808 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_180_KF_B_MODE_PROBS_721_MASK (0x0000FF00) 4809 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_180_KF_B_MODE_PROBS_721_LSBMASK (0x000000FF) 4810 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_180_KF_B_MODE_PROBS_721_SHIFT (8) 4811 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_180_KF_B_MODE_PROBS_721_SIGNED_FIELD IMG_FALSE 4812 4813 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_180, KF_B_MODE_PROBS_722 4814 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_180_KF_B_MODE_PROBS_722_MASK (0x00FF0000) 4815 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_180_KF_B_MODE_PROBS_722_LSBMASK (0x000000FF) 4816 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_180_KF_B_MODE_PROBS_722_SHIFT (16) 4817 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_180_KF_B_MODE_PROBS_722_SIGNED_FIELD IMG_FALSE 4818 4819 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_180, KF_B_MODE_PROBS_723 4820 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_180_KF_B_MODE_PROBS_723_MASK (0xFF000000) 4821 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_180_KF_B_MODE_PROBS_723_LSBMASK (0x000000FF) 4822 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_180_KF_B_MODE_PROBS_723_SHIFT (24) 4823 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_180_KF_B_MODE_PROBS_723_SIGNED_FIELD IMG_FALSE 4824 4825 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_181_OFFSET (0x0AE0) 4826 4827 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_181, KF_B_MODE_PROBS_724 4828 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_181_KF_B_MODE_PROBS_724_MASK (0x000000FF) 4829 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_181_KF_B_MODE_PROBS_724_LSBMASK (0x000000FF) 4830 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_181_KF_B_MODE_PROBS_724_SHIFT (0) 4831 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_181_KF_B_MODE_PROBS_724_SIGNED_FIELD IMG_FALSE 4832 4833 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_181, KF_B_MODE_PROBS_725 4834 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_181_KF_B_MODE_PROBS_725_MASK (0x0000FF00) 4835 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_181_KF_B_MODE_PROBS_725_LSBMASK (0x000000FF) 4836 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_181_KF_B_MODE_PROBS_725_SHIFT (8) 4837 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_181_KF_B_MODE_PROBS_725_SIGNED_FIELD IMG_FALSE 4838 4839 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_181, KF_B_MODE_PROBS_726 4840 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_181_KF_B_MODE_PROBS_726_MASK (0x00FF0000) 4841 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_181_KF_B_MODE_PROBS_726_LSBMASK (0x000000FF) 4842 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_181_KF_B_MODE_PROBS_726_SHIFT (16) 4843 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_181_KF_B_MODE_PROBS_726_SIGNED_FIELD IMG_FALSE 4844 4845 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_181, KF_B_MODE_PROBS_727 4846 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_181_KF_B_MODE_PROBS_727_MASK (0xFF000000) 4847 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_181_KF_B_MODE_PROBS_727_LSBMASK (0x000000FF) 4848 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_181_KF_B_MODE_PROBS_727_SHIFT (24) 4849 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_181_KF_B_MODE_PROBS_727_SIGNED_FIELD IMG_FALSE 4850 4851 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_182_OFFSET (0x0AE4) 4852 4853 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_182, KF_B_MODE_PROBS_728 4854 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_182_KF_B_MODE_PROBS_728_MASK (0x000000FF) 4855 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_182_KF_B_MODE_PROBS_728_LSBMASK (0x000000FF) 4856 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_182_KF_B_MODE_PROBS_728_SHIFT (0) 4857 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_182_KF_B_MODE_PROBS_728_SIGNED_FIELD IMG_FALSE 4858 4859 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_182, KF_B_MODE_PROBS_729 4860 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_182_KF_B_MODE_PROBS_729_MASK (0x0000FF00) 4861 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_182_KF_B_MODE_PROBS_729_LSBMASK (0x000000FF) 4862 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_182_KF_B_MODE_PROBS_729_SHIFT (8) 4863 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_182_KF_B_MODE_PROBS_729_SIGNED_FIELD IMG_FALSE 4864 4865 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_182, KF_B_MODE_PROBS_730 4866 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_182_KF_B_MODE_PROBS_730_MASK (0x00FF0000) 4867 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_182_KF_B_MODE_PROBS_730_LSBMASK (0x000000FF) 4868 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_182_KF_B_MODE_PROBS_730_SHIFT (16) 4869 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_182_KF_B_MODE_PROBS_730_SIGNED_FIELD IMG_FALSE 4870 4871 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_182, KF_B_MODE_PROBS_731 4872 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_182_KF_B_MODE_PROBS_731_MASK (0xFF000000) 4873 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_182_KF_B_MODE_PROBS_731_LSBMASK (0x000000FF) 4874 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_182_KF_B_MODE_PROBS_731_SHIFT (24) 4875 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_182_KF_B_MODE_PROBS_731_SIGNED_FIELD IMG_FALSE 4876 4877 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_183_OFFSET (0x0AE8) 4878 4879 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_183, KF_B_MODE_PROBS_732 4880 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_183_KF_B_MODE_PROBS_732_MASK (0x000000FF) 4881 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_183_KF_B_MODE_PROBS_732_LSBMASK (0x000000FF) 4882 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_183_KF_B_MODE_PROBS_732_SHIFT (0) 4883 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_183_KF_B_MODE_PROBS_732_SIGNED_FIELD IMG_FALSE 4884 4885 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_183, KF_B_MODE_PROBS_733 4886 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_183_KF_B_MODE_PROBS_733_MASK (0x0000FF00) 4887 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_183_KF_B_MODE_PROBS_733_LSBMASK (0x000000FF) 4888 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_183_KF_B_MODE_PROBS_733_SHIFT (8) 4889 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_183_KF_B_MODE_PROBS_733_SIGNED_FIELD IMG_FALSE 4890 4891 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_183, KF_B_MODE_PROBS_734 4892 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_183_KF_B_MODE_PROBS_734_MASK (0x00FF0000) 4893 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_183_KF_B_MODE_PROBS_734_LSBMASK (0x000000FF) 4894 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_183_KF_B_MODE_PROBS_734_SHIFT (16) 4895 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_183_KF_B_MODE_PROBS_734_SIGNED_FIELD IMG_FALSE 4896 4897 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_183, KF_B_MODE_PROBS_735 4898 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_183_KF_B_MODE_PROBS_735_MASK (0xFF000000) 4899 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_183_KF_B_MODE_PROBS_735_LSBMASK (0x000000FF) 4900 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_183_KF_B_MODE_PROBS_735_SHIFT (24) 4901 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_183_KF_B_MODE_PROBS_735_SIGNED_FIELD IMG_FALSE 4902 4903 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_184_OFFSET (0x0AEC) 4904 4905 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_184, KF_B_MODE_PROBS_736 4906 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_184_KF_B_MODE_PROBS_736_MASK (0x000000FF) 4907 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_184_KF_B_MODE_PROBS_736_LSBMASK (0x000000FF) 4908 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_184_KF_B_MODE_PROBS_736_SHIFT (0) 4909 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_184_KF_B_MODE_PROBS_736_SIGNED_FIELD IMG_FALSE 4910 4911 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_184, KF_B_MODE_PROBS_737 4912 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_184_KF_B_MODE_PROBS_737_MASK (0x0000FF00) 4913 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_184_KF_B_MODE_PROBS_737_LSBMASK (0x000000FF) 4914 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_184_KF_B_MODE_PROBS_737_SHIFT (8) 4915 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_184_KF_B_MODE_PROBS_737_SIGNED_FIELD IMG_FALSE 4916 4917 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_184, KF_B_MODE_PROBS_738 4918 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_184_KF_B_MODE_PROBS_738_MASK (0x00FF0000) 4919 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_184_KF_B_MODE_PROBS_738_LSBMASK (0x000000FF) 4920 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_184_KF_B_MODE_PROBS_738_SHIFT (16) 4921 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_184_KF_B_MODE_PROBS_738_SIGNED_FIELD IMG_FALSE 4922 4923 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_184, KF_B_MODE_PROBS_739 4924 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_184_KF_B_MODE_PROBS_739_MASK (0xFF000000) 4925 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_184_KF_B_MODE_PROBS_739_LSBMASK (0x000000FF) 4926 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_184_KF_B_MODE_PROBS_739_SHIFT (24) 4927 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_184_KF_B_MODE_PROBS_739_SIGNED_FIELD IMG_FALSE 4928 4929 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_185_OFFSET (0x0AF0) 4930 4931 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_185, KF_B_MODE_PROBS_740 4932 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_185_KF_B_MODE_PROBS_740_MASK (0x000000FF) 4933 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_185_KF_B_MODE_PROBS_740_LSBMASK (0x000000FF) 4934 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_185_KF_B_MODE_PROBS_740_SHIFT (0) 4935 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_185_KF_B_MODE_PROBS_740_SIGNED_FIELD IMG_FALSE 4936 4937 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_185, KF_B_MODE_PROBS_741 4938 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_185_KF_B_MODE_PROBS_741_MASK (0x0000FF00) 4939 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_185_KF_B_MODE_PROBS_741_LSBMASK (0x000000FF) 4940 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_185_KF_B_MODE_PROBS_741_SHIFT (8) 4941 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_185_KF_B_MODE_PROBS_741_SIGNED_FIELD IMG_FALSE 4942 4943 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_185, KF_B_MODE_PROBS_742 4944 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_185_KF_B_MODE_PROBS_742_MASK (0x00FF0000) 4945 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_185_KF_B_MODE_PROBS_742_LSBMASK (0x000000FF) 4946 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_185_KF_B_MODE_PROBS_742_SHIFT (16) 4947 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_185_KF_B_MODE_PROBS_742_SIGNED_FIELD IMG_FALSE 4948 4949 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_185, KF_B_MODE_PROBS_743 4950 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_185_KF_B_MODE_PROBS_743_MASK (0xFF000000) 4951 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_185_KF_B_MODE_PROBS_743_LSBMASK (0x000000FF) 4952 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_185_KF_B_MODE_PROBS_743_SHIFT (24) 4953 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_185_KF_B_MODE_PROBS_743_SIGNED_FIELD IMG_FALSE 4954 4955 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_186_OFFSET (0x0AF4) 4956 4957 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_186, KF_B_MODE_PROBS_744 4958 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_186_KF_B_MODE_PROBS_744_MASK (0x000000FF) 4959 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_186_KF_B_MODE_PROBS_744_LSBMASK (0x000000FF) 4960 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_186_KF_B_MODE_PROBS_744_SHIFT (0) 4961 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_186_KF_B_MODE_PROBS_744_SIGNED_FIELD IMG_FALSE 4962 4963 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_186, KF_B_MODE_PROBS_745 4964 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_186_KF_B_MODE_PROBS_745_MASK (0x0000FF00) 4965 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_186_KF_B_MODE_PROBS_745_LSBMASK (0x000000FF) 4966 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_186_KF_B_MODE_PROBS_745_SHIFT (8) 4967 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_186_KF_B_MODE_PROBS_745_SIGNED_FIELD IMG_FALSE 4968 4969 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_186, KF_B_MODE_PROBS_746 4970 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_186_KF_B_MODE_PROBS_746_MASK (0x00FF0000) 4971 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_186_KF_B_MODE_PROBS_746_LSBMASK (0x000000FF) 4972 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_186_KF_B_MODE_PROBS_746_SHIFT (16) 4973 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_186_KF_B_MODE_PROBS_746_SIGNED_FIELD IMG_FALSE 4974 4975 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_186, KF_B_MODE_PROBS_747 4976 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_186_KF_B_MODE_PROBS_747_MASK (0xFF000000) 4977 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_186_KF_B_MODE_PROBS_747_LSBMASK (0x000000FF) 4978 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_186_KF_B_MODE_PROBS_747_SHIFT (24) 4979 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_186_KF_B_MODE_PROBS_747_SIGNED_FIELD IMG_FALSE 4980 4981 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_187_OFFSET (0x0AF8) 4982 4983 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_187, KF_B_MODE_PROBS_748 4984 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_187_KF_B_MODE_PROBS_748_MASK (0x000000FF) 4985 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_187_KF_B_MODE_PROBS_748_LSBMASK (0x000000FF) 4986 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_187_KF_B_MODE_PROBS_748_SHIFT (0) 4987 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_187_KF_B_MODE_PROBS_748_SIGNED_FIELD IMG_FALSE 4988 4989 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_187, KF_B_MODE_PROBS_749 4990 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_187_KF_B_MODE_PROBS_749_MASK (0x0000FF00) 4991 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_187_KF_B_MODE_PROBS_749_LSBMASK (0x000000FF) 4992 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_187_KF_B_MODE_PROBS_749_SHIFT (8) 4993 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_187_KF_B_MODE_PROBS_749_SIGNED_FIELD IMG_FALSE 4994 4995 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_187, KF_B_MODE_PROBS_750 4996 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_187_KF_B_MODE_PROBS_750_MASK (0x00FF0000) 4997 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_187_KF_B_MODE_PROBS_750_LSBMASK (0x000000FF) 4998 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_187_KF_B_MODE_PROBS_750_SHIFT (16) 4999 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_187_KF_B_MODE_PROBS_750_SIGNED_FIELD IMG_FALSE 5000 5001 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_187, KF_B_MODE_PROBS_751 5002 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_187_KF_B_MODE_PROBS_751_MASK (0xFF000000) 5003 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_187_KF_B_MODE_PROBS_751_LSBMASK (0x000000FF) 5004 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_187_KF_B_MODE_PROBS_751_SHIFT (24) 5005 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_187_KF_B_MODE_PROBS_751_SIGNED_FIELD IMG_FALSE 5006 5007 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_188_OFFSET (0x0AFC) 5008 5009 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_188, KF_B_MODE_PROBS_752 5010 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_188_KF_B_MODE_PROBS_752_MASK (0x000000FF) 5011 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_188_KF_B_MODE_PROBS_752_LSBMASK (0x000000FF) 5012 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_188_KF_B_MODE_PROBS_752_SHIFT (0) 5013 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_188_KF_B_MODE_PROBS_752_SIGNED_FIELD IMG_FALSE 5014 5015 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_188, KF_B_MODE_PROBS_753 5016 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_188_KF_B_MODE_PROBS_753_MASK (0x0000FF00) 5017 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_188_KF_B_MODE_PROBS_753_LSBMASK (0x000000FF) 5018 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_188_KF_B_MODE_PROBS_753_SHIFT (8) 5019 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_188_KF_B_MODE_PROBS_753_SIGNED_FIELD IMG_FALSE 5020 5021 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_188, KF_B_MODE_PROBS_754 5022 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_188_KF_B_MODE_PROBS_754_MASK (0x00FF0000) 5023 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_188_KF_B_MODE_PROBS_754_LSBMASK (0x000000FF) 5024 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_188_KF_B_MODE_PROBS_754_SHIFT (16) 5025 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_188_KF_B_MODE_PROBS_754_SIGNED_FIELD IMG_FALSE 5026 5027 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_188, KF_B_MODE_PROBS_755 5028 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_188_KF_B_MODE_PROBS_755_MASK (0xFF000000) 5029 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_188_KF_B_MODE_PROBS_755_LSBMASK (0x000000FF) 5030 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_188_KF_B_MODE_PROBS_755_SHIFT (24) 5031 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_188_KF_B_MODE_PROBS_755_SIGNED_FIELD IMG_FALSE 5032 5033 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_189_OFFSET (0x0B00) 5034 5035 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_189, KF_B_MODE_PROBS_756 5036 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_189_KF_B_MODE_PROBS_756_MASK (0x000000FF) 5037 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_189_KF_B_MODE_PROBS_756_LSBMASK (0x000000FF) 5038 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_189_KF_B_MODE_PROBS_756_SHIFT (0) 5039 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_189_KF_B_MODE_PROBS_756_SIGNED_FIELD IMG_FALSE 5040 5041 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_189, KF_B_MODE_PROBS_757 5042 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_189_KF_B_MODE_PROBS_757_MASK (0x0000FF00) 5043 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_189_KF_B_MODE_PROBS_757_LSBMASK (0x000000FF) 5044 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_189_KF_B_MODE_PROBS_757_SHIFT (8) 5045 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_189_KF_B_MODE_PROBS_757_SIGNED_FIELD IMG_FALSE 5046 5047 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_189, KF_B_MODE_PROBS_758 5048 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_189_KF_B_MODE_PROBS_758_MASK (0x00FF0000) 5049 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_189_KF_B_MODE_PROBS_758_LSBMASK (0x000000FF) 5050 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_189_KF_B_MODE_PROBS_758_SHIFT (16) 5051 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_189_KF_B_MODE_PROBS_758_SIGNED_FIELD IMG_FALSE 5052 5053 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_189, KF_B_MODE_PROBS_759 5054 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_189_KF_B_MODE_PROBS_759_MASK (0xFF000000) 5055 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_189_KF_B_MODE_PROBS_759_LSBMASK (0x000000FF) 5056 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_189_KF_B_MODE_PROBS_759_SHIFT (24) 5057 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_189_KF_B_MODE_PROBS_759_SIGNED_FIELD IMG_FALSE 5058 5059 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_190_OFFSET (0x0B04) 5060 5061 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_190, KF_B_MODE_PROBS_760 5062 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_190_KF_B_MODE_PROBS_760_MASK (0x000000FF) 5063 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_190_KF_B_MODE_PROBS_760_LSBMASK (0x000000FF) 5064 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_190_KF_B_MODE_PROBS_760_SHIFT (0) 5065 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_190_KF_B_MODE_PROBS_760_SIGNED_FIELD IMG_FALSE 5066 5067 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_190, KF_B_MODE_PROBS_761 5068 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_190_KF_B_MODE_PROBS_761_MASK (0x0000FF00) 5069 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_190_KF_B_MODE_PROBS_761_LSBMASK (0x000000FF) 5070 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_190_KF_B_MODE_PROBS_761_SHIFT (8) 5071 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_190_KF_B_MODE_PROBS_761_SIGNED_FIELD IMG_FALSE 5072 5073 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_190, KF_B_MODE_PROBS_762 5074 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_190_KF_B_MODE_PROBS_762_MASK (0x00FF0000) 5075 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_190_KF_B_MODE_PROBS_762_LSBMASK (0x000000FF) 5076 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_190_KF_B_MODE_PROBS_762_SHIFT (16) 5077 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_190_KF_B_MODE_PROBS_762_SIGNED_FIELD IMG_FALSE 5078 5079 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_190, KF_B_MODE_PROBS_763 5080 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_190_KF_B_MODE_PROBS_763_MASK (0xFF000000) 5081 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_190_KF_B_MODE_PROBS_763_LSBMASK (0x000000FF) 5082 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_190_KF_B_MODE_PROBS_763_SHIFT (24) 5083 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_190_KF_B_MODE_PROBS_763_SIGNED_FIELD IMG_FALSE 5084 5085 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_191_OFFSET (0x0B08) 5086 5087 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_191, KF_B_MODE_PROBS_764 5088 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_191_KF_B_MODE_PROBS_764_MASK (0x000000FF) 5089 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_191_KF_B_MODE_PROBS_764_LSBMASK (0x000000FF) 5090 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_191_KF_B_MODE_PROBS_764_SHIFT (0) 5091 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_191_KF_B_MODE_PROBS_764_SIGNED_FIELD IMG_FALSE 5092 5093 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_191, KF_B_MODE_PROBS_765 5094 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_191_KF_B_MODE_PROBS_765_MASK (0x0000FF00) 5095 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_191_KF_B_MODE_PROBS_765_LSBMASK (0x000000FF) 5096 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_191_KF_B_MODE_PROBS_765_SHIFT (8) 5097 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_191_KF_B_MODE_PROBS_765_SIGNED_FIELD IMG_FALSE 5098 5099 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_191, KF_B_MODE_PROBS_766 5100 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_191_KF_B_MODE_PROBS_766_MASK (0x00FF0000) 5101 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_191_KF_B_MODE_PROBS_766_LSBMASK (0x000000FF) 5102 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_191_KF_B_MODE_PROBS_766_SHIFT (16) 5103 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_191_KF_B_MODE_PROBS_766_SIGNED_FIELD IMG_FALSE 5104 5105 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_191, KF_B_MODE_PROBS_767 5106 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_191_KF_B_MODE_PROBS_767_MASK (0xFF000000) 5107 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_191_KF_B_MODE_PROBS_767_LSBMASK (0x000000FF) 5108 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_191_KF_B_MODE_PROBS_767_SHIFT (24) 5109 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_191_KF_B_MODE_PROBS_767_SIGNED_FIELD IMG_FALSE 5110 5111 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_192_OFFSET (0x0B0C) 5112 5113 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_192, KF_B_MODE_PROBS_768 5114 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_192_KF_B_MODE_PROBS_768_MASK (0x000000FF) 5115 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_192_KF_B_MODE_PROBS_768_LSBMASK (0x000000FF) 5116 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_192_KF_B_MODE_PROBS_768_SHIFT (0) 5117 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_192_KF_B_MODE_PROBS_768_SIGNED_FIELD IMG_FALSE 5118 5119 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_192, KF_B_MODE_PROBS_769 5120 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_192_KF_B_MODE_PROBS_769_MASK (0x0000FF00) 5121 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_192_KF_B_MODE_PROBS_769_LSBMASK (0x000000FF) 5122 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_192_KF_B_MODE_PROBS_769_SHIFT (8) 5123 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_192_KF_B_MODE_PROBS_769_SIGNED_FIELD IMG_FALSE 5124 5125 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_192, KF_B_MODE_PROBS_770 5126 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_192_KF_B_MODE_PROBS_770_MASK (0x00FF0000) 5127 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_192_KF_B_MODE_PROBS_770_LSBMASK (0x000000FF) 5128 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_192_KF_B_MODE_PROBS_770_SHIFT (16) 5129 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_192_KF_B_MODE_PROBS_770_SIGNED_FIELD IMG_FALSE 5130 5131 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_192, KF_B_MODE_PROBS_771 5132 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_192_KF_B_MODE_PROBS_771_MASK (0xFF000000) 5133 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_192_KF_B_MODE_PROBS_771_LSBMASK (0x000000FF) 5134 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_192_KF_B_MODE_PROBS_771_SHIFT (24) 5135 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_192_KF_B_MODE_PROBS_771_SIGNED_FIELD IMG_FALSE 5136 5137 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_193_OFFSET (0x0B10) 5138 5139 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_193, KF_B_MODE_PROBS_772 5140 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_193_KF_B_MODE_PROBS_772_MASK (0x000000FF) 5141 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_193_KF_B_MODE_PROBS_772_LSBMASK (0x000000FF) 5142 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_193_KF_B_MODE_PROBS_772_SHIFT (0) 5143 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_193_KF_B_MODE_PROBS_772_SIGNED_FIELD IMG_FALSE 5144 5145 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_193, KF_B_MODE_PROBS_773 5146 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_193_KF_B_MODE_PROBS_773_MASK (0x0000FF00) 5147 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_193_KF_B_MODE_PROBS_773_LSBMASK (0x000000FF) 5148 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_193_KF_B_MODE_PROBS_773_SHIFT (8) 5149 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_193_KF_B_MODE_PROBS_773_SIGNED_FIELD IMG_FALSE 5150 5151 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_193, KF_B_MODE_PROBS_774 5152 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_193_KF_B_MODE_PROBS_774_MASK (0x00FF0000) 5153 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_193_KF_B_MODE_PROBS_774_LSBMASK (0x000000FF) 5154 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_193_KF_B_MODE_PROBS_774_SHIFT (16) 5155 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_193_KF_B_MODE_PROBS_774_SIGNED_FIELD IMG_FALSE 5156 5157 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_193, KF_B_MODE_PROBS_775 5158 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_193_KF_B_MODE_PROBS_775_MASK (0xFF000000) 5159 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_193_KF_B_MODE_PROBS_775_LSBMASK (0x000000FF) 5160 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_193_KF_B_MODE_PROBS_775_SHIFT (24) 5161 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_193_KF_B_MODE_PROBS_775_SIGNED_FIELD IMG_FALSE 5162 5163 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_194_OFFSET (0x0B14) 5164 5165 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_194, KF_B_MODE_PROBS_776 5166 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_194_KF_B_MODE_PROBS_776_MASK (0x000000FF) 5167 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_194_KF_B_MODE_PROBS_776_LSBMASK (0x000000FF) 5168 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_194_KF_B_MODE_PROBS_776_SHIFT (0) 5169 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_194_KF_B_MODE_PROBS_776_SIGNED_FIELD IMG_FALSE 5170 5171 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_194, KF_B_MODE_PROBS_777 5172 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_194_KF_B_MODE_PROBS_777_MASK (0x0000FF00) 5173 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_194_KF_B_MODE_PROBS_777_LSBMASK (0x000000FF) 5174 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_194_KF_B_MODE_PROBS_777_SHIFT (8) 5175 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_194_KF_B_MODE_PROBS_777_SIGNED_FIELD IMG_FALSE 5176 5177 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_194, KF_B_MODE_PROBS_778 5178 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_194_KF_B_MODE_PROBS_778_MASK (0x00FF0000) 5179 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_194_KF_B_MODE_PROBS_778_LSBMASK (0x000000FF) 5180 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_194_KF_B_MODE_PROBS_778_SHIFT (16) 5181 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_194_KF_B_MODE_PROBS_778_SIGNED_FIELD IMG_FALSE 5182 5183 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_194, KF_B_MODE_PROBS_779 5184 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_194_KF_B_MODE_PROBS_779_MASK (0xFF000000) 5185 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_194_KF_B_MODE_PROBS_779_LSBMASK (0x000000FF) 5186 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_194_KF_B_MODE_PROBS_779_SHIFT (24) 5187 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_194_KF_B_MODE_PROBS_779_SIGNED_FIELD IMG_FALSE 5188 5189 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_195_OFFSET (0x0B18) 5190 5191 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_195, KF_B_MODE_PROBS_780 5192 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_195_KF_B_MODE_PROBS_780_MASK (0x000000FF) 5193 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_195_KF_B_MODE_PROBS_780_LSBMASK (0x000000FF) 5194 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_195_KF_B_MODE_PROBS_780_SHIFT (0) 5195 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_195_KF_B_MODE_PROBS_780_SIGNED_FIELD IMG_FALSE 5196 5197 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_195, KF_B_MODE_PROBS_781 5198 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_195_KF_B_MODE_PROBS_781_MASK (0x0000FF00) 5199 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_195_KF_B_MODE_PROBS_781_LSBMASK (0x000000FF) 5200 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_195_KF_B_MODE_PROBS_781_SHIFT (8) 5201 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_195_KF_B_MODE_PROBS_781_SIGNED_FIELD IMG_FALSE 5202 5203 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_195, KF_B_MODE_PROBS_782 5204 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_195_KF_B_MODE_PROBS_782_MASK (0x00FF0000) 5205 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_195_KF_B_MODE_PROBS_782_LSBMASK (0x000000FF) 5206 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_195_KF_B_MODE_PROBS_782_SHIFT (16) 5207 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_195_KF_B_MODE_PROBS_782_SIGNED_FIELD IMG_FALSE 5208 5209 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_195, KF_B_MODE_PROBS_783 5210 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_195_KF_B_MODE_PROBS_783_MASK (0xFF000000) 5211 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_195_KF_B_MODE_PROBS_783_LSBMASK (0x000000FF) 5212 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_195_KF_B_MODE_PROBS_783_SHIFT (24) 5213 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_195_KF_B_MODE_PROBS_783_SIGNED_FIELD IMG_FALSE 5214 5215 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_196_OFFSET (0x0B1C) 5216 5217 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_196, KF_B_MODE_PROBS_784 5218 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_196_KF_B_MODE_PROBS_784_MASK (0x000000FF) 5219 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_196_KF_B_MODE_PROBS_784_LSBMASK (0x000000FF) 5220 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_196_KF_B_MODE_PROBS_784_SHIFT (0) 5221 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_196_KF_B_MODE_PROBS_784_SIGNED_FIELD IMG_FALSE 5222 5223 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_196, KF_B_MODE_PROBS_785 5224 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_196_KF_B_MODE_PROBS_785_MASK (0x0000FF00) 5225 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_196_KF_B_MODE_PROBS_785_LSBMASK (0x000000FF) 5226 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_196_KF_B_MODE_PROBS_785_SHIFT (8) 5227 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_196_KF_B_MODE_PROBS_785_SIGNED_FIELD IMG_FALSE 5228 5229 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_196, KF_B_MODE_PROBS_786 5230 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_196_KF_B_MODE_PROBS_786_MASK (0x00FF0000) 5231 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_196_KF_B_MODE_PROBS_786_LSBMASK (0x000000FF) 5232 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_196_KF_B_MODE_PROBS_786_SHIFT (16) 5233 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_196_KF_B_MODE_PROBS_786_SIGNED_FIELD IMG_FALSE 5234 5235 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_196, KF_B_MODE_PROBS_787 5236 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_196_KF_B_MODE_PROBS_787_MASK (0xFF000000) 5237 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_196_KF_B_MODE_PROBS_787_LSBMASK (0x000000FF) 5238 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_196_KF_B_MODE_PROBS_787_SHIFT (24) 5239 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_196_KF_B_MODE_PROBS_787_SIGNED_FIELD IMG_FALSE 5240 5241 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_197_OFFSET (0x0B20) 5242 5243 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_197, KF_B_MODE_PROBS_788 5244 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_197_KF_B_MODE_PROBS_788_MASK (0x000000FF) 5245 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_197_KF_B_MODE_PROBS_788_LSBMASK (0x000000FF) 5246 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_197_KF_B_MODE_PROBS_788_SHIFT (0) 5247 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_197_KF_B_MODE_PROBS_788_SIGNED_FIELD IMG_FALSE 5248 5249 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_197, KF_B_MODE_PROBS_789 5250 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_197_KF_B_MODE_PROBS_789_MASK (0x0000FF00) 5251 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_197_KF_B_MODE_PROBS_789_LSBMASK (0x000000FF) 5252 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_197_KF_B_MODE_PROBS_789_SHIFT (8) 5253 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_197_KF_B_MODE_PROBS_789_SIGNED_FIELD IMG_FALSE 5254 5255 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_197, KF_B_MODE_PROBS_790 5256 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_197_KF_B_MODE_PROBS_790_MASK (0x00FF0000) 5257 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_197_KF_B_MODE_PROBS_790_LSBMASK (0x000000FF) 5258 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_197_KF_B_MODE_PROBS_790_SHIFT (16) 5259 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_197_KF_B_MODE_PROBS_790_SIGNED_FIELD IMG_FALSE 5260 5261 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_197, KF_B_MODE_PROBS_791 5262 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_197_KF_B_MODE_PROBS_791_MASK (0xFF000000) 5263 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_197_KF_B_MODE_PROBS_791_LSBMASK (0x000000FF) 5264 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_197_KF_B_MODE_PROBS_791_SHIFT (24) 5265 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_197_KF_B_MODE_PROBS_791_SIGNED_FIELD IMG_FALSE 5266 5267 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_198_OFFSET (0x0B24) 5268 5269 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_198, KF_B_MODE_PROBS_792 5270 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_198_KF_B_MODE_PROBS_792_MASK (0x000000FF) 5271 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_198_KF_B_MODE_PROBS_792_LSBMASK (0x000000FF) 5272 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_198_KF_B_MODE_PROBS_792_SHIFT (0) 5273 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_198_KF_B_MODE_PROBS_792_SIGNED_FIELD IMG_FALSE 5274 5275 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_198, KF_B_MODE_PROBS_793 5276 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_198_KF_B_MODE_PROBS_793_MASK (0x0000FF00) 5277 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_198_KF_B_MODE_PROBS_793_LSBMASK (0x000000FF) 5278 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_198_KF_B_MODE_PROBS_793_SHIFT (8) 5279 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_198_KF_B_MODE_PROBS_793_SIGNED_FIELD IMG_FALSE 5280 5281 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_198, KF_B_MODE_PROBS_794 5282 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_198_KF_B_MODE_PROBS_794_MASK (0x00FF0000) 5283 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_198_KF_B_MODE_PROBS_794_LSBMASK (0x000000FF) 5284 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_198_KF_B_MODE_PROBS_794_SHIFT (16) 5285 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_198_KF_B_MODE_PROBS_794_SIGNED_FIELD IMG_FALSE 5286 5287 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_198, KF_B_MODE_PROBS_795 5288 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_198_KF_B_MODE_PROBS_795_MASK (0xFF000000) 5289 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_198_KF_B_MODE_PROBS_795_LSBMASK (0x000000FF) 5290 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_198_KF_B_MODE_PROBS_795_SHIFT (24) 5291 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_198_KF_B_MODE_PROBS_795_SIGNED_FIELD IMG_FALSE 5292 5293 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_199_OFFSET (0x0B28) 5294 5295 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_199, KF_B_MODE_PROBS_796 5296 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_199_KF_B_MODE_PROBS_796_MASK (0x000000FF) 5297 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_199_KF_B_MODE_PROBS_796_LSBMASK (0x000000FF) 5298 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_199_KF_B_MODE_PROBS_796_SHIFT (0) 5299 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_199_KF_B_MODE_PROBS_796_SIGNED_FIELD IMG_FALSE 5300 5301 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_199, KF_B_MODE_PROBS_797 5302 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_199_KF_B_MODE_PROBS_797_MASK (0x0000FF00) 5303 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_199_KF_B_MODE_PROBS_797_LSBMASK (0x000000FF) 5304 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_199_KF_B_MODE_PROBS_797_SHIFT (8) 5305 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_199_KF_B_MODE_PROBS_797_SIGNED_FIELD IMG_FALSE 5306 5307 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_199, KF_B_MODE_PROBS_798 5308 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_199_KF_B_MODE_PROBS_798_MASK (0x00FF0000) 5309 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_199_KF_B_MODE_PROBS_798_LSBMASK (0x000000FF) 5310 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_199_KF_B_MODE_PROBS_798_SHIFT (16) 5311 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_199_KF_B_MODE_PROBS_798_SIGNED_FIELD IMG_FALSE 5312 5313 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_199, KF_B_MODE_PROBS_799 5314 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_199_KF_B_MODE_PROBS_799_MASK (0xFF000000) 5315 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_199_KF_B_MODE_PROBS_799_LSBMASK (0x000000FF) 5316 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_199_KF_B_MODE_PROBS_799_SHIFT (24) 5317 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_199_KF_B_MODE_PROBS_799_SIGNED_FIELD IMG_FALSE 5318 5319 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_200_OFFSET (0x0B2C) 5320 5321 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_200, KF_B_MODE_PROBS_800 5322 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_200_KF_B_MODE_PROBS_800_MASK (0x000000FF) 5323 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_200_KF_B_MODE_PROBS_800_LSBMASK (0x000000FF) 5324 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_200_KF_B_MODE_PROBS_800_SHIFT (0) 5325 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_200_KF_B_MODE_PROBS_800_SIGNED_FIELD IMG_FALSE 5326 5327 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_200, KF_B_MODE_PROBS_801 5328 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_200_KF_B_MODE_PROBS_801_MASK (0x0000FF00) 5329 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_200_KF_B_MODE_PROBS_801_LSBMASK (0x000000FF) 5330 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_200_KF_B_MODE_PROBS_801_SHIFT (8) 5331 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_200_KF_B_MODE_PROBS_801_SIGNED_FIELD IMG_FALSE 5332 5333 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_200, KF_B_MODE_PROBS_802 5334 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_200_KF_B_MODE_PROBS_802_MASK (0x00FF0000) 5335 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_200_KF_B_MODE_PROBS_802_LSBMASK (0x000000FF) 5336 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_200_KF_B_MODE_PROBS_802_SHIFT (16) 5337 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_200_KF_B_MODE_PROBS_802_SIGNED_FIELD IMG_FALSE 5338 5339 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_200, KF_B_MODE_PROBS_803 5340 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_200_KF_B_MODE_PROBS_803_MASK (0xFF000000) 5341 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_200_KF_B_MODE_PROBS_803_LSBMASK (0x000000FF) 5342 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_200_KF_B_MODE_PROBS_803_SHIFT (24) 5343 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_200_KF_B_MODE_PROBS_803_SIGNED_FIELD IMG_FALSE 5344 5345 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_201_OFFSET (0x0B30) 5346 5347 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_201, KF_B_MODE_PROBS_804 5348 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_201_KF_B_MODE_PROBS_804_MASK (0x000000FF) 5349 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_201_KF_B_MODE_PROBS_804_LSBMASK (0x000000FF) 5350 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_201_KF_B_MODE_PROBS_804_SHIFT (0) 5351 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_201_KF_B_MODE_PROBS_804_SIGNED_FIELD IMG_FALSE 5352 5353 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_201, KF_B_MODE_PROBS_805 5354 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_201_KF_B_MODE_PROBS_805_MASK (0x0000FF00) 5355 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_201_KF_B_MODE_PROBS_805_LSBMASK (0x000000FF) 5356 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_201_KF_B_MODE_PROBS_805_SHIFT (8) 5357 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_201_KF_B_MODE_PROBS_805_SIGNED_FIELD IMG_FALSE 5358 5359 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_201, KF_B_MODE_PROBS_806 5360 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_201_KF_B_MODE_PROBS_806_MASK (0x00FF0000) 5361 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_201_KF_B_MODE_PROBS_806_LSBMASK (0x000000FF) 5362 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_201_KF_B_MODE_PROBS_806_SHIFT (16) 5363 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_201_KF_B_MODE_PROBS_806_SIGNED_FIELD IMG_FALSE 5364 5365 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_201, KF_B_MODE_PROBS_807 5366 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_201_KF_B_MODE_PROBS_807_MASK (0xFF000000) 5367 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_201_KF_B_MODE_PROBS_807_LSBMASK (0x000000FF) 5368 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_201_KF_B_MODE_PROBS_807_SHIFT (24) 5369 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_201_KF_B_MODE_PROBS_807_SIGNED_FIELD IMG_FALSE 5370 5371 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_202_OFFSET (0x0B34) 5372 5373 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_202, KF_B_MODE_PROBS_808 5374 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_202_KF_B_MODE_PROBS_808_MASK (0x000000FF) 5375 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_202_KF_B_MODE_PROBS_808_LSBMASK (0x000000FF) 5376 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_202_KF_B_MODE_PROBS_808_SHIFT (0) 5377 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_202_KF_B_MODE_PROBS_808_SIGNED_FIELD IMG_FALSE 5378 5379 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_202, KF_B_MODE_PROBS_809 5380 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_202_KF_B_MODE_PROBS_809_MASK (0x0000FF00) 5381 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_202_KF_B_MODE_PROBS_809_LSBMASK (0x000000FF) 5382 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_202_KF_B_MODE_PROBS_809_SHIFT (8) 5383 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_202_KF_B_MODE_PROBS_809_SIGNED_FIELD IMG_FALSE 5384 5385 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_202, KF_B_MODE_PROBS_810 5386 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_202_KF_B_MODE_PROBS_810_MASK (0x00FF0000) 5387 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_202_KF_B_MODE_PROBS_810_LSBMASK (0x000000FF) 5388 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_202_KF_B_MODE_PROBS_810_SHIFT (16) 5389 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_202_KF_B_MODE_PROBS_810_SIGNED_FIELD IMG_FALSE 5390 5391 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_202, KF_B_MODE_PROBS_811 5392 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_202_KF_B_MODE_PROBS_811_MASK (0xFF000000) 5393 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_202_KF_B_MODE_PROBS_811_LSBMASK (0x000000FF) 5394 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_202_KF_B_MODE_PROBS_811_SHIFT (24) 5395 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_202_KF_B_MODE_PROBS_811_SIGNED_FIELD IMG_FALSE 5396 5397 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_203_OFFSET (0x0B38) 5398 5399 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_203, KF_B_MODE_PROBS_812 5400 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_203_KF_B_MODE_PROBS_812_MASK (0x000000FF) 5401 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_203_KF_B_MODE_PROBS_812_LSBMASK (0x000000FF) 5402 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_203_KF_B_MODE_PROBS_812_SHIFT (0) 5403 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_203_KF_B_MODE_PROBS_812_SIGNED_FIELD IMG_FALSE 5404 5405 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_203, KF_B_MODE_PROBS_813 5406 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_203_KF_B_MODE_PROBS_813_MASK (0x0000FF00) 5407 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_203_KF_B_MODE_PROBS_813_LSBMASK (0x000000FF) 5408 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_203_KF_B_MODE_PROBS_813_SHIFT (8) 5409 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_203_KF_B_MODE_PROBS_813_SIGNED_FIELD IMG_FALSE 5410 5411 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_203, KF_B_MODE_PROBS_814 5412 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_203_KF_B_MODE_PROBS_814_MASK (0x00FF0000) 5413 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_203_KF_B_MODE_PROBS_814_LSBMASK (0x000000FF) 5414 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_203_KF_B_MODE_PROBS_814_SHIFT (16) 5415 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_203_KF_B_MODE_PROBS_814_SIGNED_FIELD IMG_FALSE 5416 5417 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_203, KF_B_MODE_PROBS_815 5418 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_203_KF_B_MODE_PROBS_815_MASK (0xFF000000) 5419 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_203_KF_B_MODE_PROBS_815_LSBMASK (0x000000FF) 5420 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_203_KF_B_MODE_PROBS_815_SHIFT (24) 5421 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_203_KF_B_MODE_PROBS_815_SIGNED_FIELD IMG_FALSE 5422 5423 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_204_OFFSET (0x0B3C) 5424 5425 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_204, KF_B_MODE_PROBS_816 5426 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_204_KF_B_MODE_PROBS_816_MASK (0x000000FF) 5427 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_204_KF_B_MODE_PROBS_816_LSBMASK (0x000000FF) 5428 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_204_KF_B_MODE_PROBS_816_SHIFT (0) 5429 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_204_KF_B_MODE_PROBS_816_SIGNED_FIELD IMG_FALSE 5430 5431 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_204, KF_B_MODE_PROBS_817 5432 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_204_KF_B_MODE_PROBS_817_MASK (0x0000FF00) 5433 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_204_KF_B_MODE_PROBS_817_LSBMASK (0x000000FF) 5434 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_204_KF_B_MODE_PROBS_817_SHIFT (8) 5435 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_204_KF_B_MODE_PROBS_817_SIGNED_FIELD IMG_FALSE 5436 5437 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_204, KF_B_MODE_PROBS_818 5438 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_204_KF_B_MODE_PROBS_818_MASK (0x00FF0000) 5439 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_204_KF_B_MODE_PROBS_818_LSBMASK (0x000000FF) 5440 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_204_KF_B_MODE_PROBS_818_SHIFT (16) 5441 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_204_KF_B_MODE_PROBS_818_SIGNED_FIELD IMG_FALSE 5442 5443 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_204, KF_B_MODE_PROBS_819 5444 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_204_KF_B_MODE_PROBS_819_MASK (0xFF000000) 5445 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_204_KF_B_MODE_PROBS_819_LSBMASK (0x000000FF) 5446 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_204_KF_B_MODE_PROBS_819_SHIFT (24) 5447 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_204_KF_B_MODE_PROBS_819_SIGNED_FIELD IMG_FALSE 5448 5449 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_205_OFFSET (0x0B40) 5450 5451 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_205, KF_B_MODE_PROBS_820 5452 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_205_KF_B_MODE_PROBS_820_MASK (0x000000FF) 5453 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_205_KF_B_MODE_PROBS_820_LSBMASK (0x000000FF) 5454 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_205_KF_B_MODE_PROBS_820_SHIFT (0) 5455 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_205_KF_B_MODE_PROBS_820_SIGNED_FIELD IMG_FALSE 5456 5457 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_205, KF_B_MODE_PROBS_821 5458 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_205_KF_B_MODE_PROBS_821_MASK (0x0000FF00) 5459 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_205_KF_B_MODE_PROBS_821_LSBMASK (0x000000FF) 5460 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_205_KF_B_MODE_PROBS_821_SHIFT (8) 5461 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_205_KF_B_MODE_PROBS_821_SIGNED_FIELD IMG_FALSE 5462 5463 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_205, KF_B_MODE_PROBS_822 5464 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_205_KF_B_MODE_PROBS_822_MASK (0x00FF0000) 5465 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_205_KF_B_MODE_PROBS_822_LSBMASK (0x000000FF) 5466 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_205_KF_B_MODE_PROBS_822_SHIFT (16) 5467 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_205_KF_B_MODE_PROBS_822_SIGNED_FIELD IMG_FALSE 5468 5469 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_205, KF_B_MODE_PROBS_823 5470 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_205_KF_B_MODE_PROBS_823_MASK (0xFF000000) 5471 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_205_KF_B_MODE_PROBS_823_LSBMASK (0x000000FF) 5472 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_205_KF_B_MODE_PROBS_823_SHIFT (24) 5473 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_205_KF_B_MODE_PROBS_823_SIGNED_FIELD IMG_FALSE 5474 5475 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_206_OFFSET (0x0B44) 5476 5477 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_206, KF_B_MODE_PROBS_824 5478 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_206_KF_B_MODE_PROBS_824_MASK (0x000000FF) 5479 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_206_KF_B_MODE_PROBS_824_LSBMASK (0x000000FF) 5480 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_206_KF_B_MODE_PROBS_824_SHIFT (0) 5481 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_206_KF_B_MODE_PROBS_824_SIGNED_FIELD IMG_FALSE 5482 5483 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_206, KF_B_MODE_PROBS_825 5484 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_206_KF_B_MODE_PROBS_825_MASK (0x0000FF00) 5485 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_206_KF_B_MODE_PROBS_825_LSBMASK (0x000000FF) 5486 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_206_KF_B_MODE_PROBS_825_SHIFT (8) 5487 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_206_KF_B_MODE_PROBS_825_SIGNED_FIELD IMG_FALSE 5488 5489 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_206, KF_B_MODE_PROBS_826 5490 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_206_KF_B_MODE_PROBS_826_MASK (0x00FF0000) 5491 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_206_KF_B_MODE_PROBS_826_LSBMASK (0x000000FF) 5492 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_206_KF_B_MODE_PROBS_826_SHIFT (16) 5493 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_206_KF_B_MODE_PROBS_826_SIGNED_FIELD IMG_FALSE 5494 5495 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_206, KF_B_MODE_PROBS_827 5496 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_206_KF_B_MODE_PROBS_827_MASK (0xFF000000) 5497 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_206_KF_B_MODE_PROBS_827_LSBMASK (0x000000FF) 5498 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_206_KF_B_MODE_PROBS_827_SHIFT (24) 5499 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_206_KF_B_MODE_PROBS_827_SIGNED_FIELD IMG_FALSE 5500 5501 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_207_OFFSET (0x0B48) 5502 5503 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_207, KF_B_MODE_PROBS_828 5504 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_207_KF_B_MODE_PROBS_828_MASK (0x000000FF) 5505 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_207_KF_B_MODE_PROBS_828_LSBMASK (0x000000FF) 5506 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_207_KF_B_MODE_PROBS_828_SHIFT (0) 5507 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_207_KF_B_MODE_PROBS_828_SIGNED_FIELD IMG_FALSE 5508 5509 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_207, KF_B_MODE_PROBS_829 5510 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_207_KF_B_MODE_PROBS_829_MASK (0x0000FF00) 5511 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_207_KF_B_MODE_PROBS_829_LSBMASK (0x000000FF) 5512 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_207_KF_B_MODE_PROBS_829_SHIFT (8) 5513 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_207_KF_B_MODE_PROBS_829_SIGNED_FIELD IMG_FALSE 5514 5515 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_207, KF_B_MODE_PROBS_830 5516 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_207_KF_B_MODE_PROBS_830_MASK (0x00FF0000) 5517 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_207_KF_B_MODE_PROBS_830_LSBMASK (0x000000FF) 5518 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_207_KF_B_MODE_PROBS_830_SHIFT (16) 5519 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_207_KF_B_MODE_PROBS_830_SIGNED_FIELD IMG_FALSE 5520 5521 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_207, KF_B_MODE_PROBS_831 5522 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_207_KF_B_MODE_PROBS_831_MASK (0xFF000000) 5523 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_207_KF_B_MODE_PROBS_831_LSBMASK (0x000000FF) 5524 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_207_KF_B_MODE_PROBS_831_SHIFT (24) 5525 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_207_KF_B_MODE_PROBS_831_SIGNED_FIELD IMG_FALSE 5526 5527 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_208_OFFSET (0x0B4C) 5528 5529 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_208, KF_B_MODE_PROBS_832 5530 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_208_KF_B_MODE_PROBS_832_MASK (0x000000FF) 5531 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_208_KF_B_MODE_PROBS_832_LSBMASK (0x000000FF) 5532 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_208_KF_B_MODE_PROBS_832_SHIFT (0) 5533 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_208_KF_B_MODE_PROBS_832_SIGNED_FIELD IMG_FALSE 5534 5535 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_208, KF_B_MODE_PROBS_833 5536 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_208_KF_B_MODE_PROBS_833_MASK (0x0000FF00) 5537 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_208_KF_B_MODE_PROBS_833_LSBMASK (0x000000FF) 5538 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_208_KF_B_MODE_PROBS_833_SHIFT (8) 5539 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_208_KF_B_MODE_PROBS_833_SIGNED_FIELD IMG_FALSE 5540 5541 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_208, KF_B_MODE_PROBS_834 5542 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_208_KF_B_MODE_PROBS_834_MASK (0x00FF0000) 5543 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_208_KF_B_MODE_PROBS_834_LSBMASK (0x000000FF) 5544 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_208_KF_B_MODE_PROBS_834_SHIFT (16) 5545 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_208_KF_B_MODE_PROBS_834_SIGNED_FIELD IMG_FALSE 5546 5547 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_208, KF_B_MODE_PROBS_835 5548 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_208_KF_B_MODE_PROBS_835_MASK (0xFF000000) 5549 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_208_KF_B_MODE_PROBS_835_LSBMASK (0x000000FF) 5550 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_208_KF_B_MODE_PROBS_835_SHIFT (24) 5551 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_208_KF_B_MODE_PROBS_835_SIGNED_FIELD IMG_FALSE 5552 5553 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_209_OFFSET (0x0B50) 5554 5555 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_209, KF_B_MODE_PROBS_836 5556 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_209_KF_B_MODE_PROBS_836_MASK (0x000000FF) 5557 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_209_KF_B_MODE_PROBS_836_LSBMASK (0x000000FF) 5558 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_209_KF_B_MODE_PROBS_836_SHIFT (0) 5559 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_209_KF_B_MODE_PROBS_836_SIGNED_FIELD IMG_FALSE 5560 5561 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_209, KF_B_MODE_PROBS_837 5562 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_209_KF_B_MODE_PROBS_837_MASK (0x0000FF00) 5563 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_209_KF_B_MODE_PROBS_837_LSBMASK (0x000000FF) 5564 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_209_KF_B_MODE_PROBS_837_SHIFT (8) 5565 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_209_KF_B_MODE_PROBS_837_SIGNED_FIELD IMG_FALSE 5566 5567 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_209, KF_B_MODE_PROBS_838 5568 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_209_KF_B_MODE_PROBS_838_MASK (0x00FF0000) 5569 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_209_KF_B_MODE_PROBS_838_LSBMASK (0x000000FF) 5570 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_209_KF_B_MODE_PROBS_838_SHIFT (16) 5571 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_209_KF_B_MODE_PROBS_838_SIGNED_FIELD IMG_FALSE 5572 5573 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_209, KF_B_MODE_PROBS_839 5574 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_209_KF_B_MODE_PROBS_839_MASK (0xFF000000) 5575 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_209_KF_B_MODE_PROBS_839_LSBMASK (0x000000FF) 5576 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_209_KF_B_MODE_PROBS_839_SHIFT (24) 5577 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_209_KF_B_MODE_PROBS_839_SIGNED_FIELD IMG_FALSE 5578 5579 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_210_OFFSET (0x0B54) 5580 5581 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_210, KF_B_MODE_PROBS_840 5582 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_210_KF_B_MODE_PROBS_840_MASK (0x000000FF) 5583 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_210_KF_B_MODE_PROBS_840_LSBMASK (0x000000FF) 5584 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_210_KF_B_MODE_PROBS_840_SHIFT (0) 5585 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_210_KF_B_MODE_PROBS_840_SIGNED_FIELD IMG_FALSE 5586 5587 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_210, KF_B_MODE_PROBS_841 5588 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_210_KF_B_MODE_PROBS_841_MASK (0x0000FF00) 5589 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_210_KF_B_MODE_PROBS_841_LSBMASK (0x000000FF) 5590 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_210_KF_B_MODE_PROBS_841_SHIFT (8) 5591 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_210_KF_B_MODE_PROBS_841_SIGNED_FIELD IMG_FALSE 5592 5593 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_210, KF_B_MODE_PROBS_842 5594 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_210_KF_B_MODE_PROBS_842_MASK (0x00FF0000) 5595 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_210_KF_B_MODE_PROBS_842_LSBMASK (0x000000FF) 5596 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_210_KF_B_MODE_PROBS_842_SHIFT (16) 5597 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_210_KF_B_MODE_PROBS_842_SIGNED_FIELD IMG_FALSE 5598 5599 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_210, KF_B_MODE_PROBS_843 5600 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_210_KF_B_MODE_PROBS_843_MASK (0xFF000000) 5601 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_210_KF_B_MODE_PROBS_843_LSBMASK (0x000000FF) 5602 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_210_KF_B_MODE_PROBS_843_SHIFT (24) 5603 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_210_KF_B_MODE_PROBS_843_SIGNED_FIELD IMG_FALSE 5604 5605 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_211_OFFSET (0x0B58) 5606 5607 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_211, KF_B_MODE_PROBS_844 5608 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_211_KF_B_MODE_PROBS_844_MASK (0x000000FF) 5609 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_211_KF_B_MODE_PROBS_844_LSBMASK (0x000000FF) 5610 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_211_KF_B_MODE_PROBS_844_SHIFT (0) 5611 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_211_KF_B_MODE_PROBS_844_SIGNED_FIELD IMG_FALSE 5612 5613 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_211, KF_B_MODE_PROBS_845 5614 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_211_KF_B_MODE_PROBS_845_MASK (0x0000FF00) 5615 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_211_KF_B_MODE_PROBS_845_LSBMASK (0x000000FF) 5616 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_211_KF_B_MODE_PROBS_845_SHIFT (8) 5617 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_211_KF_B_MODE_PROBS_845_SIGNED_FIELD IMG_FALSE 5618 5619 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_211, KF_B_MODE_PROBS_846 5620 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_211_KF_B_MODE_PROBS_846_MASK (0x00FF0000) 5621 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_211_KF_B_MODE_PROBS_846_LSBMASK (0x000000FF) 5622 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_211_KF_B_MODE_PROBS_846_SHIFT (16) 5623 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_211_KF_B_MODE_PROBS_846_SIGNED_FIELD IMG_FALSE 5624 5625 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_211, KF_B_MODE_PROBS_847 5626 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_211_KF_B_MODE_PROBS_847_MASK (0xFF000000) 5627 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_211_KF_B_MODE_PROBS_847_LSBMASK (0x000000FF) 5628 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_211_KF_B_MODE_PROBS_847_SHIFT (24) 5629 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_211_KF_B_MODE_PROBS_847_SIGNED_FIELD IMG_FALSE 5630 5631 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_212_OFFSET (0x0B5C) 5632 5633 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_212, KF_B_MODE_PROBS_848 5634 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_212_KF_B_MODE_PROBS_848_MASK (0x000000FF) 5635 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_212_KF_B_MODE_PROBS_848_LSBMASK (0x000000FF) 5636 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_212_KF_B_MODE_PROBS_848_SHIFT (0) 5637 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_212_KF_B_MODE_PROBS_848_SIGNED_FIELD IMG_FALSE 5638 5639 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_212, KF_B_MODE_PROBS_849 5640 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_212_KF_B_MODE_PROBS_849_MASK (0x0000FF00) 5641 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_212_KF_B_MODE_PROBS_849_LSBMASK (0x000000FF) 5642 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_212_KF_B_MODE_PROBS_849_SHIFT (8) 5643 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_212_KF_B_MODE_PROBS_849_SIGNED_FIELD IMG_FALSE 5644 5645 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_212, KF_B_MODE_PROBS_850 5646 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_212_KF_B_MODE_PROBS_850_MASK (0x00FF0000) 5647 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_212_KF_B_MODE_PROBS_850_LSBMASK (0x000000FF) 5648 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_212_KF_B_MODE_PROBS_850_SHIFT (16) 5649 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_212_KF_B_MODE_PROBS_850_SIGNED_FIELD IMG_FALSE 5650 5651 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_212, KF_B_MODE_PROBS_851 5652 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_212_KF_B_MODE_PROBS_851_MASK (0xFF000000) 5653 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_212_KF_B_MODE_PROBS_851_LSBMASK (0x000000FF) 5654 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_212_KF_B_MODE_PROBS_851_SHIFT (24) 5655 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_212_KF_B_MODE_PROBS_851_SIGNED_FIELD IMG_FALSE 5656 5657 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_213_OFFSET (0x0B60) 5658 5659 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_213, KF_B_MODE_PROBS_852 5660 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_213_KF_B_MODE_PROBS_852_MASK (0x000000FF) 5661 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_213_KF_B_MODE_PROBS_852_LSBMASK (0x000000FF) 5662 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_213_KF_B_MODE_PROBS_852_SHIFT (0) 5663 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_213_KF_B_MODE_PROBS_852_SIGNED_FIELD IMG_FALSE 5664 5665 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_213, KF_B_MODE_PROBS_853 5666 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_213_KF_B_MODE_PROBS_853_MASK (0x0000FF00) 5667 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_213_KF_B_MODE_PROBS_853_LSBMASK (0x000000FF) 5668 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_213_KF_B_MODE_PROBS_853_SHIFT (8) 5669 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_213_KF_B_MODE_PROBS_853_SIGNED_FIELD IMG_FALSE 5670 5671 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_213, KF_B_MODE_PROBS_854 5672 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_213_KF_B_MODE_PROBS_854_MASK (0x00FF0000) 5673 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_213_KF_B_MODE_PROBS_854_LSBMASK (0x000000FF) 5674 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_213_KF_B_MODE_PROBS_854_SHIFT (16) 5675 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_213_KF_B_MODE_PROBS_854_SIGNED_FIELD IMG_FALSE 5676 5677 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_213, KF_B_MODE_PROBS_855 5678 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_213_KF_B_MODE_PROBS_855_MASK (0xFF000000) 5679 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_213_KF_B_MODE_PROBS_855_LSBMASK (0x000000FF) 5680 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_213_KF_B_MODE_PROBS_855_SHIFT (24) 5681 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_213_KF_B_MODE_PROBS_855_SIGNED_FIELD IMG_FALSE 5682 5683 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_214_OFFSET (0x0B64) 5684 5685 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_214, KF_B_MODE_PROBS_856 5686 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_214_KF_B_MODE_PROBS_856_MASK (0x000000FF) 5687 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_214_KF_B_MODE_PROBS_856_LSBMASK (0x000000FF) 5688 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_214_KF_B_MODE_PROBS_856_SHIFT (0) 5689 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_214_KF_B_MODE_PROBS_856_SIGNED_FIELD IMG_FALSE 5690 5691 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_214, KF_B_MODE_PROBS_857 5692 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_214_KF_B_MODE_PROBS_857_MASK (0x0000FF00) 5693 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_214_KF_B_MODE_PROBS_857_LSBMASK (0x000000FF) 5694 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_214_KF_B_MODE_PROBS_857_SHIFT (8) 5695 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_214_KF_B_MODE_PROBS_857_SIGNED_FIELD IMG_FALSE 5696 5697 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_214, KF_B_MODE_PROBS_858 5698 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_214_KF_B_MODE_PROBS_858_MASK (0x00FF0000) 5699 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_214_KF_B_MODE_PROBS_858_LSBMASK (0x000000FF) 5700 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_214_KF_B_MODE_PROBS_858_SHIFT (16) 5701 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_214_KF_B_MODE_PROBS_858_SIGNED_FIELD IMG_FALSE 5702 5703 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_214, KF_B_MODE_PROBS_859 5704 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_214_KF_B_MODE_PROBS_859_MASK (0xFF000000) 5705 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_214_KF_B_MODE_PROBS_859_LSBMASK (0x000000FF) 5706 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_214_KF_B_MODE_PROBS_859_SHIFT (24) 5707 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_214_KF_B_MODE_PROBS_859_SIGNED_FIELD IMG_FALSE 5708 5709 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_215_OFFSET (0x0B68) 5710 5711 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_215, KF_B_MODE_PROBS_860 5712 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_215_KF_B_MODE_PROBS_860_MASK (0x000000FF) 5713 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_215_KF_B_MODE_PROBS_860_LSBMASK (0x000000FF) 5714 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_215_KF_B_MODE_PROBS_860_SHIFT (0) 5715 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_215_KF_B_MODE_PROBS_860_SIGNED_FIELD IMG_FALSE 5716 5717 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_215, KF_B_MODE_PROBS_861 5718 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_215_KF_B_MODE_PROBS_861_MASK (0x0000FF00) 5719 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_215_KF_B_MODE_PROBS_861_LSBMASK (0x000000FF) 5720 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_215_KF_B_MODE_PROBS_861_SHIFT (8) 5721 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_215_KF_B_MODE_PROBS_861_SIGNED_FIELD IMG_FALSE 5722 5723 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_215, KF_B_MODE_PROBS_862 5724 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_215_KF_B_MODE_PROBS_862_MASK (0x00FF0000) 5725 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_215_KF_B_MODE_PROBS_862_LSBMASK (0x000000FF) 5726 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_215_KF_B_MODE_PROBS_862_SHIFT (16) 5727 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_215_KF_B_MODE_PROBS_862_SIGNED_FIELD IMG_FALSE 5728 5729 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_215, KF_B_MODE_PROBS_863 5730 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_215_KF_B_MODE_PROBS_863_MASK (0xFF000000) 5731 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_215_KF_B_MODE_PROBS_863_LSBMASK (0x000000FF) 5732 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_215_KF_B_MODE_PROBS_863_SHIFT (24) 5733 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_215_KF_B_MODE_PROBS_863_SIGNED_FIELD IMG_FALSE 5734 5735 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_216_OFFSET (0x0B6C) 5736 5737 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_216, KF_B_MODE_PROBS_864 5738 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_216_KF_B_MODE_PROBS_864_MASK (0x000000FF) 5739 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_216_KF_B_MODE_PROBS_864_LSBMASK (0x000000FF) 5740 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_216_KF_B_MODE_PROBS_864_SHIFT (0) 5741 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_216_KF_B_MODE_PROBS_864_SIGNED_FIELD IMG_FALSE 5742 5743 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_216, KF_B_MODE_PROBS_865 5744 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_216_KF_B_MODE_PROBS_865_MASK (0x0000FF00) 5745 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_216_KF_B_MODE_PROBS_865_LSBMASK (0x000000FF) 5746 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_216_KF_B_MODE_PROBS_865_SHIFT (8) 5747 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_216_KF_B_MODE_PROBS_865_SIGNED_FIELD IMG_FALSE 5748 5749 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_216, KF_B_MODE_PROBS_866 5750 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_216_KF_B_MODE_PROBS_866_MASK (0x00FF0000) 5751 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_216_KF_B_MODE_PROBS_866_LSBMASK (0x000000FF) 5752 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_216_KF_B_MODE_PROBS_866_SHIFT (16) 5753 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_216_KF_B_MODE_PROBS_866_SIGNED_FIELD IMG_FALSE 5754 5755 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_216, KF_B_MODE_PROBS_867 5756 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_216_KF_B_MODE_PROBS_867_MASK (0xFF000000) 5757 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_216_KF_B_MODE_PROBS_867_LSBMASK (0x000000FF) 5758 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_216_KF_B_MODE_PROBS_867_SHIFT (24) 5759 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_216_KF_B_MODE_PROBS_867_SIGNED_FIELD IMG_FALSE 5760 5761 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_217_OFFSET (0x0B70) 5762 5763 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_217, KF_B_MODE_PROBS_868 5764 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_217_KF_B_MODE_PROBS_868_MASK (0x000000FF) 5765 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_217_KF_B_MODE_PROBS_868_LSBMASK (0x000000FF) 5766 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_217_KF_B_MODE_PROBS_868_SHIFT (0) 5767 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_217_KF_B_MODE_PROBS_868_SIGNED_FIELD IMG_FALSE 5768 5769 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_217, KF_B_MODE_PROBS_869 5770 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_217_KF_B_MODE_PROBS_869_MASK (0x0000FF00) 5771 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_217_KF_B_MODE_PROBS_869_LSBMASK (0x000000FF) 5772 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_217_KF_B_MODE_PROBS_869_SHIFT (8) 5773 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_217_KF_B_MODE_PROBS_869_SIGNED_FIELD IMG_FALSE 5774 5775 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_217, KF_B_MODE_PROBS_870 5776 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_217_KF_B_MODE_PROBS_870_MASK (0x00FF0000) 5777 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_217_KF_B_MODE_PROBS_870_LSBMASK (0x000000FF) 5778 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_217_KF_B_MODE_PROBS_870_SHIFT (16) 5779 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_217_KF_B_MODE_PROBS_870_SIGNED_FIELD IMG_FALSE 5780 5781 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_217, KF_B_MODE_PROBS_871 5782 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_217_KF_B_MODE_PROBS_871_MASK (0xFF000000) 5783 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_217_KF_B_MODE_PROBS_871_LSBMASK (0x000000FF) 5784 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_217_KF_B_MODE_PROBS_871_SHIFT (24) 5785 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_217_KF_B_MODE_PROBS_871_SIGNED_FIELD IMG_FALSE 5786 5787 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_218_OFFSET (0x0B74) 5788 5789 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_218, KF_B_MODE_PROBS_872 5790 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_218_KF_B_MODE_PROBS_872_MASK (0x000000FF) 5791 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_218_KF_B_MODE_PROBS_872_LSBMASK (0x000000FF) 5792 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_218_KF_B_MODE_PROBS_872_SHIFT (0) 5793 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_218_KF_B_MODE_PROBS_872_SIGNED_FIELD IMG_FALSE 5794 5795 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_218, KF_B_MODE_PROBS_873 5796 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_218_KF_B_MODE_PROBS_873_MASK (0x0000FF00) 5797 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_218_KF_B_MODE_PROBS_873_LSBMASK (0x000000FF) 5798 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_218_KF_B_MODE_PROBS_873_SHIFT (8) 5799 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_218_KF_B_MODE_PROBS_873_SIGNED_FIELD IMG_FALSE 5800 5801 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_218, KF_B_MODE_PROBS_874 5802 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_218_KF_B_MODE_PROBS_874_MASK (0x00FF0000) 5803 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_218_KF_B_MODE_PROBS_874_LSBMASK (0x000000FF) 5804 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_218_KF_B_MODE_PROBS_874_SHIFT (16) 5805 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_218_KF_B_MODE_PROBS_874_SIGNED_FIELD IMG_FALSE 5806 5807 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_218, KF_B_MODE_PROBS_875 5808 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_218_KF_B_MODE_PROBS_875_MASK (0xFF000000) 5809 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_218_KF_B_MODE_PROBS_875_LSBMASK (0x000000FF) 5810 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_218_KF_B_MODE_PROBS_875_SHIFT (24) 5811 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_218_KF_B_MODE_PROBS_875_SIGNED_FIELD IMG_FALSE 5812 5813 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_219_OFFSET (0x0B78) 5814 5815 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_219, KF_B_MODE_PROBS_876 5816 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_219_KF_B_MODE_PROBS_876_MASK (0x000000FF) 5817 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_219_KF_B_MODE_PROBS_876_LSBMASK (0x000000FF) 5818 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_219_KF_B_MODE_PROBS_876_SHIFT (0) 5819 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_219_KF_B_MODE_PROBS_876_SIGNED_FIELD IMG_FALSE 5820 5821 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_219, KF_B_MODE_PROBS_877 5822 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_219_KF_B_MODE_PROBS_877_MASK (0x0000FF00) 5823 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_219_KF_B_MODE_PROBS_877_LSBMASK (0x000000FF) 5824 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_219_KF_B_MODE_PROBS_877_SHIFT (8) 5825 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_219_KF_B_MODE_PROBS_877_SIGNED_FIELD IMG_FALSE 5826 5827 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_219, KF_B_MODE_PROBS_878 5828 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_219_KF_B_MODE_PROBS_878_MASK (0x00FF0000) 5829 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_219_KF_B_MODE_PROBS_878_LSBMASK (0x000000FF) 5830 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_219_KF_B_MODE_PROBS_878_SHIFT (16) 5831 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_219_KF_B_MODE_PROBS_878_SIGNED_FIELD IMG_FALSE 5832 5833 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_219, KF_B_MODE_PROBS_879 5834 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_219_KF_B_MODE_PROBS_879_MASK (0xFF000000) 5835 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_219_KF_B_MODE_PROBS_879_LSBMASK (0x000000FF) 5836 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_219_KF_B_MODE_PROBS_879_SHIFT (24) 5837 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_219_KF_B_MODE_PROBS_879_SIGNED_FIELD IMG_FALSE 5838 5839 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_220_OFFSET (0x0B7C) 5840 5841 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_220, KF_B_MODE_PROBS_880 5842 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_220_KF_B_MODE_PROBS_880_MASK (0x000000FF) 5843 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_220_KF_B_MODE_PROBS_880_LSBMASK (0x000000FF) 5844 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_220_KF_B_MODE_PROBS_880_SHIFT (0) 5845 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_220_KF_B_MODE_PROBS_880_SIGNED_FIELD IMG_FALSE 5846 5847 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_220, KF_B_MODE_PROBS_881 5848 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_220_KF_B_MODE_PROBS_881_MASK (0x0000FF00) 5849 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_220_KF_B_MODE_PROBS_881_LSBMASK (0x000000FF) 5850 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_220_KF_B_MODE_PROBS_881_SHIFT (8) 5851 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_220_KF_B_MODE_PROBS_881_SIGNED_FIELD IMG_FALSE 5852 5853 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_220, KF_B_MODE_PROBS_882 5854 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_220_KF_B_MODE_PROBS_882_MASK (0x00FF0000) 5855 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_220_KF_B_MODE_PROBS_882_LSBMASK (0x000000FF) 5856 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_220_KF_B_MODE_PROBS_882_SHIFT (16) 5857 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_220_KF_B_MODE_PROBS_882_SIGNED_FIELD IMG_FALSE 5858 5859 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_220, KF_B_MODE_PROBS_883 5860 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_220_KF_B_MODE_PROBS_883_MASK (0xFF000000) 5861 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_220_KF_B_MODE_PROBS_883_LSBMASK (0x000000FF) 5862 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_220_KF_B_MODE_PROBS_883_SHIFT (24) 5863 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_220_KF_B_MODE_PROBS_883_SIGNED_FIELD IMG_FALSE 5864 5865 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_221_OFFSET (0x0B80) 5866 5867 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_221, KF_B_MODE_PROBS_884 5868 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_221_KF_B_MODE_PROBS_884_MASK (0x000000FF) 5869 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_221_KF_B_MODE_PROBS_884_LSBMASK (0x000000FF) 5870 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_221_KF_B_MODE_PROBS_884_SHIFT (0) 5871 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_221_KF_B_MODE_PROBS_884_SIGNED_FIELD IMG_FALSE 5872 5873 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_221, KF_B_MODE_PROBS_885 5874 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_221_KF_B_MODE_PROBS_885_MASK (0x0000FF00) 5875 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_221_KF_B_MODE_PROBS_885_LSBMASK (0x000000FF) 5876 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_221_KF_B_MODE_PROBS_885_SHIFT (8) 5877 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_221_KF_B_MODE_PROBS_885_SIGNED_FIELD IMG_FALSE 5878 5879 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_221, KF_B_MODE_PROBS_886 5880 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_221_KF_B_MODE_PROBS_886_MASK (0x00FF0000) 5881 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_221_KF_B_MODE_PROBS_886_LSBMASK (0x000000FF) 5882 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_221_KF_B_MODE_PROBS_886_SHIFT (16) 5883 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_221_KF_B_MODE_PROBS_886_SIGNED_FIELD IMG_FALSE 5884 5885 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_221, KF_B_MODE_PROBS_887 5886 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_221_KF_B_MODE_PROBS_887_MASK (0xFF000000) 5887 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_221_KF_B_MODE_PROBS_887_LSBMASK (0x000000FF) 5888 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_221_KF_B_MODE_PROBS_887_SHIFT (24) 5889 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_221_KF_B_MODE_PROBS_887_SIGNED_FIELD IMG_FALSE 5890 5891 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_222_OFFSET (0x0B84) 5892 5893 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_222, KF_B_MODE_PROBS_888 5894 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_222_KF_B_MODE_PROBS_888_MASK (0x000000FF) 5895 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_222_KF_B_MODE_PROBS_888_LSBMASK (0x000000FF) 5896 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_222_KF_B_MODE_PROBS_888_SHIFT (0) 5897 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_222_KF_B_MODE_PROBS_888_SIGNED_FIELD IMG_FALSE 5898 5899 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_222, KF_B_MODE_PROBS_889 5900 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_222_KF_B_MODE_PROBS_889_MASK (0x0000FF00) 5901 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_222_KF_B_MODE_PROBS_889_LSBMASK (0x000000FF) 5902 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_222_KF_B_MODE_PROBS_889_SHIFT (8) 5903 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_222_KF_B_MODE_PROBS_889_SIGNED_FIELD IMG_FALSE 5904 5905 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_222, KF_B_MODE_PROBS_890 5906 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_222_KF_B_MODE_PROBS_890_MASK (0x00FF0000) 5907 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_222_KF_B_MODE_PROBS_890_LSBMASK (0x000000FF) 5908 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_222_KF_B_MODE_PROBS_890_SHIFT (16) 5909 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_222_KF_B_MODE_PROBS_890_SIGNED_FIELD IMG_FALSE 5910 5911 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_222, KF_B_MODE_PROBS_891 5912 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_222_KF_B_MODE_PROBS_891_MASK (0xFF000000) 5913 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_222_KF_B_MODE_PROBS_891_LSBMASK (0x000000FF) 5914 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_222_KF_B_MODE_PROBS_891_SHIFT (24) 5915 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_222_KF_B_MODE_PROBS_891_SIGNED_FIELD IMG_FALSE 5916 5917 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_223_OFFSET (0x0B88) 5918 5919 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_223, KF_B_MODE_PROBS_892 5920 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_223_KF_B_MODE_PROBS_892_MASK (0x000000FF) 5921 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_223_KF_B_MODE_PROBS_892_LSBMASK (0x000000FF) 5922 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_223_KF_B_MODE_PROBS_892_SHIFT (0) 5923 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_223_KF_B_MODE_PROBS_892_SIGNED_FIELD IMG_FALSE 5924 5925 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_223, KF_B_MODE_PROBS_893 5926 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_223_KF_B_MODE_PROBS_893_MASK (0x0000FF00) 5927 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_223_KF_B_MODE_PROBS_893_LSBMASK (0x000000FF) 5928 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_223_KF_B_MODE_PROBS_893_SHIFT (8) 5929 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_223_KF_B_MODE_PROBS_893_SIGNED_FIELD IMG_FALSE 5930 5931 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_223, KF_B_MODE_PROBS_894 5932 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_223_KF_B_MODE_PROBS_894_MASK (0x00FF0000) 5933 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_223_KF_B_MODE_PROBS_894_LSBMASK (0x000000FF) 5934 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_223_KF_B_MODE_PROBS_894_SHIFT (16) 5935 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_223_KF_B_MODE_PROBS_894_SIGNED_FIELD IMG_FALSE 5936 5937 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_223, KF_B_MODE_PROBS_895 5938 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_223_KF_B_MODE_PROBS_895_MASK (0xFF000000) 5939 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_223_KF_B_MODE_PROBS_895_LSBMASK (0x000000FF) 5940 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_223_KF_B_MODE_PROBS_895_SHIFT (24) 5941 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_223_KF_B_MODE_PROBS_895_SIGNED_FIELD IMG_FALSE 5942 5943 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_224_OFFSET (0x0B8C) 5944 5945 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_224, KF_B_MODE_PROBS_896 5946 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_224_KF_B_MODE_PROBS_896_MASK (0x000000FF) 5947 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_224_KF_B_MODE_PROBS_896_LSBMASK (0x000000FF) 5948 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_224_KF_B_MODE_PROBS_896_SHIFT (0) 5949 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_224_KF_B_MODE_PROBS_896_SIGNED_FIELD IMG_FALSE 5950 5951 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_224, KF_B_MODE_PROBS_897 5952 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_224_KF_B_MODE_PROBS_897_MASK (0x0000FF00) 5953 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_224_KF_B_MODE_PROBS_897_LSBMASK (0x000000FF) 5954 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_224_KF_B_MODE_PROBS_897_SHIFT (8) 5955 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_224_KF_B_MODE_PROBS_897_SIGNED_FIELD IMG_FALSE 5956 5957 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_224, KF_B_MODE_PROBS_898 5958 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_224_KF_B_MODE_PROBS_898_MASK (0x00FF0000) 5959 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_224_KF_B_MODE_PROBS_898_LSBMASK (0x000000FF) 5960 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_224_KF_B_MODE_PROBS_898_SHIFT (16) 5961 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_224_KF_B_MODE_PROBS_898_SIGNED_FIELD IMG_FALSE 5962 5963 // MSVDX_VEC_LINE_STORE_RAM, KF_B_MODE_PROBS_REG_224, KF_B_MODE_PROBS_899 5964 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_224_KF_B_MODE_PROBS_899_MASK (0xFF000000) 5965 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_224_KF_B_MODE_PROBS_899_LSBMASK (0x000000FF) 5966 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_224_KF_B_MODE_PROBS_899_SHIFT (24) 5967 #define MSVDX_VEC_LINE_STORE_RAM_KF_B_MODE_PROBS_REG_224_KF_B_MODE_PROBS_899_SIGNED_FIELD IMG_FALSE 5968 5969 #define MSVDX_VEC_LINE_STORE_RAM_MB_NKF_PROBS_REG_00_OFFSET (0x0B90) 5970 5971 // MSVDX_VEC_LINE_STORE_RAM, MB_NKF_PROBS_REG_00, INTRA_PROBS_00 5972 #define MSVDX_VEC_LINE_STORE_RAM_MB_NKF_PROBS_REG_00_INTRA_PROBS_00_MASK (0x000000FF) 5973 #define MSVDX_VEC_LINE_STORE_RAM_MB_NKF_PROBS_REG_00_INTRA_PROBS_00_LSBMASK (0x000000FF) 5974 #define MSVDX_VEC_LINE_STORE_RAM_MB_NKF_PROBS_REG_00_INTRA_PROBS_00_SHIFT (0) 5975 #define MSVDX_VEC_LINE_STORE_RAM_MB_NKF_PROBS_REG_00_INTRA_PROBS_00_SIGNED_FIELD IMG_FALSE 5976 5977 // MSVDX_VEC_LINE_STORE_RAM, MB_NKF_PROBS_REG_00, LAST_PROBS_00 5978 #define MSVDX_VEC_LINE_STORE_RAM_MB_NKF_PROBS_REG_00_LAST_PROBS_00_MASK (0x0000FF00) 5979 #define MSVDX_VEC_LINE_STORE_RAM_MB_NKF_PROBS_REG_00_LAST_PROBS_00_LSBMASK (0x000000FF) 5980 #define MSVDX_VEC_LINE_STORE_RAM_MB_NKF_PROBS_REG_00_LAST_PROBS_00_SHIFT (8) 5981 #define MSVDX_VEC_LINE_STORE_RAM_MB_NKF_PROBS_REG_00_LAST_PROBS_00_SIGNED_FIELD IMG_FALSE 5982 5983 // MSVDX_VEC_LINE_STORE_RAM, MB_NKF_PROBS_REG_00, GF_PROBS_00 5984 #define MSVDX_VEC_LINE_STORE_RAM_MB_NKF_PROBS_REG_00_GF_PROBS_00_MASK (0x00FF0000) 5985 #define MSVDX_VEC_LINE_STORE_RAM_MB_NKF_PROBS_REG_00_GF_PROBS_00_LSBMASK (0x000000FF) 5986 #define MSVDX_VEC_LINE_STORE_RAM_MB_NKF_PROBS_REG_00_GF_PROBS_00_SHIFT (16) 5987 #define MSVDX_VEC_LINE_STORE_RAM_MB_NKF_PROBS_REG_00_GF_PROBS_00_SIGNED_FIELD IMG_FALSE 5988 5989 #define MSVDX_VEC_LINE_STORE_RAM_NKF_B_MODE_PROBS_REG_00_OFFSET (0x0B94) 5990 5991 // MSVDX_VEC_LINE_STORE_RAM, NKF_B_MODE_PROBS_REG_00, NKF_B_MODE_PROBS_00 5992 #define MSVDX_VEC_LINE_STORE_RAM_NKF_B_MODE_PROBS_REG_00_NKF_B_MODE_PROBS_00_MASK (0x000000FF) 5993 #define MSVDX_VEC_LINE_STORE_RAM_NKF_B_MODE_PROBS_REG_00_NKF_B_MODE_PROBS_00_LSBMASK (0x000000FF) 5994 #define MSVDX_VEC_LINE_STORE_RAM_NKF_B_MODE_PROBS_REG_00_NKF_B_MODE_PROBS_00_SHIFT (0) 5995 #define MSVDX_VEC_LINE_STORE_RAM_NKF_B_MODE_PROBS_REG_00_NKF_B_MODE_PROBS_00_SIGNED_FIELD IMG_FALSE 5996 5997 // MSVDX_VEC_LINE_STORE_RAM, NKF_B_MODE_PROBS_REG_00, NKF_B_MODE_PROBS_01 5998 #define MSVDX_VEC_LINE_STORE_RAM_NKF_B_MODE_PROBS_REG_00_NKF_B_MODE_PROBS_01_MASK (0x0000FF00) 5999 #define MSVDX_VEC_LINE_STORE_RAM_NKF_B_MODE_PROBS_REG_00_NKF_B_MODE_PROBS_01_LSBMASK (0x000000FF) 6000 #define MSVDX_VEC_LINE_STORE_RAM_NKF_B_MODE_PROBS_REG_00_NKF_B_MODE_PROBS_01_SHIFT (8) 6001 #define MSVDX_VEC_LINE_STORE_RAM_NKF_B_MODE_PROBS_REG_00_NKF_B_MODE_PROBS_01_SIGNED_FIELD IMG_FALSE 6002 6003 // MSVDX_VEC_LINE_STORE_RAM, NKF_B_MODE_PROBS_REG_00, NKF_B_MODE_PROBS_02 6004 #define MSVDX_VEC_LINE_STORE_RAM_NKF_B_MODE_PROBS_REG_00_NKF_B_MODE_PROBS_02_MASK (0x00FF0000) 6005 #define MSVDX_VEC_LINE_STORE_RAM_NKF_B_MODE_PROBS_REG_00_NKF_B_MODE_PROBS_02_LSBMASK (0x000000FF) 6006 #define MSVDX_VEC_LINE_STORE_RAM_NKF_B_MODE_PROBS_REG_00_NKF_B_MODE_PROBS_02_SHIFT (16) 6007 #define MSVDX_VEC_LINE_STORE_RAM_NKF_B_MODE_PROBS_REG_00_NKF_B_MODE_PROBS_02_SIGNED_FIELD IMG_FALSE 6008 6009 // MSVDX_VEC_LINE_STORE_RAM, NKF_B_MODE_PROBS_REG_00, NKF_B_MODE_PROBS_03 6010 #define MSVDX_VEC_LINE_STORE_RAM_NKF_B_MODE_PROBS_REG_00_NKF_B_MODE_PROBS_03_MASK (0xFF000000) 6011 #define MSVDX_VEC_LINE_STORE_RAM_NKF_B_MODE_PROBS_REG_00_NKF_B_MODE_PROBS_03_LSBMASK (0x000000FF) 6012 #define MSVDX_VEC_LINE_STORE_RAM_NKF_B_MODE_PROBS_REG_00_NKF_B_MODE_PROBS_03_SHIFT (24) 6013 #define MSVDX_VEC_LINE_STORE_RAM_NKF_B_MODE_PROBS_REG_00_NKF_B_MODE_PROBS_03_SIGNED_FIELD IMG_FALSE 6014 6015 #define MSVDX_VEC_LINE_STORE_RAM_NKF_B_MODE_PROBS_REG_01_OFFSET (0x0B98) 6016 6017 // MSVDX_VEC_LINE_STORE_RAM, NKF_B_MODE_PROBS_REG_01, NKF_B_MODE_PROBS_04 6018 #define MSVDX_VEC_LINE_STORE_RAM_NKF_B_MODE_PROBS_REG_01_NKF_B_MODE_PROBS_04_MASK (0x000000FF) 6019 #define MSVDX_VEC_LINE_STORE_RAM_NKF_B_MODE_PROBS_REG_01_NKF_B_MODE_PROBS_04_LSBMASK (0x000000FF) 6020 #define MSVDX_VEC_LINE_STORE_RAM_NKF_B_MODE_PROBS_REG_01_NKF_B_MODE_PROBS_04_SHIFT (0) 6021 #define MSVDX_VEC_LINE_STORE_RAM_NKF_B_MODE_PROBS_REG_01_NKF_B_MODE_PROBS_04_SIGNED_FIELD IMG_FALSE 6022 6023 // MSVDX_VEC_LINE_STORE_RAM, NKF_B_MODE_PROBS_REG_01, NKF_B_MODE_PROBS_05 6024 #define MSVDX_VEC_LINE_STORE_RAM_NKF_B_MODE_PROBS_REG_01_NKF_B_MODE_PROBS_05_MASK (0x0000FF00) 6025 #define MSVDX_VEC_LINE_STORE_RAM_NKF_B_MODE_PROBS_REG_01_NKF_B_MODE_PROBS_05_LSBMASK (0x000000FF) 6026 #define MSVDX_VEC_LINE_STORE_RAM_NKF_B_MODE_PROBS_REG_01_NKF_B_MODE_PROBS_05_SHIFT (8) 6027 #define MSVDX_VEC_LINE_STORE_RAM_NKF_B_MODE_PROBS_REG_01_NKF_B_MODE_PROBS_05_SIGNED_FIELD IMG_FALSE 6028 6029 // MSVDX_VEC_LINE_STORE_RAM, NKF_B_MODE_PROBS_REG_01, NKF_B_MODE_PROBS_06 6030 #define MSVDX_VEC_LINE_STORE_RAM_NKF_B_MODE_PROBS_REG_01_NKF_B_MODE_PROBS_06_MASK (0x00FF0000) 6031 #define MSVDX_VEC_LINE_STORE_RAM_NKF_B_MODE_PROBS_REG_01_NKF_B_MODE_PROBS_06_LSBMASK (0x000000FF) 6032 #define MSVDX_VEC_LINE_STORE_RAM_NKF_B_MODE_PROBS_REG_01_NKF_B_MODE_PROBS_06_SHIFT (16) 6033 #define MSVDX_VEC_LINE_STORE_RAM_NKF_B_MODE_PROBS_REG_01_NKF_B_MODE_PROBS_06_SIGNED_FIELD IMG_FALSE 6034 6035 // MSVDX_VEC_LINE_STORE_RAM, NKF_B_MODE_PROBS_REG_01, NKF_B_MODE_PROBS_07 6036 #define MSVDX_VEC_LINE_STORE_RAM_NKF_B_MODE_PROBS_REG_01_NKF_B_MODE_PROBS_07_MASK (0xFF000000) 6037 #define MSVDX_VEC_LINE_STORE_RAM_NKF_B_MODE_PROBS_REG_01_NKF_B_MODE_PROBS_07_LSBMASK (0x000000FF) 6038 #define MSVDX_VEC_LINE_STORE_RAM_NKF_B_MODE_PROBS_REG_01_NKF_B_MODE_PROBS_07_SHIFT (24) 6039 #define MSVDX_VEC_LINE_STORE_RAM_NKF_B_MODE_PROBS_REG_01_NKF_B_MODE_PROBS_07_SIGNED_FIELD IMG_FALSE 6040 6041 #define MSVDX_VEC_LINE_STORE_RAM_NKF_B_MODE_PROBS_REG_02_OFFSET (0x0B9C) 6042 6043 // MSVDX_VEC_LINE_STORE_RAM, NKF_B_MODE_PROBS_REG_02, NKF_B_MODE_PROBS_08 6044 #define MSVDX_VEC_LINE_STORE_RAM_NKF_B_MODE_PROBS_REG_02_NKF_B_MODE_PROBS_08_MASK (0x000000FF) 6045 #define MSVDX_VEC_LINE_STORE_RAM_NKF_B_MODE_PROBS_REG_02_NKF_B_MODE_PROBS_08_LSBMASK (0x000000FF) 6046 #define MSVDX_VEC_LINE_STORE_RAM_NKF_B_MODE_PROBS_REG_02_NKF_B_MODE_PROBS_08_SHIFT (0) 6047 #define MSVDX_VEC_LINE_STORE_RAM_NKF_B_MODE_PROBS_REG_02_NKF_B_MODE_PROBS_08_SIGNED_FIELD IMG_FALSE 6048 6049 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_00_OFFSET (0x0BA0) 6050 6051 // MSVDX_VEC_LINE_STORE_RAM, MODE_CONTEXT_PROBS_REG_00, MODE_CONTEXT_PROBS_00 6052 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_00_MODE_CONTEXT_PROBS_00_MASK (0x000000FF) 6053 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_00_MODE_CONTEXT_PROBS_00_LSBMASK (0x000000FF) 6054 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_00_MODE_CONTEXT_PROBS_00_SHIFT (0) 6055 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_00_MODE_CONTEXT_PROBS_00_SIGNED_FIELD IMG_FALSE 6056 6057 // MSVDX_VEC_LINE_STORE_RAM, MODE_CONTEXT_PROBS_REG_00, MODE_CONTEXT_PROBS_01 6058 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_00_MODE_CONTEXT_PROBS_01_MASK (0x0000FF00) 6059 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_00_MODE_CONTEXT_PROBS_01_LSBMASK (0x000000FF) 6060 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_00_MODE_CONTEXT_PROBS_01_SHIFT (8) 6061 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_00_MODE_CONTEXT_PROBS_01_SIGNED_FIELD IMG_FALSE 6062 6063 // MSVDX_VEC_LINE_STORE_RAM, MODE_CONTEXT_PROBS_REG_00, MODE_CONTEXT_PROBS_02 6064 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_00_MODE_CONTEXT_PROBS_02_MASK (0x00FF0000) 6065 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_00_MODE_CONTEXT_PROBS_02_LSBMASK (0x000000FF) 6066 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_00_MODE_CONTEXT_PROBS_02_SHIFT (16) 6067 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_00_MODE_CONTEXT_PROBS_02_SIGNED_FIELD IMG_FALSE 6068 6069 // MSVDX_VEC_LINE_STORE_RAM, MODE_CONTEXT_PROBS_REG_00, MODE_CONTEXT_PROBS_03 6070 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_00_MODE_CONTEXT_PROBS_03_MASK (0xFF000000) 6071 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_00_MODE_CONTEXT_PROBS_03_LSBMASK (0x000000FF) 6072 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_00_MODE_CONTEXT_PROBS_03_SHIFT (24) 6073 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_00_MODE_CONTEXT_PROBS_03_SIGNED_FIELD IMG_FALSE 6074 6075 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_01_OFFSET (0x0BA4) 6076 6077 // MSVDX_VEC_LINE_STORE_RAM, MODE_CONTEXT_PROBS_REG_01, MODE_CONTEXT_PROBS_04 6078 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_01_MODE_CONTEXT_PROBS_04_MASK (0x000000FF) 6079 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_01_MODE_CONTEXT_PROBS_04_LSBMASK (0x000000FF) 6080 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_01_MODE_CONTEXT_PROBS_04_SHIFT (0) 6081 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_01_MODE_CONTEXT_PROBS_04_SIGNED_FIELD IMG_FALSE 6082 6083 // MSVDX_VEC_LINE_STORE_RAM, MODE_CONTEXT_PROBS_REG_01, MODE_CONTEXT_PROBS_05 6084 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_01_MODE_CONTEXT_PROBS_05_MASK (0x0000FF00) 6085 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_01_MODE_CONTEXT_PROBS_05_LSBMASK (0x000000FF) 6086 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_01_MODE_CONTEXT_PROBS_05_SHIFT (8) 6087 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_01_MODE_CONTEXT_PROBS_05_SIGNED_FIELD IMG_FALSE 6088 6089 // MSVDX_VEC_LINE_STORE_RAM, MODE_CONTEXT_PROBS_REG_01, MODE_CONTEXT_PROBS_06 6090 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_01_MODE_CONTEXT_PROBS_06_MASK (0x00FF0000) 6091 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_01_MODE_CONTEXT_PROBS_06_LSBMASK (0x000000FF) 6092 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_01_MODE_CONTEXT_PROBS_06_SHIFT (16) 6093 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_01_MODE_CONTEXT_PROBS_06_SIGNED_FIELD IMG_FALSE 6094 6095 // MSVDX_VEC_LINE_STORE_RAM, MODE_CONTEXT_PROBS_REG_01, MODE_CONTEXT_PROBS_07 6096 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_01_MODE_CONTEXT_PROBS_07_MASK (0xFF000000) 6097 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_01_MODE_CONTEXT_PROBS_07_LSBMASK (0x000000FF) 6098 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_01_MODE_CONTEXT_PROBS_07_SHIFT (24) 6099 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_01_MODE_CONTEXT_PROBS_07_SIGNED_FIELD IMG_FALSE 6100 6101 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_02_OFFSET (0x0BA8) 6102 6103 // MSVDX_VEC_LINE_STORE_RAM, MODE_CONTEXT_PROBS_REG_02, MODE_CONTEXT_PROBS_08 6104 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_02_MODE_CONTEXT_PROBS_08_MASK (0x000000FF) 6105 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_02_MODE_CONTEXT_PROBS_08_LSBMASK (0x000000FF) 6106 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_02_MODE_CONTEXT_PROBS_08_SHIFT (0) 6107 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_02_MODE_CONTEXT_PROBS_08_SIGNED_FIELD IMG_FALSE 6108 6109 // MSVDX_VEC_LINE_STORE_RAM, MODE_CONTEXT_PROBS_REG_02, MODE_CONTEXT_PROBS_09 6110 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_02_MODE_CONTEXT_PROBS_09_MASK (0x0000FF00) 6111 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_02_MODE_CONTEXT_PROBS_09_LSBMASK (0x000000FF) 6112 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_02_MODE_CONTEXT_PROBS_09_SHIFT (8) 6113 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_02_MODE_CONTEXT_PROBS_09_SIGNED_FIELD IMG_FALSE 6114 6115 // MSVDX_VEC_LINE_STORE_RAM, MODE_CONTEXT_PROBS_REG_02, MODE_CONTEXT_PROBS_10 6116 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_02_MODE_CONTEXT_PROBS_10_MASK (0x00FF0000) 6117 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_02_MODE_CONTEXT_PROBS_10_LSBMASK (0x000000FF) 6118 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_02_MODE_CONTEXT_PROBS_10_SHIFT (16) 6119 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_02_MODE_CONTEXT_PROBS_10_SIGNED_FIELD IMG_FALSE 6120 6121 // MSVDX_VEC_LINE_STORE_RAM, MODE_CONTEXT_PROBS_REG_02, MODE_CONTEXT_PROBS_11 6122 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_02_MODE_CONTEXT_PROBS_11_MASK (0xFF000000) 6123 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_02_MODE_CONTEXT_PROBS_11_LSBMASK (0x000000FF) 6124 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_02_MODE_CONTEXT_PROBS_11_SHIFT (24) 6125 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_02_MODE_CONTEXT_PROBS_11_SIGNED_FIELD IMG_FALSE 6126 6127 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_03_OFFSET (0x0BAC) 6128 6129 // MSVDX_VEC_LINE_STORE_RAM, MODE_CONTEXT_PROBS_REG_03, MODE_CONTEXT_PROBS_12 6130 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_03_MODE_CONTEXT_PROBS_12_MASK (0x000000FF) 6131 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_03_MODE_CONTEXT_PROBS_12_LSBMASK (0x000000FF) 6132 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_03_MODE_CONTEXT_PROBS_12_SHIFT (0) 6133 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_03_MODE_CONTEXT_PROBS_12_SIGNED_FIELD IMG_FALSE 6134 6135 // MSVDX_VEC_LINE_STORE_RAM, MODE_CONTEXT_PROBS_REG_03, MODE_CONTEXT_PROBS_13 6136 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_03_MODE_CONTEXT_PROBS_13_MASK (0x0000FF00) 6137 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_03_MODE_CONTEXT_PROBS_13_LSBMASK (0x000000FF) 6138 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_03_MODE_CONTEXT_PROBS_13_SHIFT (8) 6139 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_03_MODE_CONTEXT_PROBS_13_SIGNED_FIELD IMG_FALSE 6140 6141 // MSVDX_VEC_LINE_STORE_RAM, MODE_CONTEXT_PROBS_REG_03, MODE_CONTEXT_PROBS_14 6142 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_03_MODE_CONTEXT_PROBS_14_MASK (0x00FF0000) 6143 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_03_MODE_CONTEXT_PROBS_14_LSBMASK (0x000000FF) 6144 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_03_MODE_CONTEXT_PROBS_14_SHIFT (16) 6145 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_03_MODE_CONTEXT_PROBS_14_SIGNED_FIELD IMG_FALSE 6146 6147 // MSVDX_VEC_LINE_STORE_RAM, MODE_CONTEXT_PROBS_REG_03, MODE_CONTEXT_PROBS_15 6148 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_03_MODE_CONTEXT_PROBS_15_MASK (0xFF000000) 6149 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_03_MODE_CONTEXT_PROBS_15_LSBMASK (0x000000FF) 6150 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_03_MODE_CONTEXT_PROBS_15_SHIFT (24) 6151 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_03_MODE_CONTEXT_PROBS_15_SIGNED_FIELD IMG_FALSE 6152 6153 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_04_OFFSET (0x0BB0) 6154 6155 // MSVDX_VEC_LINE_STORE_RAM, MODE_CONTEXT_PROBS_REG_04, MODE_CONTEXT_PROBS_16 6156 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_04_MODE_CONTEXT_PROBS_16_MASK (0x000000FF) 6157 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_04_MODE_CONTEXT_PROBS_16_LSBMASK (0x000000FF) 6158 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_04_MODE_CONTEXT_PROBS_16_SHIFT (0) 6159 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_04_MODE_CONTEXT_PROBS_16_SIGNED_FIELD IMG_FALSE 6160 6161 // MSVDX_VEC_LINE_STORE_RAM, MODE_CONTEXT_PROBS_REG_04, MODE_CONTEXT_PROBS_17 6162 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_04_MODE_CONTEXT_PROBS_17_MASK (0x0000FF00) 6163 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_04_MODE_CONTEXT_PROBS_17_LSBMASK (0x000000FF) 6164 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_04_MODE_CONTEXT_PROBS_17_SHIFT (8) 6165 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_04_MODE_CONTEXT_PROBS_17_SIGNED_FIELD IMG_FALSE 6166 6167 // MSVDX_VEC_LINE_STORE_RAM, MODE_CONTEXT_PROBS_REG_04, MODE_CONTEXT_PROBS_18 6168 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_04_MODE_CONTEXT_PROBS_18_MASK (0x00FF0000) 6169 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_04_MODE_CONTEXT_PROBS_18_LSBMASK (0x000000FF) 6170 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_04_MODE_CONTEXT_PROBS_18_SHIFT (16) 6171 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_04_MODE_CONTEXT_PROBS_18_SIGNED_FIELD IMG_FALSE 6172 6173 // MSVDX_VEC_LINE_STORE_RAM, MODE_CONTEXT_PROBS_REG_04, MODE_CONTEXT_PROBS_19 6174 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_04_MODE_CONTEXT_PROBS_19_MASK (0xFF000000) 6175 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_04_MODE_CONTEXT_PROBS_19_LSBMASK (0x000000FF) 6176 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_04_MODE_CONTEXT_PROBS_19_SHIFT (24) 6177 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_04_MODE_CONTEXT_PROBS_19_SIGNED_FIELD IMG_FALSE 6178 6179 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_05_OFFSET (0x0BB4) 6180 6181 // MSVDX_VEC_LINE_STORE_RAM, MODE_CONTEXT_PROBS_REG_05, MODE_CONTEXT_PROBS_20 6182 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_05_MODE_CONTEXT_PROBS_20_MASK (0x000000FF) 6183 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_05_MODE_CONTEXT_PROBS_20_LSBMASK (0x000000FF) 6184 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_05_MODE_CONTEXT_PROBS_20_SHIFT (0) 6185 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_05_MODE_CONTEXT_PROBS_20_SIGNED_FIELD IMG_FALSE 6186 6187 // MSVDX_VEC_LINE_STORE_RAM, MODE_CONTEXT_PROBS_REG_05, MODE_CONTEXT_PROBS_21 6188 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_05_MODE_CONTEXT_PROBS_21_MASK (0x0000FF00) 6189 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_05_MODE_CONTEXT_PROBS_21_LSBMASK (0x000000FF) 6190 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_05_MODE_CONTEXT_PROBS_21_SHIFT (8) 6191 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_05_MODE_CONTEXT_PROBS_21_SIGNED_FIELD IMG_FALSE 6192 6193 // MSVDX_VEC_LINE_STORE_RAM, MODE_CONTEXT_PROBS_REG_05, MODE_CONTEXT_PROBS_22 6194 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_05_MODE_CONTEXT_PROBS_22_MASK (0x00FF0000) 6195 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_05_MODE_CONTEXT_PROBS_22_LSBMASK (0x000000FF) 6196 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_05_MODE_CONTEXT_PROBS_22_SHIFT (16) 6197 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_05_MODE_CONTEXT_PROBS_22_SIGNED_FIELD IMG_FALSE 6198 6199 // MSVDX_VEC_LINE_STORE_RAM, MODE_CONTEXT_PROBS_REG_05, MODE_CONTEXT_PROBS_23 6200 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_05_MODE_CONTEXT_PROBS_23_MASK (0xFF000000) 6201 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_05_MODE_CONTEXT_PROBS_23_LSBMASK (0x000000FF) 6202 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_05_MODE_CONTEXT_PROBS_23_SHIFT (24) 6203 #define MSVDX_VEC_LINE_STORE_RAM_MODE_CONTEXT_PROBS_REG_05_MODE_CONTEXT_PROBS_23_SIGNED_FIELD IMG_FALSE 6204 6205 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_00_OFFSET (0x0BB8) 6206 6207 // MSVDX_VEC_LINE_STORE_RAM, MV_CONTEXT_X_PROBS_REG_00, MV_CONTEXT_X_PROBS_00 6208 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_00_MV_CONTEXT_X_PROBS_00_MASK (0x000000FF) 6209 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_00_MV_CONTEXT_X_PROBS_00_LSBMASK (0x000000FF) 6210 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_00_MV_CONTEXT_X_PROBS_00_SHIFT (0) 6211 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_00_MV_CONTEXT_X_PROBS_00_SIGNED_FIELD IMG_FALSE 6212 6213 // MSVDX_VEC_LINE_STORE_RAM, MV_CONTEXT_X_PROBS_REG_00, MV_CONTEXT_X_PROBS_01 6214 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_00_MV_CONTEXT_X_PROBS_01_MASK (0x0000FF00) 6215 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_00_MV_CONTEXT_X_PROBS_01_LSBMASK (0x000000FF) 6216 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_00_MV_CONTEXT_X_PROBS_01_SHIFT (8) 6217 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_00_MV_CONTEXT_X_PROBS_01_SIGNED_FIELD IMG_FALSE 6218 6219 // MSVDX_VEC_LINE_STORE_RAM, MV_CONTEXT_X_PROBS_REG_00, MV_CONTEXT_X_PROBS_02 6220 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_00_MV_CONTEXT_X_PROBS_02_MASK (0x00FF0000) 6221 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_00_MV_CONTEXT_X_PROBS_02_LSBMASK (0x000000FF) 6222 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_00_MV_CONTEXT_X_PROBS_02_SHIFT (16) 6223 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_00_MV_CONTEXT_X_PROBS_02_SIGNED_FIELD IMG_FALSE 6224 6225 // MSVDX_VEC_LINE_STORE_RAM, MV_CONTEXT_X_PROBS_REG_00, MV_CONTEXT_X_PROBS_03 6226 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_00_MV_CONTEXT_X_PROBS_03_MASK (0xFF000000) 6227 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_00_MV_CONTEXT_X_PROBS_03_LSBMASK (0x000000FF) 6228 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_00_MV_CONTEXT_X_PROBS_03_SHIFT (24) 6229 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_00_MV_CONTEXT_X_PROBS_03_SIGNED_FIELD IMG_FALSE 6230 6231 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_01_OFFSET (0x0BBC) 6232 6233 // MSVDX_VEC_LINE_STORE_RAM, MV_CONTEXT_X_PROBS_REG_01, MV_CONTEXT_X_PROBS_04 6234 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_01_MV_CONTEXT_X_PROBS_04_MASK (0x000000FF) 6235 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_01_MV_CONTEXT_X_PROBS_04_LSBMASK (0x000000FF) 6236 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_01_MV_CONTEXT_X_PROBS_04_SHIFT (0) 6237 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_01_MV_CONTEXT_X_PROBS_04_SIGNED_FIELD IMG_FALSE 6238 6239 // MSVDX_VEC_LINE_STORE_RAM, MV_CONTEXT_X_PROBS_REG_01, MV_CONTEXT_X_PROBS_05 6240 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_01_MV_CONTEXT_X_PROBS_05_MASK (0x0000FF00) 6241 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_01_MV_CONTEXT_X_PROBS_05_LSBMASK (0x000000FF) 6242 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_01_MV_CONTEXT_X_PROBS_05_SHIFT (8) 6243 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_01_MV_CONTEXT_X_PROBS_05_SIGNED_FIELD IMG_FALSE 6244 6245 // MSVDX_VEC_LINE_STORE_RAM, MV_CONTEXT_X_PROBS_REG_01, MV_CONTEXT_X_PROBS_06 6246 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_01_MV_CONTEXT_X_PROBS_06_MASK (0x00FF0000) 6247 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_01_MV_CONTEXT_X_PROBS_06_LSBMASK (0x000000FF) 6248 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_01_MV_CONTEXT_X_PROBS_06_SHIFT (16) 6249 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_01_MV_CONTEXT_X_PROBS_06_SIGNED_FIELD IMG_FALSE 6250 6251 // MSVDX_VEC_LINE_STORE_RAM, MV_CONTEXT_X_PROBS_REG_01, MV_CONTEXT_X_PROBS_07 6252 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_01_MV_CONTEXT_X_PROBS_07_MASK (0xFF000000) 6253 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_01_MV_CONTEXT_X_PROBS_07_LSBMASK (0x000000FF) 6254 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_01_MV_CONTEXT_X_PROBS_07_SHIFT (24) 6255 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_01_MV_CONTEXT_X_PROBS_07_SIGNED_FIELD IMG_FALSE 6256 6257 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_02_OFFSET (0x0BC0) 6258 6259 // MSVDX_VEC_LINE_STORE_RAM, MV_CONTEXT_X_PROBS_REG_02, MV_CONTEXT_X_PROBS_08 6260 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_02_MV_CONTEXT_X_PROBS_08_MASK (0x000000FF) 6261 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_02_MV_CONTEXT_X_PROBS_08_LSBMASK (0x000000FF) 6262 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_02_MV_CONTEXT_X_PROBS_08_SHIFT (0) 6263 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_02_MV_CONTEXT_X_PROBS_08_SIGNED_FIELD IMG_FALSE 6264 6265 // MSVDX_VEC_LINE_STORE_RAM, MV_CONTEXT_X_PROBS_REG_02, MV_CONTEXT_X_PROBS_09 6266 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_02_MV_CONTEXT_X_PROBS_09_MASK (0x0000FF00) 6267 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_02_MV_CONTEXT_X_PROBS_09_LSBMASK (0x000000FF) 6268 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_02_MV_CONTEXT_X_PROBS_09_SHIFT (8) 6269 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_02_MV_CONTEXT_X_PROBS_09_SIGNED_FIELD IMG_FALSE 6270 6271 // MSVDX_VEC_LINE_STORE_RAM, MV_CONTEXT_X_PROBS_REG_02, MV_CONTEXT_X_PROBS_10 6272 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_02_MV_CONTEXT_X_PROBS_10_MASK (0x00FF0000) 6273 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_02_MV_CONTEXT_X_PROBS_10_LSBMASK (0x000000FF) 6274 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_02_MV_CONTEXT_X_PROBS_10_SHIFT (16) 6275 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_02_MV_CONTEXT_X_PROBS_10_SIGNED_FIELD IMG_FALSE 6276 6277 // MSVDX_VEC_LINE_STORE_RAM, MV_CONTEXT_X_PROBS_REG_02, MV_CONTEXT_X_PROBS_11 6278 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_02_MV_CONTEXT_X_PROBS_11_MASK (0xFF000000) 6279 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_02_MV_CONTEXT_X_PROBS_11_LSBMASK (0x000000FF) 6280 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_02_MV_CONTEXT_X_PROBS_11_SHIFT (24) 6281 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_02_MV_CONTEXT_X_PROBS_11_SIGNED_FIELD IMG_FALSE 6282 6283 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_03_OFFSET (0x0BC4) 6284 6285 // MSVDX_VEC_LINE_STORE_RAM, MV_CONTEXT_X_PROBS_REG_03, MV_CONTEXT_X_PROBS_12 6286 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_03_MV_CONTEXT_X_PROBS_12_MASK (0x000000FF) 6287 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_03_MV_CONTEXT_X_PROBS_12_LSBMASK (0x000000FF) 6288 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_03_MV_CONTEXT_X_PROBS_12_SHIFT (0) 6289 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_03_MV_CONTEXT_X_PROBS_12_SIGNED_FIELD IMG_FALSE 6290 6291 // MSVDX_VEC_LINE_STORE_RAM, MV_CONTEXT_X_PROBS_REG_03, MV_CONTEXT_X_PROBS_13 6292 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_03_MV_CONTEXT_X_PROBS_13_MASK (0x0000FF00) 6293 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_03_MV_CONTEXT_X_PROBS_13_LSBMASK (0x000000FF) 6294 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_03_MV_CONTEXT_X_PROBS_13_SHIFT (8) 6295 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_03_MV_CONTEXT_X_PROBS_13_SIGNED_FIELD IMG_FALSE 6296 6297 // MSVDX_VEC_LINE_STORE_RAM, MV_CONTEXT_X_PROBS_REG_03, MV_CONTEXT_X_PROBS_14 6298 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_03_MV_CONTEXT_X_PROBS_14_MASK (0x00FF0000) 6299 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_03_MV_CONTEXT_X_PROBS_14_LSBMASK (0x000000FF) 6300 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_03_MV_CONTEXT_X_PROBS_14_SHIFT (16) 6301 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_03_MV_CONTEXT_X_PROBS_14_SIGNED_FIELD IMG_FALSE 6302 6303 // MSVDX_VEC_LINE_STORE_RAM, MV_CONTEXT_X_PROBS_REG_03, MV_CONTEXT_X_PROBS_15 6304 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_03_MV_CONTEXT_X_PROBS_15_MASK (0xFF000000) 6305 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_03_MV_CONTEXT_X_PROBS_15_LSBMASK (0x000000FF) 6306 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_03_MV_CONTEXT_X_PROBS_15_SHIFT (24) 6307 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_03_MV_CONTEXT_X_PROBS_15_SIGNED_FIELD IMG_FALSE 6308 6309 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_04_OFFSET (0x0BC8) 6310 6311 // MSVDX_VEC_LINE_STORE_RAM, MV_CONTEXT_X_PROBS_REG_04, MV_CONTEXT_X_PROBS_16 6312 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_04_MV_CONTEXT_X_PROBS_16_MASK (0x000000FF) 6313 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_04_MV_CONTEXT_X_PROBS_16_LSBMASK (0x000000FF) 6314 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_04_MV_CONTEXT_X_PROBS_16_SHIFT (0) 6315 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_04_MV_CONTEXT_X_PROBS_16_SIGNED_FIELD IMG_FALSE 6316 6317 // MSVDX_VEC_LINE_STORE_RAM, MV_CONTEXT_X_PROBS_REG_04, MV_CONTEXT_X_PROBS_17 6318 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_04_MV_CONTEXT_X_PROBS_17_MASK (0x0000FF00) 6319 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_04_MV_CONTEXT_X_PROBS_17_LSBMASK (0x000000FF) 6320 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_04_MV_CONTEXT_X_PROBS_17_SHIFT (8) 6321 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_04_MV_CONTEXT_X_PROBS_17_SIGNED_FIELD IMG_FALSE 6322 6323 // MSVDX_VEC_LINE_STORE_RAM, MV_CONTEXT_X_PROBS_REG_04, MV_CONTEXT_X_PROBS_18 6324 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_04_MV_CONTEXT_X_PROBS_18_MASK (0x00FF0000) 6325 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_04_MV_CONTEXT_X_PROBS_18_LSBMASK (0x000000FF) 6326 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_04_MV_CONTEXT_X_PROBS_18_SHIFT (16) 6327 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_X_PROBS_REG_04_MV_CONTEXT_X_PROBS_18_SIGNED_FIELD IMG_FALSE 6328 6329 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_00_OFFSET (0x0BCC) 6330 6331 // MSVDX_VEC_LINE_STORE_RAM, MV_CONTEXT_Y_PROBS_REG_00, MV_CONTEXT_Y_PROBS_00 6332 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_00_MV_CONTEXT_Y_PROBS_00_MASK (0x000000FF) 6333 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_00_MV_CONTEXT_Y_PROBS_00_LSBMASK (0x000000FF) 6334 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_00_MV_CONTEXT_Y_PROBS_00_SHIFT (0) 6335 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_00_MV_CONTEXT_Y_PROBS_00_SIGNED_FIELD IMG_FALSE 6336 6337 // MSVDX_VEC_LINE_STORE_RAM, MV_CONTEXT_Y_PROBS_REG_00, MV_CONTEXT_Y_PROBS_01 6338 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_00_MV_CONTEXT_Y_PROBS_01_MASK (0x0000FF00) 6339 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_00_MV_CONTEXT_Y_PROBS_01_LSBMASK (0x000000FF) 6340 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_00_MV_CONTEXT_Y_PROBS_01_SHIFT (8) 6341 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_00_MV_CONTEXT_Y_PROBS_01_SIGNED_FIELD IMG_FALSE 6342 6343 // MSVDX_VEC_LINE_STORE_RAM, MV_CONTEXT_Y_PROBS_REG_00, MV_CONTEXT_Y_PROBS_02 6344 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_00_MV_CONTEXT_Y_PROBS_02_MASK (0x00FF0000) 6345 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_00_MV_CONTEXT_Y_PROBS_02_LSBMASK (0x000000FF) 6346 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_00_MV_CONTEXT_Y_PROBS_02_SHIFT (16) 6347 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_00_MV_CONTEXT_Y_PROBS_02_SIGNED_FIELD IMG_FALSE 6348 6349 // MSVDX_VEC_LINE_STORE_RAM, MV_CONTEXT_Y_PROBS_REG_00, MV_CONTEXT_Y_PROBS_03 6350 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_00_MV_CONTEXT_Y_PROBS_03_MASK (0xFF000000) 6351 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_00_MV_CONTEXT_Y_PROBS_03_LSBMASK (0x000000FF) 6352 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_00_MV_CONTEXT_Y_PROBS_03_SHIFT (24) 6353 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_00_MV_CONTEXT_Y_PROBS_03_SIGNED_FIELD IMG_FALSE 6354 6355 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_01_OFFSET (0x0BD0) 6356 6357 // MSVDX_VEC_LINE_STORE_RAM, MV_CONTEXT_Y_PROBS_REG_01, MV_CONTEXT_Y_PROBS_04 6358 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_01_MV_CONTEXT_Y_PROBS_04_MASK (0x000000FF) 6359 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_01_MV_CONTEXT_Y_PROBS_04_LSBMASK (0x000000FF) 6360 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_01_MV_CONTEXT_Y_PROBS_04_SHIFT (0) 6361 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_01_MV_CONTEXT_Y_PROBS_04_SIGNED_FIELD IMG_FALSE 6362 6363 // MSVDX_VEC_LINE_STORE_RAM, MV_CONTEXT_Y_PROBS_REG_01, MV_CONTEXT_Y_PROBS_05 6364 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_01_MV_CONTEXT_Y_PROBS_05_MASK (0x0000FF00) 6365 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_01_MV_CONTEXT_Y_PROBS_05_LSBMASK (0x000000FF) 6366 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_01_MV_CONTEXT_Y_PROBS_05_SHIFT (8) 6367 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_01_MV_CONTEXT_Y_PROBS_05_SIGNED_FIELD IMG_FALSE 6368 6369 // MSVDX_VEC_LINE_STORE_RAM, MV_CONTEXT_Y_PROBS_REG_01, MV_CONTEXT_Y_PROBS_06 6370 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_01_MV_CONTEXT_Y_PROBS_06_MASK (0x00FF0000) 6371 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_01_MV_CONTEXT_Y_PROBS_06_LSBMASK (0x000000FF) 6372 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_01_MV_CONTEXT_Y_PROBS_06_SHIFT (16) 6373 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_01_MV_CONTEXT_Y_PROBS_06_SIGNED_FIELD IMG_FALSE 6374 6375 // MSVDX_VEC_LINE_STORE_RAM, MV_CONTEXT_Y_PROBS_REG_01, MV_CONTEXT_Y_PROBS_07 6376 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_01_MV_CONTEXT_Y_PROBS_07_MASK (0xFF000000) 6377 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_01_MV_CONTEXT_Y_PROBS_07_LSBMASK (0x000000FF) 6378 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_01_MV_CONTEXT_Y_PROBS_07_SHIFT (24) 6379 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_01_MV_CONTEXT_Y_PROBS_07_SIGNED_FIELD IMG_FALSE 6380 6381 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_02_OFFSET (0x0BD4) 6382 6383 // MSVDX_VEC_LINE_STORE_RAM, MV_CONTEXT_Y_PROBS_REG_02, MV_CONTEXT_Y_PROBS_08 6384 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_02_MV_CONTEXT_Y_PROBS_08_MASK (0x000000FF) 6385 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_02_MV_CONTEXT_Y_PROBS_08_LSBMASK (0x000000FF) 6386 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_02_MV_CONTEXT_Y_PROBS_08_SHIFT (0) 6387 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_02_MV_CONTEXT_Y_PROBS_08_SIGNED_FIELD IMG_FALSE 6388 6389 // MSVDX_VEC_LINE_STORE_RAM, MV_CONTEXT_Y_PROBS_REG_02, MV_CONTEXT_Y_PROBS_09 6390 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_02_MV_CONTEXT_Y_PROBS_09_MASK (0x0000FF00) 6391 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_02_MV_CONTEXT_Y_PROBS_09_LSBMASK (0x000000FF) 6392 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_02_MV_CONTEXT_Y_PROBS_09_SHIFT (8) 6393 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_02_MV_CONTEXT_Y_PROBS_09_SIGNED_FIELD IMG_FALSE 6394 6395 // MSVDX_VEC_LINE_STORE_RAM, MV_CONTEXT_Y_PROBS_REG_02, MV_CONTEXT_Y_PROBS_10 6396 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_02_MV_CONTEXT_Y_PROBS_10_MASK (0x00FF0000) 6397 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_02_MV_CONTEXT_Y_PROBS_10_LSBMASK (0x000000FF) 6398 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_02_MV_CONTEXT_Y_PROBS_10_SHIFT (16) 6399 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_02_MV_CONTEXT_Y_PROBS_10_SIGNED_FIELD IMG_FALSE 6400 6401 // MSVDX_VEC_LINE_STORE_RAM, MV_CONTEXT_Y_PROBS_REG_02, MV_CONTEXT_Y_PROBS_11 6402 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_02_MV_CONTEXT_Y_PROBS_11_MASK (0xFF000000) 6403 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_02_MV_CONTEXT_Y_PROBS_11_LSBMASK (0x000000FF) 6404 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_02_MV_CONTEXT_Y_PROBS_11_SHIFT (24) 6405 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_02_MV_CONTEXT_Y_PROBS_11_SIGNED_FIELD IMG_FALSE 6406 6407 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_03_OFFSET (0x0BD8) 6408 6409 // MSVDX_VEC_LINE_STORE_RAM, MV_CONTEXT_Y_PROBS_REG_03, MV_CONTEXT_Y_PROBS_12 6410 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_03_MV_CONTEXT_Y_PROBS_12_MASK (0x000000FF) 6411 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_03_MV_CONTEXT_Y_PROBS_12_LSBMASK (0x000000FF) 6412 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_03_MV_CONTEXT_Y_PROBS_12_SHIFT (0) 6413 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_03_MV_CONTEXT_Y_PROBS_12_SIGNED_FIELD IMG_FALSE 6414 6415 // MSVDX_VEC_LINE_STORE_RAM, MV_CONTEXT_Y_PROBS_REG_03, MV_CONTEXT_Y_PROBS_13 6416 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_03_MV_CONTEXT_Y_PROBS_13_MASK (0x0000FF00) 6417 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_03_MV_CONTEXT_Y_PROBS_13_LSBMASK (0x000000FF) 6418 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_03_MV_CONTEXT_Y_PROBS_13_SHIFT (8) 6419 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_03_MV_CONTEXT_Y_PROBS_13_SIGNED_FIELD IMG_FALSE 6420 6421 // MSVDX_VEC_LINE_STORE_RAM, MV_CONTEXT_Y_PROBS_REG_03, MV_CONTEXT_Y_PROBS_14 6422 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_03_MV_CONTEXT_Y_PROBS_14_MASK (0x00FF0000) 6423 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_03_MV_CONTEXT_Y_PROBS_14_LSBMASK (0x000000FF) 6424 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_03_MV_CONTEXT_Y_PROBS_14_SHIFT (16) 6425 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_03_MV_CONTEXT_Y_PROBS_14_SIGNED_FIELD IMG_FALSE 6426 6427 // MSVDX_VEC_LINE_STORE_RAM, MV_CONTEXT_Y_PROBS_REG_03, MV_CONTEXT_Y_PROBS_15 6428 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_03_MV_CONTEXT_Y_PROBS_15_MASK (0xFF000000) 6429 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_03_MV_CONTEXT_Y_PROBS_15_LSBMASK (0x000000FF) 6430 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_03_MV_CONTEXT_Y_PROBS_15_SHIFT (24) 6431 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_03_MV_CONTEXT_Y_PROBS_15_SIGNED_FIELD IMG_FALSE 6432 6433 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_04_OFFSET (0x0BDC) 6434 6435 // MSVDX_VEC_LINE_STORE_RAM, MV_CONTEXT_Y_PROBS_REG_04, MV_CONTEXT_Y_PROBS_16 6436 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_04_MV_CONTEXT_Y_PROBS_16_MASK (0x000000FF) 6437 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_04_MV_CONTEXT_Y_PROBS_16_LSBMASK (0x000000FF) 6438 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_04_MV_CONTEXT_Y_PROBS_16_SHIFT (0) 6439 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_04_MV_CONTEXT_Y_PROBS_16_SIGNED_FIELD IMG_FALSE 6440 6441 // MSVDX_VEC_LINE_STORE_RAM, MV_CONTEXT_Y_PROBS_REG_04, MV_CONTEXT_Y_PROBS_17 6442 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_04_MV_CONTEXT_Y_PROBS_17_MASK (0x0000FF00) 6443 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_04_MV_CONTEXT_Y_PROBS_17_LSBMASK (0x000000FF) 6444 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_04_MV_CONTEXT_Y_PROBS_17_SHIFT (8) 6445 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_04_MV_CONTEXT_Y_PROBS_17_SIGNED_FIELD IMG_FALSE 6446 6447 // MSVDX_VEC_LINE_STORE_RAM, MV_CONTEXT_Y_PROBS_REG_04, MV_CONTEXT_Y_PROBS_18 6448 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_04_MV_CONTEXT_Y_PROBS_18_MASK (0x00FF0000) 6449 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_04_MV_CONTEXT_Y_PROBS_18_LSBMASK (0x000000FF) 6450 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_04_MV_CONTEXT_Y_PROBS_18_SHIFT (16) 6451 #define MSVDX_VEC_LINE_STORE_RAM_MV_CONTEXT_Y_PROBS_REG_04_MV_CONTEXT_Y_PROBS_18_SIGNED_FIELD IMG_FALSE 6452 6453 #define MSVDX_VEC_LINE_STORE_RAM_MV_PARTITION_PROBS_REG_00_OFFSET (0x0BE0) 6454 6455 // MSVDX_VEC_LINE_STORE_RAM, MV_PARTITION_PROBS_REG_00, MV_PARTITION_PROBS_00 6456 #define MSVDX_VEC_LINE_STORE_RAM_MV_PARTITION_PROBS_REG_00_MV_PARTITION_PROBS_00_MASK (0x000000FF) 6457 #define MSVDX_VEC_LINE_STORE_RAM_MV_PARTITION_PROBS_REG_00_MV_PARTITION_PROBS_00_LSBMASK (0x000000FF) 6458 #define MSVDX_VEC_LINE_STORE_RAM_MV_PARTITION_PROBS_REG_00_MV_PARTITION_PROBS_00_SHIFT (0) 6459 #define MSVDX_VEC_LINE_STORE_RAM_MV_PARTITION_PROBS_REG_00_MV_PARTITION_PROBS_00_SIGNED_FIELD IMG_FALSE 6460 6461 // MSVDX_VEC_LINE_STORE_RAM, MV_PARTITION_PROBS_REG_00, MV_PARTITION_PROBS_01 6462 #define MSVDX_VEC_LINE_STORE_RAM_MV_PARTITION_PROBS_REG_00_MV_PARTITION_PROBS_01_MASK (0x0000FF00) 6463 #define MSVDX_VEC_LINE_STORE_RAM_MV_PARTITION_PROBS_REG_00_MV_PARTITION_PROBS_01_LSBMASK (0x000000FF) 6464 #define MSVDX_VEC_LINE_STORE_RAM_MV_PARTITION_PROBS_REG_00_MV_PARTITION_PROBS_01_SHIFT (8) 6465 #define MSVDX_VEC_LINE_STORE_RAM_MV_PARTITION_PROBS_REG_00_MV_PARTITION_PROBS_01_SIGNED_FIELD IMG_FALSE 6466 6467 // MSVDX_VEC_LINE_STORE_RAM, MV_PARTITION_PROBS_REG_00, MV_PARTITION_PROBS_02 6468 #define MSVDX_VEC_LINE_STORE_RAM_MV_PARTITION_PROBS_REG_00_MV_PARTITION_PROBS_02_MASK (0x00FF0000) 6469 #define MSVDX_VEC_LINE_STORE_RAM_MV_PARTITION_PROBS_REG_00_MV_PARTITION_PROBS_02_LSBMASK (0x000000FF) 6470 #define MSVDX_VEC_LINE_STORE_RAM_MV_PARTITION_PROBS_REG_00_MV_PARTITION_PROBS_02_SHIFT (16) 6471 #define MSVDX_VEC_LINE_STORE_RAM_MV_PARTITION_PROBS_REG_00_MV_PARTITION_PROBS_02_SIGNED_FIELD IMG_FALSE 6472 6473 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_00_OFFSET (0x0BE4) 6474 6475 // MSVDX_VEC_LINE_STORE_RAM, SUB_MV_REF_PROBS_REG_00, SUB_MV_REF_PROBS_00 6476 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_00_SUB_MV_REF_PROBS_00_MASK (0x000000FF) 6477 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_00_SUB_MV_REF_PROBS_00_LSBMASK (0x000000FF) 6478 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_00_SUB_MV_REF_PROBS_00_SHIFT (0) 6479 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_00_SUB_MV_REF_PROBS_00_SIGNED_FIELD IMG_FALSE 6480 6481 // MSVDX_VEC_LINE_STORE_RAM, SUB_MV_REF_PROBS_REG_00, SUB_MV_REF_PROBS_01 6482 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_00_SUB_MV_REF_PROBS_01_MASK (0x0000FF00) 6483 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_00_SUB_MV_REF_PROBS_01_LSBMASK (0x000000FF) 6484 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_00_SUB_MV_REF_PROBS_01_SHIFT (8) 6485 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_00_SUB_MV_REF_PROBS_01_SIGNED_FIELD IMG_FALSE 6486 6487 // MSVDX_VEC_LINE_STORE_RAM, SUB_MV_REF_PROBS_REG_00, SUB_MV_REF_PROBS_02 6488 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_00_SUB_MV_REF_PROBS_02_MASK (0x00FF0000) 6489 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_00_SUB_MV_REF_PROBS_02_LSBMASK (0x000000FF) 6490 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_00_SUB_MV_REF_PROBS_02_SHIFT (16) 6491 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_00_SUB_MV_REF_PROBS_02_SIGNED_FIELD IMG_FALSE 6492 6493 // MSVDX_VEC_LINE_STORE_RAM, SUB_MV_REF_PROBS_REG_00, SUB_MV_REF_PROBS_03 6494 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_00_SUB_MV_REF_PROBS_03_MASK (0xFF000000) 6495 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_00_SUB_MV_REF_PROBS_03_LSBMASK (0x000000FF) 6496 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_00_SUB_MV_REF_PROBS_03_SHIFT (24) 6497 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_00_SUB_MV_REF_PROBS_03_SIGNED_FIELD IMG_FALSE 6498 6499 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_01_OFFSET (0x0BE8) 6500 6501 // MSVDX_VEC_LINE_STORE_RAM, SUB_MV_REF_PROBS_REG_01, SUB_MV_REF_PROBS_04 6502 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_01_SUB_MV_REF_PROBS_04_MASK (0x000000FF) 6503 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_01_SUB_MV_REF_PROBS_04_LSBMASK (0x000000FF) 6504 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_01_SUB_MV_REF_PROBS_04_SHIFT (0) 6505 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_01_SUB_MV_REF_PROBS_04_SIGNED_FIELD IMG_FALSE 6506 6507 // MSVDX_VEC_LINE_STORE_RAM, SUB_MV_REF_PROBS_REG_01, SUB_MV_REF_PROBS_05 6508 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_01_SUB_MV_REF_PROBS_05_MASK (0x0000FF00) 6509 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_01_SUB_MV_REF_PROBS_05_LSBMASK (0x000000FF) 6510 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_01_SUB_MV_REF_PROBS_05_SHIFT (8) 6511 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_01_SUB_MV_REF_PROBS_05_SIGNED_FIELD IMG_FALSE 6512 6513 // MSVDX_VEC_LINE_STORE_RAM, SUB_MV_REF_PROBS_REG_01, SUB_MV_REF_PROBS_06 6514 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_01_SUB_MV_REF_PROBS_06_MASK (0x00FF0000) 6515 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_01_SUB_MV_REF_PROBS_06_LSBMASK (0x000000FF) 6516 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_01_SUB_MV_REF_PROBS_06_SHIFT (16) 6517 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_01_SUB_MV_REF_PROBS_06_SIGNED_FIELD IMG_FALSE 6518 6519 // MSVDX_VEC_LINE_STORE_RAM, SUB_MV_REF_PROBS_REG_01, SUB_MV_REF_PROBS_07 6520 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_01_SUB_MV_REF_PROBS_07_MASK (0xFF000000) 6521 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_01_SUB_MV_REF_PROBS_07_LSBMASK (0x000000FF) 6522 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_01_SUB_MV_REF_PROBS_07_SHIFT (24) 6523 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_01_SUB_MV_REF_PROBS_07_SIGNED_FIELD IMG_FALSE 6524 6525 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_02_OFFSET (0x0BEC) 6526 6527 // MSVDX_VEC_LINE_STORE_RAM, SUB_MV_REF_PROBS_REG_02, SUB_MV_REF_PROBS_08 6528 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_02_SUB_MV_REF_PROBS_08_MASK (0x000000FF) 6529 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_02_SUB_MV_REF_PROBS_08_LSBMASK (0x000000FF) 6530 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_02_SUB_MV_REF_PROBS_08_SHIFT (0) 6531 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_02_SUB_MV_REF_PROBS_08_SIGNED_FIELD IMG_FALSE 6532 6533 // MSVDX_VEC_LINE_STORE_RAM, SUB_MV_REF_PROBS_REG_02, SUB_MV_REF_PROBS_09 6534 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_02_SUB_MV_REF_PROBS_09_MASK (0x0000FF00) 6535 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_02_SUB_MV_REF_PROBS_09_LSBMASK (0x000000FF) 6536 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_02_SUB_MV_REF_PROBS_09_SHIFT (8) 6537 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_02_SUB_MV_REF_PROBS_09_SIGNED_FIELD IMG_FALSE 6538 6539 // MSVDX_VEC_LINE_STORE_RAM, SUB_MV_REF_PROBS_REG_02, SUB_MV_REF_PROBS_10 6540 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_02_SUB_MV_REF_PROBS_10_MASK (0x00FF0000) 6541 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_02_SUB_MV_REF_PROBS_10_LSBMASK (0x000000FF) 6542 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_02_SUB_MV_REF_PROBS_10_SHIFT (16) 6543 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_02_SUB_MV_REF_PROBS_10_SIGNED_FIELD IMG_FALSE 6544 6545 // MSVDX_VEC_LINE_STORE_RAM, SUB_MV_REF_PROBS_REG_02, SUB_MV_REF_PROBS_11 6546 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_02_SUB_MV_REF_PROBS_11_MASK (0xFF000000) 6547 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_02_SUB_MV_REF_PROBS_11_LSBMASK (0x000000FF) 6548 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_02_SUB_MV_REF_PROBS_11_SHIFT (24) 6549 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_02_SUB_MV_REF_PROBS_11_SIGNED_FIELD IMG_FALSE 6550 6551 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_03_OFFSET (0x0BF0) 6552 6553 // MSVDX_VEC_LINE_STORE_RAM, SUB_MV_REF_PROBS_REG_03, SUB_MV_REF_PROBS_12 6554 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_03_SUB_MV_REF_PROBS_12_MASK (0x000000FF) 6555 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_03_SUB_MV_REF_PROBS_12_LSBMASK (0x000000FF) 6556 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_03_SUB_MV_REF_PROBS_12_SHIFT (0) 6557 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_03_SUB_MV_REF_PROBS_12_SIGNED_FIELD IMG_FALSE 6558 6559 // MSVDX_VEC_LINE_STORE_RAM, SUB_MV_REF_PROBS_REG_03, SUB_MV_REF_PROBS_13 6560 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_03_SUB_MV_REF_PROBS_13_MASK (0x0000FF00) 6561 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_03_SUB_MV_REF_PROBS_13_LSBMASK (0x000000FF) 6562 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_03_SUB_MV_REF_PROBS_13_SHIFT (8) 6563 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_03_SUB_MV_REF_PROBS_13_SIGNED_FIELD IMG_FALSE 6564 6565 // MSVDX_VEC_LINE_STORE_RAM, SUB_MV_REF_PROBS_REG_03, SUB_MV_REF_PROBS_14 6566 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_03_SUB_MV_REF_PROBS_14_MASK (0x00FF0000) 6567 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_03_SUB_MV_REF_PROBS_14_LSBMASK (0x000000FF) 6568 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_03_SUB_MV_REF_PROBS_14_SHIFT (16) 6569 #define MSVDX_VEC_LINE_STORE_RAM_SUB_MV_REF_PROBS_REG_03_SUB_MV_REF_PROBS_14_SIGNED_FIELD IMG_FALSE 6570 6571 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_00_OFFSET (0x0BF4) 6572 6573 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_00, COEFF_PROBS_00 6574 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_00_COEFF_PROBS_00_MASK (0x000000FF) 6575 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_00_COEFF_PROBS_00_LSBMASK (0x000000FF) 6576 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_00_COEFF_PROBS_00_SHIFT (0) 6577 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_00_COEFF_PROBS_00_SIGNED_FIELD IMG_FALSE 6578 6579 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_00, COEFF_PROBS_01 6580 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_00_COEFF_PROBS_01_MASK (0x0000FF00) 6581 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_00_COEFF_PROBS_01_LSBMASK (0x000000FF) 6582 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_00_COEFF_PROBS_01_SHIFT (8) 6583 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_00_COEFF_PROBS_01_SIGNED_FIELD IMG_FALSE 6584 6585 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_00, COEFF_PROBS_02 6586 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_00_COEFF_PROBS_02_MASK (0x00FF0000) 6587 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_00_COEFF_PROBS_02_LSBMASK (0x000000FF) 6588 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_00_COEFF_PROBS_02_SHIFT (16) 6589 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_00_COEFF_PROBS_02_SIGNED_FIELD IMG_FALSE 6590 6591 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_00, COEFF_PROBS_03 6592 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_00_COEFF_PROBS_03_MASK (0xFF000000) 6593 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_00_COEFF_PROBS_03_LSBMASK (0x000000FF) 6594 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_00_COEFF_PROBS_03_SHIFT (24) 6595 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_00_COEFF_PROBS_03_SIGNED_FIELD IMG_FALSE 6596 6597 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_01_OFFSET (0x0BF8) 6598 6599 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_01, COEFF_PROBS_04 6600 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_01_COEFF_PROBS_04_MASK (0x000000FF) 6601 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_01_COEFF_PROBS_04_LSBMASK (0x000000FF) 6602 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_01_COEFF_PROBS_04_SHIFT (0) 6603 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_01_COEFF_PROBS_04_SIGNED_FIELD IMG_FALSE 6604 6605 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_01, COEFF_PROBS_05 6606 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_01_COEFF_PROBS_05_MASK (0x0000FF00) 6607 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_01_COEFF_PROBS_05_LSBMASK (0x000000FF) 6608 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_01_COEFF_PROBS_05_SHIFT (8) 6609 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_01_COEFF_PROBS_05_SIGNED_FIELD IMG_FALSE 6610 6611 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_01, COEFF_PROBS_06 6612 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_01_COEFF_PROBS_06_MASK (0x00FF0000) 6613 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_01_COEFF_PROBS_06_LSBMASK (0x000000FF) 6614 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_01_COEFF_PROBS_06_SHIFT (16) 6615 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_01_COEFF_PROBS_06_SIGNED_FIELD IMG_FALSE 6616 6617 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_01, COEFF_PROBS_07 6618 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_01_COEFF_PROBS_07_MASK (0xFF000000) 6619 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_01_COEFF_PROBS_07_LSBMASK (0x000000FF) 6620 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_01_COEFF_PROBS_07_SHIFT (24) 6621 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_01_COEFF_PROBS_07_SIGNED_FIELD IMG_FALSE 6622 6623 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_02_OFFSET (0x0BFC) 6624 6625 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_02, COEFF_PROBS_08 6626 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_02_COEFF_PROBS_08_MASK (0x000000FF) 6627 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_02_COEFF_PROBS_08_LSBMASK (0x000000FF) 6628 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_02_COEFF_PROBS_08_SHIFT (0) 6629 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_02_COEFF_PROBS_08_SIGNED_FIELD IMG_FALSE 6630 6631 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_02, COEFF_PROBS_09 6632 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_02_COEFF_PROBS_09_MASK (0x0000FF00) 6633 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_02_COEFF_PROBS_09_LSBMASK (0x000000FF) 6634 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_02_COEFF_PROBS_09_SHIFT (8) 6635 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_02_COEFF_PROBS_09_SIGNED_FIELD IMG_FALSE 6636 6637 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_02, COEFF_PROBS_10 6638 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_02_COEFF_PROBS_10_MASK (0x00FF0000) 6639 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_02_COEFF_PROBS_10_LSBMASK (0x000000FF) 6640 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_02_COEFF_PROBS_10_SHIFT (16) 6641 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_02_COEFF_PROBS_10_SIGNED_FIELD IMG_FALSE 6642 6643 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_02, COEFF_PROBS_11 6644 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_02_COEFF_PROBS_11_MASK (0xFF000000) 6645 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_02_COEFF_PROBS_11_LSBMASK (0x000000FF) 6646 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_02_COEFF_PROBS_11_SHIFT (24) 6647 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_02_COEFF_PROBS_11_SIGNED_FIELD IMG_FALSE 6648 6649 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_03_OFFSET (0x0C00) 6650 6651 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_03, COEFF_PROBS_12 6652 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_03_COEFF_PROBS_12_MASK (0x000000FF) 6653 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_03_COEFF_PROBS_12_LSBMASK (0x000000FF) 6654 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_03_COEFF_PROBS_12_SHIFT (0) 6655 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_03_COEFF_PROBS_12_SIGNED_FIELD IMG_FALSE 6656 6657 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_03, COEFF_PROBS_13 6658 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_03_COEFF_PROBS_13_MASK (0x0000FF00) 6659 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_03_COEFF_PROBS_13_LSBMASK (0x000000FF) 6660 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_03_COEFF_PROBS_13_SHIFT (8) 6661 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_03_COEFF_PROBS_13_SIGNED_FIELD IMG_FALSE 6662 6663 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_03, COEFF_PROBS_14 6664 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_03_COEFF_PROBS_14_MASK (0x00FF0000) 6665 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_03_COEFF_PROBS_14_LSBMASK (0x000000FF) 6666 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_03_COEFF_PROBS_14_SHIFT (16) 6667 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_03_COEFF_PROBS_14_SIGNED_FIELD IMG_FALSE 6668 6669 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_03, COEFF_PROBS_15 6670 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_03_COEFF_PROBS_15_MASK (0xFF000000) 6671 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_03_COEFF_PROBS_15_LSBMASK (0x000000FF) 6672 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_03_COEFF_PROBS_15_SHIFT (24) 6673 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_03_COEFF_PROBS_15_SIGNED_FIELD IMG_FALSE 6674 6675 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_04_OFFSET (0x0C04) 6676 6677 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_04, COEFF_PROBS_16 6678 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_04_COEFF_PROBS_16_MASK (0x000000FF) 6679 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_04_COEFF_PROBS_16_LSBMASK (0x000000FF) 6680 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_04_COEFF_PROBS_16_SHIFT (0) 6681 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_04_COEFF_PROBS_16_SIGNED_FIELD IMG_FALSE 6682 6683 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_04, COEFF_PROBS_17 6684 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_04_COEFF_PROBS_17_MASK (0x0000FF00) 6685 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_04_COEFF_PROBS_17_LSBMASK (0x000000FF) 6686 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_04_COEFF_PROBS_17_SHIFT (8) 6687 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_04_COEFF_PROBS_17_SIGNED_FIELD IMG_FALSE 6688 6689 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_04, COEFF_PROBS_18 6690 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_04_COEFF_PROBS_18_MASK (0x00FF0000) 6691 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_04_COEFF_PROBS_18_LSBMASK (0x000000FF) 6692 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_04_COEFF_PROBS_18_SHIFT (16) 6693 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_04_COEFF_PROBS_18_SIGNED_FIELD IMG_FALSE 6694 6695 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_04, COEFF_PROBS_19 6696 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_04_COEFF_PROBS_19_MASK (0xFF000000) 6697 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_04_COEFF_PROBS_19_LSBMASK (0x000000FF) 6698 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_04_COEFF_PROBS_19_SHIFT (24) 6699 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_04_COEFF_PROBS_19_SIGNED_FIELD IMG_FALSE 6700 6701 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_05_OFFSET (0x0C08) 6702 6703 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_05, COEFF_PROBS_20 6704 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_05_COEFF_PROBS_20_MASK (0x000000FF) 6705 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_05_COEFF_PROBS_20_LSBMASK (0x000000FF) 6706 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_05_COEFF_PROBS_20_SHIFT (0) 6707 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_05_COEFF_PROBS_20_SIGNED_FIELD IMG_FALSE 6708 6709 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_05, COEFF_PROBS_21 6710 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_05_COEFF_PROBS_21_MASK (0x0000FF00) 6711 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_05_COEFF_PROBS_21_LSBMASK (0x000000FF) 6712 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_05_COEFF_PROBS_21_SHIFT (8) 6713 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_05_COEFF_PROBS_21_SIGNED_FIELD IMG_FALSE 6714 6715 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_05, COEFF_PROBS_22 6716 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_05_COEFF_PROBS_22_MASK (0x00FF0000) 6717 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_05_COEFF_PROBS_22_LSBMASK (0x000000FF) 6718 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_05_COEFF_PROBS_22_SHIFT (16) 6719 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_05_COEFF_PROBS_22_SIGNED_FIELD IMG_FALSE 6720 6721 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_05, COEFF_PROBS_23 6722 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_05_COEFF_PROBS_23_MASK (0xFF000000) 6723 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_05_COEFF_PROBS_23_LSBMASK (0x000000FF) 6724 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_05_COEFF_PROBS_23_SHIFT (24) 6725 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_05_COEFF_PROBS_23_SIGNED_FIELD IMG_FALSE 6726 6727 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_06_OFFSET (0x0C0C) 6728 6729 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_06, COEFF_PROBS_24 6730 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_06_COEFF_PROBS_24_MASK (0x000000FF) 6731 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_06_COEFF_PROBS_24_LSBMASK (0x000000FF) 6732 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_06_COEFF_PROBS_24_SHIFT (0) 6733 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_06_COEFF_PROBS_24_SIGNED_FIELD IMG_FALSE 6734 6735 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_06, COEFF_PROBS_25 6736 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_06_COEFF_PROBS_25_MASK (0x0000FF00) 6737 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_06_COEFF_PROBS_25_LSBMASK (0x000000FF) 6738 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_06_COEFF_PROBS_25_SHIFT (8) 6739 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_06_COEFF_PROBS_25_SIGNED_FIELD IMG_FALSE 6740 6741 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_06, COEFF_PROBS_26 6742 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_06_COEFF_PROBS_26_MASK (0x00FF0000) 6743 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_06_COEFF_PROBS_26_LSBMASK (0x000000FF) 6744 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_06_COEFF_PROBS_26_SHIFT (16) 6745 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_06_COEFF_PROBS_26_SIGNED_FIELD IMG_FALSE 6746 6747 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_06, COEFF_PROBS_27 6748 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_06_COEFF_PROBS_27_MASK (0xFF000000) 6749 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_06_COEFF_PROBS_27_LSBMASK (0x000000FF) 6750 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_06_COEFF_PROBS_27_SHIFT (24) 6751 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_06_COEFF_PROBS_27_SIGNED_FIELD IMG_FALSE 6752 6753 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_07_OFFSET (0x0C10) 6754 6755 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_07, COEFF_PROBS_28 6756 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_07_COEFF_PROBS_28_MASK (0x000000FF) 6757 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_07_COEFF_PROBS_28_LSBMASK (0x000000FF) 6758 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_07_COEFF_PROBS_28_SHIFT (0) 6759 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_07_COEFF_PROBS_28_SIGNED_FIELD IMG_FALSE 6760 6761 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_07, COEFF_PROBS_29 6762 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_07_COEFF_PROBS_29_MASK (0x0000FF00) 6763 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_07_COEFF_PROBS_29_LSBMASK (0x000000FF) 6764 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_07_COEFF_PROBS_29_SHIFT (8) 6765 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_07_COEFF_PROBS_29_SIGNED_FIELD IMG_FALSE 6766 6767 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_07, COEFF_PROBS_30 6768 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_07_COEFF_PROBS_30_MASK (0x00FF0000) 6769 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_07_COEFF_PROBS_30_LSBMASK (0x000000FF) 6770 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_07_COEFF_PROBS_30_SHIFT (16) 6771 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_07_COEFF_PROBS_30_SIGNED_FIELD IMG_FALSE 6772 6773 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_07, COEFF_PROBS_31 6774 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_07_COEFF_PROBS_31_MASK (0xFF000000) 6775 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_07_COEFF_PROBS_31_LSBMASK (0x000000FF) 6776 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_07_COEFF_PROBS_31_SHIFT (24) 6777 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_07_COEFF_PROBS_31_SIGNED_FIELD IMG_FALSE 6778 6779 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_08_OFFSET (0x0C14) 6780 6781 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_08, COEFF_PROBS_32 6782 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_08_COEFF_PROBS_32_MASK (0x000000FF) 6783 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_08_COEFF_PROBS_32_LSBMASK (0x000000FF) 6784 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_08_COEFF_PROBS_32_SHIFT (0) 6785 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_08_COEFF_PROBS_32_SIGNED_FIELD IMG_FALSE 6786 6787 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_08, COEFF_PROBS_33 6788 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_08_COEFF_PROBS_33_MASK (0x0000FF00) 6789 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_08_COEFF_PROBS_33_LSBMASK (0x000000FF) 6790 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_08_COEFF_PROBS_33_SHIFT (8) 6791 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_08_COEFF_PROBS_33_SIGNED_FIELD IMG_FALSE 6792 6793 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_08, COEFF_PROBS_34 6794 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_08_COEFF_PROBS_34_MASK (0x00FF0000) 6795 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_08_COEFF_PROBS_34_LSBMASK (0x000000FF) 6796 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_08_COEFF_PROBS_34_SHIFT (16) 6797 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_08_COEFF_PROBS_34_SIGNED_FIELD IMG_FALSE 6798 6799 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_08, COEFF_PROBS_35 6800 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_08_COEFF_PROBS_35_MASK (0xFF000000) 6801 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_08_COEFF_PROBS_35_LSBMASK (0x000000FF) 6802 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_08_COEFF_PROBS_35_SHIFT (24) 6803 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_08_COEFF_PROBS_35_SIGNED_FIELD IMG_FALSE 6804 6805 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_09_OFFSET (0x0C18) 6806 6807 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_09, COEFF_PROBS_36 6808 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_09_COEFF_PROBS_36_MASK (0x000000FF) 6809 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_09_COEFF_PROBS_36_LSBMASK (0x000000FF) 6810 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_09_COEFF_PROBS_36_SHIFT (0) 6811 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_09_COEFF_PROBS_36_SIGNED_FIELD IMG_FALSE 6812 6813 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_09, COEFF_PROBS_37 6814 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_09_COEFF_PROBS_37_MASK (0x0000FF00) 6815 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_09_COEFF_PROBS_37_LSBMASK (0x000000FF) 6816 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_09_COEFF_PROBS_37_SHIFT (8) 6817 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_09_COEFF_PROBS_37_SIGNED_FIELD IMG_FALSE 6818 6819 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_09, COEFF_PROBS_38 6820 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_09_COEFF_PROBS_38_MASK (0x00FF0000) 6821 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_09_COEFF_PROBS_38_LSBMASK (0x000000FF) 6822 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_09_COEFF_PROBS_38_SHIFT (16) 6823 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_09_COEFF_PROBS_38_SIGNED_FIELD IMG_FALSE 6824 6825 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_09, COEFF_PROBS_39 6826 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_09_COEFF_PROBS_39_MASK (0xFF000000) 6827 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_09_COEFF_PROBS_39_LSBMASK (0x000000FF) 6828 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_09_COEFF_PROBS_39_SHIFT (24) 6829 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_09_COEFF_PROBS_39_SIGNED_FIELD IMG_FALSE 6830 6831 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_10_OFFSET (0x0C1C) 6832 6833 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_10, COEFF_PROBS_40 6834 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_10_COEFF_PROBS_40_MASK (0x000000FF) 6835 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_10_COEFF_PROBS_40_LSBMASK (0x000000FF) 6836 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_10_COEFF_PROBS_40_SHIFT (0) 6837 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_10_COEFF_PROBS_40_SIGNED_FIELD IMG_FALSE 6838 6839 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_10, COEFF_PROBS_41 6840 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_10_COEFF_PROBS_41_MASK (0x0000FF00) 6841 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_10_COEFF_PROBS_41_LSBMASK (0x000000FF) 6842 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_10_COEFF_PROBS_41_SHIFT (8) 6843 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_10_COEFF_PROBS_41_SIGNED_FIELD IMG_FALSE 6844 6845 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_10, COEFF_PROBS_42 6846 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_10_COEFF_PROBS_42_MASK (0x00FF0000) 6847 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_10_COEFF_PROBS_42_LSBMASK (0x000000FF) 6848 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_10_COEFF_PROBS_42_SHIFT (16) 6849 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_10_COEFF_PROBS_42_SIGNED_FIELD IMG_FALSE 6850 6851 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_10, COEFF_PROBS_43 6852 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_10_COEFF_PROBS_43_MASK (0xFF000000) 6853 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_10_COEFF_PROBS_43_LSBMASK (0x000000FF) 6854 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_10_COEFF_PROBS_43_SHIFT (24) 6855 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_10_COEFF_PROBS_43_SIGNED_FIELD IMG_FALSE 6856 6857 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_11_OFFSET (0x0C20) 6858 6859 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_11, COEFF_PROBS_44 6860 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_11_COEFF_PROBS_44_MASK (0x000000FF) 6861 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_11_COEFF_PROBS_44_LSBMASK (0x000000FF) 6862 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_11_COEFF_PROBS_44_SHIFT (0) 6863 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_11_COEFF_PROBS_44_SIGNED_FIELD IMG_FALSE 6864 6865 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_11, COEFF_PROBS_45 6866 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_11_COEFF_PROBS_45_MASK (0x0000FF00) 6867 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_11_COEFF_PROBS_45_LSBMASK (0x000000FF) 6868 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_11_COEFF_PROBS_45_SHIFT (8) 6869 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_11_COEFF_PROBS_45_SIGNED_FIELD IMG_FALSE 6870 6871 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_11, COEFF_PROBS_46 6872 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_11_COEFF_PROBS_46_MASK (0x00FF0000) 6873 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_11_COEFF_PROBS_46_LSBMASK (0x000000FF) 6874 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_11_COEFF_PROBS_46_SHIFT (16) 6875 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_11_COEFF_PROBS_46_SIGNED_FIELD IMG_FALSE 6876 6877 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_11, COEFF_PROBS_47 6878 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_11_COEFF_PROBS_47_MASK (0xFF000000) 6879 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_11_COEFF_PROBS_47_LSBMASK (0x000000FF) 6880 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_11_COEFF_PROBS_47_SHIFT (24) 6881 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_11_COEFF_PROBS_47_SIGNED_FIELD IMG_FALSE 6882 6883 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_12_OFFSET (0x0C24) 6884 6885 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_12, COEFF_PROBS_48 6886 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_12_COEFF_PROBS_48_MASK (0x000000FF) 6887 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_12_COEFF_PROBS_48_LSBMASK (0x000000FF) 6888 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_12_COEFF_PROBS_48_SHIFT (0) 6889 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_12_COEFF_PROBS_48_SIGNED_FIELD IMG_FALSE 6890 6891 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_12, COEFF_PROBS_49 6892 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_12_COEFF_PROBS_49_MASK (0x0000FF00) 6893 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_12_COEFF_PROBS_49_LSBMASK (0x000000FF) 6894 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_12_COEFF_PROBS_49_SHIFT (8) 6895 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_12_COEFF_PROBS_49_SIGNED_FIELD IMG_FALSE 6896 6897 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_12, COEFF_PROBS_50 6898 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_12_COEFF_PROBS_50_MASK (0x00FF0000) 6899 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_12_COEFF_PROBS_50_LSBMASK (0x000000FF) 6900 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_12_COEFF_PROBS_50_SHIFT (16) 6901 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_12_COEFF_PROBS_50_SIGNED_FIELD IMG_FALSE 6902 6903 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_12, COEFF_PROBS_51 6904 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_12_COEFF_PROBS_51_MASK (0xFF000000) 6905 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_12_COEFF_PROBS_51_LSBMASK (0x000000FF) 6906 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_12_COEFF_PROBS_51_SHIFT (24) 6907 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_12_COEFF_PROBS_51_SIGNED_FIELD IMG_FALSE 6908 6909 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_13_OFFSET (0x0C28) 6910 6911 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_13, COEFF_PROBS_52 6912 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_13_COEFF_PROBS_52_MASK (0x000000FF) 6913 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_13_COEFF_PROBS_52_LSBMASK (0x000000FF) 6914 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_13_COEFF_PROBS_52_SHIFT (0) 6915 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_13_COEFF_PROBS_52_SIGNED_FIELD IMG_FALSE 6916 6917 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_13, COEFF_PROBS_53 6918 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_13_COEFF_PROBS_53_MASK (0x0000FF00) 6919 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_13_COEFF_PROBS_53_LSBMASK (0x000000FF) 6920 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_13_COEFF_PROBS_53_SHIFT (8) 6921 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_13_COEFF_PROBS_53_SIGNED_FIELD IMG_FALSE 6922 6923 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_13, COEFF_PROBS_54 6924 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_13_COEFF_PROBS_54_MASK (0x00FF0000) 6925 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_13_COEFF_PROBS_54_LSBMASK (0x000000FF) 6926 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_13_COEFF_PROBS_54_SHIFT (16) 6927 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_13_COEFF_PROBS_54_SIGNED_FIELD IMG_FALSE 6928 6929 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_13, COEFF_PROBS_55 6930 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_13_COEFF_PROBS_55_MASK (0xFF000000) 6931 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_13_COEFF_PROBS_55_LSBMASK (0x000000FF) 6932 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_13_COEFF_PROBS_55_SHIFT (24) 6933 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_13_COEFF_PROBS_55_SIGNED_FIELD IMG_FALSE 6934 6935 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_14_OFFSET (0x0C2C) 6936 6937 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_14, COEFF_PROBS_56 6938 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_14_COEFF_PROBS_56_MASK (0x000000FF) 6939 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_14_COEFF_PROBS_56_LSBMASK (0x000000FF) 6940 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_14_COEFF_PROBS_56_SHIFT (0) 6941 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_14_COEFF_PROBS_56_SIGNED_FIELD IMG_FALSE 6942 6943 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_14, COEFF_PROBS_57 6944 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_14_COEFF_PROBS_57_MASK (0x0000FF00) 6945 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_14_COEFF_PROBS_57_LSBMASK (0x000000FF) 6946 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_14_COEFF_PROBS_57_SHIFT (8) 6947 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_14_COEFF_PROBS_57_SIGNED_FIELD IMG_FALSE 6948 6949 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_14, COEFF_PROBS_58 6950 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_14_COEFF_PROBS_58_MASK (0x00FF0000) 6951 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_14_COEFF_PROBS_58_LSBMASK (0x000000FF) 6952 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_14_COEFF_PROBS_58_SHIFT (16) 6953 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_14_COEFF_PROBS_58_SIGNED_FIELD IMG_FALSE 6954 6955 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_14, COEFF_PROBS_59 6956 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_14_COEFF_PROBS_59_MASK (0xFF000000) 6957 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_14_COEFF_PROBS_59_LSBMASK (0x000000FF) 6958 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_14_COEFF_PROBS_59_SHIFT (24) 6959 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_14_COEFF_PROBS_59_SIGNED_FIELD IMG_FALSE 6960 6961 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_15_OFFSET (0x0C30) 6962 6963 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_15, COEFF_PROBS_60 6964 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_15_COEFF_PROBS_60_MASK (0x000000FF) 6965 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_15_COEFF_PROBS_60_LSBMASK (0x000000FF) 6966 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_15_COEFF_PROBS_60_SHIFT (0) 6967 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_15_COEFF_PROBS_60_SIGNED_FIELD IMG_FALSE 6968 6969 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_15, COEFF_PROBS_61 6970 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_15_COEFF_PROBS_61_MASK (0x0000FF00) 6971 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_15_COEFF_PROBS_61_LSBMASK (0x000000FF) 6972 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_15_COEFF_PROBS_61_SHIFT (8) 6973 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_15_COEFF_PROBS_61_SIGNED_FIELD IMG_FALSE 6974 6975 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_15, COEFF_PROBS_62 6976 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_15_COEFF_PROBS_62_MASK (0x00FF0000) 6977 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_15_COEFF_PROBS_62_LSBMASK (0x000000FF) 6978 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_15_COEFF_PROBS_62_SHIFT (16) 6979 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_15_COEFF_PROBS_62_SIGNED_FIELD IMG_FALSE 6980 6981 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_15, COEFF_PROBS_63 6982 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_15_COEFF_PROBS_63_MASK (0xFF000000) 6983 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_15_COEFF_PROBS_63_LSBMASK (0x000000FF) 6984 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_15_COEFF_PROBS_63_SHIFT (24) 6985 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_15_COEFF_PROBS_63_SIGNED_FIELD IMG_FALSE 6986 6987 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_16_OFFSET (0x0C34) 6988 6989 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_16, COEFF_PROBS_64 6990 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_16_COEFF_PROBS_64_MASK (0x000000FF) 6991 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_16_COEFF_PROBS_64_LSBMASK (0x000000FF) 6992 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_16_COEFF_PROBS_64_SHIFT (0) 6993 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_16_COEFF_PROBS_64_SIGNED_FIELD IMG_FALSE 6994 6995 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_16, COEFF_PROBS_65 6996 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_16_COEFF_PROBS_65_MASK (0x0000FF00) 6997 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_16_COEFF_PROBS_65_LSBMASK (0x000000FF) 6998 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_16_COEFF_PROBS_65_SHIFT (8) 6999 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_16_COEFF_PROBS_65_SIGNED_FIELD IMG_FALSE 7000 7001 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_16, COEFF_PROBS_66 7002 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_16_COEFF_PROBS_66_MASK (0x00FF0000) 7003 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_16_COEFF_PROBS_66_LSBMASK (0x000000FF) 7004 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_16_COEFF_PROBS_66_SHIFT (16) 7005 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_16_COEFF_PROBS_66_SIGNED_FIELD IMG_FALSE 7006 7007 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_16, COEFF_PROBS_67 7008 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_16_COEFF_PROBS_67_MASK (0xFF000000) 7009 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_16_COEFF_PROBS_67_LSBMASK (0x000000FF) 7010 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_16_COEFF_PROBS_67_SHIFT (24) 7011 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_16_COEFF_PROBS_67_SIGNED_FIELD IMG_FALSE 7012 7013 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_17_OFFSET (0x0C38) 7014 7015 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_17, COEFF_PROBS_68 7016 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_17_COEFF_PROBS_68_MASK (0x000000FF) 7017 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_17_COEFF_PROBS_68_LSBMASK (0x000000FF) 7018 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_17_COEFF_PROBS_68_SHIFT (0) 7019 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_17_COEFF_PROBS_68_SIGNED_FIELD IMG_FALSE 7020 7021 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_17, COEFF_PROBS_69 7022 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_17_COEFF_PROBS_69_MASK (0x0000FF00) 7023 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_17_COEFF_PROBS_69_LSBMASK (0x000000FF) 7024 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_17_COEFF_PROBS_69_SHIFT (8) 7025 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_17_COEFF_PROBS_69_SIGNED_FIELD IMG_FALSE 7026 7027 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_17, COEFF_PROBS_70 7028 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_17_COEFF_PROBS_70_MASK (0x00FF0000) 7029 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_17_COEFF_PROBS_70_LSBMASK (0x000000FF) 7030 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_17_COEFF_PROBS_70_SHIFT (16) 7031 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_17_COEFF_PROBS_70_SIGNED_FIELD IMG_FALSE 7032 7033 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_17, COEFF_PROBS_71 7034 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_17_COEFF_PROBS_71_MASK (0xFF000000) 7035 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_17_COEFF_PROBS_71_LSBMASK (0x000000FF) 7036 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_17_COEFF_PROBS_71_SHIFT (24) 7037 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_17_COEFF_PROBS_71_SIGNED_FIELD IMG_FALSE 7038 7039 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_18_OFFSET (0x0C3C) 7040 7041 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_18, COEFF_PROBS_72 7042 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_18_COEFF_PROBS_72_MASK (0x000000FF) 7043 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_18_COEFF_PROBS_72_LSBMASK (0x000000FF) 7044 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_18_COEFF_PROBS_72_SHIFT (0) 7045 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_18_COEFF_PROBS_72_SIGNED_FIELD IMG_FALSE 7046 7047 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_18, COEFF_PROBS_73 7048 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_18_COEFF_PROBS_73_MASK (0x0000FF00) 7049 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_18_COEFF_PROBS_73_LSBMASK (0x000000FF) 7050 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_18_COEFF_PROBS_73_SHIFT (8) 7051 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_18_COEFF_PROBS_73_SIGNED_FIELD IMG_FALSE 7052 7053 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_18, COEFF_PROBS_74 7054 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_18_COEFF_PROBS_74_MASK (0x00FF0000) 7055 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_18_COEFF_PROBS_74_LSBMASK (0x000000FF) 7056 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_18_COEFF_PROBS_74_SHIFT (16) 7057 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_18_COEFF_PROBS_74_SIGNED_FIELD IMG_FALSE 7058 7059 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_18, COEFF_PROBS_75 7060 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_18_COEFF_PROBS_75_MASK (0xFF000000) 7061 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_18_COEFF_PROBS_75_LSBMASK (0x000000FF) 7062 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_18_COEFF_PROBS_75_SHIFT (24) 7063 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_18_COEFF_PROBS_75_SIGNED_FIELD IMG_FALSE 7064 7065 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_19_OFFSET (0x0C40) 7066 7067 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_19, COEFF_PROBS_76 7068 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_19_COEFF_PROBS_76_MASK (0x000000FF) 7069 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_19_COEFF_PROBS_76_LSBMASK (0x000000FF) 7070 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_19_COEFF_PROBS_76_SHIFT (0) 7071 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_19_COEFF_PROBS_76_SIGNED_FIELD IMG_FALSE 7072 7073 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_19, COEFF_PROBS_77 7074 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_19_COEFF_PROBS_77_MASK (0x0000FF00) 7075 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_19_COEFF_PROBS_77_LSBMASK (0x000000FF) 7076 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_19_COEFF_PROBS_77_SHIFT (8) 7077 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_19_COEFF_PROBS_77_SIGNED_FIELD IMG_FALSE 7078 7079 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_19, COEFF_PROBS_78 7080 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_19_COEFF_PROBS_78_MASK (0x00FF0000) 7081 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_19_COEFF_PROBS_78_LSBMASK (0x000000FF) 7082 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_19_COEFF_PROBS_78_SHIFT (16) 7083 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_19_COEFF_PROBS_78_SIGNED_FIELD IMG_FALSE 7084 7085 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_19, COEFF_PROBS_79 7086 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_19_COEFF_PROBS_79_MASK (0xFF000000) 7087 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_19_COEFF_PROBS_79_LSBMASK (0x000000FF) 7088 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_19_COEFF_PROBS_79_SHIFT (24) 7089 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_19_COEFF_PROBS_79_SIGNED_FIELD IMG_FALSE 7090 7091 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_20_OFFSET (0x0C44) 7092 7093 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_20, COEFF_PROBS_80 7094 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_20_COEFF_PROBS_80_MASK (0x000000FF) 7095 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_20_COEFF_PROBS_80_LSBMASK (0x000000FF) 7096 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_20_COEFF_PROBS_80_SHIFT (0) 7097 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_20_COEFF_PROBS_80_SIGNED_FIELD IMG_FALSE 7098 7099 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_20, COEFF_PROBS_81 7100 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_20_COEFF_PROBS_81_MASK (0x0000FF00) 7101 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_20_COEFF_PROBS_81_LSBMASK (0x000000FF) 7102 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_20_COEFF_PROBS_81_SHIFT (8) 7103 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_20_COEFF_PROBS_81_SIGNED_FIELD IMG_FALSE 7104 7105 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_20, COEFF_PROBS_82 7106 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_20_COEFF_PROBS_82_MASK (0x00FF0000) 7107 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_20_COEFF_PROBS_82_LSBMASK (0x000000FF) 7108 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_20_COEFF_PROBS_82_SHIFT (16) 7109 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_20_COEFF_PROBS_82_SIGNED_FIELD IMG_FALSE 7110 7111 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_20, COEFF_PROBS_83 7112 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_20_COEFF_PROBS_83_MASK (0xFF000000) 7113 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_20_COEFF_PROBS_83_LSBMASK (0x000000FF) 7114 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_20_COEFF_PROBS_83_SHIFT (24) 7115 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_20_COEFF_PROBS_83_SIGNED_FIELD IMG_FALSE 7116 7117 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_21_OFFSET (0x0C48) 7118 7119 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_21, COEFF_PROBS_84 7120 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_21_COEFF_PROBS_84_MASK (0x000000FF) 7121 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_21_COEFF_PROBS_84_LSBMASK (0x000000FF) 7122 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_21_COEFF_PROBS_84_SHIFT (0) 7123 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_21_COEFF_PROBS_84_SIGNED_FIELD IMG_FALSE 7124 7125 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_21, COEFF_PROBS_85 7126 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_21_COEFF_PROBS_85_MASK (0x0000FF00) 7127 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_21_COEFF_PROBS_85_LSBMASK (0x000000FF) 7128 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_21_COEFF_PROBS_85_SHIFT (8) 7129 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_21_COEFF_PROBS_85_SIGNED_FIELD IMG_FALSE 7130 7131 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_21, COEFF_PROBS_86 7132 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_21_COEFF_PROBS_86_MASK (0x00FF0000) 7133 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_21_COEFF_PROBS_86_LSBMASK (0x000000FF) 7134 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_21_COEFF_PROBS_86_SHIFT (16) 7135 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_21_COEFF_PROBS_86_SIGNED_FIELD IMG_FALSE 7136 7137 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_21, COEFF_PROBS_87 7138 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_21_COEFF_PROBS_87_MASK (0xFF000000) 7139 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_21_COEFF_PROBS_87_LSBMASK (0x000000FF) 7140 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_21_COEFF_PROBS_87_SHIFT (24) 7141 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_21_COEFF_PROBS_87_SIGNED_FIELD IMG_FALSE 7142 7143 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_22_OFFSET (0x0C4C) 7144 7145 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_22, COEFF_PROBS_88 7146 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_22_COEFF_PROBS_88_MASK (0x000000FF) 7147 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_22_COEFF_PROBS_88_LSBMASK (0x000000FF) 7148 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_22_COEFF_PROBS_88_SHIFT (0) 7149 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_22_COEFF_PROBS_88_SIGNED_FIELD IMG_FALSE 7150 7151 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_22, COEFF_PROBS_89 7152 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_22_COEFF_PROBS_89_MASK (0x0000FF00) 7153 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_22_COEFF_PROBS_89_LSBMASK (0x000000FF) 7154 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_22_COEFF_PROBS_89_SHIFT (8) 7155 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_22_COEFF_PROBS_89_SIGNED_FIELD IMG_FALSE 7156 7157 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_22, COEFF_PROBS_90 7158 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_22_COEFF_PROBS_90_MASK (0x00FF0000) 7159 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_22_COEFF_PROBS_90_LSBMASK (0x000000FF) 7160 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_22_COEFF_PROBS_90_SHIFT (16) 7161 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_22_COEFF_PROBS_90_SIGNED_FIELD IMG_FALSE 7162 7163 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_22, COEFF_PROBS_91 7164 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_22_COEFF_PROBS_91_MASK (0xFF000000) 7165 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_22_COEFF_PROBS_91_LSBMASK (0x000000FF) 7166 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_22_COEFF_PROBS_91_SHIFT (24) 7167 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_22_COEFF_PROBS_91_SIGNED_FIELD IMG_FALSE 7168 7169 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_23_OFFSET (0x0C50) 7170 7171 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_23, COEFF_PROBS_92 7172 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_23_COEFF_PROBS_92_MASK (0x000000FF) 7173 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_23_COEFF_PROBS_92_LSBMASK (0x000000FF) 7174 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_23_COEFF_PROBS_92_SHIFT (0) 7175 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_23_COEFF_PROBS_92_SIGNED_FIELD IMG_FALSE 7176 7177 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_23, COEFF_PROBS_93 7178 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_23_COEFF_PROBS_93_MASK (0x0000FF00) 7179 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_23_COEFF_PROBS_93_LSBMASK (0x000000FF) 7180 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_23_COEFF_PROBS_93_SHIFT (8) 7181 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_23_COEFF_PROBS_93_SIGNED_FIELD IMG_FALSE 7182 7183 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_23, COEFF_PROBS_94 7184 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_23_COEFF_PROBS_94_MASK (0x00FF0000) 7185 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_23_COEFF_PROBS_94_LSBMASK (0x000000FF) 7186 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_23_COEFF_PROBS_94_SHIFT (16) 7187 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_23_COEFF_PROBS_94_SIGNED_FIELD IMG_FALSE 7188 7189 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_23, COEFF_PROBS_95 7190 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_23_COEFF_PROBS_95_MASK (0xFF000000) 7191 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_23_COEFF_PROBS_95_LSBMASK (0x000000FF) 7192 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_23_COEFF_PROBS_95_SHIFT (24) 7193 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_23_COEFF_PROBS_95_SIGNED_FIELD IMG_FALSE 7194 7195 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_24_OFFSET (0x0C54) 7196 7197 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_24, COEFF_PROBS_96 7198 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_24_COEFF_PROBS_96_MASK (0x000000FF) 7199 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_24_COEFF_PROBS_96_LSBMASK (0x000000FF) 7200 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_24_COEFF_PROBS_96_SHIFT (0) 7201 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_24_COEFF_PROBS_96_SIGNED_FIELD IMG_FALSE 7202 7203 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_24, COEFF_PROBS_97 7204 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_24_COEFF_PROBS_97_MASK (0x0000FF00) 7205 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_24_COEFF_PROBS_97_LSBMASK (0x000000FF) 7206 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_24_COEFF_PROBS_97_SHIFT (8) 7207 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_24_COEFF_PROBS_97_SIGNED_FIELD IMG_FALSE 7208 7209 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_24, COEFF_PROBS_98 7210 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_24_COEFF_PROBS_98_MASK (0x00FF0000) 7211 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_24_COEFF_PROBS_98_LSBMASK (0x000000FF) 7212 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_24_COEFF_PROBS_98_SHIFT (16) 7213 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_24_COEFF_PROBS_98_SIGNED_FIELD IMG_FALSE 7214 7215 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_24, COEFF_PROBS_99 7216 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_24_COEFF_PROBS_99_MASK (0xFF000000) 7217 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_24_COEFF_PROBS_99_LSBMASK (0x000000FF) 7218 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_24_COEFF_PROBS_99_SHIFT (24) 7219 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_24_COEFF_PROBS_99_SIGNED_FIELD IMG_FALSE 7220 7221 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_25_OFFSET (0x0C58) 7222 7223 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_25, COEFF_PROBS_100 7224 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_25_COEFF_PROBS_100_MASK (0x000000FF) 7225 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_25_COEFF_PROBS_100_LSBMASK (0x000000FF) 7226 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_25_COEFF_PROBS_100_SHIFT (0) 7227 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_25_COEFF_PROBS_100_SIGNED_FIELD IMG_FALSE 7228 7229 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_25, COEFF_PROBS_101 7230 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_25_COEFF_PROBS_101_MASK (0x0000FF00) 7231 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_25_COEFF_PROBS_101_LSBMASK (0x000000FF) 7232 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_25_COEFF_PROBS_101_SHIFT (8) 7233 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_25_COEFF_PROBS_101_SIGNED_FIELD IMG_FALSE 7234 7235 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_25, COEFF_PROBS_102 7236 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_25_COEFF_PROBS_102_MASK (0x00FF0000) 7237 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_25_COEFF_PROBS_102_LSBMASK (0x000000FF) 7238 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_25_COEFF_PROBS_102_SHIFT (16) 7239 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_25_COEFF_PROBS_102_SIGNED_FIELD IMG_FALSE 7240 7241 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_25, COEFF_PROBS_103 7242 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_25_COEFF_PROBS_103_MASK (0xFF000000) 7243 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_25_COEFF_PROBS_103_LSBMASK (0x000000FF) 7244 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_25_COEFF_PROBS_103_SHIFT (24) 7245 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_25_COEFF_PROBS_103_SIGNED_FIELD IMG_FALSE 7246 7247 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_26_OFFSET (0x0C5C) 7248 7249 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_26, COEFF_PROBS_104 7250 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_26_COEFF_PROBS_104_MASK (0x000000FF) 7251 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_26_COEFF_PROBS_104_LSBMASK (0x000000FF) 7252 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_26_COEFF_PROBS_104_SHIFT (0) 7253 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_26_COEFF_PROBS_104_SIGNED_FIELD IMG_FALSE 7254 7255 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_26, COEFF_PROBS_105 7256 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_26_COEFF_PROBS_105_MASK (0x0000FF00) 7257 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_26_COEFF_PROBS_105_LSBMASK (0x000000FF) 7258 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_26_COEFF_PROBS_105_SHIFT (8) 7259 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_26_COEFF_PROBS_105_SIGNED_FIELD IMG_FALSE 7260 7261 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_26, COEFF_PROBS_106 7262 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_26_COEFF_PROBS_106_MASK (0x00FF0000) 7263 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_26_COEFF_PROBS_106_LSBMASK (0x000000FF) 7264 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_26_COEFF_PROBS_106_SHIFT (16) 7265 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_26_COEFF_PROBS_106_SIGNED_FIELD IMG_FALSE 7266 7267 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_26, COEFF_PROBS_107 7268 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_26_COEFF_PROBS_107_MASK (0xFF000000) 7269 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_26_COEFF_PROBS_107_LSBMASK (0x000000FF) 7270 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_26_COEFF_PROBS_107_SHIFT (24) 7271 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_26_COEFF_PROBS_107_SIGNED_FIELD IMG_FALSE 7272 7273 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_27_OFFSET (0x0C60) 7274 7275 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_27, COEFF_PROBS_108 7276 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_27_COEFF_PROBS_108_MASK (0x000000FF) 7277 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_27_COEFF_PROBS_108_LSBMASK (0x000000FF) 7278 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_27_COEFF_PROBS_108_SHIFT (0) 7279 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_27_COEFF_PROBS_108_SIGNED_FIELD IMG_FALSE 7280 7281 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_27, COEFF_PROBS_109 7282 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_27_COEFF_PROBS_109_MASK (0x0000FF00) 7283 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_27_COEFF_PROBS_109_LSBMASK (0x000000FF) 7284 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_27_COEFF_PROBS_109_SHIFT (8) 7285 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_27_COEFF_PROBS_109_SIGNED_FIELD IMG_FALSE 7286 7287 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_27, COEFF_PROBS_110 7288 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_27_COEFF_PROBS_110_MASK (0x00FF0000) 7289 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_27_COEFF_PROBS_110_LSBMASK (0x000000FF) 7290 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_27_COEFF_PROBS_110_SHIFT (16) 7291 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_27_COEFF_PROBS_110_SIGNED_FIELD IMG_FALSE 7292 7293 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_27, COEFF_PROBS_111 7294 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_27_COEFF_PROBS_111_MASK (0xFF000000) 7295 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_27_COEFF_PROBS_111_LSBMASK (0x000000FF) 7296 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_27_COEFF_PROBS_111_SHIFT (24) 7297 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_27_COEFF_PROBS_111_SIGNED_FIELD IMG_FALSE 7298 7299 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_28_OFFSET (0x0C64) 7300 7301 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_28, COEFF_PROBS_112 7302 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_28_COEFF_PROBS_112_MASK (0x000000FF) 7303 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_28_COEFF_PROBS_112_LSBMASK (0x000000FF) 7304 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_28_COEFF_PROBS_112_SHIFT (0) 7305 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_28_COEFF_PROBS_112_SIGNED_FIELD IMG_FALSE 7306 7307 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_28, COEFF_PROBS_113 7308 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_28_COEFF_PROBS_113_MASK (0x0000FF00) 7309 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_28_COEFF_PROBS_113_LSBMASK (0x000000FF) 7310 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_28_COEFF_PROBS_113_SHIFT (8) 7311 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_28_COEFF_PROBS_113_SIGNED_FIELD IMG_FALSE 7312 7313 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_28, COEFF_PROBS_114 7314 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_28_COEFF_PROBS_114_MASK (0x00FF0000) 7315 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_28_COEFF_PROBS_114_LSBMASK (0x000000FF) 7316 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_28_COEFF_PROBS_114_SHIFT (16) 7317 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_28_COEFF_PROBS_114_SIGNED_FIELD IMG_FALSE 7318 7319 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_28, COEFF_PROBS_115 7320 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_28_COEFF_PROBS_115_MASK (0xFF000000) 7321 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_28_COEFF_PROBS_115_LSBMASK (0x000000FF) 7322 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_28_COEFF_PROBS_115_SHIFT (24) 7323 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_28_COEFF_PROBS_115_SIGNED_FIELD IMG_FALSE 7324 7325 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_29_OFFSET (0x0C68) 7326 7327 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_29, COEFF_PROBS_116 7328 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_29_COEFF_PROBS_116_MASK (0x000000FF) 7329 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_29_COEFF_PROBS_116_LSBMASK (0x000000FF) 7330 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_29_COEFF_PROBS_116_SHIFT (0) 7331 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_29_COEFF_PROBS_116_SIGNED_FIELD IMG_FALSE 7332 7333 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_29, COEFF_PROBS_117 7334 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_29_COEFF_PROBS_117_MASK (0x0000FF00) 7335 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_29_COEFF_PROBS_117_LSBMASK (0x000000FF) 7336 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_29_COEFF_PROBS_117_SHIFT (8) 7337 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_29_COEFF_PROBS_117_SIGNED_FIELD IMG_FALSE 7338 7339 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_29, COEFF_PROBS_118 7340 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_29_COEFF_PROBS_118_MASK (0x00FF0000) 7341 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_29_COEFF_PROBS_118_LSBMASK (0x000000FF) 7342 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_29_COEFF_PROBS_118_SHIFT (16) 7343 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_29_COEFF_PROBS_118_SIGNED_FIELD IMG_FALSE 7344 7345 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_29, COEFF_PROBS_119 7346 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_29_COEFF_PROBS_119_MASK (0xFF000000) 7347 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_29_COEFF_PROBS_119_LSBMASK (0x000000FF) 7348 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_29_COEFF_PROBS_119_SHIFT (24) 7349 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_29_COEFF_PROBS_119_SIGNED_FIELD IMG_FALSE 7350 7351 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_30_OFFSET (0x0C6C) 7352 7353 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_30, COEFF_PROBS_120 7354 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_30_COEFF_PROBS_120_MASK (0x000000FF) 7355 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_30_COEFF_PROBS_120_LSBMASK (0x000000FF) 7356 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_30_COEFF_PROBS_120_SHIFT (0) 7357 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_30_COEFF_PROBS_120_SIGNED_FIELD IMG_FALSE 7358 7359 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_30, COEFF_PROBS_121 7360 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_30_COEFF_PROBS_121_MASK (0x0000FF00) 7361 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_30_COEFF_PROBS_121_LSBMASK (0x000000FF) 7362 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_30_COEFF_PROBS_121_SHIFT (8) 7363 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_30_COEFF_PROBS_121_SIGNED_FIELD IMG_FALSE 7364 7365 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_30, COEFF_PROBS_122 7366 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_30_COEFF_PROBS_122_MASK (0x00FF0000) 7367 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_30_COEFF_PROBS_122_LSBMASK (0x000000FF) 7368 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_30_COEFF_PROBS_122_SHIFT (16) 7369 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_30_COEFF_PROBS_122_SIGNED_FIELD IMG_FALSE 7370 7371 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_30, COEFF_PROBS_123 7372 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_30_COEFF_PROBS_123_MASK (0xFF000000) 7373 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_30_COEFF_PROBS_123_LSBMASK (0x000000FF) 7374 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_30_COEFF_PROBS_123_SHIFT (24) 7375 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_30_COEFF_PROBS_123_SIGNED_FIELD IMG_FALSE 7376 7377 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_31_OFFSET (0x0C70) 7378 7379 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_31, COEFF_PROBS_124 7380 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_31_COEFF_PROBS_124_MASK (0x000000FF) 7381 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_31_COEFF_PROBS_124_LSBMASK (0x000000FF) 7382 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_31_COEFF_PROBS_124_SHIFT (0) 7383 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_31_COEFF_PROBS_124_SIGNED_FIELD IMG_FALSE 7384 7385 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_31, COEFF_PROBS_125 7386 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_31_COEFF_PROBS_125_MASK (0x0000FF00) 7387 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_31_COEFF_PROBS_125_LSBMASK (0x000000FF) 7388 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_31_COEFF_PROBS_125_SHIFT (8) 7389 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_31_COEFF_PROBS_125_SIGNED_FIELD IMG_FALSE 7390 7391 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_31, COEFF_PROBS_126 7392 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_31_COEFF_PROBS_126_MASK (0x00FF0000) 7393 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_31_COEFF_PROBS_126_LSBMASK (0x000000FF) 7394 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_31_COEFF_PROBS_126_SHIFT (16) 7395 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_31_COEFF_PROBS_126_SIGNED_FIELD IMG_FALSE 7396 7397 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_31, COEFF_PROBS_127 7398 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_31_COEFF_PROBS_127_MASK (0xFF000000) 7399 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_31_COEFF_PROBS_127_LSBMASK (0x000000FF) 7400 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_31_COEFF_PROBS_127_SHIFT (24) 7401 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_31_COEFF_PROBS_127_SIGNED_FIELD IMG_FALSE 7402 7403 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_32_OFFSET (0x0C74) 7404 7405 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_32, COEFF_PROBS_128 7406 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_32_COEFF_PROBS_128_MASK (0x000000FF) 7407 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_32_COEFF_PROBS_128_LSBMASK (0x000000FF) 7408 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_32_COEFF_PROBS_128_SHIFT (0) 7409 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_32_COEFF_PROBS_128_SIGNED_FIELD IMG_FALSE 7410 7411 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_32, COEFF_PROBS_129 7412 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_32_COEFF_PROBS_129_MASK (0x0000FF00) 7413 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_32_COEFF_PROBS_129_LSBMASK (0x000000FF) 7414 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_32_COEFF_PROBS_129_SHIFT (8) 7415 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_32_COEFF_PROBS_129_SIGNED_FIELD IMG_FALSE 7416 7417 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_32, COEFF_PROBS_130 7418 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_32_COEFF_PROBS_130_MASK (0x00FF0000) 7419 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_32_COEFF_PROBS_130_LSBMASK (0x000000FF) 7420 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_32_COEFF_PROBS_130_SHIFT (16) 7421 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_32_COEFF_PROBS_130_SIGNED_FIELD IMG_FALSE 7422 7423 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_32, COEFF_PROBS_131 7424 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_32_COEFF_PROBS_131_MASK (0xFF000000) 7425 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_32_COEFF_PROBS_131_LSBMASK (0x000000FF) 7426 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_32_COEFF_PROBS_131_SHIFT (24) 7427 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_32_COEFF_PROBS_131_SIGNED_FIELD IMG_FALSE 7428 7429 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_33_OFFSET (0x0C78) 7430 7431 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_33, COEFF_PROBS_132 7432 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_33_COEFF_PROBS_132_MASK (0x000000FF) 7433 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_33_COEFF_PROBS_132_LSBMASK (0x000000FF) 7434 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_33_COEFF_PROBS_132_SHIFT (0) 7435 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_33_COEFF_PROBS_132_SIGNED_FIELD IMG_FALSE 7436 7437 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_33, COEFF_PROBS_133 7438 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_33_COEFF_PROBS_133_MASK (0x0000FF00) 7439 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_33_COEFF_PROBS_133_LSBMASK (0x000000FF) 7440 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_33_COEFF_PROBS_133_SHIFT (8) 7441 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_33_COEFF_PROBS_133_SIGNED_FIELD IMG_FALSE 7442 7443 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_33, COEFF_PROBS_134 7444 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_33_COEFF_PROBS_134_MASK (0x00FF0000) 7445 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_33_COEFF_PROBS_134_LSBMASK (0x000000FF) 7446 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_33_COEFF_PROBS_134_SHIFT (16) 7447 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_33_COEFF_PROBS_134_SIGNED_FIELD IMG_FALSE 7448 7449 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_33, COEFF_PROBS_135 7450 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_33_COEFF_PROBS_135_MASK (0xFF000000) 7451 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_33_COEFF_PROBS_135_LSBMASK (0x000000FF) 7452 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_33_COEFF_PROBS_135_SHIFT (24) 7453 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_33_COEFF_PROBS_135_SIGNED_FIELD IMG_FALSE 7454 7455 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_34_OFFSET (0x0C7C) 7456 7457 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_34, COEFF_PROBS_136 7458 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_34_COEFF_PROBS_136_MASK (0x000000FF) 7459 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_34_COEFF_PROBS_136_LSBMASK (0x000000FF) 7460 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_34_COEFF_PROBS_136_SHIFT (0) 7461 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_34_COEFF_PROBS_136_SIGNED_FIELD IMG_FALSE 7462 7463 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_34, COEFF_PROBS_137 7464 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_34_COEFF_PROBS_137_MASK (0x0000FF00) 7465 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_34_COEFF_PROBS_137_LSBMASK (0x000000FF) 7466 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_34_COEFF_PROBS_137_SHIFT (8) 7467 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_34_COEFF_PROBS_137_SIGNED_FIELD IMG_FALSE 7468 7469 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_34, COEFF_PROBS_138 7470 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_34_COEFF_PROBS_138_MASK (0x00FF0000) 7471 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_34_COEFF_PROBS_138_LSBMASK (0x000000FF) 7472 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_34_COEFF_PROBS_138_SHIFT (16) 7473 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_34_COEFF_PROBS_138_SIGNED_FIELD IMG_FALSE 7474 7475 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_34, COEFF_PROBS_139 7476 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_34_COEFF_PROBS_139_MASK (0xFF000000) 7477 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_34_COEFF_PROBS_139_LSBMASK (0x000000FF) 7478 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_34_COEFF_PROBS_139_SHIFT (24) 7479 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_34_COEFF_PROBS_139_SIGNED_FIELD IMG_FALSE 7480 7481 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_35_OFFSET (0x0C80) 7482 7483 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_35, COEFF_PROBS_140 7484 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_35_COEFF_PROBS_140_MASK (0x000000FF) 7485 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_35_COEFF_PROBS_140_LSBMASK (0x000000FF) 7486 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_35_COEFF_PROBS_140_SHIFT (0) 7487 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_35_COEFF_PROBS_140_SIGNED_FIELD IMG_FALSE 7488 7489 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_35, COEFF_PROBS_141 7490 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_35_COEFF_PROBS_141_MASK (0x0000FF00) 7491 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_35_COEFF_PROBS_141_LSBMASK (0x000000FF) 7492 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_35_COEFF_PROBS_141_SHIFT (8) 7493 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_35_COEFF_PROBS_141_SIGNED_FIELD IMG_FALSE 7494 7495 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_35, COEFF_PROBS_142 7496 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_35_COEFF_PROBS_142_MASK (0x00FF0000) 7497 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_35_COEFF_PROBS_142_LSBMASK (0x000000FF) 7498 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_35_COEFF_PROBS_142_SHIFT (16) 7499 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_35_COEFF_PROBS_142_SIGNED_FIELD IMG_FALSE 7500 7501 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_35, COEFF_PROBS_143 7502 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_35_COEFF_PROBS_143_MASK (0xFF000000) 7503 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_35_COEFF_PROBS_143_LSBMASK (0x000000FF) 7504 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_35_COEFF_PROBS_143_SHIFT (24) 7505 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_35_COEFF_PROBS_143_SIGNED_FIELD IMG_FALSE 7506 7507 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_36_OFFSET (0x0C84) 7508 7509 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_36, COEFF_PROBS_144 7510 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_36_COEFF_PROBS_144_MASK (0x000000FF) 7511 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_36_COEFF_PROBS_144_LSBMASK (0x000000FF) 7512 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_36_COEFF_PROBS_144_SHIFT (0) 7513 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_36_COEFF_PROBS_144_SIGNED_FIELD IMG_FALSE 7514 7515 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_36, COEFF_PROBS_145 7516 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_36_COEFF_PROBS_145_MASK (0x0000FF00) 7517 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_36_COEFF_PROBS_145_LSBMASK (0x000000FF) 7518 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_36_COEFF_PROBS_145_SHIFT (8) 7519 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_36_COEFF_PROBS_145_SIGNED_FIELD IMG_FALSE 7520 7521 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_36, COEFF_PROBS_146 7522 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_36_COEFF_PROBS_146_MASK (0x00FF0000) 7523 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_36_COEFF_PROBS_146_LSBMASK (0x000000FF) 7524 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_36_COEFF_PROBS_146_SHIFT (16) 7525 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_36_COEFF_PROBS_146_SIGNED_FIELD IMG_FALSE 7526 7527 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_36, COEFF_PROBS_147 7528 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_36_COEFF_PROBS_147_MASK (0xFF000000) 7529 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_36_COEFF_PROBS_147_LSBMASK (0x000000FF) 7530 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_36_COEFF_PROBS_147_SHIFT (24) 7531 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_36_COEFF_PROBS_147_SIGNED_FIELD IMG_FALSE 7532 7533 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_37_OFFSET (0x0C88) 7534 7535 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_37, COEFF_PROBS_148 7536 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_37_COEFF_PROBS_148_MASK (0x000000FF) 7537 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_37_COEFF_PROBS_148_LSBMASK (0x000000FF) 7538 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_37_COEFF_PROBS_148_SHIFT (0) 7539 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_37_COEFF_PROBS_148_SIGNED_FIELD IMG_FALSE 7540 7541 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_37, COEFF_PROBS_149 7542 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_37_COEFF_PROBS_149_MASK (0x0000FF00) 7543 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_37_COEFF_PROBS_149_LSBMASK (0x000000FF) 7544 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_37_COEFF_PROBS_149_SHIFT (8) 7545 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_37_COEFF_PROBS_149_SIGNED_FIELD IMG_FALSE 7546 7547 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_37, COEFF_PROBS_150 7548 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_37_COEFF_PROBS_150_MASK (0x00FF0000) 7549 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_37_COEFF_PROBS_150_LSBMASK (0x000000FF) 7550 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_37_COEFF_PROBS_150_SHIFT (16) 7551 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_37_COEFF_PROBS_150_SIGNED_FIELD IMG_FALSE 7552 7553 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_37, COEFF_PROBS_151 7554 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_37_COEFF_PROBS_151_MASK (0xFF000000) 7555 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_37_COEFF_PROBS_151_LSBMASK (0x000000FF) 7556 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_37_COEFF_PROBS_151_SHIFT (24) 7557 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_37_COEFF_PROBS_151_SIGNED_FIELD IMG_FALSE 7558 7559 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_38_OFFSET (0x0C8C) 7560 7561 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_38, COEFF_PROBS_152 7562 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_38_COEFF_PROBS_152_MASK (0x000000FF) 7563 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_38_COEFF_PROBS_152_LSBMASK (0x000000FF) 7564 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_38_COEFF_PROBS_152_SHIFT (0) 7565 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_38_COEFF_PROBS_152_SIGNED_FIELD IMG_FALSE 7566 7567 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_38, COEFF_PROBS_153 7568 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_38_COEFF_PROBS_153_MASK (0x0000FF00) 7569 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_38_COEFF_PROBS_153_LSBMASK (0x000000FF) 7570 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_38_COEFF_PROBS_153_SHIFT (8) 7571 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_38_COEFF_PROBS_153_SIGNED_FIELD IMG_FALSE 7572 7573 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_38, COEFF_PROBS_154 7574 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_38_COEFF_PROBS_154_MASK (0x00FF0000) 7575 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_38_COEFF_PROBS_154_LSBMASK (0x000000FF) 7576 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_38_COEFF_PROBS_154_SHIFT (16) 7577 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_38_COEFF_PROBS_154_SIGNED_FIELD IMG_FALSE 7578 7579 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_38, COEFF_PROBS_155 7580 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_38_COEFF_PROBS_155_MASK (0xFF000000) 7581 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_38_COEFF_PROBS_155_LSBMASK (0x000000FF) 7582 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_38_COEFF_PROBS_155_SHIFT (24) 7583 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_38_COEFF_PROBS_155_SIGNED_FIELD IMG_FALSE 7584 7585 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_39_OFFSET (0x0C90) 7586 7587 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_39, COEFF_PROBS_156 7588 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_39_COEFF_PROBS_156_MASK (0x000000FF) 7589 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_39_COEFF_PROBS_156_LSBMASK (0x000000FF) 7590 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_39_COEFF_PROBS_156_SHIFT (0) 7591 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_39_COEFF_PROBS_156_SIGNED_FIELD IMG_FALSE 7592 7593 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_39, COEFF_PROBS_157 7594 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_39_COEFF_PROBS_157_MASK (0x0000FF00) 7595 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_39_COEFF_PROBS_157_LSBMASK (0x000000FF) 7596 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_39_COEFF_PROBS_157_SHIFT (8) 7597 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_39_COEFF_PROBS_157_SIGNED_FIELD IMG_FALSE 7598 7599 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_39, COEFF_PROBS_158 7600 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_39_COEFF_PROBS_158_MASK (0x00FF0000) 7601 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_39_COEFF_PROBS_158_LSBMASK (0x000000FF) 7602 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_39_COEFF_PROBS_158_SHIFT (16) 7603 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_39_COEFF_PROBS_158_SIGNED_FIELD IMG_FALSE 7604 7605 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_39, COEFF_PROBS_159 7606 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_39_COEFF_PROBS_159_MASK (0xFF000000) 7607 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_39_COEFF_PROBS_159_LSBMASK (0x000000FF) 7608 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_39_COEFF_PROBS_159_SHIFT (24) 7609 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_39_COEFF_PROBS_159_SIGNED_FIELD IMG_FALSE 7610 7611 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_40_OFFSET (0x0C94) 7612 7613 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_40, COEFF_PROBS_160 7614 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_40_COEFF_PROBS_160_MASK (0x000000FF) 7615 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_40_COEFF_PROBS_160_LSBMASK (0x000000FF) 7616 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_40_COEFF_PROBS_160_SHIFT (0) 7617 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_40_COEFF_PROBS_160_SIGNED_FIELD IMG_FALSE 7618 7619 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_40, COEFF_PROBS_161 7620 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_40_COEFF_PROBS_161_MASK (0x0000FF00) 7621 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_40_COEFF_PROBS_161_LSBMASK (0x000000FF) 7622 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_40_COEFF_PROBS_161_SHIFT (8) 7623 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_40_COEFF_PROBS_161_SIGNED_FIELD IMG_FALSE 7624 7625 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_40, COEFF_PROBS_162 7626 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_40_COEFF_PROBS_162_MASK (0x00FF0000) 7627 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_40_COEFF_PROBS_162_LSBMASK (0x000000FF) 7628 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_40_COEFF_PROBS_162_SHIFT (16) 7629 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_40_COEFF_PROBS_162_SIGNED_FIELD IMG_FALSE 7630 7631 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_40, COEFF_PROBS_163 7632 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_40_COEFF_PROBS_163_MASK (0xFF000000) 7633 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_40_COEFF_PROBS_163_LSBMASK (0x000000FF) 7634 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_40_COEFF_PROBS_163_SHIFT (24) 7635 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_40_COEFF_PROBS_163_SIGNED_FIELD IMG_FALSE 7636 7637 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_41_OFFSET (0x0C98) 7638 7639 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_41, COEFF_PROBS_164 7640 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_41_COEFF_PROBS_164_MASK (0x000000FF) 7641 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_41_COEFF_PROBS_164_LSBMASK (0x000000FF) 7642 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_41_COEFF_PROBS_164_SHIFT (0) 7643 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_41_COEFF_PROBS_164_SIGNED_FIELD IMG_FALSE 7644 7645 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_41, COEFF_PROBS_165 7646 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_41_COEFF_PROBS_165_MASK (0x0000FF00) 7647 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_41_COEFF_PROBS_165_LSBMASK (0x000000FF) 7648 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_41_COEFF_PROBS_165_SHIFT (8) 7649 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_41_COEFF_PROBS_165_SIGNED_FIELD IMG_FALSE 7650 7651 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_41, COEFF_PROBS_166 7652 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_41_COEFF_PROBS_166_MASK (0x00FF0000) 7653 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_41_COEFF_PROBS_166_LSBMASK (0x000000FF) 7654 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_41_COEFF_PROBS_166_SHIFT (16) 7655 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_41_COEFF_PROBS_166_SIGNED_FIELD IMG_FALSE 7656 7657 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_41, COEFF_PROBS_167 7658 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_41_COEFF_PROBS_167_MASK (0xFF000000) 7659 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_41_COEFF_PROBS_167_LSBMASK (0x000000FF) 7660 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_41_COEFF_PROBS_167_SHIFT (24) 7661 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_41_COEFF_PROBS_167_SIGNED_FIELD IMG_FALSE 7662 7663 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_42_OFFSET (0x0C9C) 7664 7665 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_42, COEFF_PROBS_168 7666 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_42_COEFF_PROBS_168_MASK (0x000000FF) 7667 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_42_COEFF_PROBS_168_LSBMASK (0x000000FF) 7668 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_42_COEFF_PROBS_168_SHIFT (0) 7669 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_42_COEFF_PROBS_168_SIGNED_FIELD IMG_FALSE 7670 7671 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_42, COEFF_PROBS_169 7672 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_42_COEFF_PROBS_169_MASK (0x0000FF00) 7673 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_42_COEFF_PROBS_169_LSBMASK (0x000000FF) 7674 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_42_COEFF_PROBS_169_SHIFT (8) 7675 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_42_COEFF_PROBS_169_SIGNED_FIELD IMG_FALSE 7676 7677 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_42, COEFF_PROBS_170 7678 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_42_COEFF_PROBS_170_MASK (0x00FF0000) 7679 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_42_COEFF_PROBS_170_LSBMASK (0x000000FF) 7680 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_42_COEFF_PROBS_170_SHIFT (16) 7681 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_42_COEFF_PROBS_170_SIGNED_FIELD IMG_FALSE 7682 7683 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_42, COEFF_PROBS_171 7684 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_42_COEFF_PROBS_171_MASK (0xFF000000) 7685 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_42_COEFF_PROBS_171_LSBMASK (0x000000FF) 7686 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_42_COEFF_PROBS_171_SHIFT (24) 7687 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_42_COEFF_PROBS_171_SIGNED_FIELD IMG_FALSE 7688 7689 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_43_OFFSET (0x0CA0) 7690 7691 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_43, COEFF_PROBS_172 7692 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_43_COEFF_PROBS_172_MASK (0x000000FF) 7693 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_43_COEFF_PROBS_172_LSBMASK (0x000000FF) 7694 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_43_COEFF_PROBS_172_SHIFT (0) 7695 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_43_COEFF_PROBS_172_SIGNED_FIELD IMG_FALSE 7696 7697 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_43, COEFF_PROBS_173 7698 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_43_COEFF_PROBS_173_MASK (0x0000FF00) 7699 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_43_COEFF_PROBS_173_LSBMASK (0x000000FF) 7700 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_43_COEFF_PROBS_173_SHIFT (8) 7701 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_43_COEFF_PROBS_173_SIGNED_FIELD IMG_FALSE 7702 7703 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_43, COEFF_PROBS_174 7704 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_43_COEFF_PROBS_174_MASK (0x00FF0000) 7705 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_43_COEFF_PROBS_174_LSBMASK (0x000000FF) 7706 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_43_COEFF_PROBS_174_SHIFT (16) 7707 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_43_COEFF_PROBS_174_SIGNED_FIELD IMG_FALSE 7708 7709 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_43, COEFF_PROBS_175 7710 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_43_COEFF_PROBS_175_MASK (0xFF000000) 7711 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_43_COEFF_PROBS_175_LSBMASK (0x000000FF) 7712 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_43_COEFF_PROBS_175_SHIFT (24) 7713 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_43_COEFF_PROBS_175_SIGNED_FIELD IMG_FALSE 7714 7715 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_44_OFFSET (0x0CA4) 7716 7717 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_44, COEFF_PROBS_176 7718 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_44_COEFF_PROBS_176_MASK (0x000000FF) 7719 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_44_COEFF_PROBS_176_LSBMASK (0x000000FF) 7720 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_44_COEFF_PROBS_176_SHIFT (0) 7721 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_44_COEFF_PROBS_176_SIGNED_FIELD IMG_FALSE 7722 7723 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_44, COEFF_PROBS_177 7724 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_44_COEFF_PROBS_177_MASK (0x0000FF00) 7725 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_44_COEFF_PROBS_177_LSBMASK (0x000000FF) 7726 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_44_COEFF_PROBS_177_SHIFT (8) 7727 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_44_COEFF_PROBS_177_SIGNED_FIELD IMG_FALSE 7728 7729 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_44, COEFF_PROBS_178 7730 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_44_COEFF_PROBS_178_MASK (0x00FF0000) 7731 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_44_COEFF_PROBS_178_LSBMASK (0x000000FF) 7732 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_44_COEFF_PROBS_178_SHIFT (16) 7733 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_44_COEFF_PROBS_178_SIGNED_FIELD IMG_FALSE 7734 7735 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_44, COEFF_PROBS_179 7736 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_44_COEFF_PROBS_179_MASK (0xFF000000) 7737 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_44_COEFF_PROBS_179_LSBMASK (0x000000FF) 7738 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_44_COEFF_PROBS_179_SHIFT (24) 7739 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_44_COEFF_PROBS_179_SIGNED_FIELD IMG_FALSE 7740 7741 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_45_OFFSET (0x0CA8) 7742 7743 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_45, COEFF_PROBS_180 7744 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_45_COEFF_PROBS_180_MASK (0x000000FF) 7745 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_45_COEFF_PROBS_180_LSBMASK (0x000000FF) 7746 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_45_COEFF_PROBS_180_SHIFT (0) 7747 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_45_COEFF_PROBS_180_SIGNED_FIELD IMG_FALSE 7748 7749 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_45, COEFF_PROBS_181 7750 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_45_COEFF_PROBS_181_MASK (0x0000FF00) 7751 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_45_COEFF_PROBS_181_LSBMASK (0x000000FF) 7752 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_45_COEFF_PROBS_181_SHIFT (8) 7753 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_45_COEFF_PROBS_181_SIGNED_FIELD IMG_FALSE 7754 7755 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_45, COEFF_PROBS_182 7756 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_45_COEFF_PROBS_182_MASK (0x00FF0000) 7757 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_45_COEFF_PROBS_182_LSBMASK (0x000000FF) 7758 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_45_COEFF_PROBS_182_SHIFT (16) 7759 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_45_COEFF_PROBS_182_SIGNED_FIELD IMG_FALSE 7760 7761 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_45, COEFF_PROBS_183 7762 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_45_COEFF_PROBS_183_MASK (0xFF000000) 7763 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_45_COEFF_PROBS_183_LSBMASK (0x000000FF) 7764 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_45_COEFF_PROBS_183_SHIFT (24) 7765 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_45_COEFF_PROBS_183_SIGNED_FIELD IMG_FALSE 7766 7767 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_46_OFFSET (0x0CAC) 7768 7769 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_46, COEFF_PROBS_184 7770 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_46_COEFF_PROBS_184_MASK (0x000000FF) 7771 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_46_COEFF_PROBS_184_LSBMASK (0x000000FF) 7772 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_46_COEFF_PROBS_184_SHIFT (0) 7773 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_46_COEFF_PROBS_184_SIGNED_FIELD IMG_FALSE 7774 7775 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_46, COEFF_PROBS_185 7776 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_46_COEFF_PROBS_185_MASK (0x0000FF00) 7777 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_46_COEFF_PROBS_185_LSBMASK (0x000000FF) 7778 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_46_COEFF_PROBS_185_SHIFT (8) 7779 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_46_COEFF_PROBS_185_SIGNED_FIELD IMG_FALSE 7780 7781 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_46, COEFF_PROBS_186 7782 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_46_COEFF_PROBS_186_MASK (0x00FF0000) 7783 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_46_COEFF_PROBS_186_LSBMASK (0x000000FF) 7784 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_46_COEFF_PROBS_186_SHIFT (16) 7785 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_46_COEFF_PROBS_186_SIGNED_FIELD IMG_FALSE 7786 7787 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_46, COEFF_PROBS_187 7788 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_46_COEFF_PROBS_187_MASK (0xFF000000) 7789 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_46_COEFF_PROBS_187_LSBMASK (0x000000FF) 7790 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_46_COEFF_PROBS_187_SHIFT (24) 7791 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_46_COEFF_PROBS_187_SIGNED_FIELD IMG_FALSE 7792 7793 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_47_OFFSET (0x0CB0) 7794 7795 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_47, COEFF_PROBS_188 7796 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_47_COEFF_PROBS_188_MASK (0x000000FF) 7797 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_47_COEFF_PROBS_188_LSBMASK (0x000000FF) 7798 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_47_COEFF_PROBS_188_SHIFT (0) 7799 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_47_COEFF_PROBS_188_SIGNED_FIELD IMG_FALSE 7800 7801 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_47, COEFF_PROBS_189 7802 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_47_COEFF_PROBS_189_MASK (0x0000FF00) 7803 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_47_COEFF_PROBS_189_LSBMASK (0x000000FF) 7804 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_47_COEFF_PROBS_189_SHIFT (8) 7805 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_47_COEFF_PROBS_189_SIGNED_FIELD IMG_FALSE 7806 7807 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_47, COEFF_PROBS_190 7808 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_47_COEFF_PROBS_190_MASK (0x00FF0000) 7809 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_47_COEFF_PROBS_190_LSBMASK (0x000000FF) 7810 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_47_COEFF_PROBS_190_SHIFT (16) 7811 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_47_COEFF_PROBS_190_SIGNED_FIELD IMG_FALSE 7812 7813 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_47, COEFF_PROBS_191 7814 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_47_COEFF_PROBS_191_MASK (0xFF000000) 7815 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_47_COEFF_PROBS_191_LSBMASK (0x000000FF) 7816 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_47_COEFF_PROBS_191_SHIFT (24) 7817 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_47_COEFF_PROBS_191_SIGNED_FIELD IMG_FALSE 7818 7819 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_48_OFFSET (0x0CB4) 7820 7821 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_48, COEFF_PROBS_192 7822 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_48_COEFF_PROBS_192_MASK (0x000000FF) 7823 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_48_COEFF_PROBS_192_LSBMASK (0x000000FF) 7824 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_48_COEFF_PROBS_192_SHIFT (0) 7825 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_48_COEFF_PROBS_192_SIGNED_FIELD IMG_FALSE 7826 7827 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_48, COEFF_PROBS_193 7828 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_48_COEFF_PROBS_193_MASK (0x0000FF00) 7829 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_48_COEFF_PROBS_193_LSBMASK (0x000000FF) 7830 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_48_COEFF_PROBS_193_SHIFT (8) 7831 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_48_COEFF_PROBS_193_SIGNED_FIELD IMG_FALSE 7832 7833 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_48, COEFF_PROBS_194 7834 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_48_COEFF_PROBS_194_MASK (0x00FF0000) 7835 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_48_COEFF_PROBS_194_LSBMASK (0x000000FF) 7836 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_48_COEFF_PROBS_194_SHIFT (16) 7837 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_48_COEFF_PROBS_194_SIGNED_FIELD IMG_FALSE 7838 7839 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_48, COEFF_PROBS_195 7840 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_48_COEFF_PROBS_195_MASK (0xFF000000) 7841 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_48_COEFF_PROBS_195_LSBMASK (0x000000FF) 7842 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_48_COEFF_PROBS_195_SHIFT (24) 7843 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_48_COEFF_PROBS_195_SIGNED_FIELD IMG_FALSE 7844 7845 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_49_OFFSET (0x0CB8) 7846 7847 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_49, COEFF_PROBS_196 7848 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_49_COEFF_PROBS_196_MASK (0x000000FF) 7849 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_49_COEFF_PROBS_196_LSBMASK (0x000000FF) 7850 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_49_COEFF_PROBS_196_SHIFT (0) 7851 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_49_COEFF_PROBS_196_SIGNED_FIELD IMG_FALSE 7852 7853 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_49, COEFF_PROBS_197 7854 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_49_COEFF_PROBS_197_MASK (0x0000FF00) 7855 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_49_COEFF_PROBS_197_LSBMASK (0x000000FF) 7856 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_49_COEFF_PROBS_197_SHIFT (8) 7857 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_49_COEFF_PROBS_197_SIGNED_FIELD IMG_FALSE 7858 7859 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_49, COEFF_PROBS_198 7860 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_49_COEFF_PROBS_198_MASK (0x00FF0000) 7861 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_49_COEFF_PROBS_198_LSBMASK (0x000000FF) 7862 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_49_COEFF_PROBS_198_SHIFT (16) 7863 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_49_COEFF_PROBS_198_SIGNED_FIELD IMG_FALSE 7864 7865 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_49, COEFF_PROBS_199 7866 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_49_COEFF_PROBS_199_MASK (0xFF000000) 7867 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_49_COEFF_PROBS_199_LSBMASK (0x000000FF) 7868 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_49_COEFF_PROBS_199_SHIFT (24) 7869 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_49_COEFF_PROBS_199_SIGNED_FIELD IMG_FALSE 7870 7871 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_50_OFFSET (0x0CBC) 7872 7873 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_50, COEFF_PROBS_200 7874 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_50_COEFF_PROBS_200_MASK (0x000000FF) 7875 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_50_COEFF_PROBS_200_LSBMASK (0x000000FF) 7876 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_50_COEFF_PROBS_200_SHIFT (0) 7877 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_50_COEFF_PROBS_200_SIGNED_FIELD IMG_FALSE 7878 7879 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_50, COEFF_PROBS_201 7880 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_50_COEFF_PROBS_201_MASK (0x0000FF00) 7881 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_50_COEFF_PROBS_201_LSBMASK (0x000000FF) 7882 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_50_COEFF_PROBS_201_SHIFT (8) 7883 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_50_COEFF_PROBS_201_SIGNED_FIELD IMG_FALSE 7884 7885 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_50, COEFF_PROBS_202 7886 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_50_COEFF_PROBS_202_MASK (0x00FF0000) 7887 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_50_COEFF_PROBS_202_LSBMASK (0x000000FF) 7888 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_50_COEFF_PROBS_202_SHIFT (16) 7889 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_50_COEFF_PROBS_202_SIGNED_FIELD IMG_FALSE 7890 7891 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_50, COEFF_PROBS_203 7892 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_50_COEFF_PROBS_203_MASK (0xFF000000) 7893 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_50_COEFF_PROBS_203_LSBMASK (0x000000FF) 7894 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_50_COEFF_PROBS_203_SHIFT (24) 7895 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_50_COEFF_PROBS_203_SIGNED_FIELD IMG_FALSE 7896 7897 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_51_OFFSET (0x0CC0) 7898 7899 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_51, COEFF_PROBS_204 7900 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_51_COEFF_PROBS_204_MASK (0x000000FF) 7901 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_51_COEFF_PROBS_204_LSBMASK (0x000000FF) 7902 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_51_COEFF_PROBS_204_SHIFT (0) 7903 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_51_COEFF_PROBS_204_SIGNED_FIELD IMG_FALSE 7904 7905 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_51, COEFF_PROBS_205 7906 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_51_COEFF_PROBS_205_MASK (0x0000FF00) 7907 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_51_COEFF_PROBS_205_LSBMASK (0x000000FF) 7908 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_51_COEFF_PROBS_205_SHIFT (8) 7909 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_51_COEFF_PROBS_205_SIGNED_FIELD IMG_FALSE 7910 7911 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_51, COEFF_PROBS_206 7912 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_51_COEFF_PROBS_206_MASK (0x00FF0000) 7913 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_51_COEFF_PROBS_206_LSBMASK (0x000000FF) 7914 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_51_COEFF_PROBS_206_SHIFT (16) 7915 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_51_COEFF_PROBS_206_SIGNED_FIELD IMG_FALSE 7916 7917 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_51, COEFF_PROBS_207 7918 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_51_COEFF_PROBS_207_MASK (0xFF000000) 7919 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_51_COEFF_PROBS_207_LSBMASK (0x000000FF) 7920 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_51_COEFF_PROBS_207_SHIFT (24) 7921 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_51_COEFF_PROBS_207_SIGNED_FIELD IMG_FALSE 7922 7923 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_52_OFFSET (0x0CC4) 7924 7925 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_52, COEFF_PROBS_208 7926 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_52_COEFF_PROBS_208_MASK (0x000000FF) 7927 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_52_COEFF_PROBS_208_LSBMASK (0x000000FF) 7928 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_52_COEFF_PROBS_208_SHIFT (0) 7929 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_52_COEFF_PROBS_208_SIGNED_FIELD IMG_FALSE 7930 7931 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_52, COEFF_PROBS_209 7932 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_52_COEFF_PROBS_209_MASK (0x0000FF00) 7933 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_52_COEFF_PROBS_209_LSBMASK (0x000000FF) 7934 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_52_COEFF_PROBS_209_SHIFT (8) 7935 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_52_COEFF_PROBS_209_SIGNED_FIELD IMG_FALSE 7936 7937 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_52, COEFF_PROBS_210 7938 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_52_COEFF_PROBS_210_MASK (0x00FF0000) 7939 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_52_COEFF_PROBS_210_LSBMASK (0x000000FF) 7940 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_52_COEFF_PROBS_210_SHIFT (16) 7941 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_52_COEFF_PROBS_210_SIGNED_FIELD IMG_FALSE 7942 7943 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_52, COEFF_PROBS_211 7944 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_52_COEFF_PROBS_211_MASK (0xFF000000) 7945 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_52_COEFF_PROBS_211_LSBMASK (0x000000FF) 7946 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_52_COEFF_PROBS_211_SHIFT (24) 7947 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_52_COEFF_PROBS_211_SIGNED_FIELD IMG_FALSE 7948 7949 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_53_OFFSET (0x0CC8) 7950 7951 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_53, COEFF_PROBS_212 7952 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_53_COEFF_PROBS_212_MASK (0x000000FF) 7953 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_53_COEFF_PROBS_212_LSBMASK (0x000000FF) 7954 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_53_COEFF_PROBS_212_SHIFT (0) 7955 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_53_COEFF_PROBS_212_SIGNED_FIELD IMG_FALSE 7956 7957 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_53, COEFF_PROBS_213 7958 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_53_COEFF_PROBS_213_MASK (0x0000FF00) 7959 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_53_COEFF_PROBS_213_LSBMASK (0x000000FF) 7960 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_53_COEFF_PROBS_213_SHIFT (8) 7961 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_53_COEFF_PROBS_213_SIGNED_FIELD IMG_FALSE 7962 7963 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_53, COEFF_PROBS_214 7964 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_53_COEFF_PROBS_214_MASK (0x00FF0000) 7965 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_53_COEFF_PROBS_214_LSBMASK (0x000000FF) 7966 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_53_COEFF_PROBS_214_SHIFT (16) 7967 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_53_COEFF_PROBS_214_SIGNED_FIELD IMG_FALSE 7968 7969 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_53, COEFF_PROBS_215 7970 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_53_COEFF_PROBS_215_MASK (0xFF000000) 7971 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_53_COEFF_PROBS_215_LSBMASK (0x000000FF) 7972 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_53_COEFF_PROBS_215_SHIFT (24) 7973 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_53_COEFF_PROBS_215_SIGNED_FIELD IMG_FALSE 7974 7975 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_54_OFFSET (0x0CCC) 7976 7977 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_54, COEFF_PROBS_216 7978 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_54_COEFF_PROBS_216_MASK (0x000000FF) 7979 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_54_COEFF_PROBS_216_LSBMASK (0x000000FF) 7980 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_54_COEFF_PROBS_216_SHIFT (0) 7981 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_54_COEFF_PROBS_216_SIGNED_FIELD IMG_FALSE 7982 7983 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_54, COEFF_PROBS_217 7984 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_54_COEFF_PROBS_217_MASK (0x0000FF00) 7985 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_54_COEFF_PROBS_217_LSBMASK (0x000000FF) 7986 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_54_COEFF_PROBS_217_SHIFT (8) 7987 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_54_COEFF_PROBS_217_SIGNED_FIELD IMG_FALSE 7988 7989 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_54, COEFF_PROBS_218 7990 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_54_COEFF_PROBS_218_MASK (0x00FF0000) 7991 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_54_COEFF_PROBS_218_LSBMASK (0x000000FF) 7992 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_54_COEFF_PROBS_218_SHIFT (16) 7993 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_54_COEFF_PROBS_218_SIGNED_FIELD IMG_FALSE 7994 7995 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_54, COEFF_PROBS_219 7996 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_54_COEFF_PROBS_219_MASK (0xFF000000) 7997 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_54_COEFF_PROBS_219_LSBMASK (0x000000FF) 7998 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_54_COEFF_PROBS_219_SHIFT (24) 7999 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_54_COEFF_PROBS_219_SIGNED_FIELD IMG_FALSE 8000 8001 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_55_OFFSET (0x0CD0) 8002 8003 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_55, COEFF_PROBS_220 8004 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_55_COEFF_PROBS_220_MASK (0x000000FF) 8005 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_55_COEFF_PROBS_220_LSBMASK (0x000000FF) 8006 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_55_COEFF_PROBS_220_SHIFT (0) 8007 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_55_COEFF_PROBS_220_SIGNED_FIELD IMG_FALSE 8008 8009 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_55, COEFF_PROBS_221 8010 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_55_COEFF_PROBS_221_MASK (0x0000FF00) 8011 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_55_COEFF_PROBS_221_LSBMASK (0x000000FF) 8012 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_55_COEFF_PROBS_221_SHIFT (8) 8013 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_55_COEFF_PROBS_221_SIGNED_FIELD IMG_FALSE 8014 8015 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_55, COEFF_PROBS_222 8016 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_55_COEFF_PROBS_222_MASK (0x00FF0000) 8017 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_55_COEFF_PROBS_222_LSBMASK (0x000000FF) 8018 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_55_COEFF_PROBS_222_SHIFT (16) 8019 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_55_COEFF_PROBS_222_SIGNED_FIELD IMG_FALSE 8020 8021 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_55, COEFF_PROBS_223 8022 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_55_COEFF_PROBS_223_MASK (0xFF000000) 8023 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_55_COEFF_PROBS_223_LSBMASK (0x000000FF) 8024 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_55_COEFF_PROBS_223_SHIFT (24) 8025 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_55_COEFF_PROBS_223_SIGNED_FIELD IMG_FALSE 8026 8027 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_56_OFFSET (0x0CD4) 8028 8029 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_56, COEFF_PROBS_224 8030 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_56_COEFF_PROBS_224_MASK (0x000000FF) 8031 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_56_COEFF_PROBS_224_LSBMASK (0x000000FF) 8032 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_56_COEFF_PROBS_224_SHIFT (0) 8033 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_56_COEFF_PROBS_224_SIGNED_FIELD IMG_FALSE 8034 8035 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_56, COEFF_PROBS_225 8036 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_56_COEFF_PROBS_225_MASK (0x0000FF00) 8037 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_56_COEFF_PROBS_225_LSBMASK (0x000000FF) 8038 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_56_COEFF_PROBS_225_SHIFT (8) 8039 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_56_COEFF_PROBS_225_SIGNED_FIELD IMG_FALSE 8040 8041 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_56, COEFF_PROBS_226 8042 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_56_COEFF_PROBS_226_MASK (0x00FF0000) 8043 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_56_COEFF_PROBS_226_LSBMASK (0x000000FF) 8044 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_56_COEFF_PROBS_226_SHIFT (16) 8045 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_56_COEFF_PROBS_226_SIGNED_FIELD IMG_FALSE 8046 8047 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_56, COEFF_PROBS_227 8048 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_56_COEFF_PROBS_227_MASK (0xFF000000) 8049 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_56_COEFF_PROBS_227_LSBMASK (0x000000FF) 8050 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_56_COEFF_PROBS_227_SHIFT (24) 8051 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_56_COEFF_PROBS_227_SIGNED_FIELD IMG_FALSE 8052 8053 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_57_OFFSET (0x0CD8) 8054 8055 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_57, COEFF_PROBS_228 8056 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_57_COEFF_PROBS_228_MASK (0x000000FF) 8057 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_57_COEFF_PROBS_228_LSBMASK (0x000000FF) 8058 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_57_COEFF_PROBS_228_SHIFT (0) 8059 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_57_COEFF_PROBS_228_SIGNED_FIELD IMG_FALSE 8060 8061 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_57, COEFF_PROBS_229 8062 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_57_COEFF_PROBS_229_MASK (0x0000FF00) 8063 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_57_COEFF_PROBS_229_LSBMASK (0x000000FF) 8064 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_57_COEFF_PROBS_229_SHIFT (8) 8065 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_57_COEFF_PROBS_229_SIGNED_FIELD IMG_FALSE 8066 8067 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_57, COEFF_PROBS_230 8068 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_57_COEFF_PROBS_230_MASK (0x00FF0000) 8069 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_57_COEFF_PROBS_230_LSBMASK (0x000000FF) 8070 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_57_COEFF_PROBS_230_SHIFT (16) 8071 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_57_COEFF_PROBS_230_SIGNED_FIELD IMG_FALSE 8072 8073 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_57, COEFF_PROBS_231 8074 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_57_COEFF_PROBS_231_MASK (0xFF000000) 8075 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_57_COEFF_PROBS_231_LSBMASK (0x000000FF) 8076 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_57_COEFF_PROBS_231_SHIFT (24) 8077 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_57_COEFF_PROBS_231_SIGNED_FIELD IMG_FALSE 8078 8079 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_58_OFFSET (0x0CDC) 8080 8081 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_58, COEFF_PROBS_232 8082 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_58_COEFF_PROBS_232_MASK (0x000000FF) 8083 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_58_COEFF_PROBS_232_LSBMASK (0x000000FF) 8084 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_58_COEFF_PROBS_232_SHIFT (0) 8085 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_58_COEFF_PROBS_232_SIGNED_FIELD IMG_FALSE 8086 8087 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_58, COEFF_PROBS_233 8088 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_58_COEFF_PROBS_233_MASK (0x0000FF00) 8089 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_58_COEFF_PROBS_233_LSBMASK (0x000000FF) 8090 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_58_COEFF_PROBS_233_SHIFT (8) 8091 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_58_COEFF_PROBS_233_SIGNED_FIELD IMG_FALSE 8092 8093 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_58, COEFF_PROBS_234 8094 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_58_COEFF_PROBS_234_MASK (0x00FF0000) 8095 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_58_COEFF_PROBS_234_LSBMASK (0x000000FF) 8096 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_58_COEFF_PROBS_234_SHIFT (16) 8097 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_58_COEFF_PROBS_234_SIGNED_FIELD IMG_FALSE 8098 8099 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_58, COEFF_PROBS_235 8100 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_58_COEFF_PROBS_235_MASK (0xFF000000) 8101 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_58_COEFF_PROBS_235_LSBMASK (0x000000FF) 8102 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_58_COEFF_PROBS_235_SHIFT (24) 8103 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_58_COEFF_PROBS_235_SIGNED_FIELD IMG_FALSE 8104 8105 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_59_OFFSET (0x0CE0) 8106 8107 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_59, COEFF_PROBS_236 8108 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_59_COEFF_PROBS_236_MASK (0x000000FF) 8109 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_59_COEFF_PROBS_236_LSBMASK (0x000000FF) 8110 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_59_COEFF_PROBS_236_SHIFT (0) 8111 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_59_COEFF_PROBS_236_SIGNED_FIELD IMG_FALSE 8112 8113 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_59, COEFF_PROBS_237 8114 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_59_COEFF_PROBS_237_MASK (0x0000FF00) 8115 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_59_COEFF_PROBS_237_LSBMASK (0x000000FF) 8116 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_59_COEFF_PROBS_237_SHIFT (8) 8117 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_59_COEFF_PROBS_237_SIGNED_FIELD IMG_FALSE 8118 8119 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_59, COEFF_PROBS_238 8120 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_59_COEFF_PROBS_238_MASK (0x00FF0000) 8121 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_59_COEFF_PROBS_238_LSBMASK (0x000000FF) 8122 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_59_COEFF_PROBS_238_SHIFT (16) 8123 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_59_COEFF_PROBS_238_SIGNED_FIELD IMG_FALSE 8124 8125 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_59, COEFF_PROBS_239 8126 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_59_COEFF_PROBS_239_MASK (0xFF000000) 8127 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_59_COEFF_PROBS_239_LSBMASK (0x000000FF) 8128 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_59_COEFF_PROBS_239_SHIFT (24) 8129 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_59_COEFF_PROBS_239_SIGNED_FIELD IMG_FALSE 8130 8131 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_60_OFFSET (0x0CE4) 8132 8133 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_60, COEFF_PROBS_240 8134 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_60_COEFF_PROBS_240_MASK (0x000000FF) 8135 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_60_COEFF_PROBS_240_LSBMASK (0x000000FF) 8136 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_60_COEFF_PROBS_240_SHIFT (0) 8137 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_60_COEFF_PROBS_240_SIGNED_FIELD IMG_FALSE 8138 8139 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_60, COEFF_PROBS_241 8140 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_60_COEFF_PROBS_241_MASK (0x0000FF00) 8141 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_60_COEFF_PROBS_241_LSBMASK (0x000000FF) 8142 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_60_COEFF_PROBS_241_SHIFT (8) 8143 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_60_COEFF_PROBS_241_SIGNED_FIELD IMG_FALSE 8144 8145 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_60, COEFF_PROBS_242 8146 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_60_COEFF_PROBS_242_MASK (0x00FF0000) 8147 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_60_COEFF_PROBS_242_LSBMASK (0x000000FF) 8148 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_60_COEFF_PROBS_242_SHIFT (16) 8149 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_60_COEFF_PROBS_242_SIGNED_FIELD IMG_FALSE 8150 8151 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_60, COEFF_PROBS_243 8152 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_60_COEFF_PROBS_243_MASK (0xFF000000) 8153 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_60_COEFF_PROBS_243_LSBMASK (0x000000FF) 8154 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_60_COEFF_PROBS_243_SHIFT (24) 8155 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_60_COEFF_PROBS_243_SIGNED_FIELD IMG_FALSE 8156 8157 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_61_OFFSET (0x0CE8) 8158 8159 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_61, COEFF_PROBS_244 8160 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_61_COEFF_PROBS_244_MASK (0x000000FF) 8161 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_61_COEFF_PROBS_244_LSBMASK (0x000000FF) 8162 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_61_COEFF_PROBS_244_SHIFT (0) 8163 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_61_COEFF_PROBS_244_SIGNED_FIELD IMG_FALSE 8164 8165 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_61, COEFF_PROBS_245 8166 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_61_COEFF_PROBS_245_MASK (0x0000FF00) 8167 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_61_COEFF_PROBS_245_LSBMASK (0x000000FF) 8168 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_61_COEFF_PROBS_245_SHIFT (8) 8169 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_61_COEFF_PROBS_245_SIGNED_FIELD IMG_FALSE 8170 8171 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_61, COEFF_PROBS_246 8172 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_61_COEFF_PROBS_246_MASK (0x00FF0000) 8173 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_61_COEFF_PROBS_246_LSBMASK (0x000000FF) 8174 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_61_COEFF_PROBS_246_SHIFT (16) 8175 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_61_COEFF_PROBS_246_SIGNED_FIELD IMG_FALSE 8176 8177 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_61, COEFF_PROBS_247 8178 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_61_COEFF_PROBS_247_MASK (0xFF000000) 8179 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_61_COEFF_PROBS_247_LSBMASK (0x000000FF) 8180 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_61_COEFF_PROBS_247_SHIFT (24) 8181 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_61_COEFF_PROBS_247_SIGNED_FIELD IMG_FALSE 8182 8183 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_62_OFFSET (0x0CEC) 8184 8185 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_62, COEFF_PROBS_248 8186 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_62_COEFF_PROBS_248_MASK (0x000000FF) 8187 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_62_COEFF_PROBS_248_LSBMASK (0x000000FF) 8188 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_62_COEFF_PROBS_248_SHIFT (0) 8189 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_62_COEFF_PROBS_248_SIGNED_FIELD IMG_FALSE 8190 8191 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_62, COEFF_PROBS_249 8192 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_62_COEFF_PROBS_249_MASK (0x0000FF00) 8193 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_62_COEFF_PROBS_249_LSBMASK (0x000000FF) 8194 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_62_COEFF_PROBS_249_SHIFT (8) 8195 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_62_COEFF_PROBS_249_SIGNED_FIELD IMG_FALSE 8196 8197 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_62, COEFF_PROBS_250 8198 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_62_COEFF_PROBS_250_MASK (0x00FF0000) 8199 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_62_COEFF_PROBS_250_LSBMASK (0x000000FF) 8200 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_62_COEFF_PROBS_250_SHIFT (16) 8201 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_62_COEFF_PROBS_250_SIGNED_FIELD IMG_FALSE 8202 8203 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_62, COEFF_PROBS_251 8204 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_62_COEFF_PROBS_251_MASK (0xFF000000) 8205 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_62_COEFF_PROBS_251_LSBMASK (0x000000FF) 8206 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_62_COEFF_PROBS_251_SHIFT (24) 8207 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_62_COEFF_PROBS_251_SIGNED_FIELD IMG_FALSE 8208 8209 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_63_OFFSET (0x0CF0) 8210 8211 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_63, COEFF_PROBS_252 8212 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_63_COEFF_PROBS_252_MASK (0x000000FF) 8213 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_63_COEFF_PROBS_252_LSBMASK (0x000000FF) 8214 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_63_COEFF_PROBS_252_SHIFT (0) 8215 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_63_COEFF_PROBS_252_SIGNED_FIELD IMG_FALSE 8216 8217 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_63, COEFF_PROBS_253 8218 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_63_COEFF_PROBS_253_MASK (0x0000FF00) 8219 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_63_COEFF_PROBS_253_LSBMASK (0x000000FF) 8220 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_63_COEFF_PROBS_253_SHIFT (8) 8221 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_63_COEFF_PROBS_253_SIGNED_FIELD IMG_FALSE 8222 8223 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_63, COEFF_PROBS_254 8224 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_63_COEFF_PROBS_254_MASK (0x00FF0000) 8225 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_63_COEFF_PROBS_254_LSBMASK (0x000000FF) 8226 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_63_COEFF_PROBS_254_SHIFT (16) 8227 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_63_COEFF_PROBS_254_SIGNED_FIELD IMG_FALSE 8228 8229 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_63, COEFF_PROBS_255 8230 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_63_COEFF_PROBS_255_MASK (0xFF000000) 8231 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_63_COEFF_PROBS_255_LSBMASK (0x000000FF) 8232 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_63_COEFF_PROBS_255_SHIFT (24) 8233 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_63_COEFF_PROBS_255_SIGNED_FIELD IMG_FALSE 8234 8235 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_64_OFFSET (0x0CF4) 8236 8237 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_64, COEFF_PROBS_256 8238 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_64_COEFF_PROBS_256_MASK (0x000000FF) 8239 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_64_COEFF_PROBS_256_LSBMASK (0x000000FF) 8240 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_64_COEFF_PROBS_256_SHIFT (0) 8241 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_64_COEFF_PROBS_256_SIGNED_FIELD IMG_FALSE 8242 8243 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_64, COEFF_PROBS_257 8244 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_64_COEFF_PROBS_257_MASK (0x0000FF00) 8245 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_64_COEFF_PROBS_257_LSBMASK (0x000000FF) 8246 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_64_COEFF_PROBS_257_SHIFT (8) 8247 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_64_COEFF_PROBS_257_SIGNED_FIELD IMG_FALSE 8248 8249 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_64, COEFF_PROBS_258 8250 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_64_COEFF_PROBS_258_MASK (0x00FF0000) 8251 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_64_COEFF_PROBS_258_LSBMASK (0x000000FF) 8252 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_64_COEFF_PROBS_258_SHIFT (16) 8253 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_64_COEFF_PROBS_258_SIGNED_FIELD IMG_FALSE 8254 8255 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_64, COEFF_PROBS_259 8256 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_64_COEFF_PROBS_259_MASK (0xFF000000) 8257 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_64_COEFF_PROBS_259_LSBMASK (0x000000FF) 8258 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_64_COEFF_PROBS_259_SHIFT (24) 8259 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_64_COEFF_PROBS_259_SIGNED_FIELD IMG_FALSE 8260 8261 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_65_OFFSET (0x0CF8) 8262 8263 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_65, COEFF_PROBS_260 8264 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_65_COEFF_PROBS_260_MASK (0x000000FF) 8265 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_65_COEFF_PROBS_260_LSBMASK (0x000000FF) 8266 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_65_COEFF_PROBS_260_SHIFT (0) 8267 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_65_COEFF_PROBS_260_SIGNED_FIELD IMG_FALSE 8268 8269 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_65, COEFF_PROBS_261 8270 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_65_COEFF_PROBS_261_MASK (0x0000FF00) 8271 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_65_COEFF_PROBS_261_LSBMASK (0x000000FF) 8272 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_65_COEFF_PROBS_261_SHIFT (8) 8273 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_65_COEFF_PROBS_261_SIGNED_FIELD IMG_FALSE 8274 8275 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_65, COEFF_PROBS_262 8276 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_65_COEFF_PROBS_262_MASK (0x00FF0000) 8277 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_65_COEFF_PROBS_262_LSBMASK (0x000000FF) 8278 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_65_COEFF_PROBS_262_SHIFT (16) 8279 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_65_COEFF_PROBS_262_SIGNED_FIELD IMG_FALSE 8280 8281 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_65, COEFF_PROBS_263 8282 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_65_COEFF_PROBS_263_MASK (0xFF000000) 8283 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_65_COEFF_PROBS_263_LSBMASK (0x000000FF) 8284 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_65_COEFF_PROBS_263_SHIFT (24) 8285 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_65_COEFF_PROBS_263_SIGNED_FIELD IMG_FALSE 8286 8287 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_66_OFFSET (0x0CFC) 8288 8289 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_66, COEFF_PROBS_264 8290 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_66_COEFF_PROBS_264_MASK (0x000000FF) 8291 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_66_COEFF_PROBS_264_LSBMASK (0x000000FF) 8292 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_66_COEFF_PROBS_264_SHIFT (0) 8293 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_66_COEFF_PROBS_264_SIGNED_FIELD IMG_FALSE 8294 8295 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_66, COEFF_PROBS_265 8296 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_66_COEFF_PROBS_265_MASK (0x0000FF00) 8297 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_66_COEFF_PROBS_265_LSBMASK (0x000000FF) 8298 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_66_COEFF_PROBS_265_SHIFT (8) 8299 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_66_COEFF_PROBS_265_SIGNED_FIELD IMG_FALSE 8300 8301 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_66, COEFF_PROBS_266 8302 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_66_COEFF_PROBS_266_MASK (0x00FF0000) 8303 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_66_COEFF_PROBS_266_LSBMASK (0x000000FF) 8304 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_66_COEFF_PROBS_266_SHIFT (16) 8305 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_66_COEFF_PROBS_266_SIGNED_FIELD IMG_FALSE 8306 8307 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_66, COEFF_PROBS_267 8308 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_66_COEFF_PROBS_267_MASK (0xFF000000) 8309 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_66_COEFF_PROBS_267_LSBMASK (0x000000FF) 8310 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_66_COEFF_PROBS_267_SHIFT (24) 8311 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_66_COEFF_PROBS_267_SIGNED_FIELD IMG_FALSE 8312 8313 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_67_OFFSET (0x0D00) 8314 8315 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_67, COEFF_PROBS_268 8316 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_67_COEFF_PROBS_268_MASK (0x000000FF) 8317 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_67_COEFF_PROBS_268_LSBMASK (0x000000FF) 8318 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_67_COEFF_PROBS_268_SHIFT (0) 8319 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_67_COEFF_PROBS_268_SIGNED_FIELD IMG_FALSE 8320 8321 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_67, COEFF_PROBS_269 8322 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_67_COEFF_PROBS_269_MASK (0x0000FF00) 8323 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_67_COEFF_PROBS_269_LSBMASK (0x000000FF) 8324 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_67_COEFF_PROBS_269_SHIFT (8) 8325 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_67_COEFF_PROBS_269_SIGNED_FIELD IMG_FALSE 8326 8327 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_67, COEFF_PROBS_270 8328 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_67_COEFF_PROBS_270_MASK (0x00FF0000) 8329 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_67_COEFF_PROBS_270_LSBMASK (0x000000FF) 8330 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_67_COEFF_PROBS_270_SHIFT (16) 8331 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_67_COEFF_PROBS_270_SIGNED_FIELD IMG_FALSE 8332 8333 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_67, COEFF_PROBS_271 8334 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_67_COEFF_PROBS_271_MASK (0xFF000000) 8335 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_67_COEFF_PROBS_271_LSBMASK (0x000000FF) 8336 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_67_COEFF_PROBS_271_SHIFT (24) 8337 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_67_COEFF_PROBS_271_SIGNED_FIELD IMG_FALSE 8338 8339 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_68_OFFSET (0x0D04) 8340 8341 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_68, COEFF_PROBS_272 8342 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_68_COEFF_PROBS_272_MASK (0x000000FF) 8343 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_68_COEFF_PROBS_272_LSBMASK (0x000000FF) 8344 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_68_COEFF_PROBS_272_SHIFT (0) 8345 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_68_COEFF_PROBS_272_SIGNED_FIELD IMG_FALSE 8346 8347 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_68, COEFF_PROBS_273 8348 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_68_COEFF_PROBS_273_MASK (0x0000FF00) 8349 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_68_COEFF_PROBS_273_LSBMASK (0x000000FF) 8350 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_68_COEFF_PROBS_273_SHIFT (8) 8351 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_68_COEFF_PROBS_273_SIGNED_FIELD IMG_FALSE 8352 8353 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_68, COEFF_PROBS_274 8354 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_68_COEFF_PROBS_274_MASK (0x00FF0000) 8355 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_68_COEFF_PROBS_274_LSBMASK (0x000000FF) 8356 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_68_COEFF_PROBS_274_SHIFT (16) 8357 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_68_COEFF_PROBS_274_SIGNED_FIELD IMG_FALSE 8358 8359 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_68, COEFF_PROBS_275 8360 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_68_COEFF_PROBS_275_MASK (0xFF000000) 8361 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_68_COEFF_PROBS_275_LSBMASK (0x000000FF) 8362 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_68_COEFF_PROBS_275_SHIFT (24) 8363 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_68_COEFF_PROBS_275_SIGNED_FIELD IMG_FALSE 8364 8365 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_69_OFFSET (0x0D08) 8366 8367 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_69, COEFF_PROBS_276 8368 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_69_COEFF_PROBS_276_MASK (0x000000FF) 8369 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_69_COEFF_PROBS_276_LSBMASK (0x000000FF) 8370 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_69_COEFF_PROBS_276_SHIFT (0) 8371 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_69_COEFF_PROBS_276_SIGNED_FIELD IMG_FALSE 8372 8373 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_69, COEFF_PROBS_277 8374 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_69_COEFF_PROBS_277_MASK (0x0000FF00) 8375 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_69_COEFF_PROBS_277_LSBMASK (0x000000FF) 8376 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_69_COEFF_PROBS_277_SHIFT (8) 8377 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_69_COEFF_PROBS_277_SIGNED_FIELD IMG_FALSE 8378 8379 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_69, COEFF_PROBS_278 8380 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_69_COEFF_PROBS_278_MASK (0x00FF0000) 8381 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_69_COEFF_PROBS_278_LSBMASK (0x000000FF) 8382 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_69_COEFF_PROBS_278_SHIFT (16) 8383 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_69_COEFF_PROBS_278_SIGNED_FIELD IMG_FALSE 8384 8385 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_69, COEFF_PROBS_279 8386 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_69_COEFF_PROBS_279_MASK (0xFF000000) 8387 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_69_COEFF_PROBS_279_LSBMASK (0x000000FF) 8388 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_69_COEFF_PROBS_279_SHIFT (24) 8389 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_69_COEFF_PROBS_279_SIGNED_FIELD IMG_FALSE 8390 8391 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_70_OFFSET (0x0D0C) 8392 8393 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_70, COEFF_PROBS_280 8394 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_70_COEFF_PROBS_280_MASK (0x000000FF) 8395 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_70_COEFF_PROBS_280_LSBMASK (0x000000FF) 8396 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_70_COEFF_PROBS_280_SHIFT (0) 8397 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_70_COEFF_PROBS_280_SIGNED_FIELD IMG_FALSE 8398 8399 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_70, COEFF_PROBS_281 8400 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_70_COEFF_PROBS_281_MASK (0x0000FF00) 8401 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_70_COEFF_PROBS_281_LSBMASK (0x000000FF) 8402 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_70_COEFF_PROBS_281_SHIFT (8) 8403 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_70_COEFF_PROBS_281_SIGNED_FIELD IMG_FALSE 8404 8405 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_70, COEFF_PROBS_282 8406 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_70_COEFF_PROBS_282_MASK (0x00FF0000) 8407 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_70_COEFF_PROBS_282_LSBMASK (0x000000FF) 8408 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_70_COEFF_PROBS_282_SHIFT (16) 8409 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_70_COEFF_PROBS_282_SIGNED_FIELD IMG_FALSE 8410 8411 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_70, COEFF_PROBS_283 8412 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_70_COEFF_PROBS_283_MASK (0xFF000000) 8413 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_70_COEFF_PROBS_283_LSBMASK (0x000000FF) 8414 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_70_COEFF_PROBS_283_SHIFT (24) 8415 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_70_COEFF_PROBS_283_SIGNED_FIELD IMG_FALSE 8416 8417 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_71_OFFSET (0x0D10) 8418 8419 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_71, COEFF_PROBS_284 8420 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_71_COEFF_PROBS_284_MASK (0x000000FF) 8421 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_71_COEFF_PROBS_284_LSBMASK (0x000000FF) 8422 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_71_COEFF_PROBS_284_SHIFT (0) 8423 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_71_COEFF_PROBS_284_SIGNED_FIELD IMG_FALSE 8424 8425 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_71, COEFF_PROBS_285 8426 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_71_COEFF_PROBS_285_MASK (0x0000FF00) 8427 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_71_COEFF_PROBS_285_LSBMASK (0x000000FF) 8428 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_71_COEFF_PROBS_285_SHIFT (8) 8429 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_71_COEFF_PROBS_285_SIGNED_FIELD IMG_FALSE 8430 8431 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_71, COEFF_PROBS_286 8432 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_71_COEFF_PROBS_286_MASK (0x00FF0000) 8433 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_71_COEFF_PROBS_286_LSBMASK (0x000000FF) 8434 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_71_COEFF_PROBS_286_SHIFT (16) 8435 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_71_COEFF_PROBS_286_SIGNED_FIELD IMG_FALSE 8436 8437 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_71, COEFF_PROBS_287 8438 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_71_COEFF_PROBS_287_MASK (0xFF000000) 8439 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_71_COEFF_PROBS_287_LSBMASK (0x000000FF) 8440 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_71_COEFF_PROBS_287_SHIFT (24) 8441 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_71_COEFF_PROBS_287_SIGNED_FIELD IMG_FALSE 8442 8443 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_72_OFFSET (0x0D14) 8444 8445 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_72, COEFF_PROBS_288 8446 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_72_COEFF_PROBS_288_MASK (0x000000FF) 8447 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_72_COEFF_PROBS_288_LSBMASK (0x000000FF) 8448 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_72_COEFF_PROBS_288_SHIFT (0) 8449 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_72_COEFF_PROBS_288_SIGNED_FIELD IMG_FALSE 8450 8451 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_72, COEFF_PROBS_289 8452 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_72_COEFF_PROBS_289_MASK (0x0000FF00) 8453 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_72_COEFF_PROBS_289_LSBMASK (0x000000FF) 8454 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_72_COEFF_PROBS_289_SHIFT (8) 8455 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_72_COEFF_PROBS_289_SIGNED_FIELD IMG_FALSE 8456 8457 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_72, COEFF_PROBS_290 8458 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_72_COEFF_PROBS_290_MASK (0x00FF0000) 8459 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_72_COEFF_PROBS_290_LSBMASK (0x000000FF) 8460 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_72_COEFF_PROBS_290_SHIFT (16) 8461 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_72_COEFF_PROBS_290_SIGNED_FIELD IMG_FALSE 8462 8463 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_72, COEFF_PROBS_291 8464 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_72_COEFF_PROBS_291_MASK (0xFF000000) 8465 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_72_COEFF_PROBS_291_LSBMASK (0x000000FF) 8466 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_72_COEFF_PROBS_291_SHIFT (24) 8467 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_72_COEFF_PROBS_291_SIGNED_FIELD IMG_FALSE 8468 8469 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_73_OFFSET (0x0D18) 8470 8471 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_73, COEFF_PROBS_292 8472 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_73_COEFF_PROBS_292_MASK (0x000000FF) 8473 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_73_COEFF_PROBS_292_LSBMASK (0x000000FF) 8474 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_73_COEFF_PROBS_292_SHIFT (0) 8475 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_73_COEFF_PROBS_292_SIGNED_FIELD IMG_FALSE 8476 8477 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_73, COEFF_PROBS_293 8478 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_73_COEFF_PROBS_293_MASK (0x0000FF00) 8479 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_73_COEFF_PROBS_293_LSBMASK (0x000000FF) 8480 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_73_COEFF_PROBS_293_SHIFT (8) 8481 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_73_COEFF_PROBS_293_SIGNED_FIELD IMG_FALSE 8482 8483 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_73, COEFF_PROBS_294 8484 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_73_COEFF_PROBS_294_MASK (0x00FF0000) 8485 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_73_COEFF_PROBS_294_LSBMASK (0x000000FF) 8486 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_73_COEFF_PROBS_294_SHIFT (16) 8487 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_73_COEFF_PROBS_294_SIGNED_FIELD IMG_FALSE 8488 8489 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_73, COEFF_PROBS_295 8490 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_73_COEFF_PROBS_295_MASK (0xFF000000) 8491 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_73_COEFF_PROBS_295_LSBMASK (0x000000FF) 8492 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_73_COEFF_PROBS_295_SHIFT (24) 8493 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_73_COEFF_PROBS_295_SIGNED_FIELD IMG_FALSE 8494 8495 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_74_OFFSET (0x0D1C) 8496 8497 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_74, COEFF_PROBS_296 8498 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_74_COEFF_PROBS_296_MASK (0x000000FF) 8499 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_74_COEFF_PROBS_296_LSBMASK (0x000000FF) 8500 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_74_COEFF_PROBS_296_SHIFT (0) 8501 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_74_COEFF_PROBS_296_SIGNED_FIELD IMG_FALSE 8502 8503 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_74, COEFF_PROBS_297 8504 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_74_COEFF_PROBS_297_MASK (0x0000FF00) 8505 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_74_COEFF_PROBS_297_LSBMASK (0x000000FF) 8506 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_74_COEFF_PROBS_297_SHIFT (8) 8507 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_74_COEFF_PROBS_297_SIGNED_FIELD IMG_FALSE 8508 8509 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_74, COEFF_PROBS_298 8510 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_74_COEFF_PROBS_298_MASK (0x00FF0000) 8511 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_74_COEFF_PROBS_298_LSBMASK (0x000000FF) 8512 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_74_COEFF_PROBS_298_SHIFT (16) 8513 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_74_COEFF_PROBS_298_SIGNED_FIELD IMG_FALSE 8514 8515 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_74, COEFF_PROBS_299 8516 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_74_COEFF_PROBS_299_MASK (0xFF000000) 8517 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_74_COEFF_PROBS_299_LSBMASK (0x000000FF) 8518 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_74_COEFF_PROBS_299_SHIFT (24) 8519 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_74_COEFF_PROBS_299_SIGNED_FIELD IMG_FALSE 8520 8521 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_75_OFFSET (0x0D20) 8522 8523 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_75, COEFF_PROBS_300 8524 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_75_COEFF_PROBS_300_MASK (0x000000FF) 8525 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_75_COEFF_PROBS_300_LSBMASK (0x000000FF) 8526 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_75_COEFF_PROBS_300_SHIFT (0) 8527 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_75_COEFF_PROBS_300_SIGNED_FIELD IMG_FALSE 8528 8529 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_75, COEFF_PROBS_301 8530 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_75_COEFF_PROBS_301_MASK (0x0000FF00) 8531 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_75_COEFF_PROBS_301_LSBMASK (0x000000FF) 8532 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_75_COEFF_PROBS_301_SHIFT (8) 8533 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_75_COEFF_PROBS_301_SIGNED_FIELD IMG_FALSE 8534 8535 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_75, COEFF_PROBS_302 8536 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_75_COEFF_PROBS_302_MASK (0x00FF0000) 8537 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_75_COEFF_PROBS_302_LSBMASK (0x000000FF) 8538 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_75_COEFF_PROBS_302_SHIFT (16) 8539 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_75_COEFF_PROBS_302_SIGNED_FIELD IMG_FALSE 8540 8541 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_75, COEFF_PROBS_303 8542 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_75_COEFF_PROBS_303_MASK (0xFF000000) 8543 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_75_COEFF_PROBS_303_LSBMASK (0x000000FF) 8544 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_75_COEFF_PROBS_303_SHIFT (24) 8545 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_75_COEFF_PROBS_303_SIGNED_FIELD IMG_FALSE 8546 8547 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_76_OFFSET (0x0D24) 8548 8549 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_76, COEFF_PROBS_304 8550 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_76_COEFF_PROBS_304_MASK (0x000000FF) 8551 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_76_COEFF_PROBS_304_LSBMASK (0x000000FF) 8552 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_76_COEFF_PROBS_304_SHIFT (0) 8553 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_76_COEFF_PROBS_304_SIGNED_FIELD IMG_FALSE 8554 8555 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_76, COEFF_PROBS_305 8556 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_76_COEFF_PROBS_305_MASK (0x0000FF00) 8557 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_76_COEFF_PROBS_305_LSBMASK (0x000000FF) 8558 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_76_COEFF_PROBS_305_SHIFT (8) 8559 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_76_COEFF_PROBS_305_SIGNED_FIELD IMG_FALSE 8560 8561 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_76, COEFF_PROBS_306 8562 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_76_COEFF_PROBS_306_MASK (0x00FF0000) 8563 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_76_COEFF_PROBS_306_LSBMASK (0x000000FF) 8564 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_76_COEFF_PROBS_306_SHIFT (16) 8565 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_76_COEFF_PROBS_306_SIGNED_FIELD IMG_FALSE 8566 8567 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_76, COEFF_PROBS_307 8568 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_76_COEFF_PROBS_307_MASK (0xFF000000) 8569 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_76_COEFF_PROBS_307_LSBMASK (0x000000FF) 8570 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_76_COEFF_PROBS_307_SHIFT (24) 8571 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_76_COEFF_PROBS_307_SIGNED_FIELD IMG_FALSE 8572 8573 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_77_OFFSET (0x0D28) 8574 8575 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_77, COEFF_PROBS_308 8576 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_77_COEFF_PROBS_308_MASK (0x000000FF) 8577 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_77_COEFF_PROBS_308_LSBMASK (0x000000FF) 8578 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_77_COEFF_PROBS_308_SHIFT (0) 8579 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_77_COEFF_PROBS_308_SIGNED_FIELD IMG_FALSE 8580 8581 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_77, COEFF_PROBS_309 8582 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_77_COEFF_PROBS_309_MASK (0x0000FF00) 8583 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_77_COEFF_PROBS_309_LSBMASK (0x000000FF) 8584 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_77_COEFF_PROBS_309_SHIFT (8) 8585 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_77_COEFF_PROBS_309_SIGNED_FIELD IMG_FALSE 8586 8587 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_77, COEFF_PROBS_310 8588 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_77_COEFF_PROBS_310_MASK (0x00FF0000) 8589 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_77_COEFF_PROBS_310_LSBMASK (0x000000FF) 8590 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_77_COEFF_PROBS_310_SHIFT (16) 8591 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_77_COEFF_PROBS_310_SIGNED_FIELD IMG_FALSE 8592 8593 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_77, COEFF_PROBS_311 8594 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_77_COEFF_PROBS_311_MASK (0xFF000000) 8595 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_77_COEFF_PROBS_311_LSBMASK (0x000000FF) 8596 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_77_COEFF_PROBS_311_SHIFT (24) 8597 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_77_COEFF_PROBS_311_SIGNED_FIELD IMG_FALSE 8598 8599 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_78_OFFSET (0x0D2C) 8600 8601 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_78, COEFF_PROBS_312 8602 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_78_COEFF_PROBS_312_MASK (0x000000FF) 8603 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_78_COEFF_PROBS_312_LSBMASK (0x000000FF) 8604 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_78_COEFF_PROBS_312_SHIFT (0) 8605 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_78_COEFF_PROBS_312_SIGNED_FIELD IMG_FALSE 8606 8607 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_78, COEFF_PROBS_313 8608 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_78_COEFF_PROBS_313_MASK (0x0000FF00) 8609 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_78_COEFF_PROBS_313_LSBMASK (0x000000FF) 8610 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_78_COEFF_PROBS_313_SHIFT (8) 8611 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_78_COEFF_PROBS_313_SIGNED_FIELD IMG_FALSE 8612 8613 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_78, COEFF_PROBS_314 8614 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_78_COEFF_PROBS_314_MASK (0x00FF0000) 8615 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_78_COEFF_PROBS_314_LSBMASK (0x000000FF) 8616 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_78_COEFF_PROBS_314_SHIFT (16) 8617 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_78_COEFF_PROBS_314_SIGNED_FIELD IMG_FALSE 8618 8619 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_78, COEFF_PROBS_315 8620 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_78_COEFF_PROBS_315_MASK (0xFF000000) 8621 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_78_COEFF_PROBS_315_LSBMASK (0x000000FF) 8622 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_78_COEFF_PROBS_315_SHIFT (24) 8623 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_78_COEFF_PROBS_315_SIGNED_FIELD IMG_FALSE 8624 8625 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_79_OFFSET (0x0D30) 8626 8627 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_79, COEFF_PROBS_316 8628 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_79_COEFF_PROBS_316_MASK (0x000000FF) 8629 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_79_COEFF_PROBS_316_LSBMASK (0x000000FF) 8630 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_79_COEFF_PROBS_316_SHIFT (0) 8631 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_79_COEFF_PROBS_316_SIGNED_FIELD IMG_FALSE 8632 8633 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_79, COEFF_PROBS_317 8634 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_79_COEFF_PROBS_317_MASK (0x0000FF00) 8635 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_79_COEFF_PROBS_317_LSBMASK (0x000000FF) 8636 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_79_COEFF_PROBS_317_SHIFT (8) 8637 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_79_COEFF_PROBS_317_SIGNED_FIELD IMG_FALSE 8638 8639 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_79, COEFF_PROBS_318 8640 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_79_COEFF_PROBS_318_MASK (0x00FF0000) 8641 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_79_COEFF_PROBS_318_LSBMASK (0x000000FF) 8642 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_79_COEFF_PROBS_318_SHIFT (16) 8643 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_79_COEFF_PROBS_318_SIGNED_FIELD IMG_FALSE 8644 8645 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_79, COEFF_PROBS_319 8646 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_79_COEFF_PROBS_319_MASK (0xFF000000) 8647 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_79_COEFF_PROBS_319_LSBMASK (0x000000FF) 8648 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_79_COEFF_PROBS_319_SHIFT (24) 8649 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_79_COEFF_PROBS_319_SIGNED_FIELD IMG_FALSE 8650 8651 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_80_OFFSET (0x0D34) 8652 8653 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_80, COEFF_PROBS_320 8654 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_80_COEFF_PROBS_320_MASK (0x000000FF) 8655 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_80_COEFF_PROBS_320_LSBMASK (0x000000FF) 8656 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_80_COEFF_PROBS_320_SHIFT (0) 8657 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_80_COEFF_PROBS_320_SIGNED_FIELD IMG_FALSE 8658 8659 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_80, COEFF_PROBS_321 8660 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_80_COEFF_PROBS_321_MASK (0x0000FF00) 8661 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_80_COEFF_PROBS_321_LSBMASK (0x000000FF) 8662 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_80_COEFF_PROBS_321_SHIFT (8) 8663 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_80_COEFF_PROBS_321_SIGNED_FIELD IMG_FALSE 8664 8665 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_80, COEFF_PROBS_322 8666 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_80_COEFF_PROBS_322_MASK (0x00FF0000) 8667 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_80_COEFF_PROBS_322_LSBMASK (0x000000FF) 8668 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_80_COEFF_PROBS_322_SHIFT (16) 8669 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_80_COEFF_PROBS_322_SIGNED_FIELD IMG_FALSE 8670 8671 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_80, COEFF_PROBS_323 8672 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_80_COEFF_PROBS_323_MASK (0xFF000000) 8673 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_80_COEFF_PROBS_323_LSBMASK (0x000000FF) 8674 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_80_COEFF_PROBS_323_SHIFT (24) 8675 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_80_COEFF_PROBS_323_SIGNED_FIELD IMG_FALSE 8676 8677 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_81_OFFSET (0x0D38) 8678 8679 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_81, COEFF_PROBS_324 8680 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_81_COEFF_PROBS_324_MASK (0x000000FF) 8681 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_81_COEFF_PROBS_324_LSBMASK (0x000000FF) 8682 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_81_COEFF_PROBS_324_SHIFT (0) 8683 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_81_COEFF_PROBS_324_SIGNED_FIELD IMG_FALSE 8684 8685 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_81, COEFF_PROBS_325 8686 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_81_COEFF_PROBS_325_MASK (0x0000FF00) 8687 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_81_COEFF_PROBS_325_LSBMASK (0x000000FF) 8688 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_81_COEFF_PROBS_325_SHIFT (8) 8689 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_81_COEFF_PROBS_325_SIGNED_FIELD IMG_FALSE 8690 8691 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_81, COEFF_PROBS_326 8692 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_81_COEFF_PROBS_326_MASK (0x00FF0000) 8693 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_81_COEFF_PROBS_326_LSBMASK (0x000000FF) 8694 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_81_COEFF_PROBS_326_SHIFT (16) 8695 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_81_COEFF_PROBS_326_SIGNED_FIELD IMG_FALSE 8696 8697 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_81, COEFF_PROBS_327 8698 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_81_COEFF_PROBS_327_MASK (0xFF000000) 8699 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_81_COEFF_PROBS_327_LSBMASK (0x000000FF) 8700 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_81_COEFF_PROBS_327_SHIFT (24) 8701 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_81_COEFF_PROBS_327_SIGNED_FIELD IMG_FALSE 8702 8703 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_82_OFFSET (0x0D3C) 8704 8705 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_82, COEFF_PROBS_328 8706 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_82_COEFF_PROBS_328_MASK (0x000000FF) 8707 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_82_COEFF_PROBS_328_LSBMASK (0x000000FF) 8708 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_82_COEFF_PROBS_328_SHIFT (0) 8709 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_82_COEFF_PROBS_328_SIGNED_FIELD IMG_FALSE 8710 8711 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_82, COEFF_PROBS_329 8712 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_82_COEFF_PROBS_329_MASK (0x0000FF00) 8713 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_82_COEFF_PROBS_329_LSBMASK (0x000000FF) 8714 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_82_COEFF_PROBS_329_SHIFT (8) 8715 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_82_COEFF_PROBS_329_SIGNED_FIELD IMG_FALSE 8716 8717 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_82, COEFF_PROBS_330 8718 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_82_COEFF_PROBS_330_MASK (0x00FF0000) 8719 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_82_COEFF_PROBS_330_LSBMASK (0x000000FF) 8720 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_82_COEFF_PROBS_330_SHIFT (16) 8721 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_82_COEFF_PROBS_330_SIGNED_FIELD IMG_FALSE 8722 8723 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_82, COEFF_PROBS_331 8724 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_82_COEFF_PROBS_331_MASK (0xFF000000) 8725 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_82_COEFF_PROBS_331_LSBMASK (0x000000FF) 8726 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_82_COEFF_PROBS_331_SHIFT (24) 8727 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_82_COEFF_PROBS_331_SIGNED_FIELD IMG_FALSE 8728 8729 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_83_OFFSET (0x0D40) 8730 8731 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_83, COEFF_PROBS_332 8732 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_83_COEFF_PROBS_332_MASK (0x000000FF) 8733 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_83_COEFF_PROBS_332_LSBMASK (0x000000FF) 8734 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_83_COEFF_PROBS_332_SHIFT (0) 8735 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_83_COEFF_PROBS_332_SIGNED_FIELD IMG_FALSE 8736 8737 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_83, COEFF_PROBS_333 8738 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_83_COEFF_PROBS_333_MASK (0x0000FF00) 8739 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_83_COEFF_PROBS_333_LSBMASK (0x000000FF) 8740 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_83_COEFF_PROBS_333_SHIFT (8) 8741 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_83_COEFF_PROBS_333_SIGNED_FIELD IMG_FALSE 8742 8743 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_83, COEFF_PROBS_334 8744 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_83_COEFF_PROBS_334_MASK (0x00FF0000) 8745 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_83_COEFF_PROBS_334_LSBMASK (0x000000FF) 8746 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_83_COEFF_PROBS_334_SHIFT (16) 8747 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_83_COEFF_PROBS_334_SIGNED_FIELD IMG_FALSE 8748 8749 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_83, COEFF_PROBS_335 8750 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_83_COEFF_PROBS_335_MASK (0xFF000000) 8751 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_83_COEFF_PROBS_335_LSBMASK (0x000000FF) 8752 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_83_COEFF_PROBS_335_SHIFT (24) 8753 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_83_COEFF_PROBS_335_SIGNED_FIELD IMG_FALSE 8754 8755 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_84_OFFSET (0x0D44) 8756 8757 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_84, COEFF_PROBS_336 8758 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_84_COEFF_PROBS_336_MASK (0x000000FF) 8759 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_84_COEFF_PROBS_336_LSBMASK (0x000000FF) 8760 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_84_COEFF_PROBS_336_SHIFT (0) 8761 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_84_COEFF_PROBS_336_SIGNED_FIELD IMG_FALSE 8762 8763 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_84, COEFF_PROBS_337 8764 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_84_COEFF_PROBS_337_MASK (0x0000FF00) 8765 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_84_COEFF_PROBS_337_LSBMASK (0x000000FF) 8766 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_84_COEFF_PROBS_337_SHIFT (8) 8767 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_84_COEFF_PROBS_337_SIGNED_FIELD IMG_FALSE 8768 8769 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_84, COEFF_PROBS_338 8770 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_84_COEFF_PROBS_338_MASK (0x00FF0000) 8771 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_84_COEFF_PROBS_338_LSBMASK (0x000000FF) 8772 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_84_COEFF_PROBS_338_SHIFT (16) 8773 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_84_COEFF_PROBS_338_SIGNED_FIELD IMG_FALSE 8774 8775 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_84, COEFF_PROBS_339 8776 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_84_COEFF_PROBS_339_MASK (0xFF000000) 8777 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_84_COEFF_PROBS_339_LSBMASK (0x000000FF) 8778 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_84_COEFF_PROBS_339_SHIFT (24) 8779 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_84_COEFF_PROBS_339_SIGNED_FIELD IMG_FALSE 8780 8781 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_85_OFFSET (0x0D48) 8782 8783 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_85, COEFF_PROBS_340 8784 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_85_COEFF_PROBS_340_MASK (0x000000FF) 8785 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_85_COEFF_PROBS_340_LSBMASK (0x000000FF) 8786 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_85_COEFF_PROBS_340_SHIFT (0) 8787 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_85_COEFF_PROBS_340_SIGNED_FIELD IMG_FALSE 8788 8789 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_85, COEFF_PROBS_341 8790 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_85_COEFF_PROBS_341_MASK (0x0000FF00) 8791 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_85_COEFF_PROBS_341_LSBMASK (0x000000FF) 8792 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_85_COEFF_PROBS_341_SHIFT (8) 8793 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_85_COEFF_PROBS_341_SIGNED_FIELD IMG_FALSE 8794 8795 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_85, COEFF_PROBS_342 8796 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_85_COEFF_PROBS_342_MASK (0x00FF0000) 8797 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_85_COEFF_PROBS_342_LSBMASK (0x000000FF) 8798 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_85_COEFF_PROBS_342_SHIFT (16) 8799 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_85_COEFF_PROBS_342_SIGNED_FIELD IMG_FALSE 8800 8801 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_85, COEFF_PROBS_343 8802 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_85_COEFF_PROBS_343_MASK (0xFF000000) 8803 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_85_COEFF_PROBS_343_LSBMASK (0x000000FF) 8804 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_85_COEFF_PROBS_343_SHIFT (24) 8805 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_85_COEFF_PROBS_343_SIGNED_FIELD IMG_FALSE 8806 8807 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_86_OFFSET (0x0D4C) 8808 8809 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_86, COEFF_PROBS_344 8810 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_86_COEFF_PROBS_344_MASK (0x000000FF) 8811 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_86_COEFF_PROBS_344_LSBMASK (0x000000FF) 8812 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_86_COEFF_PROBS_344_SHIFT (0) 8813 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_86_COEFF_PROBS_344_SIGNED_FIELD IMG_FALSE 8814 8815 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_86, COEFF_PROBS_345 8816 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_86_COEFF_PROBS_345_MASK (0x0000FF00) 8817 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_86_COEFF_PROBS_345_LSBMASK (0x000000FF) 8818 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_86_COEFF_PROBS_345_SHIFT (8) 8819 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_86_COEFF_PROBS_345_SIGNED_FIELD IMG_FALSE 8820 8821 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_86, COEFF_PROBS_346 8822 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_86_COEFF_PROBS_346_MASK (0x00FF0000) 8823 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_86_COEFF_PROBS_346_LSBMASK (0x000000FF) 8824 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_86_COEFF_PROBS_346_SHIFT (16) 8825 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_86_COEFF_PROBS_346_SIGNED_FIELD IMG_FALSE 8826 8827 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_86, COEFF_PROBS_347 8828 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_86_COEFF_PROBS_347_MASK (0xFF000000) 8829 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_86_COEFF_PROBS_347_LSBMASK (0x000000FF) 8830 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_86_COEFF_PROBS_347_SHIFT (24) 8831 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_86_COEFF_PROBS_347_SIGNED_FIELD IMG_FALSE 8832 8833 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_87_OFFSET (0x0D50) 8834 8835 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_87, COEFF_PROBS_348 8836 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_87_COEFF_PROBS_348_MASK (0x000000FF) 8837 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_87_COEFF_PROBS_348_LSBMASK (0x000000FF) 8838 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_87_COEFF_PROBS_348_SHIFT (0) 8839 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_87_COEFF_PROBS_348_SIGNED_FIELD IMG_FALSE 8840 8841 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_87, COEFF_PROBS_349 8842 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_87_COEFF_PROBS_349_MASK (0x0000FF00) 8843 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_87_COEFF_PROBS_349_LSBMASK (0x000000FF) 8844 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_87_COEFF_PROBS_349_SHIFT (8) 8845 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_87_COEFF_PROBS_349_SIGNED_FIELD IMG_FALSE 8846 8847 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_87, COEFF_PROBS_350 8848 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_87_COEFF_PROBS_350_MASK (0x00FF0000) 8849 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_87_COEFF_PROBS_350_LSBMASK (0x000000FF) 8850 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_87_COEFF_PROBS_350_SHIFT (16) 8851 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_87_COEFF_PROBS_350_SIGNED_FIELD IMG_FALSE 8852 8853 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_87, COEFF_PROBS_351 8854 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_87_COEFF_PROBS_351_MASK (0xFF000000) 8855 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_87_COEFF_PROBS_351_LSBMASK (0x000000FF) 8856 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_87_COEFF_PROBS_351_SHIFT (24) 8857 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_87_COEFF_PROBS_351_SIGNED_FIELD IMG_FALSE 8858 8859 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_88_OFFSET (0x0D54) 8860 8861 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_88, COEFF_PROBS_352 8862 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_88_COEFF_PROBS_352_MASK (0x000000FF) 8863 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_88_COEFF_PROBS_352_LSBMASK (0x000000FF) 8864 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_88_COEFF_PROBS_352_SHIFT (0) 8865 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_88_COEFF_PROBS_352_SIGNED_FIELD IMG_FALSE 8866 8867 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_88, COEFF_PROBS_353 8868 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_88_COEFF_PROBS_353_MASK (0x0000FF00) 8869 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_88_COEFF_PROBS_353_LSBMASK (0x000000FF) 8870 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_88_COEFF_PROBS_353_SHIFT (8) 8871 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_88_COEFF_PROBS_353_SIGNED_FIELD IMG_FALSE 8872 8873 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_88, COEFF_PROBS_354 8874 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_88_COEFF_PROBS_354_MASK (0x00FF0000) 8875 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_88_COEFF_PROBS_354_LSBMASK (0x000000FF) 8876 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_88_COEFF_PROBS_354_SHIFT (16) 8877 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_88_COEFF_PROBS_354_SIGNED_FIELD IMG_FALSE 8878 8879 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_88, COEFF_PROBS_355 8880 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_88_COEFF_PROBS_355_MASK (0xFF000000) 8881 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_88_COEFF_PROBS_355_LSBMASK (0x000000FF) 8882 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_88_COEFF_PROBS_355_SHIFT (24) 8883 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_88_COEFF_PROBS_355_SIGNED_FIELD IMG_FALSE 8884 8885 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_89_OFFSET (0x0D58) 8886 8887 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_89, COEFF_PROBS_356 8888 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_89_COEFF_PROBS_356_MASK (0x000000FF) 8889 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_89_COEFF_PROBS_356_LSBMASK (0x000000FF) 8890 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_89_COEFF_PROBS_356_SHIFT (0) 8891 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_89_COEFF_PROBS_356_SIGNED_FIELD IMG_FALSE 8892 8893 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_89, COEFF_PROBS_357 8894 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_89_COEFF_PROBS_357_MASK (0x0000FF00) 8895 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_89_COEFF_PROBS_357_LSBMASK (0x000000FF) 8896 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_89_COEFF_PROBS_357_SHIFT (8) 8897 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_89_COEFF_PROBS_357_SIGNED_FIELD IMG_FALSE 8898 8899 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_89, COEFF_PROBS_358 8900 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_89_COEFF_PROBS_358_MASK (0x00FF0000) 8901 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_89_COEFF_PROBS_358_LSBMASK (0x000000FF) 8902 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_89_COEFF_PROBS_358_SHIFT (16) 8903 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_89_COEFF_PROBS_358_SIGNED_FIELD IMG_FALSE 8904 8905 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_89, COEFF_PROBS_359 8906 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_89_COEFF_PROBS_359_MASK (0xFF000000) 8907 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_89_COEFF_PROBS_359_LSBMASK (0x000000FF) 8908 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_89_COEFF_PROBS_359_SHIFT (24) 8909 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_89_COEFF_PROBS_359_SIGNED_FIELD IMG_FALSE 8910 8911 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_90_OFFSET (0x0D5C) 8912 8913 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_90, COEFF_PROBS_360 8914 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_90_COEFF_PROBS_360_MASK (0x000000FF) 8915 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_90_COEFF_PROBS_360_LSBMASK (0x000000FF) 8916 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_90_COEFF_PROBS_360_SHIFT (0) 8917 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_90_COEFF_PROBS_360_SIGNED_FIELD IMG_FALSE 8918 8919 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_90, COEFF_PROBS_361 8920 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_90_COEFF_PROBS_361_MASK (0x0000FF00) 8921 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_90_COEFF_PROBS_361_LSBMASK (0x000000FF) 8922 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_90_COEFF_PROBS_361_SHIFT (8) 8923 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_90_COEFF_PROBS_361_SIGNED_FIELD IMG_FALSE 8924 8925 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_90, COEFF_PROBS_362 8926 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_90_COEFF_PROBS_362_MASK (0x00FF0000) 8927 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_90_COEFF_PROBS_362_LSBMASK (0x000000FF) 8928 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_90_COEFF_PROBS_362_SHIFT (16) 8929 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_90_COEFF_PROBS_362_SIGNED_FIELD IMG_FALSE 8930 8931 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_90, COEFF_PROBS_363 8932 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_90_COEFF_PROBS_363_MASK (0xFF000000) 8933 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_90_COEFF_PROBS_363_LSBMASK (0x000000FF) 8934 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_90_COEFF_PROBS_363_SHIFT (24) 8935 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_90_COEFF_PROBS_363_SIGNED_FIELD IMG_FALSE 8936 8937 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_91_OFFSET (0x0D60) 8938 8939 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_91, COEFF_PROBS_364 8940 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_91_COEFF_PROBS_364_MASK (0x000000FF) 8941 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_91_COEFF_PROBS_364_LSBMASK (0x000000FF) 8942 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_91_COEFF_PROBS_364_SHIFT (0) 8943 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_91_COEFF_PROBS_364_SIGNED_FIELD IMG_FALSE 8944 8945 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_91, COEFF_PROBS_365 8946 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_91_COEFF_PROBS_365_MASK (0x0000FF00) 8947 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_91_COEFF_PROBS_365_LSBMASK (0x000000FF) 8948 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_91_COEFF_PROBS_365_SHIFT (8) 8949 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_91_COEFF_PROBS_365_SIGNED_FIELD IMG_FALSE 8950 8951 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_91, COEFF_PROBS_366 8952 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_91_COEFF_PROBS_366_MASK (0x00FF0000) 8953 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_91_COEFF_PROBS_366_LSBMASK (0x000000FF) 8954 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_91_COEFF_PROBS_366_SHIFT (16) 8955 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_91_COEFF_PROBS_366_SIGNED_FIELD IMG_FALSE 8956 8957 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_91, COEFF_PROBS_367 8958 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_91_COEFF_PROBS_367_MASK (0xFF000000) 8959 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_91_COEFF_PROBS_367_LSBMASK (0x000000FF) 8960 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_91_COEFF_PROBS_367_SHIFT (24) 8961 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_91_COEFF_PROBS_367_SIGNED_FIELD IMG_FALSE 8962 8963 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_92_OFFSET (0x0D64) 8964 8965 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_92, COEFF_PROBS_368 8966 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_92_COEFF_PROBS_368_MASK (0x000000FF) 8967 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_92_COEFF_PROBS_368_LSBMASK (0x000000FF) 8968 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_92_COEFF_PROBS_368_SHIFT (0) 8969 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_92_COEFF_PROBS_368_SIGNED_FIELD IMG_FALSE 8970 8971 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_92, COEFF_PROBS_369 8972 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_92_COEFF_PROBS_369_MASK (0x0000FF00) 8973 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_92_COEFF_PROBS_369_LSBMASK (0x000000FF) 8974 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_92_COEFF_PROBS_369_SHIFT (8) 8975 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_92_COEFF_PROBS_369_SIGNED_FIELD IMG_FALSE 8976 8977 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_92, COEFF_PROBS_370 8978 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_92_COEFF_PROBS_370_MASK (0x00FF0000) 8979 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_92_COEFF_PROBS_370_LSBMASK (0x000000FF) 8980 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_92_COEFF_PROBS_370_SHIFT (16) 8981 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_92_COEFF_PROBS_370_SIGNED_FIELD IMG_FALSE 8982 8983 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_92, COEFF_PROBS_371 8984 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_92_COEFF_PROBS_371_MASK (0xFF000000) 8985 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_92_COEFF_PROBS_371_LSBMASK (0x000000FF) 8986 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_92_COEFF_PROBS_371_SHIFT (24) 8987 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_92_COEFF_PROBS_371_SIGNED_FIELD IMG_FALSE 8988 8989 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_93_OFFSET (0x0D68) 8990 8991 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_93, COEFF_PROBS_372 8992 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_93_COEFF_PROBS_372_MASK (0x000000FF) 8993 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_93_COEFF_PROBS_372_LSBMASK (0x000000FF) 8994 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_93_COEFF_PROBS_372_SHIFT (0) 8995 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_93_COEFF_PROBS_372_SIGNED_FIELD IMG_FALSE 8996 8997 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_93, COEFF_PROBS_373 8998 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_93_COEFF_PROBS_373_MASK (0x0000FF00) 8999 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_93_COEFF_PROBS_373_LSBMASK (0x000000FF) 9000 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_93_COEFF_PROBS_373_SHIFT (8) 9001 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_93_COEFF_PROBS_373_SIGNED_FIELD IMG_FALSE 9002 9003 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_93, COEFF_PROBS_374 9004 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_93_COEFF_PROBS_374_MASK (0x00FF0000) 9005 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_93_COEFF_PROBS_374_LSBMASK (0x000000FF) 9006 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_93_COEFF_PROBS_374_SHIFT (16) 9007 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_93_COEFF_PROBS_374_SIGNED_FIELD IMG_FALSE 9008 9009 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_93, COEFF_PROBS_375 9010 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_93_COEFF_PROBS_375_MASK (0xFF000000) 9011 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_93_COEFF_PROBS_375_LSBMASK (0x000000FF) 9012 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_93_COEFF_PROBS_375_SHIFT (24) 9013 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_93_COEFF_PROBS_375_SIGNED_FIELD IMG_FALSE 9014 9015 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_94_OFFSET (0x0D6C) 9016 9017 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_94, COEFF_PROBS_376 9018 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_94_COEFF_PROBS_376_MASK (0x000000FF) 9019 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_94_COEFF_PROBS_376_LSBMASK (0x000000FF) 9020 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_94_COEFF_PROBS_376_SHIFT (0) 9021 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_94_COEFF_PROBS_376_SIGNED_FIELD IMG_FALSE 9022 9023 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_94, COEFF_PROBS_377 9024 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_94_COEFF_PROBS_377_MASK (0x0000FF00) 9025 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_94_COEFF_PROBS_377_LSBMASK (0x000000FF) 9026 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_94_COEFF_PROBS_377_SHIFT (8) 9027 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_94_COEFF_PROBS_377_SIGNED_FIELD IMG_FALSE 9028 9029 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_94, COEFF_PROBS_378 9030 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_94_COEFF_PROBS_378_MASK (0x00FF0000) 9031 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_94_COEFF_PROBS_378_LSBMASK (0x000000FF) 9032 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_94_COEFF_PROBS_378_SHIFT (16) 9033 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_94_COEFF_PROBS_378_SIGNED_FIELD IMG_FALSE 9034 9035 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_94, COEFF_PROBS_379 9036 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_94_COEFF_PROBS_379_MASK (0xFF000000) 9037 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_94_COEFF_PROBS_379_LSBMASK (0x000000FF) 9038 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_94_COEFF_PROBS_379_SHIFT (24) 9039 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_94_COEFF_PROBS_379_SIGNED_FIELD IMG_FALSE 9040 9041 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_95_OFFSET (0x0D70) 9042 9043 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_95, COEFF_PROBS_380 9044 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_95_COEFF_PROBS_380_MASK (0x000000FF) 9045 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_95_COEFF_PROBS_380_LSBMASK (0x000000FF) 9046 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_95_COEFF_PROBS_380_SHIFT (0) 9047 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_95_COEFF_PROBS_380_SIGNED_FIELD IMG_FALSE 9048 9049 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_95, COEFF_PROBS_381 9050 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_95_COEFF_PROBS_381_MASK (0x0000FF00) 9051 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_95_COEFF_PROBS_381_LSBMASK (0x000000FF) 9052 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_95_COEFF_PROBS_381_SHIFT (8) 9053 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_95_COEFF_PROBS_381_SIGNED_FIELD IMG_FALSE 9054 9055 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_95, COEFF_PROBS_382 9056 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_95_COEFF_PROBS_382_MASK (0x00FF0000) 9057 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_95_COEFF_PROBS_382_LSBMASK (0x000000FF) 9058 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_95_COEFF_PROBS_382_SHIFT (16) 9059 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_95_COEFF_PROBS_382_SIGNED_FIELD IMG_FALSE 9060 9061 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_95, COEFF_PROBS_383 9062 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_95_COEFF_PROBS_383_MASK (0xFF000000) 9063 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_95_COEFF_PROBS_383_LSBMASK (0x000000FF) 9064 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_95_COEFF_PROBS_383_SHIFT (24) 9065 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_95_COEFF_PROBS_383_SIGNED_FIELD IMG_FALSE 9066 9067 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_96_OFFSET (0x0D74) 9068 9069 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_96, COEFF_PROBS_384 9070 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_96_COEFF_PROBS_384_MASK (0x000000FF) 9071 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_96_COEFF_PROBS_384_LSBMASK (0x000000FF) 9072 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_96_COEFF_PROBS_384_SHIFT (0) 9073 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_96_COEFF_PROBS_384_SIGNED_FIELD IMG_FALSE 9074 9075 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_96, COEFF_PROBS_385 9076 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_96_COEFF_PROBS_385_MASK (0x0000FF00) 9077 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_96_COEFF_PROBS_385_LSBMASK (0x000000FF) 9078 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_96_COEFF_PROBS_385_SHIFT (8) 9079 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_96_COEFF_PROBS_385_SIGNED_FIELD IMG_FALSE 9080 9081 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_96, COEFF_PROBS_386 9082 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_96_COEFF_PROBS_386_MASK (0x00FF0000) 9083 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_96_COEFF_PROBS_386_LSBMASK (0x000000FF) 9084 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_96_COEFF_PROBS_386_SHIFT (16) 9085 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_96_COEFF_PROBS_386_SIGNED_FIELD IMG_FALSE 9086 9087 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_96, COEFF_PROBS_387 9088 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_96_COEFF_PROBS_387_MASK (0xFF000000) 9089 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_96_COEFF_PROBS_387_LSBMASK (0x000000FF) 9090 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_96_COEFF_PROBS_387_SHIFT (24) 9091 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_96_COEFF_PROBS_387_SIGNED_FIELD IMG_FALSE 9092 9093 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_97_OFFSET (0x0D78) 9094 9095 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_97, COEFF_PROBS_388 9096 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_97_COEFF_PROBS_388_MASK (0x000000FF) 9097 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_97_COEFF_PROBS_388_LSBMASK (0x000000FF) 9098 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_97_COEFF_PROBS_388_SHIFT (0) 9099 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_97_COEFF_PROBS_388_SIGNED_FIELD IMG_FALSE 9100 9101 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_97, COEFF_PROBS_389 9102 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_97_COEFF_PROBS_389_MASK (0x0000FF00) 9103 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_97_COEFF_PROBS_389_LSBMASK (0x000000FF) 9104 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_97_COEFF_PROBS_389_SHIFT (8) 9105 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_97_COEFF_PROBS_389_SIGNED_FIELD IMG_FALSE 9106 9107 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_97, COEFF_PROBS_390 9108 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_97_COEFF_PROBS_390_MASK (0x00FF0000) 9109 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_97_COEFF_PROBS_390_LSBMASK (0x000000FF) 9110 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_97_COEFF_PROBS_390_SHIFT (16) 9111 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_97_COEFF_PROBS_390_SIGNED_FIELD IMG_FALSE 9112 9113 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_97, COEFF_PROBS_391 9114 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_97_COEFF_PROBS_391_MASK (0xFF000000) 9115 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_97_COEFF_PROBS_391_LSBMASK (0x000000FF) 9116 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_97_COEFF_PROBS_391_SHIFT (24) 9117 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_97_COEFF_PROBS_391_SIGNED_FIELD IMG_FALSE 9118 9119 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_98_OFFSET (0x0D7C) 9120 9121 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_98, COEFF_PROBS_392 9122 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_98_COEFF_PROBS_392_MASK (0x000000FF) 9123 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_98_COEFF_PROBS_392_LSBMASK (0x000000FF) 9124 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_98_COEFF_PROBS_392_SHIFT (0) 9125 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_98_COEFF_PROBS_392_SIGNED_FIELD IMG_FALSE 9126 9127 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_98, COEFF_PROBS_393 9128 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_98_COEFF_PROBS_393_MASK (0x0000FF00) 9129 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_98_COEFF_PROBS_393_LSBMASK (0x000000FF) 9130 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_98_COEFF_PROBS_393_SHIFT (8) 9131 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_98_COEFF_PROBS_393_SIGNED_FIELD IMG_FALSE 9132 9133 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_98, COEFF_PROBS_394 9134 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_98_COEFF_PROBS_394_MASK (0x00FF0000) 9135 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_98_COEFF_PROBS_394_LSBMASK (0x000000FF) 9136 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_98_COEFF_PROBS_394_SHIFT (16) 9137 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_98_COEFF_PROBS_394_SIGNED_FIELD IMG_FALSE 9138 9139 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_98, COEFF_PROBS_395 9140 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_98_COEFF_PROBS_395_MASK (0xFF000000) 9141 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_98_COEFF_PROBS_395_LSBMASK (0x000000FF) 9142 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_98_COEFF_PROBS_395_SHIFT (24) 9143 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_98_COEFF_PROBS_395_SIGNED_FIELD IMG_FALSE 9144 9145 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_99_OFFSET (0x0D80) 9146 9147 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_99, COEFF_PROBS_396 9148 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_99_COEFF_PROBS_396_MASK (0x000000FF) 9149 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_99_COEFF_PROBS_396_LSBMASK (0x000000FF) 9150 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_99_COEFF_PROBS_396_SHIFT (0) 9151 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_99_COEFF_PROBS_396_SIGNED_FIELD IMG_FALSE 9152 9153 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_99, COEFF_PROBS_397 9154 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_99_COEFF_PROBS_397_MASK (0x0000FF00) 9155 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_99_COEFF_PROBS_397_LSBMASK (0x000000FF) 9156 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_99_COEFF_PROBS_397_SHIFT (8) 9157 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_99_COEFF_PROBS_397_SIGNED_FIELD IMG_FALSE 9158 9159 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_99, COEFF_PROBS_398 9160 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_99_COEFF_PROBS_398_MASK (0x00FF0000) 9161 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_99_COEFF_PROBS_398_LSBMASK (0x000000FF) 9162 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_99_COEFF_PROBS_398_SHIFT (16) 9163 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_99_COEFF_PROBS_398_SIGNED_FIELD IMG_FALSE 9164 9165 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_99, COEFF_PROBS_399 9166 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_99_COEFF_PROBS_399_MASK (0xFF000000) 9167 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_99_COEFF_PROBS_399_LSBMASK (0x000000FF) 9168 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_99_COEFF_PROBS_399_SHIFT (24) 9169 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_99_COEFF_PROBS_399_SIGNED_FIELD IMG_FALSE 9170 9171 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_100_OFFSET (0x0D84) 9172 9173 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_100, COEFF_PROBS_400 9174 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_100_COEFF_PROBS_400_MASK (0x000000FF) 9175 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_100_COEFF_PROBS_400_LSBMASK (0x000000FF) 9176 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_100_COEFF_PROBS_400_SHIFT (0) 9177 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_100_COEFF_PROBS_400_SIGNED_FIELD IMG_FALSE 9178 9179 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_100, COEFF_PROBS_401 9180 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_100_COEFF_PROBS_401_MASK (0x0000FF00) 9181 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_100_COEFF_PROBS_401_LSBMASK (0x000000FF) 9182 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_100_COEFF_PROBS_401_SHIFT (8) 9183 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_100_COEFF_PROBS_401_SIGNED_FIELD IMG_FALSE 9184 9185 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_100, COEFF_PROBS_402 9186 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_100_COEFF_PROBS_402_MASK (0x00FF0000) 9187 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_100_COEFF_PROBS_402_LSBMASK (0x000000FF) 9188 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_100_COEFF_PROBS_402_SHIFT (16) 9189 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_100_COEFF_PROBS_402_SIGNED_FIELD IMG_FALSE 9190 9191 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_100, COEFF_PROBS_403 9192 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_100_COEFF_PROBS_403_MASK (0xFF000000) 9193 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_100_COEFF_PROBS_403_LSBMASK (0x000000FF) 9194 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_100_COEFF_PROBS_403_SHIFT (24) 9195 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_100_COEFF_PROBS_403_SIGNED_FIELD IMG_FALSE 9196 9197 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_101_OFFSET (0x0D88) 9198 9199 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_101, COEFF_PROBS_404 9200 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_101_COEFF_PROBS_404_MASK (0x000000FF) 9201 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_101_COEFF_PROBS_404_LSBMASK (0x000000FF) 9202 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_101_COEFF_PROBS_404_SHIFT (0) 9203 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_101_COEFF_PROBS_404_SIGNED_FIELD IMG_FALSE 9204 9205 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_101, COEFF_PROBS_405 9206 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_101_COEFF_PROBS_405_MASK (0x0000FF00) 9207 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_101_COEFF_PROBS_405_LSBMASK (0x000000FF) 9208 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_101_COEFF_PROBS_405_SHIFT (8) 9209 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_101_COEFF_PROBS_405_SIGNED_FIELD IMG_FALSE 9210 9211 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_101, COEFF_PROBS_406 9212 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_101_COEFF_PROBS_406_MASK (0x00FF0000) 9213 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_101_COEFF_PROBS_406_LSBMASK (0x000000FF) 9214 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_101_COEFF_PROBS_406_SHIFT (16) 9215 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_101_COEFF_PROBS_406_SIGNED_FIELD IMG_FALSE 9216 9217 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_101, COEFF_PROBS_407 9218 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_101_COEFF_PROBS_407_MASK (0xFF000000) 9219 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_101_COEFF_PROBS_407_LSBMASK (0x000000FF) 9220 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_101_COEFF_PROBS_407_SHIFT (24) 9221 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_101_COEFF_PROBS_407_SIGNED_FIELD IMG_FALSE 9222 9223 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_102_OFFSET (0x0D8C) 9224 9225 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_102, COEFF_PROBS_408 9226 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_102_COEFF_PROBS_408_MASK (0x000000FF) 9227 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_102_COEFF_PROBS_408_LSBMASK (0x000000FF) 9228 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_102_COEFF_PROBS_408_SHIFT (0) 9229 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_102_COEFF_PROBS_408_SIGNED_FIELD IMG_FALSE 9230 9231 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_102, COEFF_PROBS_409 9232 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_102_COEFF_PROBS_409_MASK (0x0000FF00) 9233 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_102_COEFF_PROBS_409_LSBMASK (0x000000FF) 9234 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_102_COEFF_PROBS_409_SHIFT (8) 9235 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_102_COEFF_PROBS_409_SIGNED_FIELD IMG_FALSE 9236 9237 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_102, COEFF_PROBS_410 9238 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_102_COEFF_PROBS_410_MASK (0x00FF0000) 9239 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_102_COEFF_PROBS_410_LSBMASK (0x000000FF) 9240 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_102_COEFF_PROBS_410_SHIFT (16) 9241 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_102_COEFF_PROBS_410_SIGNED_FIELD IMG_FALSE 9242 9243 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_102, COEFF_PROBS_411 9244 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_102_COEFF_PROBS_411_MASK (0xFF000000) 9245 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_102_COEFF_PROBS_411_LSBMASK (0x000000FF) 9246 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_102_COEFF_PROBS_411_SHIFT (24) 9247 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_102_COEFF_PROBS_411_SIGNED_FIELD IMG_FALSE 9248 9249 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_103_OFFSET (0x0D90) 9250 9251 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_103, COEFF_PROBS_412 9252 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_103_COEFF_PROBS_412_MASK (0x000000FF) 9253 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_103_COEFF_PROBS_412_LSBMASK (0x000000FF) 9254 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_103_COEFF_PROBS_412_SHIFT (0) 9255 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_103_COEFF_PROBS_412_SIGNED_FIELD IMG_FALSE 9256 9257 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_103, COEFF_PROBS_413 9258 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_103_COEFF_PROBS_413_MASK (0x0000FF00) 9259 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_103_COEFF_PROBS_413_LSBMASK (0x000000FF) 9260 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_103_COEFF_PROBS_413_SHIFT (8) 9261 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_103_COEFF_PROBS_413_SIGNED_FIELD IMG_FALSE 9262 9263 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_103, COEFF_PROBS_414 9264 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_103_COEFF_PROBS_414_MASK (0x00FF0000) 9265 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_103_COEFF_PROBS_414_LSBMASK (0x000000FF) 9266 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_103_COEFF_PROBS_414_SHIFT (16) 9267 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_103_COEFF_PROBS_414_SIGNED_FIELD IMG_FALSE 9268 9269 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_103, COEFF_PROBS_415 9270 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_103_COEFF_PROBS_415_MASK (0xFF000000) 9271 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_103_COEFF_PROBS_415_LSBMASK (0x000000FF) 9272 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_103_COEFF_PROBS_415_SHIFT (24) 9273 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_103_COEFF_PROBS_415_SIGNED_FIELD IMG_FALSE 9274 9275 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_104_OFFSET (0x0D94) 9276 9277 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_104, COEFF_PROBS_416 9278 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_104_COEFF_PROBS_416_MASK (0x000000FF) 9279 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_104_COEFF_PROBS_416_LSBMASK (0x000000FF) 9280 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_104_COEFF_PROBS_416_SHIFT (0) 9281 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_104_COEFF_PROBS_416_SIGNED_FIELD IMG_FALSE 9282 9283 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_104, COEFF_PROBS_417 9284 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_104_COEFF_PROBS_417_MASK (0x0000FF00) 9285 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_104_COEFF_PROBS_417_LSBMASK (0x000000FF) 9286 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_104_COEFF_PROBS_417_SHIFT (8) 9287 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_104_COEFF_PROBS_417_SIGNED_FIELD IMG_FALSE 9288 9289 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_104, COEFF_PROBS_418 9290 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_104_COEFF_PROBS_418_MASK (0x00FF0000) 9291 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_104_COEFF_PROBS_418_LSBMASK (0x000000FF) 9292 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_104_COEFF_PROBS_418_SHIFT (16) 9293 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_104_COEFF_PROBS_418_SIGNED_FIELD IMG_FALSE 9294 9295 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_104, COEFF_PROBS_419 9296 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_104_COEFF_PROBS_419_MASK (0xFF000000) 9297 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_104_COEFF_PROBS_419_LSBMASK (0x000000FF) 9298 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_104_COEFF_PROBS_419_SHIFT (24) 9299 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_104_COEFF_PROBS_419_SIGNED_FIELD IMG_FALSE 9300 9301 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_105_OFFSET (0x0D98) 9302 9303 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_105, COEFF_PROBS_420 9304 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_105_COEFF_PROBS_420_MASK (0x000000FF) 9305 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_105_COEFF_PROBS_420_LSBMASK (0x000000FF) 9306 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_105_COEFF_PROBS_420_SHIFT (0) 9307 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_105_COEFF_PROBS_420_SIGNED_FIELD IMG_FALSE 9308 9309 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_105, COEFF_PROBS_421 9310 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_105_COEFF_PROBS_421_MASK (0x0000FF00) 9311 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_105_COEFF_PROBS_421_LSBMASK (0x000000FF) 9312 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_105_COEFF_PROBS_421_SHIFT (8) 9313 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_105_COEFF_PROBS_421_SIGNED_FIELD IMG_FALSE 9314 9315 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_105, COEFF_PROBS_422 9316 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_105_COEFF_PROBS_422_MASK (0x00FF0000) 9317 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_105_COEFF_PROBS_422_LSBMASK (0x000000FF) 9318 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_105_COEFF_PROBS_422_SHIFT (16) 9319 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_105_COEFF_PROBS_422_SIGNED_FIELD IMG_FALSE 9320 9321 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_105, COEFF_PROBS_423 9322 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_105_COEFF_PROBS_423_MASK (0xFF000000) 9323 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_105_COEFF_PROBS_423_LSBMASK (0x000000FF) 9324 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_105_COEFF_PROBS_423_SHIFT (24) 9325 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_105_COEFF_PROBS_423_SIGNED_FIELD IMG_FALSE 9326 9327 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_106_OFFSET (0x0D9C) 9328 9329 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_106, COEFF_PROBS_424 9330 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_106_COEFF_PROBS_424_MASK (0x000000FF) 9331 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_106_COEFF_PROBS_424_LSBMASK (0x000000FF) 9332 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_106_COEFF_PROBS_424_SHIFT (0) 9333 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_106_COEFF_PROBS_424_SIGNED_FIELD IMG_FALSE 9334 9335 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_106, COEFF_PROBS_425 9336 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_106_COEFF_PROBS_425_MASK (0x0000FF00) 9337 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_106_COEFF_PROBS_425_LSBMASK (0x000000FF) 9338 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_106_COEFF_PROBS_425_SHIFT (8) 9339 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_106_COEFF_PROBS_425_SIGNED_FIELD IMG_FALSE 9340 9341 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_106, COEFF_PROBS_426 9342 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_106_COEFF_PROBS_426_MASK (0x00FF0000) 9343 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_106_COEFF_PROBS_426_LSBMASK (0x000000FF) 9344 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_106_COEFF_PROBS_426_SHIFT (16) 9345 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_106_COEFF_PROBS_426_SIGNED_FIELD IMG_FALSE 9346 9347 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_106, COEFF_PROBS_427 9348 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_106_COEFF_PROBS_427_MASK (0xFF000000) 9349 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_106_COEFF_PROBS_427_LSBMASK (0x000000FF) 9350 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_106_COEFF_PROBS_427_SHIFT (24) 9351 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_106_COEFF_PROBS_427_SIGNED_FIELD IMG_FALSE 9352 9353 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_107_OFFSET (0x0DA0) 9354 9355 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_107, COEFF_PROBS_428 9356 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_107_COEFF_PROBS_428_MASK (0x000000FF) 9357 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_107_COEFF_PROBS_428_LSBMASK (0x000000FF) 9358 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_107_COEFF_PROBS_428_SHIFT (0) 9359 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_107_COEFF_PROBS_428_SIGNED_FIELD IMG_FALSE 9360 9361 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_107, COEFF_PROBS_429 9362 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_107_COEFF_PROBS_429_MASK (0x0000FF00) 9363 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_107_COEFF_PROBS_429_LSBMASK (0x000000FF) 9364 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_107_COEFF_PROBS_429_SHIFT (8) 9365 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_107_COEFF_PROBS_429_SIGNED_FIELD IMG_FALSE 9366 9367 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_107, COEFF_PROBS_430 9368 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_107_COEFF_PROBS_430_MASK (0x00FF0000) 9369 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_107_COEFF_PROBS_430_LSBMASK (0x000000FF) 9370 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_107_COEFF_PROBS_430_SHIFT (16) 9371 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_107_COEFF_PROBS_430_SIGNED_FIELD IMG_FALSE 9372 9373 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_107, COEFF_PROBS_431 9374 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_107_COEFF_PROBS_431_MASK (0xFF000000) 9375 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_107_COEFF_PROBS_431_LSBMASK (0x000000FF) 9376 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_107_COEFF_PROBS_431_SHIFT (24) 9377 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_107_COEFF_PROBS_431_SIGNED_FIELD IMG_FALSE 9378 9379 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_108_OFFSET (0x0DA4) 9380 9381 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_108, COEFF_PROBS_432 9382 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_108_COEFF_PROBS_432_MASK (0x000000FF) 9383 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_108_COEFF_PROBS_432_LSBMASK (0x000000FF) 9384 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_108_COEFF_PROBS_432_SHIFT (0) 9385 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_108_COEFF_PROBS_432_SIGNED_FIELD IMG_FALSE 9386 9387 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_108, COEFF_PROBS_433 9388 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_108_COEFF_PROBS_433_MASK (0x0000FF00) 9389 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_108_COEFF_PROBS_433_LSBMASK (0x000000FF) 9390 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_108_COEFF_PROBS_433_SHIFT (8) 9391 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_108_COEFF_PROBS_433_SIGNED_FIELD IMG_FALSE 9392 9393 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_108, COEFF_PROBS_434 9394 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_108_COEFF_PROBS_434_MASK (0x00FF0000) 9395 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_108_COEFF_PROBS_434_LSBMASK (0x000000FF) 9396 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_108_COEFF_PROBS_434_SHIFT (16) 9397 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_108_COEFF_PROBS_434_SIGNED_FIELD IMG_FALSE 9398 9399 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_108, COEFF_PROBS_435 9400 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_108_COEFF_PROBS_435_MASK (0xFF000000) 9401 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_108_COEFF_PROBS_435_LSBMASK (0x000000FF) 9402 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_108_COEFF_PROBS_435_SHIFT (24) 9403 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_108_COEFF_PROBS_435_SIGNED_FIELD IMG_FALSE 9404 9405 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_109_OFFSET (0x0DA8) 9406 9407 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_109, COEFF_PROBS_436 9408 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_109_COEFF_PROBS_436_MASK (0x000000FF) 9409 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_109_COEFF_PROBS_436_LSBMASK (0x000000FF) 9410 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_109_COEFF_PROBS_436_SHIFT (0) 9411 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_109_COEFF_PROBS_436_SIGNED_FIELD IMG_FALSE 9412 9413 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_109, COEFF_PROBS_437 9414 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_109_COEFF_PROBS_437_MASK (0x0000FF00) 9415 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_109_COEFF_PROBS_437_LSBMASK (0x000000FF) 9416 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_109_COEFF_PROBS_437_SHIFT (8) 9417 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_109_COEFF_PROBS_437_SIGNED_FIELD IMG_FALSE 9418 9419 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_109, COEFF_PROBS_438 9420 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_109_COEFF_PROBS_438_MASK (0x00FF0000) 9421 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_109_COEFF_PROBS_438_LSBMASK (0x000000FF) 9422 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_109_COEFF_PROBS_438_SHIFT (16) 9423 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_109_COEFF_PROBS_438_SIGNED_FIELD IMG_FALSE 9424 9425 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_109, COEFF_PROBS_439 9426 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_109_COEFF_PROBS_439_MASK (0xFF000000) 9427 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_109_COEFF_PROBS_439_LSBMASK (0x000000FF) 9428 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_109_COEFF_PROBS_439_SHIFT (24) 9429 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_109_COEFF_PROBS_439_SIGNED_FIELD IMG_FALSE 9430 9431 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_110_OFFSET (0x0DAC) 9432 9433 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_110, COEFF_PROBS_440 9434 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_110_COEFF_PROBS_440_MASK (0x000000FF) 9435 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_110_COEFF_PROBS_440_LSBMASK (0x000000FF) 9436 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_110_COEFF_PROBS_440_SHIFT (0) 9437 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_110_COEFF_PROBS_440_SIGNED_FIELD IMG_FALSE 9438 9439 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_110, COEFF_PROBS_441 9440 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_110_COEFF_PROBS_441_MASK (0x0000FF00) 9441 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_110_COEFF_PROBS_441_LSBMASK (0x000000FF) 9442 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_110_COEFF_PROBS_441_SHIFT (8) 9443 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_110_COEFF_PROBS_441_SIGNED_FIELD IMG_FALSE 9444 9445 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_110, COEFF_PROBS_442 9446 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_110_COEFF_PROBS_442_MASK (0x00FF0000) 9447 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_110_COEFF_PROBS_442_LSBMASK (0x000000FF) 9448 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_110_COEFF_PROBS_442_SHIFT (16) 9449 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_110_COEFF_PROBS_442_SIGNED_FIELD IMG_FALSE 9450 9451 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_110, COEFF_PROBS_443 9452 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_110_COEFF_PROBS_443_MASK (0xFF000000) 9453 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_110_COEFF_PROBS_443_LSBMASK (0x000000FF) 9454 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_110_COEFF_PROBS_443_SHIFT (24) 9455 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_110_COEFF_PROBS_443_SIGNED_FIELD IMG_FALSE 9456 9457 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_111_OFFSET (0x0DB0) 9458 9459 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_111, COEFF_PROBS_444 9460 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_111_COEFF_PROBS_444_MASK (0x000000FF) 9461 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_111_COEFF_PROBS_444_LSBMASK (0x000000FF) 9462 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_111_COEFF_PROBS_444_SHIFT (0) 9463 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_111_COEFF_PROBS_444_SIGNED_FIELD IMG_FALSE 9464 9465 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_111, COEFF_PROBS_445 9466 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_111_COEFF_PROBS_445_MASK (0x0000FF00) 9467 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_111_COEFF_PROBS_445_LSBMASK (0x000000FF) 9468 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_111_COEFF_PROBS_445_SHIFT (8) 9469 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_111_COEFF_PROBS_445_SIGNED_FIELD IMG_FALSE 9470 9471 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_111, COEFF_PROBS_446 9472 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_111_COEFF_PROBS_446_MASK (0x00FF0000) 9473 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_111_COEFF_PROBS_446_LSBMASK (0x000000FF) 9474 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_111_COEFF_PROBS_446_SHIFT (16) 9475 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_111_COEFF_PROBS_446_SIGNED_FIELD IMG_FALSE 9476 9477 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_111, COEFF_PROBS_447 9478 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_111_COEFF_PROBS_447_MASK (0xFF000000) 9479 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_111_COEFF_PROBS_447_LSBMASK (0x000000FF) 9480 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_111_COEFF_PROBS_447_SHIFT (24) 9481 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_111_COEFF_PROBS_447_SIGNED_FIELD IMG_FALSE 9482 9483 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_112_OFFSET (0x0DB4) 9484 9485 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_112, COEFF_PROBS_448 9486 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_112_COEFF_PROBS_448_MASK (0x000000FF) 9487 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_112_COEFF_PROBS_448_LSBMASK (0x000000FF) 9488 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_112_COEFF_PROBS_448_SHIFT (0) 9489 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_112_COEFF_PROBS_448_SIGNED_FIELD IMG_FALSE 9490 9491 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_112, COEFF_PROBS_449 9492 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_112_COEFF_PROBS_449_MASK (0x0000FF00) 9493 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_112_COEFF_PROBS_449_LSBMASK (0x000000FF) 9494 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_112_COEFF_PROBS_449_SHIFT (8) 9495 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_112_COEFF_PROBS_449_SIGNED_FIELD IMG_FALSE 9496 9497 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_112, COEFF_PROBS_450 9498 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_112_COEFF_PROBS_450_MASK (0x00FF0000) 9499 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_112_COEFF_PROBS_450_LSBMASK (0x000000FF) 9500 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_112_COEFF_PROBS_450_SHIFT (16) 9501 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_112_COEFF_PROBS_450_SIGNED_FIELD IMG_FALSE 9502 9503 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_112, COEFF_PROBS_451 9504 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_112_COEFF_PROBS_451_MASK (0xFF000000) 9505 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_112_COEFF_PROBS_451_LSBMASK (0x000000FF) 9506 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_112_COEFF_PROBS_451_SHIFT (24) 9507 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_112_COEFF_PROBS_451_SIGNED_FIELD IMG_FALSE 9508 9509 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_113_OFFSET (0x0DB8) 9510 9511 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_113, COEFF_PROBS_452 9512 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_113_COEFF_PROBS_452_MASK (0x000000FF) 9513 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_113_COEFF_PROBS_452_LSBMASK (0x000000FF) 9514 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_113_COEFF_PROBS_452_SHIFT (0) 9515 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_113_COEFF_PROBS_452_SIGNED_FIELD IMG_FALSE 9516 9517 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_113, COEFF_PROBS_453 9518 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_113_COEFF_PROBS_453_MASK (0x0000FF00) 9519 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_113_COEFF_PROBS_453_LSBMASK (0x000000FF) 9520 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_113_COEFF_PROBS_453_SHIFT (8) 9521 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_113_COEFF_PROBS_453_SIGNED_FIELD IMG_FALSE 9522 9523 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_113, COEFF_PROBS_454 9524 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_113_COEFF_PROBS_454_MASK (0x00FF0000) 9525 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_113_COEFF_PROBS_454_LSBMASK (0x000000FF) 9526 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_113_COEFF_PROBS_454_SHIFT (16) 9527 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_113_COEFF_PROBS_454_SIGNED_FIELD IMG_FALSE 9528 9529 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_113, COEFF_PROBS_455 9530 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_113_COEFF_PROBS_455_MASK (0xFF000000) 9531 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_113_COEFF_PROBS_455_LSBMASK (0x000000FF) 9532 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_113_COEFF_PROBS_455_SHIFT (24) 9533 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_113_COEFF_PROBS_455_SIGNED_FIELD IMG_FALSE 9534 9535 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_114_OFFSET (0x0DBC) 9536 9537 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_114, COEFF_PROBS_456 9538 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_114_COEFF_PROBS_456_MASK (0x000000FF) 9539 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_114_COEFF_PROBS_456_LSBMASK (0x000000FF) 9540 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_114_COEFF_PROBS_456_SHIFT (0) 9541 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_114_COEFF_PROBS_456_SIGNED_FIELD IMG_FALSE 9542 9543 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_114, COEFF_PROBS_457 9544 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_114_COEFF_PROBS_457_MASK (0x0000FF00) 9545 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_114_COEFF_PROBS_457_LSBMASK (0x000000FF) 9546 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_114_COEFF_PROBS_457_SHIFT (8) 9547 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_114_COEFF_PROBS_457_SIGNED_FIELD IMG_FALSE 9548 9549 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_114, COEFF_PROBS_458 9550 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_114_COEFF_PROBS_458_MASK (0x00FF0000) 9551 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_114_COEFF_PROBS_458_LSBMASK (0x000000FF) 9552 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_114_COEFF_PROBS_458_SHIFT (16) 9553 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_114_COEFF_PROBS_458_SIGNED_FIELD IMG_FALSE 9554 9555 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_114, COEFF_PROBS_459 9556 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_114_COEFF_PROBS_459_MASK (0xFF000000) 9557 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_114_COEFF_PROBS_459_LSBMASK (0x000000FF) 9558 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_114_COEFF_PROBS_459_SHIFT (24) 9559 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_114_COEFF_PROBS_459_SIGNED_FIELD IMG_FALSE 9560 9561 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_115_OFFSET (0x0DC0) 9562 9563 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_115, COEFF_PROBS_460 9564 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_115_COEFF_PROBS_460_MASK (0x000000FF) 9565 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_115_COEFF_PROBS_460_LSBMASK (0x000000FF) 9566 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_115_COEFF_PROBS_460_SHIFT (0) 9567 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_115_COEFF_PROBS_460_SIGNED_FIELD IMG_FALSE 9568 9569 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_115, COEFF_PROBS_461 9570 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_115_COEFF_PROBS_461_MASK (0x0000FF00) 9571 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_115_COEFF_PROBS_461_LSBMASK (0x000000FF) 9572 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_115_COEFF_PROBS_461_SHIFT (8) 9573 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_115_COEFF_PROBS_461_SIGNED_FIELD IMG_FALSE 9574 9575 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_115, COEFF_PROBS_462 9576 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_115_COEFF_PROBS_462_MASK (0x00FF0000) 9577 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_115_COEFF_PROBS_462_LSBMASK (0x000000FF) 9578 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_115_COEFF_PROBS_462_SHIFT (16) 9579 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_115_COEFF_PROBS_462_SIGNED_FIELD IMG_FALSE 9580 9581 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_115, COEFF_PROBS_463 9582 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_115_COEFF_PROBS_463_MASK (0xFF000000) 9583 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_115_COEFF_PROBS_463_LSBMASK (0x000000FF) 9584 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_115_COEFF_PROBS_463_SHIFT (24) 9585 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_115_COEFF_PROBS_463_SIGNED_FIELD IMG_FALSE 9586 9587 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_116_OFFSET (0x0DC4) 9588 9589 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_116, COEFF_PROBS_464 9590 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_116_COEFF_PROBS_464_MASK (0x000000FF) 9591 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_116_COEFF_PROBS_464_LSBMASK (0x000000FF) 9592 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_116_COEFF_PROBS_464_SHIFT (0) 9593 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_116_COEFF_PROBS_464_SIGNED_FIELD IMG_FALSE 9594 9595 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_116, COEFF_PROBS_465 9596 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_116_COEFF_PROBS_465_MASK (0x0000FF00) 9597 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_116_COEFF_PROBS_465_LSBMASK (0x000000FF) 9598 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_116_COEFF_PROBS_465_SHIFT (8) 9599 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_116_COEFF_PROBS_465_SIGNED_FIELD IMG_FALSE 9600 9601 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_116, COEFF_PROBS_466 9602 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_116_COEFF_PROBS_466_MASK (0x00FF0000) 9603 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_116_COEFF_PROBS_466_LSBMASK (0x000000FF) 9604 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_116_COEFF_PROBS_466_SHIFT (16) 9605 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_116_COEFF_PROBS_466_SIGNED_FIELD IMG_FALSE 9606 9607 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_116, COEFF_PROBS_467 9608 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_116_COEFF_PROBS_467_MASK (0xFF000000) 9609 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_116_COEFF_PROBS_467_LSBMASK (0x000000FF) 9610 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_116_COEFF_PROBS_467_SHIFT (24) 9611 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_116_COEFF_PROBS_467_SIGNED_FIELD IMG_FALSE 9612 9613 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_117_OFFSET (0x0DC8) 9614 9615 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_117, COEFF_PROBS_468 9616 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_117_COEFF_PROBS_468_MASK (0x000000FF) 9617 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_117_COEFF_PROBS_468_LSBMASK (0x000000FF) 9618 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_117_COEFF_PROBS_468_SHIFT (0) 9619 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_117_COEFF_PROBS_468_SIGNED_FIELD IMG_FALSE 9620 9621 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_117, COEFF_PROBS_469 9622 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_117_COEFF_PROBS_469_MASK (0x0000FF00) 9623 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_117_COEFF_PROBS_469_LSBMASK (0x000000FF) 9624 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_117_COEFF_PROBS_469_SHIFT (8) 9625 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_117_COEFF_PROBS_469_SIGNED_FIELD IMG_FALSE 9626 9627 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_117, COEFF_PROBS_470 9628 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_117_COEFF_PROBS_470_MASK (0x00FF0000) 9629 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_117_COEFF_PROBS_470_LSBMASK (0x000000FF) 9630 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_117_COEFF_PROBS_470_SHIFT (16) 9631 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_117_COEFF_PROBS_470_SIGNED_FIELD IMG_FALSE 9632 9633 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_117, COEFF_PROBS_471 9634 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_117_COEFF_PROBS_471_MASK (0xFF000000) 9635 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_117_COEFF_PROBS_471_LSBMASK (0x000000FF) 9636 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_117_COEFF_PROBS_471_SHIFT (24) 9637 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_117_COEFF_PROBS_471_SIGNED_FIELD IMG_FALSE 9638 9639 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_118_OFFSET (0x0DCC) 9640 9641 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_118, COEFF_PROBS_472 9642 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_118_COEFF_PROBS_472_MASK (0x000000FF) 9643 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_118_COEFF_PROBS_472_LSBMASK (0x000000FF) 9644 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_118_COEFF_PROBS_472_SHIFT (0) 9645 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_118_COEFF_PROBS_472_SIGNED_FIELD IMG_FALSE 9646 9647 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_118, COEFF_PROBS_473 9648 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_118_COEFF_PROBS_473_MASK (0x0000FF00) 9649 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_118_COEFF_PROBS_473_LSBMASK (0x000000FF) 9650 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_118_COEFF_PROBS_473_SHIFT (8) 9651 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_118_COEFF_PROBS_473_SIGNED_FIELD IMG_FALSE 9652 9653 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_118, COEFF_PROBS_474 9654 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_118_COEFF_PROBS_474_MASK (0x00FF0000) 9655 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_118_COEFF_PROBS_474_LSBMASK (0x000000FF) 9656 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_118_COEFF_PROBS_474_SHIFT (16) 9657 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_118_COEFF_PROBS_474_SIGNED_FIELD IMG_FALSE 9658 9659 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_118, COEFF_PROBS_475 9660 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_118_COEFF_PROBS_475_MASK (0xFF000000) 9661 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_118_COEFF_PROBS_475_LSBMASK (0x000000FF) 9662 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_118_COEFF_PROBS_475_SHIFT (24) 9663 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_118_COEFF_PROBS_475_SIGNED_FIELD IMG_FALSE 9664 9665 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_119_OFFSET (0x0DD0) 9666 9667 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_119, COEFF_PROBS_476 9668 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_119_COEFF_PROBS_476_MASK (0x000000FF) 9669 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_119_COEFF_PROBS_476_LSBMASK (0x000000FF) 9670 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_119_COEFF_PROBS_476_SHIFT (0) 9671 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_119_COEFF_PROBS_476_SIGNED_FIELD IMG_FALSE 9672 9673 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_119, COEFF_PROBS_477 9674 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_119_COEFF_PROBS_477_MASK (0x0000FF00) 9675 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_119_COEFF_PROBS_477_LSBMASK (0x000000FF) 9676 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_119_COEFF_PROBS_477_SHIFT (8) 9677 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_119_COEFF_PROBS_477_SIGNED_FIELD IMG_FALSE 9678 9679 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_119, COEFF_PROBS_478 9680 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_119_COEFF_PROBS_478_MASK (0x00FF0000) 9681 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_119_COEFF_PROBS_478_LSBMASK (0x000000FF) 9682 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_119_COEFF_PROBS_478_SHIFT (16) 9683 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_119_COEFF_PROBS_478_SIGNED_FIELD IMG_FALSE 9684 9685 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_119, COEFF_PROBS_479 9686 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_119_COEFF_PROBS_479_MASK (0xFF000000) 9687 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_119_COEFF_PROBS_479_LSBMASK (0x000000FF) 9688 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_119_COEFF_PROBS_479_SHIFT (24) 9689 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_119_COEFF_PROBS_479_SIGNED_FIELD IMG_FALSE 9690 9691 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_120_OFFSET (0x0DD4) 9692 9693 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_120, COEFF_PROBS_480 9694 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_120_COEFF_PROBS_480_MASK (0x000000FF) 9695 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_120_COEFF_PROBS_480_LSBMASK (0x000000FF) 9696 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_120_COEFF_PROBS_480_SHIFT (0) 9697 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_120_COEFF_PROBS_480_SIGNED_FIELD IMG_FALSE 9698 9699 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_120, COEFF_PROBS_481 9700 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_120_COEFF_PROBS_481_MASK (0x0000FF00) 9701 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_120_COEFF_PROBS_481_LSBMASK (0x000000FF) 9702 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_120_COEFF_PROBS_481_SHIFT (8) 9703 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_120_COEFF_PROBS_481_SIGNED_FIELD IMG_FALSE 9704 9705 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_120, COEFF_PROBS_482 9706 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_120_COEFF_PROBS_482_MASK (0x00FF0000) 9707 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_120_COEFF_PROBS_482_LSBMASK (0x000000FF) 9708 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_120_COEFF_PROBS_482_SHIFT (16) 9709 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_120_COEFF_PROBS_482_SIGNED_FIELD IMG_FALSE 9710 9711 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_120, COEFF_PROBS_483 9712 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_120_COEFF_PROBS_483_MASK (0xFF000000) 9713 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_120_COEFF_PROBS_483_LSBMASK (0x000000FF) 9714 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_120_COEFF_PROBS_483_SHIFT (24) 9715 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_120_COEFF_PROBS_483_SIGNED_FIELD IMG_FALSE 9716 9717 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_121_OFFSET (0x0DD8) 9718 9719 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_121, COEFF_PROBS_484 9720 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_121_COEFF_PROBS_484_MASK (0x000000FF) 9721 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_121_COEFF_PROBS_484_LSBMASK (0x000000FF) 9722 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_121_COEFF_PROBS_484_SHIFT (0) 9723 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_121_COEFF_PROBS_484_SIGNED_FIELD IMG_FALSE 9724 9725 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_121, COEFF_PROBS_485 9726 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_121_COEFF_PROBS_485_MASK (0x0000FF00) 9727 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_121_COEFF_PROBS_485_LSBMASK (0x000000FF) 9728 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_121_COEFF_PROBS_485_SHIFT (8) 9729 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_121_COEFF_PROBS_485_SIGNED_FIELD IMG_FALSE 9730 9731 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_121, COEFF_PROBS_486 9732 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_121_COEFF_PROBS_486_MASK (0x00FF0000) 9733 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_121_COEFF_PROBS_486_LSBMASK (0x000000FF) 9734 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_121_COEFF_PROBS_486_SHIFT (16) 9735 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_121_COEFF_PROBS_486_SIGNED_FIELD IMG_FALSE 9736 9737 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_121, COEFF_PROBS_487 9738 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_121_COEFF_PROBS_487_MASK (0xFF000000) 9739 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_121_COEFF_PROBS_487_LSBMASK (0x000000FF) 9740 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_121_COEFF_PROBS_487_SHIFT (24) 9741 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_121_COEFF_PROBS_487_SIGNED_FIELD IMG_FALSE 9742 9743 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_122_OFFSET (0x0DDC) 9744 9745 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_122, COEFF_PROBS_488 9746 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_122_COEFF_PROBS_488_MASK (0x000000FF) 9747 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_122_COEFF_PROBS_488_LSBMASK (0x000000FF) 9748 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_122_COEFF_PROBS_488_SHIFT (0) 9749 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_122_COEFF_PROBS_488_SIGNED_FIELD IMG_FALSE 9750 9751 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_122, COEFF_PROBS_489 9752 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_122_COEFF_PROBS_489_MASK (0x0000FF00) 9753 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_122_COEFF_PROBS_489_LSBMASK (0x000000FF) 9754 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_122_COEFF_PROBS_489_SHIFT (8) 9755 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_122_COEFF_PROBS_489_SIGNED_FIELD IMG_FALSE 9756 9757 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_122, COEFF_PROBS_490 9758 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_122_COEFF_PROBS_490_MASK (0x00FF0000) 9759 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_122_COEFF_PROBS_490_LSBMASK (0x000000FF) 9760 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_122_COEFF_PROBS_490_SHIFT (16) 9761 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_122_COEFF_PROBS_490_SIGNED_FIELD IMG_FALSE 9762 9763 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_122, COEFF_PROBS_491 9764 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_122_COEFF_PROBS_491_MASK (0xFF000000) 9765 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_122_COEFF_PROBS_491_LSBMASK (0x000000FF) 9766 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_122_COEFF_PROBS_491_SHIFT (24) 9767 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_122_COEFF_PROBS_491_SIGNED_FIELD IMG_FALSE 9768 9769 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_123_OFFSET (0x0DE0) 9770 9771 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_123, COEFF_PROBS_492 9772 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_123_COEFF_PROBS_492_MASK (0x000000FF) 9773 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_123_COEFF_PROBS_492_LSBMASK (0x000000FF) 9774 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_123_COEFF_PROBS_492_SHIFT (0) 9775 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_123_COEFF_PROBS_492_SIGNED_FIELD IMG_FALSE 9776 9777 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_123, COEFF_PROBS_493 9778 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_123_COEFF_PROBS_493_MASK (0x0000FF00) 9779 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_123_COEFF_PROBS_493_LSBMASK (0x000000FF) 9780 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_123_COEFF_PROBS_493_SHIFT (8) 9781 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_123_COEFF_PROBS_493_SIGNED_FIELD IMG_FALSE 9782 9783 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_123, COEFF_PROBS_494 9784 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_123_COEFF_PROBS_494_MASK (0x00FF0000) 9785 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_123_COEFF_PROBS_494_LSBMASK (0x000000FF) 9786 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_123_COEFF_PROBS_494_SHIFT (16) 9787 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_123_COEFF_PROBS_494_SIGNED_FIELD IMG_FALSE 9788 9789 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_123, COEFF_PROBS_495 9790 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_123_COEFF_PROBS_495_MASK (0xFF000000) 9791 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_123_COEFF_PROBS_495_LSBMASK (0x000000FF) 9792 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_123_COEFF_PROBS_495_SHIFT (24) 9793 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_123_COEFF_PROBS_495_SIGNED_FIELD IMG_FALSE 9794 9795 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_124_OFFSET (0x0DE4) 9796 9797 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_124, COEFF_PROBS_496 9798 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_124_COEFF_PROBS_496_MASK (0x000000FF) 9799 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_124_COEFF_PROBS_496_LSBMASK (0x000000FF) 9800 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_124_COEFF_PROBS_496_SHIFT (0) 9801 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_124_COEFF_PROBS_496_SIGNED_FIELD IMG_FALSE 9802 9803 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_124, COEFF_PROBS_497 9804 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_124_COEFF_PROBS_497_MASK (0x0000FF00) 9805 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_124_COEFF_PROBS_497_LSBMASK (0x000000FF) 9806 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_124_COEFF_PROBS_497_SHIFT (8) 9807 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_124_COEFF_PROBS_497_SIGNED_FIELD IMG_FALSE 9808 9809 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_124, COEFF_PROBS_498 9810 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_124_COEFF_PROBS_498_MASK (0x00FF0000) 9811 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_124_COEFF_PROBS_498_LSBMASK (0x000000FF) 9812 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_124_COEFF_PROBS_498_SHIFT (16) 9813 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_124_COEFF_PROBS_498_SIGNED_FIELD IMG_FALSE 9814 9815 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_124, COEFF_PROBS_499 9816 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_124_COEFF_PROBS_499_MASK (0xFF000000) 9817 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_124_COEFF_PROBS_499_LSBMASK (0x000000FF) 9818 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_124_COEFF_PROBS_499_SHIFT (24) 9819 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_124_COEFF_PROBS_499_SIGNED_FIELD IMG_FALSE 9820 9821 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_125_OFFSET (0x0DE8) 9822 9823 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_125, COEFF_PROBS_500 9824 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_125_COEFF_PROBS_500_MASK (0x000000FF) 9825 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_125_COEFF_PROBS_500_LSBMASK (0x000000FF) 9826 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_125_COEFF_PROBS_500_SHIFT (0) 9827 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_125_COEFF_PROBS_500_SIGNED_FIELD IMG_FALSE 9828 9829 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_125, COEFF_PROBS_501 9830 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_125_COEFF_PROBS_501_MASK (0x0000FF00) 9831 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_125_COEFF_PROBS_501_LSBMASK (0x000000FF) 9832 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_125_COEFF_PROBS_501_SHIFT (8) 9833 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_125_COEFF_PROBS_501_SIGNED_FIELD IMG_FALSE 9834 9835 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_125, COEFF_PROBS_502 9836 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_125_COEFF_PROBS_502_MASK (0x00FF0000) 9837 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_125_COEFF_PROBS_502_LSBMASK (0x000000FF) 9838 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_125_COEFF_PROBS_502_SHIFT (16) 9839 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_125_COEFF_PROBS_502_SIGNED_FIELD IMG_FALSE 9840 9841 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_125, COEFF_PROBS_503 9842 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_125_COEFF_PROBS_503_MASK (0xFF000000) 9843 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_125_COEFF_PROBS_503_LSBMASK (0x000000FF) 9844 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_125_COEFF_PROBS_503_SHIFT (24) 9845 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_125_COEFF_PROBS_503_SIGNED_FIELD IMG_FALSE 9846 9847 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_126_OFFSET (0x0DEC) 9848 9849 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_126, COEFF_PROBS_504 9850 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_126_COEFF_PROBS_504_MASK (0x000000FF) 9851 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_126_COEFF_PROBS_504_LSBMASK (0x000000FF) 9852 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_126_COEFF_PROBS_504_SHIFT (0) 9853 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_126_COEFF_PROBS_504_SIGNED_FIELD IMG_FALSE 9854 9855 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_126, COEFF_PROBS_505 9856 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_126_COEFF_PROBS_505_MASK (0x0000FF00) 9857 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_126_COEFF_PROBS_505_LSBMASK (0x000000FF) 9858 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_126_COEFF_PROBS_505_SHIFT (8) 9859 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_126_COEFF_PROBS_505_SIGNED_FIELD IMG_FALSE 9860 9861 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_126, COEFF_PROBS_506 9862 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_126_COEFF_PROBS_506_MASK (0x00FF0000) 9863 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_126_COEFF_PROBS_506_LSBMASK (0x000000FF) 9864 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_126_COEFF_PROBS_506_SHIFT (16) 9865 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_126_COEFF_PROBS_506_SIGNED_FIELD IMG_FALSE 9866 9867 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_126, COEFF_PROBS_507 9868 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_126_COEFF_PROBS_507_MASK (0xFF000000) 9869 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_126_COEFF_PROBS_507_LSBMASK (0x000000FF) 9870 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_126_COEFF_PROBS_507_SHIFT (24) 9871 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_126_COEFF_PROBS_507_SIGNED_FIELD IMG_FALSE 9872 9873 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_127_OFFSET (0x0DF0) 9874 9875 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_127, COEFF_PROBS_508 9876 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_127_COEFF_PROBS_508_MASK (0x000000FF) 9877 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_127_COEFF_PROBS_508_LSBMASK (0x000000FF) 9878 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_127_COEFF_PROBS_508_SHIFT (0) 9879 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_127_COEFF_PROBS_508_SIGNED_FIELD IMG_FALSE 9880 9881 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_127, COEFF_PROBS_509 9882 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_127_COEFF_PROBS_509_MASK (0x0000FF00) 9883 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_127_COEFF_PROBS_509_LSBMASK (0x000000FF) 9884 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_127_COEFF_PROBS_509_SHIFT (8) 9885 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_127_COEFF_PROBS_509_SIGNED_FIELD IMG_FALSE 9886 9887 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_127, COEFF_PROBS_510 9888 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_127_COEFF_PROBS_510_MASK (0x00FF0000) 9889 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_127_COEFF_PROBS_510_LSBMASK (0x000000FF) 9890 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_127_COEFF_PROBS_510_SHIFT (16) 9891 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_127_COEFF_PROBS_510_SIGNED_FIELD IMG_FALSE 9892 9893 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_127, COEFF_PROBS_511 9894 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_127_COEFF_PROBS_511_MASK (0xFF000000) 9895 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_127_COEFF_PROBS_511_LSBMASK (0x000000FF) 9896 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_127_COEFF_PROBS_511_SHIFT (24) 9897 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_127_COEFF_PROBS_511_SIGNED_FIELD IMG_FALSE 9898 9899 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_128_OFFSET (0x0DF4) 9900 9901 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_128, COEFF_PROBS_512 9902 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_128_COEFF_PROBS_512_MASK (0x000000FF) 9903 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_128_COEFF_PROBS_512_LSBMASK (0x000000FF) 9904 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_128_COEFF_PROBS_512_SHIFT (0) 9905 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_128_COEFF_PROBS_512_SIGNED_FIELD IMG_FALSE 9906 9907 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_128, COEFF_PROBS_513 9908 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_128_COEFF_PROBS_513_MASK (0x0000FF00) 9909 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_128_COEFF_PROBS_513_LSBMASK (0x000000FF) 9910 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_128_COEFF_PROBS_513_SHIFT (8) 9911 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_128_COEFF_PROBS_513_SIGNED_FIELD IMG_FALSE 9912 9913 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_128, COEFF_PROBS_514 9914 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_128_COEFF_PROBS_514_MASK (0x00FF0000) 9915 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_128_COEFF_PROBS_514_LSBMASK (0x000000FF) 9916 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_128_COEFF_PROBS_514_SHIFT (16) 9917 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_128_COEFF_PROBS_514_SIGNED_FIELD IMG_FALSE 9918 9919 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_128, COEFF_PROBS_515 9920 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_128_COEFF_PROBS_515_MASK (0xFF000000) 9921 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_128_COEFF_PROBS_515_LSBMASK (0x000000FF) 9922 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_128_COEFF_PROBS_515_SHIFT (24) 9923 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_128_COEFF_PROBS_515_SIGNED_FIELD IMG_FALSE 9924 9925 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_129_OFFSET (0x0DF8) 9926 9927 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_129, COEFF_PROBS_516 9928 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_129_COEFF_PROBS_516_MASK (0x000000FF) 9929 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_129_COEFF_PROBS_516_LSBMASK (0x000000FF) 9930 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_129_COEFF_PROBS_516_SHIFT (0) 9931 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_129_COEFF_PROBS_516_SIGNED_FIELD IMG_FALSE 9932 9933 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_129, COEFF_PROBS_517 9934 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_129_COEFF_PROBS_517_MASK (0x0000FF00) 9935 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_129_COEFF_PROBS_517_LSBMASK (0x000000FF) 9936 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_129_COEFF_PROBS_517_SHIFT (8) 9937 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_129_COEFF_PROBS_517_SIGNED_FIELD IMG_FALSE 9938 9939 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_129, COEFF_PROBS_518 9940 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_129_COEFF_PROBS_518_MASK (0x00FF0000) 9941 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_129_COEFF_PROBS_518_LSBMASK (0x000000FF) 9942 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_129_COEFF_PROBS_518_SHIFT (16) 9943 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_129_COEFF_PROBS_518_SIGNED_FIELD IMG_FALSE 9944 9945 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_129, COEFF_PROBS_519 9946 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_129_COEFF_PROBS_519_MASK (0xFF000000) 9947 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_129_COEFF_PROBS_519_LSBMASK (0x000000FF) 9948 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_129_COEFF_PROBS_519_SHIFT (24) 9949 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_129_COEFF_PROBS_519_SIGNED_FIELD IMG_FALSE 9950 9951 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_130_OFFSET (0x0DFC) 9952 9953 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_130, COEFF_PROBS_520 9954 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_130_COEFF_PROBS_520_MASK (0x000000FF) 9955 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_130_COEFF_PROBS_520_LSBMASK (0x000000FF) 9956 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_130_COEFF_PROBS_520_SHIFT (0) 9957 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_130_COEFF_PROBS_520_SIGNED_FIELD IMG_FALSE 9958 9959 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_130, COEFF_PROBS_521 9960 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_130_COEFF_PROBS_521_MASK (0x0000FF00) 9961 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_130_COEFF_PROBS_521_LSBMASK (0x000000FF) 9962 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_130_COEFF_PROBS_521_SHIFT (8) 9963 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_130_COEFF_PROBS_521_SIGNED_FIELD IMG_FALSE 9964 9965 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_130, COEFF_PROBS_522 9966 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_130_COEFF_PROBS_522_MASK (0x00FF0000) 9967 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_130_COEFF_PROBS_522_LSBMASK (0x000000FF) 9968 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_130_COEFF_PROBS_522_SHIFT (16) 9969 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_130_COEFF_PROBS_522_SIGNED_FIELD IMG_FALSE 9970 9971 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_130, COEFF_PROBS_523 9972 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_130_COEFF_PROBS_523_MASK (0xFF000000) 9973 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_130_COEFF_PROBS_523_LSBMASK (0x000000FF) 9974 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_130_COEFF_PROBS_523_SHIFT (24) 9975 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_130_COEFF_PROBS_523_SIGNED_FIELD IMG_FALSE 9976 9977 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_131_OFFSET (0x0E00) 9978 9979 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_131, COEFF_PROBS_524 9980 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_131_COEFF_PROBS_524_MASK (0x000000FF) 9981 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_131_COEFF_PROBS_524_LSBMASK (0x000000FF) 9982 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_131_COEFF_PROBS_524_SHIFT (0) 9983 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_131_COEFF_PROBS_524_SIGNED_FIELD IMG_FALSE 9984 9985 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_131, COEFF_PROBS_525 9986 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_131_COEFF_PROBS_525_MASK (0x0000FF00) 9987 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_131_COEFF_PROBS_525_LSBMASK (0x000000FF) 9988 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_131_COEFF_PROBS_525_SHIFT (8) 9989 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_131_COEFF_PROBS_525_SIGNED_FIELD IMG_FALSE 9990 9991 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_131, COEFF_PROBS_526 9992 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_131_COEFF_PROBS_526_MASK (0x00FF0000) 9993 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_131_COEFF_PROBS_526_LSBMASK (0x000000FF) 9994 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_131_COEFF_PROBS_526_SHIFT (16) 9995 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_131_COEFF_PROBS_526_SIGNED_FIELD IMG_FALSE 9996 9997 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_131, COEFF_PROBS_527 9998 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_131_COEFF_PROBS_527_MASK (0xFF000000) 9999 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_131_COEFF_PROBS_527_LSBMASK (0x000000FF) 10000 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_131_COEFF_PROBS_527_SHIFT (24) 10001 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_131_COEFF_PROBS_527_SIGNED_FIELD IMG_FALSE 10002 10003 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_132_OFFSET (0x0E04) 10004 10005 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_132, COEFF_PROBS_528 10006 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_132_COEFF_PROBS_528_MASK (0x000000FF) 10007 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_132_COEFF_PROBS_528_LSBMASK (0x000000FF) 10008 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_132_COEFF_PROBS_528_SHIFT (0) 10009 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_132_COEFF_PROBS_528_SIGNED_FIELD IMG_FALSE 10010 10011 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_132, COEFF_PROBS_529 10012 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_132_COEFF_PROBS_529_MASK (0x0000FF00) 10013 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_132_COEFF_PROBS_529_LSBMASK (0x000000FF) 10014 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_132_COEFF_PROBS_529_SHIFT (8) 10015 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_132_COEFF_PROBS_529_SIGNED_FIELD IMG_FALSE 10016 10017 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_132, COEFF_PROBS_530 10018 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_132_COEFF_PROBS_530_MASK (0x00FF0000) 10019 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_132_COEFF_PROBS_530_LSBMASK (0x000000FF) 10020 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_132_COEFF_PROBS_530_SHIFT (16) 10021 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_132_COEFF_PROBS_530_SIGNED_FIELD IMG_FALSE 10022 10023 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_132, COEFF_PROBS_531 10024 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_132_COEFF_PROBS_531_MASK (0xFF000000) 10025 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_132_COEFF_PROBS_531_LSBMASK (0x000000FF) 10026 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_132_COEFF_PROBS_531_SHIFT (24) 10027 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_132_COEFF_PROBS_531_SIGNED_FIELD IMG_FALSE 10028 10029 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_133_OFFSET (0x0E08) 10030 10031 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_133, COEFF_PROBS_532 10032 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_133_COEFF_PROBS_532_MASK (0x000000FF) 10033 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_133_COEFF_PROBS_532_LSBMASK (0x000000FF) 10034 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_133_COEFF_PROBS_532_SHIFT (0) 10035 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_133_COEFF_PROBS_532_SIGNED_FIELD IMG_FALSE 10036 10037 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_133, COEFF_PROBS_533 10038 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_133_COEFF_PROBS_533_MASK (0x0000FF00) 10039 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_133_COEFF_PROBS_533_LSBMASK (0x000000FF) 10040 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_133_COEFF_PROBS_533_SHIFT (8) 10041 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_133_COEFF_PROBS_533_SIGNED_FIELD IMG_FALSE 10042 10043 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_133, COEFF_PROBS_534 10044 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_133_COEFF_PROBS_534_MASK (0x00FF0000) 10045 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_133_COEFF_PROBS_534_LSBMASK (0x000000FF) 10046 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_133_COEFF_PROBS_534_SHIFT (16) 10047 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_133_COEFF_PROBS_534_SIGNED_FIELD IMG_FALSE 10048 10049 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_133, COEFF_PROBS_535 10050 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_133_COEFF_PROBS_535_MASK (0xFF000000) 10051 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_133_COEFF_PROBS_535_LSBMASK (0x000000FF) 10052 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_133_COEFF_PROBS_535_SHIFT (24) 10053 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_133_COEFF_PROBS_535_SIGNED_FIELD IMG_FALSE 10054 10055 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_134_OFFSET (0x0E0C) 10056 10057 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_134, COEFF_PROBS_536 10058 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_134_COEFF_PROBS_536_MASK (0x000000FF) 10059 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_134_COEFF_PROBS_536_LSBMASK (0x000000FF) 10060 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_134_COEFF_PROBS_536_SHIFT (0) 10061 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_134_COEFF_PROBS_536_SIGNED_FIELD IMG_FALSE 10062 10063 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_134, COEFF_PROBS_537 10064 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_134_COEFF_PROBS_537_MASK (0x0000FF00) 10065 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_134_COEFF_PROBS_537_LSBMASK (0x000000FF) 10066 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_134_COEFF_PROBS_537_SHIFT (8) 10067 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_134_COEFF_PROBS_537_SIGNED_FIELD IMG_FALSE 10068 10069 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_134, COEFF_PROBS_538 10070 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_134_COEFF_PROBS_538_MASK (0x00FF0000) 10071 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_134_COEFF_PROBS_538_LSBMASK (0x000000FF) 10072 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_134_COEFF_PROBS_538_SHIFT (16) 10073 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_134_COEFF_PROBS_538_SIGNED_FIELD IMG_FALSE 10074 10075 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_134, COEFF_PROBS_539 10076 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_134_COEFF_PROBS_539_MASK (0xFF000000) 10077 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_134_COEFF_PROBS_539_LSBMASK (0x000000FF) 10078 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_134_COEFF_PROBS_539_SHIFT (24) 10079 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_134_COEFF_PROBS_539_SIGNED_FIELD IMG_FALSE 10080 10081 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_135_OFFSET (0x0E10) 10082 10083 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_135, COEFF_PROBS_540 10084 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_135_COEFF_PROBS_540_MASK (0x000000FF) 10085 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_135_COEFF_PROBS_540_LSBMASK (0x000000FF) 10086 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_135_COEFF_PROBS_540_SHIFT (0) 10087 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_135_COEFF_PROBS_540_SIGNED_FIELD IMG_FALSE 10088 10089 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_135, COEFF_PROBS_541 10090 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_135_COEFF_PROBS_541_MASK (0x0000FF00) 10091 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_135_COEFF_PROBS_541_LSBMASK (0x000000FF) 10092 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_135_COEFF_PROBS_541_SHIFT (8) 10093 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_135_COEFF_PROBS_541_SIGNED_FIELD IMG_FALSE 10094 10095 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_135, COEFF_PROBS_542 10096 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_135_COEFF_PROBS_542_MASK (0x00FF0000) 10097 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_135_COEFF_PROBS_542_LSBMASK (0x000000FF) 10098 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_135_COEFF_PROBS_542_SHIFT (16) 10099 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_135_COEFF_PROBS_542_SIGNED_FIELD IMG_FALSE 10100 10101 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_135, COEFF_PROBS_543 10102 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_135_COEFF_PROBS_543_MASK (0xFF000000) 10103 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_135_COEFF_PROBS_543_LSBMASK (0x000000FF) 10104 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_135_COEFF_PROBS_543_SHIFT (24) 10105 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_135_COEFF_PROBS_543_SIGNED_FIELD IMG_FALSE 10106 10107 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_136_OFFSET (0x0E14) 10108 10109 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_136, COEFF_PROBS_544 10110 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_136_COEFF_PROBS_544_MASK (0x000000FF) 10111 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_136_COEFF_PROBS_544_LSBMASK (0x000000FF) 10112 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_136_COEFF_PROBS_544_SHIFT (0) 10113 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_136_COEFF_PROBS_544_SIGNED_FIELD IMG_FALSE 10114 10115 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_136, COEFF_PROBS_545 10116 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_136_COEFF_PROBS_545_MASK (0x0000FF00) 10117 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_136_COEFF_PROBS_545_LSBMASK (0x000000FF) 10118 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_136_COEFF_PROBS_545_SHIFT (8) 10119 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_136_COEFF_PROBS_545_SIGNED_FIELD IMG_FALSE 10120 10121 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_136, COEFF_PROBS_546 10122 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_136_COEFF_PROBS_546_MASK (0x00FF0000) 10123 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_136_COEFF_PROBS_546_LSBMASK (0x000000FF) 10124 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_136_COEFF_PROBS_546_SHIFT (16) 10125 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_136_COEFF_PROBS_546_SIGNED_FIELD IMG_FALSE 10126 10127 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_136, COEFF_PROBS_547 10128 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_136_COEFF_PROBS_547_MASK (0xFF000000) 10129 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_136_COEFF_PROBS_547_LSBMASK (0x000000FF) 10130 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_136_COEFF_PROBS_547_SHIFT (24) 10131 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_136_COEFF_PROBS_547_SIGNED_FIELD IMG_FALSE 10132 10133 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_137_OFFSET (0x0E18) 10134 10135 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_137, COEFF_PROBS_548 10136 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_137_COEFF_PROBS_548_MASK (0x000000FF) 10137 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_137_COEFF_PROBS_548_LSBMASK (0x000000FF) 10138 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_137_COEFF_PROBS_548_SHIFT (0) 10139 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_137_COEFF_PROBS_548_SIGNED_FIELD IMG_FALSE 10140 10141 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_137, COEFF_PROBS_549 10142 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_137_COEFF_PROBS_549_MASK (0x0000FF00) 10143 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_137_COEFF_PROBS_549_LSBMASK (0x000000FF) 10144 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_137_COEFF_PROBS_549_SHIFT (8) 10145 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_137_COEFF_PROBS_549_SIGNED_FIELD IMG_FALSE 10146 10147 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_137, COEFF_PROBS_550 10148 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_137_COEFF_PROBS_550_MASK (0x00FF0000) 10149 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_137_COEFF_PROBS_550_LSBMASK (0x000000FF) 10150 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_137_COEFF_PROBS_550_SHIFT (16) 10151 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_137_COEFF_PROBS_550_SIGNED_FIELD IMG_FALSE 10152 10153 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_137, COEFF_PROBS_551 10154 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_137_COEFF_PROBS_551_MASK (0xFF000000) 10155 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_137_COEFF_PROBS_551_LSBMASK (0x000000FF) 10156 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_137_COEFF_PROBS_551_SHIFT (24) 10157 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_137_COEFF_PROBS_551_SIGNED_FIELD IMG_FALSE 10158 10159 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_138_OFFSET (0x0E1C) 10160 10161 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_138, COEFF_PROBS_552 10162 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_138_COEFF_PROBS_552_MASK (0x000000FF) 10163 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_138_COEFF_PROBS_552_LSBMASK (0x000000FF) 10164 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_138_COEFF_PROBS_552_SHIFT (0) 10165 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_138_COEFF_PROBS_552_SIGNED_FIELD IMG_FALSE 10166 10167 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_138, COEFF_PROBS_553 10168 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_138_COEFF_PROBS_553_MASK (0x0000FF00) 10169 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_138_COEFF_PROBS_553_LSBMASK (0x000000FF) 10170 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_138_COEFF_PROBS_553_SHIFT (8) 10171 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_138_COEFF_PROBS_553_SIGNED_FIELD IMG_FALSE 10172 10173 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_138, COEFF_PROBS_554 10174 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_138_COEFF_PROBS_554_MASK (0x00FF0000) 10175 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_138_COEFF_PROBS_554_LSBMASK (0x000000FF) 10176 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_138_COEFF_PROBS_554_SHIFT (16) 10177 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_138_COEFF_PROBS_554_SIGNED_FIELD IMG_FALSE 10178 10179 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_138, COEFF_PROBS_555 10180 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_138_COEFF_PROBS_555_MASK (0xFF000000) 10181 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_138_COEFF_PROBS_555_LSBMASK (0x000000FF) 10182 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_138_COEFF_PROBS_555_SHIFT (24) 10183 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_138_COEFF_PROBS_555_SIGNED_FIELD IMG_FALSE 10184 10185 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_139_OFFSET (0x0E20) 10186 10187 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_139, COEFF_PROBS_556 10188 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_139_COEFF_PROBS_556_MASK (0x000000FF) 10189 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_139_COEFF_PROBS_556_LSBMASK (0x000000FF) 10190 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_139_COEFF_PROBS_556_SHIFT (0) 10191 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_139_COEFF_PROBS_556_SIGNED_FIELD IMG_FALSE 10192 10193 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_139, COEFF_PROBS_557 10194 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_139_COEFF_PROBS_557_MASK (0x0000FF00) 10195 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_139_COEFF_PROBS_557_LSBMASK (0x000000FF) 10196 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_139_COEFF_PROBS_557_SHIFT (8) 10197 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_139_COEFF_PROBS_557_SIGNED_FIELD IMG_FALSE 10198 10199 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_139, COEFF_PROBS_558 10200 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_139_COEFF_PROBS_558_MASK (0x00FF0000) 10201 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_139_COEFF_PROBS_558_LSBMASK (0x000000FF) 10202 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_139_COEFF_PROBS_558_SHIFT (16) 10203 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_139_COEFF_PROBS_558_SIGNED_FIELD IMG_FALSE 10204 10205 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_139, COEFF_PROBS_559 10206 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_139_COEFF_PROBS_559_MASK (0xFF000000) 10207 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_139_COEFF_PROBS_559_LSBMASK (0x000000FF) 10208 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_139_COEFF_PROBS_559_SHIFT (24) 10209 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_139_COEFF_PROBS_559_SIGNED_FIELD IMG_FALSE 10210 10211 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_140_OFFSET (0x0E24) 10212 10213 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_140, COEFF_PROBS_560 10214 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_140_COEFF_PROBS_560_MASK (0x000000FF) 10215 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_140_COEFF_PROBS_560_LSBMASK (0x000000FF) 10216 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_140_COEFF_PROBS_560_SHIFT (0) 10217 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_140_COEFF_PROBS_560_SIGNED_FIELD IMG_FALSE 10218 10219 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_140, COEFF_PROBS_561 10220 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_140_COEFF_PROBS_561_MASK (0x0000FF00) 10221 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_140_COEFF_PROBS_561_LSBMASK (0x000000FF) 10222 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_140_COEFF_PROBS_561_SHIFT (8) 10223 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_140_COEFF_PROBS_561_SIGNED_FIELD IMG_FALSE 10224 10225 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_140, COEFF_PROBS_562 10226 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_140_COEFF_PROBS_562_MASK (0x00FF0000) 10227 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_140_COEFF_PROBS_562_LSBMASK (0x000000FF) 10228 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_140_COEFF_PROBS_562_SHIFT (16) 10229 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_140_COEFF_PROBS_562_SIGNED_FIELD IMG_FALSE 10230 10231 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_140, COEFF_PROBS_563 10232 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_140_COEFF_PROBS_563_MASK (0xFF000000) 10233 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_140_COEFF_PROBS_563_LSBMASK (0x000000FF) 10234 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_140_COEFF_PROBS_563_SHIFT (24) 10235 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_140_COEFF_PROBS_563_SIGNED_FIELD IMG_FALSE 10236 10237 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_141_OFFSET (0x0E28) 10238 10239 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_141, COEFF_PROBS_564 10240 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_141_COEFF_PROBS_564_MASK (0x000000FF) 10241 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_141_COEFF_PROBS_564_LSBMASK (0x000000FF) 10242 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_141_COEFF_PROBS_564_SHIFT (0) 10243 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_141_COEFF_PROBS_564_SIGNED_FIELD IMG_FALSE 10244 10245 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_141, COEFF_PROBS_565 10246 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_141_COEFF_PROBS_565_MASK (0x0000FF00) 10247 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_141_COEFF_PROBS_565_LSBMASK (0x000000FF) 10248 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_141_COEFF_PROBS_565_SHIFT (8) 10249 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_141_COEFF_PROBS_565_SIGNED_FIELD IMG_FALSE 10250 10251 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_141, COEFF_PROBS_566 10252 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_141_COEFF_PROBS_566_MASK (0x00FF0000) 10253 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_141_COEFF_PROBS_566_LSBMASK (0x000000FF) 10254 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_141_COEFF_PROBS_566_SHIFT (16) 10255 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_141_COEFF_PROBS_566_SIGNED_FIELD IMG_FALSE 10256 10257 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_141, COEFF_PROBS_567 10258 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_141_COEFF_PROBS_567_MASK (0xFF000000) 10259 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_141_COEFF_PROBS_567_LSBMASK (0x000000FF) 10260 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_141_COEFF_PROBS_567_SHIFT (24) 10261 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_141_COEFF_PROBS_567_SIGNED_FIELD IMG_FALSE 10262 10263 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_142_OFFSET (0x0E2C) 10264 10265 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_142, COEFF_PROBS_568 10266 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_142_COEFF_PROBS_568_MASK (0x000000FF) 10267 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_142_COEFF_PROBS_568_LSBMASK (0x000000FF) 10268 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_142_COEFF_PROBS_568_SHIFT (0) 10269 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_142_COEFF_PROBS_568_SIGNED_FIELD IMG_FALSE 10270 10271 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_142, COEFF_PROBS_569 10272 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_142_COEFF_PROBS_569_MASK (0x0000FF00) 10273 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_142_COEFF_PROBS_569_LSBMASK (0x000000FF) 10274 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_142_COEFF_PROBS_569_SHIFT (8) 10275 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_142_COEFF_PROBS_569_SIGNED_FIELD IMG_FALSE 10276 10277 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_142, COEFF_PROBS_570 10278 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_142_COEFF_PROBS_570_MASK (0x00FF0000) 10279 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_142_COEFF_PROBS_570_LSBMASK (0x000000FF) 10280 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_142_COEFF_PROBS_570_SHIFT (16) 10281 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_142_COEFF_PROBS_570_SIGNED_FIELD IMG_FALSE 10282 10283 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_142, COEFF_PROBS_571 10284 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_142_COEFF_PROBS_571_MASK (0xFF000000) 10285 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_142_COEFF_PROBS_571_LSBMASK (0x000000FF) 10286 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_142_COEFF_PROBS_571_SHIFT (24) 10287 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_142_COEFF_PROBS_571_SIGNED_FIELD IMG_FALSE 10288 10289 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_143_OFFSET (0x0E30) 10290 10291 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_143, COEFF_PROBS_572 10292 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_143_COEFF_PROBS_572_MASK (0x000000FF) 10293 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_143_COEFF_PROBS_572_LSBMASK (0x000000FF) 10294 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_143_COEFF_PROBS_572_SHIFT (0) 10295 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_143_COEFF_PROBS_572_SIGNED_FIELD IMG_FALSE 10296 10297 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_143, COEFF_PROBS_573 10298 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_143_COEFF_PROBS_573_MASK (0x0000FF00) 10299 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_143_COEFF_PROBS_573_LSBMASK (0x000000FF) 10300 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_143_COEFF_PROBS_573_SHIFT (8) 10301 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_143_COEFF_PROBS_573_SIGNED_FIELD IMG_FALSE 10302 10303 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_143, COEFF_PROBS_574 10304 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_143_COEFF_PROBS_574_MASK (0x00FF0000) 10305 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_143_COEFF_PROBS_574_LSBMASK (0x000000FF) 10306 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_143_COEFF_PROBS_574_SHIFT (16) 10307 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_143_COEFF_PROBS_574_SIGNED_FIELD IMG_FALSE 10308 10309 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_143, COEFF_PROBS_575 10310 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_143_COEFF_PROBS_575_MASK (0xFF000000) 10311 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_143_COEFF_PROBS_575_LSBMASK (0x000000FF) 10312 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_143_COEFF_PROBS_575_SHIFT (24) 10313 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_143_COEFF_PROBS_575_SIGNED_FIELD IMG_FALSE 10314 10315 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_144_OFFSET (0x0E34) 10316 10317 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_144, COEFF_PROBS_576 10318 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_144_COEFF_PROBS_576_MASK (0x000000FF) 10319 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_144_COEFF_PROBS_576_LSBMASK (0x000000FF) 10320 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_144_COEFF_PROBS_576_SHIFT (0) 10321 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_144_COEFF_PROBS_576_SIGNED_FIELD IMG_FALSE 10322 10323 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_144, COEFF_PROBS_577 10324 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_144_COEFF_PROBS_577_MASK (0x0000FF00) 10325 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_144_COEFF_PROBS_577_LSBMASK (0x000000FF) 10326 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_144_COEFF_PROBS_577_SHIFT (8) 10327 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_144_COEFF_PROBS_577_SIGNED_FIELD IMG_FALSE 10328 10329 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_144, COEFF_PROBS_578 10330 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_144_COEFF_PROBS_578_MASK (0x00FF0000) 10331 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_144_COEFF_PROBS_578_LSBMASK (0x000000FF) 10332 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_144_COEFF_PROBS_578_SHIFT (16) 10333 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_144_COEFF_PROBS_578_SIGNED_FIELD IMG_FALSE 10334 10335 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_144, COEFF_PROBS_579 10336 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_144_COEFF_PROBS_579_MASK (0xFF000000) 10337 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_144_COEFF_PROBS_579_LSBMASK (0x000000FF) 10338 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_144_COEFF_PROBS_579_SHIFT (24) 10339 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_144_COEFF_PROBS_579_SIGNED_FIELD IMG_FALSE 10340 10341 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_145_OFFSET (0x0E38) 10342 10343 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_145, COEFF_PROBS_580 10344 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_145_COEFF_PROBS_580_MASK (0x000000FF) 10345 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_145_COEFF_PROBS_580_LSBMASK (0x000000FF) 10346 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_145_COEFF_PROBS_580_SHIFT (0) 10347 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_145_COEFF_PROBS_580_SIGNED_FIELD IMG_FALSE 10348 10349 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_145, COEFF_PROBS_581 10350 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_145_COEFF_PROBS_581_MASK (0x0000FF00) 10351 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_145_COEFF_PROBS_581_LSBMASK (0x000000FF) 10352 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_145_COEFF_PROBS_581_SHIFT (8) 10353 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_145_COEFF_PROBS_581_SIGNED_FIELD IMG_FALSE 10354 10355 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_145, COEFF_PROBS_582 10356 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_145_COEFF_PROBS_582_MASK (0x00FF0000) 10357 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_145_COEFF_PROBS_582_LSBMASK (0x000000FF) 10358 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_145_COEFF_PROBS_582_SHIFT (16) 10359 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_145_COEFF_PROBS_582_SIGNED_FIELD IMG_FALSE 10360 10361 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_145, COEFF_PROBS_583 10362 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_145_COEFF_PROBS_583_MASK (0xFF000000) 10363 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_145_COEFF_PROBS_583_LSBMASK (0x000000FF) 10364 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_145_COEFF_PROBS_583_SHIFT (24) 10365 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_145_COEFF_PROBS_583_SIGNED_FIELD IMG_FALSE 10366 10367 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_146_OFFSET (0x0E3C) 10368 10369 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_146, COEFF_PROBS_584 10370 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_146_COEFF_PROBS_584_MASK (0x000000FF) 10371 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_146_COEFF_PROBS_584_LSBMASK (0x000000FF) 10372 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_146_COEFF_PROBS_584_SHIFT (0) 10373 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_146_COEFF_PROBS_584_SIGNED_FIELD IMG_FALSE 10374 10375 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_146, COEFF_PROBS_585 10376 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_146_COEFF_PROBS_585_MASK (0x0000FF00) 10377 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_146_COEFF_PROBS_585_LSBMASK (0x000000FF) 10378 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_146_COEFF_PROBS_585_SHIFT (8) 10379 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_146_COEFF_PROBS_585_SIGNED_FIELD IMG_FALSE 10380 10381 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_146, COEFF_PROBS_586 10382 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_146_COEFF_PROBS_586_MASK (0x00FF0000) 10383 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_146_COEFF_PROBS_586_LSBMASK (0x000000FF) 10384 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_146_COEFF_PROBS_586_SHIFT (16) 10385 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_146_COEFF_PROBS_586_SIGNED_FIELD IMG_FALSE 10386 10387 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_146, COEFF_PROBS_587 10388 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_146_COEFF_PROBS_587_MASK (0xFF000000) 10389 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_146_COEFF_PROBS_587_LSBMASK (0x000000FF) 10390 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_146_COEFF_PROBS_587_SHIFT (24) 10391 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_146_COEFF_PROBS_587_SIGNED_FIELD IMG_FALSE 10392 10393 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_147_OFFSET (0x0E40) 10394 10395 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_147, COEFF_PROBS_588 10396 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_147_COEFF_PROBS_588_MASK (0x000000FF) 10397 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_147_COEFF_PROBS_588_LSBMASK (0x000000FF) 10398 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_147_COEFF_PROBS_588_SHIFT (0) 10399 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_147_COEFF_PROBS_588_SIGNED_FIELD IMG_FALSE 10400 10401 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_147, COEFF_PROBS_589 10402 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_147_COEFF_PROBS_589_MASK (0x0000FF00) 10403 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_147_COEFF_PROBS_589_LSBMASK (0x000000FF) 10404 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_147_COEFF_PROBS_589_SHIFT (8) 10405 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_147_COEFF_PROBS_589_SIGNED_FIELD IMG_FALSE 10406 10407 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_147, COEFF_PROBS_590 10408 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_147_COEFF_PROBS_590_MASK (0x00FF0000) 10409 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_147_COEFF_PROBS_590_LSBMASK (0x000000FF) 10410 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_147_COEFF_PROBS_590_SHIFT (16) 10411 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_147_COEFF_PROBS_590_SIGNED_FIELD IMG_FALSE 10412 10413 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_147, COEFF_PROBS_591 10414 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_147_COEFF_PROBS_591_MASK (0xFF000000) 10415 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_147_COEFF_PROBS_591_LSBMASK (0x000000FF) 10416 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_147_COEFF_PROBS_591_SHIFT (24) 10417 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_147_COEFF_PROBS_591_SIGNED_FIELD IMG_FALSE 10418 10419 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_148_OFFSET (0x0E44) 10420 10421 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_148, COEFF_PROBS_592 10422 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_148_COEFF_PROBS_592_MASK (0x000000FF) 10423 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_148_COEFF_PROBS_592_LSBMASK (0x000000FF) 10424 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_148_COEFF_PROBS_592_SHIFT (0) 10425 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_148_COEFF_PROBS_592_SIGNED_FIELD IMG_FALSE 10426 10427 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_148, COEFF_PROBS_593 10428 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_148_COEFF_PROBS_593_MASK (0x0000FF00) 10429 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_148_COEFF_PROBS_593_LSBMASK (0x000000FF) 10430 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_148_COEFF_PROBS_593_SHIFT (8) 10431 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_148_COEFF_PROBS_593_SIGNED_FIELD IMG_FALSE 10432 10433 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_148, COEFF_PROBS_594 10434 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_148_COEFF_PROBS_594_MASK (0x00FF0000) 10435 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_148_COEFF_PROBS_594_LSBMASK (0x000000FF) 10436 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_148_COEFF_PROBS_594_SHIFT (16) 10437 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_148_COEFF_PROBS_594_SIGNED_FIELD IMG_FALSE 10438 10439 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_148, COEFF_PROBS_595 10440 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_148_COEFF_PROBS_595_MASK (0xFF000000) 10441 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_148_COEFF_PROBS_595_LSBMASK (0x000000FF) 10442 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_148_COEFF_PROBS_595_SHIFT (24) 10443 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_148_COEFF_PROBS_595_SIGNED_FIELD IMG_FALSE 10444 10445 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_149_OFFSET (0x0E48) 10446 10447 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_149, COEFF_PROBS_596 10448 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_149_COEFF_PROBS_596_MASK (0x000000FF) 10449 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_149_COEFF_PROBS_596_LSBMASK (0x000000FF) 10450 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_149_COEFF_PROBS_596_SHIFT (0) 10451 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_149_COEFF_PROBS_596_SIGNED_FIELD IMG_FALSE 10452 10453 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_149, COEFF_PROBS_597 10454 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_149_COEFF_PROBS_597_MASK (0x0000FF00) 10455 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_149_COEFF_PROBS_597_LSBMASK (0x000000FF) 10456 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_149_COEFF_PROBS_597_SHIFT (8) 10457 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_149_COEFF_PROBS_597_SIGNED_FIELD IMG_FALSE 10458 10459 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_149, COEFF_PROBS_598 10460 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_149_COEFF_PROBS_598_MASK (0x00FF0000) 10461 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_149_COEFF_PROBS_598_LSBMASK (0x000000FF) 10462 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_149_COEFF_PROBS_598_SHIFT (16) 10463 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_149_COEFF_PROBS_598_SIGNED_FIELD IMG_FALSE 10464 10465 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_149, COEFF_PROBS_599 10466 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_149_COEFF_PROBS_599_MASK (0xFF000000) 10467 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_149_COEFF_PROBS_599_LSBMASK (0x000000FF) 10468 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_149_COEFF_PROBS_599_SHIFT (24) 10469 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_149_COEFF_PROBS_599_SIGNED_FIELD IMG_FALSE 10470 10471 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_150_OFFSET (0x0E4C) 10472 10473 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_150, COEFF_PROBS_600 10474 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_150_COEFF_PROBS_600_MASK (0x000000FF) 10475 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_150_COEFF_PROBS_600_LSBMASK (0x000000FF) 10476 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_150_COEFF_PROBS_600_SHIFT (0) 10477 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_150_COEFF_PROBS_600_SIGNED_FIELD IMG_FALSE 10478 10479 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_150, COEFF_PROBS_601 10480 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_150_COEFF_PROBS_601_MASK (0x0000FF00) 10481 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_150_COEFF_PROBS_601_LSBMASK (0x000000FF) 10482 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_150_COEFF_PROBS_601_SHIFT (8) 10483 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_150_COEFF_PROBS_601_SIGNED_FIELD IMG_FALSE 10484 10485 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_150, COEFF_PROBS_602 10486 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_150_COEFF_PROBS_602_MASK (0x00FF0000) 10487 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_150_COEFF_PROBS_602_LSBMASK (0x000000FF) 10488 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_150_COEFF_PROBS_602_SHIFT (16) 10489 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_150_COEFF_PROBS_602_SIGNED_FIELD IMG_FALSE 10490 10491 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_150, COEFF_PROBS_603 10492 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_150_COEFF_PROBS_603_MASK (0xFF000000) 10493 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_150_COEFF_PROBS_603_LSBMASK (0x000000FF) 10494 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_150_COEFF_PROBS_603_SHIFT (24) 10495 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_150_COEFF_PROBS_603_SIGNED_FIELD IMG_FALSE 10496 10497 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_151_OFFSET (0x0E50) 10498 10499 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_151, COEFF_PROBS_604 10500 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_151_COEFF_PROBS_604_MASK (0x000000FF) 10501 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_151_COEFF_PROBS_604_LSBMASK (0x000000FF) 10502 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_151_COEFF_PROBS_604_SHIFT (0) 10503 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_151_COEFF_PROBS_604_SIGNED_FIELD IMG_FALSE 10504 10505 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_151, COEFF_PROBS_605 10506 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_151_COEFF_PROBS_605_MASK (0x0000FF00) 10507 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_151_COEFF_PROBS_605_LSBMASK (0x000000FF) 10508 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_151_COEFF_PROBS_605_SHIFT (8) 10509 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_151_COEFF_PROBS_605_SIGNED_FIELD IMG_FALSE 10510 10511 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_151, COEFF_PROBS_606 10512 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_151_COEFF_PROBS_606_MASK (0x00FF0000) 10513 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_151_COEFF_PROBS_606_LSBMASK (0x000000FF) 10514 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_151_COEFF_PROBS_606_SHIFT (16) 10515 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_151_COEFF_PROBS_606_SIGNED_FIELD IMG_FALSE 10516 10517 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_151, COEFF_PROBS_607 10518 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_151_COEFF_PROBS_607_MASK (0xFF000000) 10519 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_151_COEFF_PROBS_607_LSBMASK (0x000000FF) 10520 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_151_COEFF_PROBS_607_SHIFT (24) 10521 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_151_COEFF_PROBS_607_SIGNED_FIELD IMG_FALSE 10522 10523 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_152_OFFSET (0x0E54) 10524 10525 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_152, COEFF_PROBS_608 10526 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_152_COEFF_PROBS_608_MASK (0x000000FF) 10527 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_152_COEFF_PROBS_608_LSBMASK (0x000000FF) 10528 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_152_COEFF_PROBS_608_SHIFT (0) 10529 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_152_COEFF_PROBS_608_SIGNED_FIELD IMG_FALSE 10530 10531 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_152, COEFF_PROBS_609 10532 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_152_COEFF_PROBS_609_MASK (0x0000FF00) 10533 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_152_COEFF_PROBS_609_LSBMASK (0x000000FF) 10534 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_152_COEFF_PROBS_609_SHIFT (8) 10535 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_152_COEFF_PROBS_609_SIGNED_FIELD IMG_FALSE 10536 10537 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_152, COEFF_PROBS_610 10538 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_152_COEFF_PROBS_610_MASK (0x00FF0000) 10539 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_152_COEFF_PROBS_610_LSBMASK (0x000000FF) 10540 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_152_COEFF_PROBS_610_SHIFT (16) 10541 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_152_COEFF_PROBS_610_SIGNED_FIELD IMG_FALSE 10542 10543 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_152, COEFF_PROBS_611 10544 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_152_COEFF_PROBS_611_MASK (0xFF000000) 10545 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_152_COEFF_PROBS_611_LSBMASK (0x000000FF) 10546 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_152_COEFF_PROBS_611_SHIFT (24) 10547 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_152_COEFF_PROBS_611_SIGNED_FIELD IMG_FALSE 10548 10549 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_153_OFFSET (0x0E58) 10550 10551 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_153, COEFF_PROBS_612 10552 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_153_COEFF_PROBS_612_MASK (0x000000FF) 10553 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_153_COEFF_PROBS_612_LSBMASK (0x000000FF) 10554 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_153_COEFF_PROBS_612_SHIFT (0) 10555 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_153_COEFF_PROBS_612_SIGNED_FIELD IMG_FALSE 10556 10557 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_153, COEFF_PROBS_613 10558 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_153_COEFF_PROBS_613_MASK (0x0000FF00) 10559 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_153_COEFF_PROBS_613_LSBMASK (0x000000FF) 10560 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_153_COEFF_PROBS_613_SHIFT (8) 10561 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_153_COEFF_PROBS_613_SIGNED_FIELD IMG_FALSE 10562 10563 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_153, COEFF_PROBS_614 10564 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_153_COEFF_PROBS_614_MASK (0x00FF0000) 10565 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_153_COEFF_PROBS_614_LSBMASK (0x000000FF) 10566 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_153_COEFF_PROBS_614_SHIFT (16) 10567 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_153_COEFF_PROBS_614_SIGNED_FIELD IMG_FALSE 10568 10569 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_153, COEFF_PROBS_615 10570 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_153_COEFF_PROBS_615_MASK (0xFF000000) 10571 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_153_COEFF_PROBS_615_LSBMASK (0x000000FF) 10572 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_153_COEFF_PROBS_615_SHIFT (24) 10573 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_153_COEFF_PROBS_615_SIGNED_FIELD IMG_FALSE 10574 10575 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_154_OFFSET (0x0E5C) 10576 10577 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_154, COEFF_PROBS_616 10578 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_154_COEFF_PROBS_616_MASK (0x000000FF) 10579 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_154_COEFF_PROBS_616_LSBMASK (0x000000FF) 10580 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_154_COEFF_PROBS_616_SHIFT (0) 10581 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_154_COEFF_PROBS_616_SIGNED_FIELD IMG_FALSE 10582 10583 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_154, COEFF_PROBS_617 10584 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_154_COEFF_PROBS_617_MASK (0x0000FF00) 10585 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_154_COEFF_PROBS_617_LSBMASK (0x000000FF) 10586 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_154_COEFF_PROBS_617_SHIFT (8) 10587 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_154_COEFF_PROBS_617_SIGNED_FIELD IMG_FALSE 10588 10589 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_154, COEFF_PROBS_618 10590 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_154_COEFF_PROBS_618_MASK (0x00FF0000) 10591 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_154_COEFF_PROBS_618_LSBMASK (0x000000FF) 10592 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_154_COEFF_PROBS_618_SHIFT (16) 10593 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_154_COEFF_PROBS_618_SIGNED_FIELD IMG_FALSE 10594 10595 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_154, COEFF_PROBS_619 10596 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_154_COEFF_PROBS_619_MASK (0xFF000000) 10597 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_154_COEFF_PROBS_619_LSBMASK (0x000000FF) 10598 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_154_COEFF_PROBS_619_SHIFT (24) 10599 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_154_COEFF_PROBS_619_SIGNED_FIELD IMG_FALSE 10600 10601 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_155_OFFSET (0x0E60) 10602 10603 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_155, COEFF_PROBS_620 10604 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_155_COEFF_PROBS_620_MASK (0x000000FF) 10605 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_155_COEFF_PROBS_620_LSBMASK (0x000000FF) 10606 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_155_COEFF_PROBS_620_SHIFT (0) 10607 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_155_COEFF_PROBS_620_SIGNED_FIELD IMG_FALSE 10608 10609 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_155, COEFF_PROBS_621 10610 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_155_COEFF_PROBS_621_MASK (0x0000FF00) 10611 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_155_COEFF_PROBS_621_LSBMASK (0x000000FF) 10612 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_155_COEFF_PROBS_621_SHIFT (8) 10613 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_155_COEFF_PROBS_621_SIGNED_FIELD IMG_FALSE 10614 10615 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_155, COEFF_PROBS_622 10616 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_155_COEFF_PROBS_622_MASK (0x00FF0000) 10617 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_155_COEFF_PROBS_622_LSBMASK (0x000000FF) 10618 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_155_COEFF_PROBS_622_SHIFT (16) 10619 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_155_COEFF_PROBS_622_SIGNED_FIELD IMG_FALSE 10620 10621 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_155, COEFF_PROBS_623 10622 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_155_COEFF_PROBS_623_MASK (0xFF000000) 10623 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_155_COEFF_PROBS_623_LSBMASK (0x000000FF) 10624 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_155_COEFF_PROBS_623_SHIFT (24) 10625 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_155_COEFF_PROBS_623_SIGNED_FIELD IMG_FALSE 10626 10627 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_156_OFFSET (0x0E64) 10628 10629 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_156, COEFF_PROBS_624 10630 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_156_COEFF_PROBS_624_MASK (0x000000FF) 10631 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_156_COEFF_PROBS_624_LSBMASK (0x000000FF) 10632 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_156_COEFF_PROBS_624_SHIFT (0) 10633 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_156_COEFF_PROBS_624_SIGNED_FIELD IMG_FALSE 10634 10635 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_156, COEFF_PROBS_625 10636 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_156_COEFF_PROBS_625_MASK (0x0000FF00) 10637 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_156_COEFF_PROBS_625_LSBMASK (0x000000FF) 10638 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_156_COEFF_PROBS_625_SHIFT (8) 10639 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_156_COEFF_PROBS_625_SIGNED_FIELD IMG_FALSE 10640 10641 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_156, COEFF_PROBS_626 10642 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_156_COEFF_PROBS_626_MASK (0x00FF0000) 10643 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_156_COEFF_PROBS_626_LSBMASK (0x000000FF) 10644 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_156_COEFF_PROBS_626_SHIFT (16) 10645 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_156_COEFF_PROBS_626_SIGNED_FIELD IMG_FALSE 10646 10647 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_156, COEFF_PROBS_627 10648 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_156_COEFF_PROBS_627_MASK (0xFF000000) 10649 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_156_COEFF_PROBS_627_LSBMASK (0x000000FF) 10650 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_156_COEFF_PROBS_627_SHIFT (24) 10651 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_156_COEFF_PROBS_627_SIGNED_FIELD IMG_FALSE 10652 10653 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_157_OFFSET (0x0E68) 10654 10655 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_157, COEFF_PROBS_628 10656 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_157_COEFF_PROBS_628_MASK (0x000000FF) 10657 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_157_COEFF_PROBS_628_LSBMASK (0x000000FF) 10658 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_157_COEFF_PROBS_628_SHIFT (0) 10659 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_157_COEFF_PROBS_628_SIGNED_FIELD IMG_FALSE 10660 10661 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_157, COEFF_PROBS_629 10662 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_157_COEFF_PROBS_629_MASK (0x0000FF00) 10663 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_157_COEFF_PROBS_629_LSBMASK (0x000000FF) 10664 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_157_COEFF_PROBS_629_SHIFT (8) 10665 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_157_COEFF_PROBS_629_SIGNED_FIELD IMG_FALSE 10666 10667 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_157, COEFF_PROBS_630 10668 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_157_COEFF_PROBS_630_MASK (0x00FF0000) 10669 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_157_COEFF_PROBS_630_LSBMASK (0x000000FF) 10670 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_157_COEFF_PROBS_630_SHIFT (16) 10671 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_157_COEFF_PROBS_630_SIGNED_FIELD IMG_FALSE 10672 10673 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_157, COEFF_PROBS_631 10674 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_157_COEFF_PROBS_631_MASK (0xFF000000) 10675 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_157_COEFF_PROBS_631_LSBMASK (0x000000FF) 10676 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_157_COEFF_PROBS_631_SHIFT (24) 10677 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_157_COEFF_PROBS_631_SIGNED_FIELD IMG_FALSE 10678 10679 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_158_OFFSET (0x0E6C) 10680 10681 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_158, COEFF_PROBS_632 10682 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_158_COEFF_PROBS_632_MASK (0x000000FF) 10683 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_158_COEFF_PROBS_632_LSBMASK (0x000000FF) 10684 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_158_COEFF_PROBS_632_SHIFT (0) 10685 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_158_COEFF_PROBS_632_SIGNED_FIELD IMG_FALSE 10686 10687 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_158, COEFF_PROBS_633 10688 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_158_COEFF_PROBS_633_MASK (0x0000FF00) 10689 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_158_COEFF_PROBS_633_LSBMASK (0x000000FF) 10690 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_158_COEFF_PROBS_633_SHIFT (8) 10691 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_158_COEFF_PROBS_633_SIGNED_FIELD IMG_FALSE 10692 10693 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_158, COEFF_PROBS_634 10694 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_158_COEFF_PROBS_634_MASK (0x00FF0000) 10695 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_158_COEFF_PROBS_634_LSBMASK (0x000000FF) 10696 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_158_COEFF_PROBS_634_SHIFT (16) 10697 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_158_COEFF_PROBS_634_SIGNED_FIELD IMG_FALSE 10698 10699 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_158, COEFF_PROBS_635 10700 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_158_COEFF_PROBS_635_MASK (0xFF000000) 10701 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_158_COEFF_PROBS_635_LSBMASK (0x000000FF) 10702 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_158_COEFF_PROBS_635_SHIFT (24) 10703 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_158_COEFF_PROBS_635_SIGNED_FIELD IMG_FALSE 10704 10705 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_159_OFFSET (0x0E70) 10706 10707 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_159, COEFF_PROBS_636 10708 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_159_COEFF_PROBS_636_MASK (0x000000FF) 10709 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_159_COEFF_PROBS_636_LSBMASK (0x000000FF) 10710 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_159_COEFF_PROBS_636_SHIFT (0) 10711 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_159_COEFF_PROBS_636_SIGNED_FIELD IMG_FALSE 10712 10713 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_159, COEFF_PROBS_637 10714 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_159_COEFF_PROBS_637_MASK (0x0000FF00) 10715 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_159_COEFF_PROBS_637_LSBMASK (0x000000FF) 10716 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_159_COEFF_PROBS_637_SHIFT (8) 10717 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_159_COEFF_PROBS_637_SIGNED_FIELD IMG_FALSE 10718 10719 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_159, COEFF_PROBS_638 10720 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_159_COEFF_PROBS_638_MASK (0x00FF0000) 10721 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_159_COEFF_PROBS_638_LSBMASK (0x000000FF) 10722 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_159_COEFF_PROBS_638_SHIFT (16) 10723 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_159_COEFF_PROBS_638_SIGNED_FIELD IMG_FALSE 10724 10725 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_159, COEFF_PROBS_639 10726 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_159_COEFF_PROBS_639_MASK (0xFF000000) 10727 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_159_COEFF_PROBS_639_LSBMASK (0x000000FF) 10728 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_159_COEFF_PROBS_639_SHIFT (24) 10729 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_159_COEFF_PROBS_639_SIGNED_FIELD IMG_FALSE 10730 10731 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_160_OFFSET (0x0E74) 10732 10733 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_160, COEFF_PROBS_640 10734 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_160_COEFF_PROBS_640_MASK (0x000000FF) 10735 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_160_COEFF_PROBS_640_LSBMASK (0x000000FF) 10736 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_160_COEFF_PROBS_640_SHIFT (0) 10737 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_160_COEFF_PROBS_640_SIGNED_FIELD IMG_FALSE 10738 10739 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_160, COEFF_PROBS_641 10740 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_160_COEFF_PROBS_641_MASK (0x0000FF00) 10741 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_160_COEFF_PROBS_641_LSBMASK (0x000000FF) 10742 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_160_COEFF_PROBS_641_SHIFT (8) 10743 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_160_COEFF_PROBS_641_SIGNED_FIELD IMG_FALSE 10744 10745 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_160, COEFF_PROBS_642 10746 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_160_COEFF_PROBS_642_MASK (0x00FF0000) 10747 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_160_COEFF_PROBS_642_LSBMASK (0x000000FF) 10748 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_160_COEFF_PROBS_642_SHIFT (16) 10749 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_160_COEFF_PROBS_642_SIGNED_FIELD IMG_FALSE 10750 10751 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_160, COEFF_PROBS_643 10752 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_160_COEFF_PROBS_643_MASK (0xFF000000) 10753 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_160_COEFF_PROBS_643_LSBMASK (0x000000FF) 10754 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_160_COEFF_PROBS_643_SHIFT (24) 10755 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_160_COEFF_PROBS_643_SIGNED_FIELD IMG_FALSE 10756 10757 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_161_OFFSET (0x0E78) 10758 10759 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_161, COEFF_PROBS_644 10760 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_161_COEFF_PROBS_644_MASK (0x000000FF) 10761 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_161_COEFF_PROBS_644_LSBMASK (0x000000FF) 10762 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_161_COEFF_PROBS_644_SHIFT (0) 10763 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_161_COEFF_PROBS_644_SIGNED_FIELD IMG_FALSE 10764 10765 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_161, COEFF_PROBS_645 10766 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_161_COEFF_PROBS_645_MASK (0x0000FF00) 10767 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_161_COEFF_PROBS_645_LSBMASK (0x000000FF) 10768 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_161_COEFF_PROBS_645_SHIFT (8) 10769 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_161_COEFF_PROBS_645_SIGNED_FIELD IMG_FALSE 10770 10771 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_161, COEFF_PROBS_646 10772 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_161_COEFF_PROBS_646_MASK (0x00FF0000) 10773 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_161_COEFF_PROBS_646_LSBMASK (0x000000FF) 10774 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_161_COEFF_PROBS_646_SHIFT (16) 10775 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_161_COEFF_PROBS_646_SIGNED_FIELD IMG_FALSE 10776 10777 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_161, COEFF_PROBS_647 10778 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_161_COEFF_PROBS_647_MASK (0xFF000000) 10779 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_161_COEFF_PROBS_647_LSBMASK (0x000000FF) 10780 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_161_COEFF_PROBS_647_SHIFT (24) 10781 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_161_COEFF_PROBS_647_SIGNED_FIELD IMG_FALSE 10782 10783 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_162_OFFSET (0x0E7C) 10784 10785 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_162, COEFF_PROBS_648 10786 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_162_COEFF_PROBS_648_MASK (0x000000FF) 10787 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_162_COEFF_PROBS_648_LSBMASK (0x000000FF) 10788 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_162_COEFF_PROBS_648_SHIFT (0) 10789 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_162_COEFF_PROBS_648_SIGNED_FIELD IMG_FALSE 10790 10791 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_162, COEFF_PROBS_649 10792 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_162_COEFF_PROBS_649_MASK (0x0000FF00) 10793 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_162_COEFF_PROBS_649_LSBMASK (0x000000FF) 10794 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_162_COEFF_PROBS_649_SHIFT (8) 10795 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_162_COEFF_PROBS_649_SIGNED_FIELD IMG_FALSE 10796 10797 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_162, COEFF_PROBS_650 10798 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_162_COEFF_PROBS_650_MASK (0x00FF0000) 10799 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_162_COEFF_PROBS_650_LSBMASK (0x000000FF) 10800 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_162_COEFF_PROBS_650_SHIFT (16) 10801 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_162_COEFF_PROBS_650_SIGNED_FIELD IMG_FALSE 10802 10803 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_162, COEFF_PROBS_651 10804 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_162_COEFF_PROBS_651_MASK (0xFF000000) 10805 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_162_COEFF_PROBS_651_LSBMASK (0x000000FF) 10806 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_162_COEFF_PROBS_651_SHIFT (24) 10807 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_162_COEFF_PROBS_651_SIGNED_FIELD IMG_FALSE 10808 10809 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_163_OFFSET (0x0E80) 10810 10811 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_163, COEFF_PROBS_652 10812 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_163_COEFF_PROBS_652_MASK (0x000000FF) 10813 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_163_COEFF_PROBS_652_LSBMASK (0x000000FF) 10814 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_163_COEFF_PROBS_652_SHIFT (0) 10815 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_163_COEFF_PROBS_652_SIGNED_FIELD IMG_FALSE 10816 10817 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_163, COEFF_PROBS_653 10818 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_163_COEFF_PROBS_653_MASK (0x0000FF00) 10819 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_163_COEFF_PROBS_653_LSBMASK (0x000000FF) 10820 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_163_COEFF_PROBS_653_SHIFT (8) 10821 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_163_COEFF_PROBS_653_SIGNED_FIELD IMG_FALSE 10822 10823 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_163, COEFF_PROBS_654 10824 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_163_COEFF_PROBS_654_MASK (0x00FF0000) 10825 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_163_COEFF_PROBS_654_LSBMASK (0x000000FF) 10826 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_163_COEFF_PROBS_654_SHIFT (16) 10827 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_163_COEFF_PROBS_654_SIGNED_FIELD IMG_FALSE 10828 10829 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_163, COEFF_PROBS_655 10830 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_163_COEFF_PROBS_655_MASK (0xFF000000) 10831 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_163_COEFF_PROBS_655_LSBMASK (0x000000FF) 10832 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_163_COEFF_PROBS_655_SHIFT (24) 10833 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_163_COEFF_PROBS_655_SIGNED_FIELD IMG_FALSE 10834 10835 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_164_OFFSET (0x0E84) 10836 10837 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_164, COEFF_PROBS_656 10838 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_164_COEFF_PROBS_656_MASK (0x000000FF) 10839 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_164_COEFF_PROBS_656_LSBMASK (0x000000FF) 10840 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_164_COEFF_PROBS_656_SHIFT (0) 10841 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_164_COEFF_PROBS_656_SIGNED_FIELD IMG_FALSE 10842 10843 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_164, COEFF_PROBS_657 10844 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_164_COEFF_PROBS_657_MASK (0x0000FF00) 10845 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_164_COEFF_PROBS_657_LSBMASK (0x000000FF) 10846 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_164_COEFF_PROBS_657_SHIFT (8) 10847 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_164_COEFF_PROBS_657_SIGNED_FIELD IMG_FALSE 10848 10849 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_164, COEFF_PROBS_658 10850 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_164_COEFF_PROBS_658_MASK (0x00FF0000) 10851 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_164_COEFF_PROBS_658_LSBMASK (0x000000FF) 10852 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_164_COEFF_PROBS_658_SHIFT (16) 10853 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_164_COEFF_PROBS_658_SIGNED_FIELD IMG_FALSE 10854 10855 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_164, COEFF_PROBS_659 10856 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_164_COEFF_PROBS_659_MASK (0xFF000000) 10857 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_164_COEFF_PROBS_659_LSBMASK (0x000000FF) 10858 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_164_COEFF_PROBS_659_SHIFT (24) 10859 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_164_COEFF_PROBS_659_SIGNED_FIELD IMG_FALSE 10860 10861 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_165_OFFSET (0x0E88) 10862 10863 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_165, COEFF_PROBS_660 10864 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_165_COEFF_PROBS_660_MASK (0x000000FF) 10865 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_165_COEFF_PROBS_660_LSBMASK (0x000000FF) 10866 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_165_COEFF_PROBS_660_SHIFT (0) 10867 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_165_COEFF_PROBS_660_SIGNED_FIELD IMG_FALSE 10868 10869 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_165, COEFF_PROBS_661 10870 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_165_COEFF_PROBS_661_MASK (0x0000FF00) 10871 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_165_COEFF_PROBS_661_LSBMASK (0x000000FF) 10872 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_165_COEFF_PROBS_661_SHIFT (8) 10873 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_165_COEFF_PROBS_661_SIGNED_FIELD IMG_FALSE 10874 10875 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_165, COEFF_PROBS_662 10876 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_165_COEFF_PROBS_662_MASK (0x00FF0000) 10877 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_165_COEFF_PROBS_662_LSBMASK (0x000000FF) 10878 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_165_COEFF_PROBS_662_SHIFT (16) 10879 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_165_COEFF_PROBS_662_SIGNED_FIELD IMG_FALSE 10880 10881 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_165, COEFF_PROBS_663 10882 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_165_COEFF_PROBS_663_MASK (0xFF000000) 10883 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_165_COEFF_PROBS_663_LSBMASK (0x000000FF) 10884 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_165_COEFF_PROBS_663_SHIFT (24) 10885 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_165_COEFF_PROBS_663_SIGNED_FIELD IMG_FALSE 10886 10887 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_166_OFFSET (0x0E8C) 10888 10889 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_166, COEFF_PROBS_664 10890 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_166_COEFF_PROBS_664_MASK (0x000000FF) 10891 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_166_COEFF_PROBS_664_LSBMASK (0x000000FF) 10892 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_166_COEFF_PROBS_664_SHIFT (0) 10893 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_166_COEFF_PROBS_664_SIGNED_FIELD IMG_FALSE 10894 10895 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_166, COEFF_PROBS_665 10896 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_166_COEFF_PROBS_665_MASK (0x0000FF00) 10897 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_166_COEFF_PROBS_665_LSBMASK (0x000000FF) 10898 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_166_COEFF_PROBS_665_SHIFT (8) 10899 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_166_COEFF_PROBS_665_SIGNED_FIELD IMG_FALSE 10900 10901 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_166, COEFF_PROBS_666 10902 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_166_COEFF_PROBS_666_MASK (0x00FF0000) 10903 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_166_COEFF_PROBS_666_LSBMASK (0x000000FF) 10904 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_166_COEFF_PROBS_666_SHIFT (16) 10905 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_166_COEFF_PROBS_666_SIGNED_FIELD IMG_FALSE 10906 10907 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_166, COEFF_PROBS_667 10908 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_166_COEFF_PROBS_667_MASK (0xFF000000) 10909 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_166_COEFF_PROBS_667_LSBMASK (0x000000FF) 10910 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_166_COEFF_PROBS_667_SHIFT (24) 10911 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_166_COEFF_PROBS_667_SIGNED_FIELD IMG_FALSE 10912 10913 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_167_OFFSET (0x0E90) 10914 10915 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_167, COEFF_PROBS_668 10916 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_167_COEFF_PROBS_668_MASK (0x000000FF) 10917 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_167_COEFF_PROBS_668_LSBMASK (0x000000FF) 10918 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_167_COEFF_PROBS_668_SHIFT (0) 10919 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_167_COEFF_PROBS_668_SIGNED_FIELD IMG_FALSE 10920 10921 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_167, COEFF_PROBS_669 10922 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_167_COEFF_PROBS_669_MASK (0x0000FF00) 10923 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_167_COEFF_PROBS_669_LSBMASK (0x000000FF) 10924 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_167_COEFF_PROBS_669_SHIFT (8) 10925 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_167_COEFF_PROBS_669_SIGNED_FIELD IMG_FALSE 10926 10927 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_167, COEFF_PROBS_670 10928 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_167_COEFF_PROBS_670_MASK (0x00FF0000) 10929 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_167_COEFF_PROBS_670_LSBMASK (0x000000FF) 10930 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_167_COEFF_PROBS_670_SHIFT (16) 10931 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_167_COEFF_PROBS_670_SIGNED_FIELD IMG_FALSE 10932 10933 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_167, COEFF_PROBS_671 10934 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_167_COEFF_PROBS_671_MASK (0xFF000000) 10935 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_167_COEFF_PROBS_671_LSBMASK (0x000000FF) 10936 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_167_COEFF_PROBS_671_SHIFT (24) 10937 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_167_COEFF_PROBS_671_SIGNED_FIELD IMG_FALSE 10938 10939 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_168_OFFSET (0x0E94) 10940 10941 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_168, COEFF_PROBS_672 10942 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_168_COEFF_PROBS_672_MASK (0x000000FF) 10943 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_168_COEFF_PROBS_672_LSBMASK (0x000000FF) 10944 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_168_COEFF_PROBS_672_SHIFT (0) 10945 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_168_COEFF_PROBS_672_SIGNED_FIELD IMG_FALSE 10946 10947 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_168, COEFF_PROBS_673 10948 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_168_COEFF_PROBS_673_MASK (0x0000FF00) 10949 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_168_COEFF_PROBS_673_LSBMASK (0x000000FF) 10950 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_168_COEFF_PROBS_673_SHIFT (8) 10951 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_168_COEFF_PROBS_673_SIGNED_FIELD IMG_FALSE 10952 10953 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_168, COEFF_PROBS_674 10954 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_168_COEFF_PROBS_674_MASK (0x00FF0000) 10955 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_168_COEFF_PROBS_674_LSBMASK (0x000000FF) 10956 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_168_COEFF_PROBS_674_SHIFT (16) 10957 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_168_COEFF_PROBS_674_SIGNED_FIELD IMG_FALSE 10958 10959 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_168, COEFF_PROBS_675 10960 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_168_COEFF_PROBS_675_MASK (0xFF000000) 10961 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_168_COEFF_PROBS_675_LSBMASK (0x000000FF) 10962 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_168_COEFF_PROBS_675_SHIFT (24) 10963 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_168_COEFF_PROBS_675_SIGNED_FIELD IMG_FALSE 10964 10965 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_169_OFFSET (0x0E98) 10966 10967 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_169, COEFF_PROBS_676 10968 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_169_COEFF_PROBS_676_MASK (0x000000FF) 10969 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_169_COEFF_PROBS_676_LSBMASK (0x000000FF) 10970 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_169_COEFF_PROBS_676_SHIFT (0) 10971 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_169_COEFF_PROBS_676_SIGNED_FIELD IMG_FALSE 10972 10973 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_169, COEFF_PROBS_677 10974 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_169_COEFF_PROBS_677_MASK (0x0000FF00) 10975 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_169_COEFF_PROBS_677_LSBMASK (0x000000FF) 10976 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_169_COEFF_PROBS_677_SHIFT (8) 10977 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_169_COEFF_PROBS_677_SIGNED_FIELD IMG_FALSE 10978 10979 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_169, COEFF_PROBS_678 10980 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_169_COEFF_PROBS_678_MASK (0x00FF0000) 10981 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_169_COEFF_PROBS_678_LSBMASK (0x000000FF) 10982 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_169_COEFF_PROBS_678_SHIFT (16) 10983 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_169_COEFF_PROBS_678_SIGNED_FIELD IMG_FALSE 10984 10985 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_169, COEFF_PROBS_679 10986 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_169_COEFF_PROBS_679_MASK (0xFF000000) 10987 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_169_COEFF_PROBS_679_LSBMASK (0x000000FF) 10988 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_169_COEFF_PROBS_679_SHIFT (24) 10989 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_169_COEFF_PROBS_679_SIGNED_FIELD IMG_FALSE 10990 10991 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_170_OFFSET (0x0E9C) 10992 10993 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_170, COEFF_PROBS_680 10994 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_170_COEFF_PROBS_680_MASK (0x000000FF) 10995 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_170_COEFF_PROBS_680_LSBMASK (0x000000FF) 10996 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_170_COEFF_PROBS_680_SHIFT (0) 10997 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_170_COEFF_PROBS_680_SIGNED_FIELD IMG_FALSE 10998 10999 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_170, COEFF_PROBS_681 11000 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_170_COEFF_PROBS_681_MASK (0x0000FF00) 11001 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_170_COEFF_PROBS_681_LSBMASK (0x000000FF) 11002 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_170_COEFF_PROBS_681_SHIFT (8) 11003 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_170_COEFF_PROBS_681_SIGNED_FIELD IMG_FALSE 11004 11005 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_170, COEFF_PROBS_682 11006 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_170_COEFF_PROBS_682_MASK (0x00FF0000) 11007 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_170_COEFF_PROBS_682_LSBMASK (0x000000FF) 11008 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_170_COEFF_PROBS_682_SHIFT (16) 11009 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_170_COEFF_PROBS_682_SIGNED_FIELD IMG_FALSE 11010 11011 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_170, COEFF_PROBS_683 11012 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_170_COEFF_PROBS_683_MASK (0xFF000000) 11013 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_170_COEFF_PROBS_683_LSBMASK (0x000000FF) 11014 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_170_COEFF_PROBS_683_SHIFT (24) 11015 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_170_COEFF_PROBS_683_SIGNED_FIELD IMG_FALSE 11016 11017 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_171_OFFSET (0x0EA0) 11018 11019 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_171, COEFF_PROBS_684 11020 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_171_COEFF_PROBS_684_MASK (0x000000FF) 11021 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_171_COEFF_PROBS_684_LSBMASK (0x000000FF) 11022 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_171_COEFF_PROBS_684_SHIFT (0) 11023 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_171_COEFF_PROBS_684_SIGNED_FIELD IMG_FALSE 11024 11025 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_171, COEFF_PROBS_685 11026 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_171_COEFF_PROBS_685_MASK (0x0000FF00) 11027 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_171_COEFF_PROBS_685_LSBMASK (0x000000FF) 11028 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_171_COEFF_PROBS_685_SHIFT (8) 11029 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_171_COEFF_PROBS_685_SIGNED_FIELD IMG_FALSE 11030 11031 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_171, COEFF_PROBS_686 11032 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_171_COEFF_PROBS_686_MASK (0x00FF0000) 11033 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_171_COEFF_PROBS_686_LSBMASK (0x000000FF) 11034 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_171_COEFF_PROBS_686_SHIFT (16) 11035 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_171_COEFF_PROBS_686_SIGNED_FIELD IMG_FALSE 11036 11037 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_171, COEFF_PROBS_687 11038 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_171_COEFF_PROBS_687_MASK (0xFF000000) 11039 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_171_COEFF_PROBS_687_LSBMASK (0x000000FF) 11040 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_171_COEFF_PROBS_687_SHIFT (24) 11041 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_171_COEFF_PROBS_687_SIGNED_FIELD IMG_FALSE 11042 11043 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_172_OFFSET (0x0EA4) 11044 11045 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_172, COEFF_PROBS_688 11046 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_172_COEFF_PROBS_688_MASK (0x000000FF) 11047 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_172_COEFF_PROBS_688_LSBMASK (0x000000FF) 11048 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_172_COEFF_PROBS_688_SHIFT (0) 11049 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_172_COEFF_PROBS_688_SIGNED_FIELD IMG_FALSE 11050 11051 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_172, COEFF_PROBS_689 11052 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_172_COEFF_PROBS_689_MASK (0x0000FF00) 11053 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_172_COEFF_PROBS_689_LSBMASK (0x000000FF) 11054 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_172_COEFF_PROBS_689_SHIFT (8) 11055 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_172_COEFF_PROBS_689_SIGNED_FIELD IMG_FALSE 11056 11057 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_172, COEFF_PROBS_690 11058 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_172_COEFF_PROBS_690_MASK (0x00FF0000) 11059 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_172_COEFF_PROBS_690_LSBMASK (0x000000FF) 11060 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_172_COEFF_PROBS_690_SHIFT (16) 11061 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_172_COEFF_PROBS_690_SIGNED_FIELD IMG_FALSE 11062 11063 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_172, COEFF_PROBS_691 11064 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_172_COEFF_PROBS_691_MASK (0xFF000000) 11065 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_172_COEFF_PROBS_691_LSBMASK (0x000000FF) 11066 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_172_COEFF_PROBS_691_SHIFT (24) 11067 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_172_COEFF_PROBS_691_SIGNED_FIELD IMG_FALSE 11068 11069 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_173_OFFSET (0x0EA8) 11070 11071 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_173, COEFF_PROBS_692 11072 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_173_COEFF_PROBS_692_MASK (0x000000FF) 11073 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_173_COEFF_PROBS_692_LSBMASK (0x000000FF) 11074 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_173_COEFF_PROBS_692_SHIFT (0) 11075 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_173_COEFF_PROBS_692_SIGNED_FIELD IMG_FALSE 11076 11077 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_173, COEFF_PROBS_693 11078 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_173_COEFF_PROBS_693_MASK (0x0000FF00) 11079 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_173_COEFF_PROBS_693_LSBMASK (0x000000FF) 11080 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_173_COEFF_PROBS_693_SHIFT (8) 11081 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_173_COEFF_PROBS_693_SIGNED_FIELD IMG_FALSE 11082 11083 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_173, COEFF_PROBS_694 11084 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_173_COEFF_PROBS_694_MASK (0x00FF0000) 11085 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_173_COEFF_PROBS_694_LSBMASK (0x000000FF) 11086 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_173_COEFF_PROBS_694_SHIFT (16) 11087 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_173_COEFF_PROBS_694_SIGNED_FIELD IMG_FALSE 11088 11089 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_173, COEFF_PROBS_695 11090 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_173_COEFF_PROBS_695_MASK (0xFF000000) 11091 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_173_COEFF_PROBS_695_LSBMASK (0x000000FF) 11092 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_173_COEFF_PROBS_695_SHIFT (24) 11093 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_173_COEFF_PROBS_695_SIGNED_FIELD IMG_FALSE 11094 11095 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_174_OFFSET (0x0EAC) 11096 11097 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_174, COEFF_PROBS_696 11098 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_174_COEFF_PROBS_696_MASK (0x000000FF) 11099 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_174_COEFF_PROBS_696_LSBMASK (0x000000FF) 11100 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_174_COEFF_PROBS_696_SHIFT (0) 11101 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_174_COEFF_PROBS_696_SIGNED_FIELD IMG_FALSE 11102 11103 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_174, COEFF_PROBS_697 11104 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_174_COEFF_PROBS_697_MASK (0x0000FF00) 11105 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_174_COEFF_PROBS_697_LSBMASK (0x000000FF) 11106 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_174_COEFF_PROBS_697_SHIFT (8) 11107 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_174_COEFF_PROBS_697_SIGNED_FIELD IMG_FALSE 11108 11109 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_174, COEFF_PROBS_698 11110 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_174_COEFF_PROBS_698_MASK (0x00FF0000) 11111 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_174_COEFF_PROBS_698_LSBMASK (0x000000FF) 11112 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_174_COEFF_PROBS_698_SHIFT (16) 11113 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_174_COEFF_PROBS_698_SIGNED_FIELD IMG_FALSE 11114 11115 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_174, COEFF_PROBS_699 11116 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_174_COEFF_PROBS_699_MASK (0xFF000000) 11117 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_174_COEFF_PROBS_699_LSBMASK (0x000000FF) 11118 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_174_COEFF_PROBS_699_SHIFT (24) 11119 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_174_COEFF_PROBS_699_SIGNED_FIELD IMG_FALSE 11120 11121 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_175_OFFSET (0x0EB0) 11122 11123 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_175, COEFF_PROBS_700 11124 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_175_COEFF_PROBS_700_MASK (0x000000FF) 11125 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_175_COEFF_PROBS_700_LSBMASK (0x000000FF) 11126 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_175_COEFF_PROBS_700_SHIFT (0) 11127 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_175_COEFF_PROBS_700_SIGNED_FIELD IMG_FALSE 11128 11129 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_175, COEFF_PROBS_701 11130 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_175_COEFF_PROBS_701_MASK (0x0000FF00) 11131 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_175_COEFF_PROBS_701_LSBMASK (0x000000FF) 11132 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_175_COEFF_PROBS_701_SHIFT (8) 11133 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_175_COEFF_PROBS_701_SIGNED_FIELD IMG_FALSE 11134 11135 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_175, COEFF_PROBS_702 11136 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_175_COEFF_PROBS_702_MASK (0x00FF0000) 11137 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_175_COEFF_PROBS_702_LSBMASK (0x000000FF) 11138 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_175_COEFF_PROBS_702_SHIFT (16) 11139 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_175_COEFF_PROBS_702_SIGNED_FIELD IMG_FALSE 11140 11141 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_175, COEFF_PROBS_703 11142 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_175_COEFF_PROBS_703_MASK (0xFF000000) 11143 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_175_COEFF_PROBS_703_LSBMASK (0x000000FF) 11144 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_175_COEFF_PROBS_703_SHIFT (24) 11145 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_175_COEFF_PROBS_703_SIGNED_FIELD IMG_FALSE 11146 11147 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_176_OFFSET (0x0EB4) 11148 11149 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_176, COEFF_PROBS_704 11150 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_176_COEFF_PROBS_704_MASK (0x000000FF) 11151 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_176_COEFF_PROBS_704_LSBMASK (0x000000FF) 11152 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_176_COEFF_PROBS_704_SHIFT (0) 11153 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_176_COEFF_PROBS_704_SIGNED_FIELD IMG_FALSE 11154 11155 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_176, COEFF_PROBS_705 11156 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_176_COEFF_PROBS_705_MASK (0x0000FF00) 11157 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_176_COEFF_PROBS_705_LSBMASK (0x000000FF) 11158 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_176_COEFF_PROBS_705_SHIFT (8) 11159 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_176_COEFF_PROBS_705_SIGNED_FIELD IMG_FALSE 11160 11161 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_176, COEFF_PROBS_706 11162 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_176_COEFF_PROBS_706_MASK (0x00FF0000) 11163 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_176_COEFF_PROBS_706_LSBMASK (0x000000FF) 11164 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_176_COEFF_PROBS_706_SHIFT (16) 11165 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_176_COEFF_PROBS_706_SIGNED_FIELD IMG_FALSE 11166 11167 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_176, COEFF_PROBS_707 11168 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_176_COEFF_PROBS_707_MASK (0xFF000000) 11169 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_176_COEFF_PROBS_707_LSBMASK (0x000000FF) 11170 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_176_COEFF_PROBS_707_SHIFT (24) 11171 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_176_COEFF_PROBS_707_SIGNED_FIELD IMG_FALSE 11172 11173 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_177_OFFSET (0x0EB8) 11174 11175 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_177, COEFF_PROBS_708 11176 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_177_COEFF_PROBS_708_MASK (0x000000FF) 11177 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_177_COEFF_PROBS_708_LSBMASK (0x000000FF) 11178 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_177_COEFF_PROBS_708_SHIFT (0) 11179 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_177_COEFF_PROBS_708_SIGNED_FIELD IMG_FALSE 11180 11181 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_177, COEFF_PROBS_709 11182 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_177_COEFF_PROBS_709_MASK (0x0000FF00) 11183 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_177_COEFF_PROBS_709_LSBMASK (0x000000FF) 11184 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_177_COEFF_PROBS_709_SHIFT (8) 11185 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_177_COEFF_PROBS_709_SIGNED_FIELD IMG_FALSE 11186 11187 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_177, COEFF_PROBS_710 11188 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_177_COEFF_PROBS_710_MASK (0x00FF0000) 11189 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_177_COEFF_PROBS_710_LSBMASK (0x000000FF) 11190 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_177_COEFF_PROBS_710_SHIFT (16) 11191 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_177_COEFF_PROBS_710_SIGNED_FIELD IMG_FALSE 11192 11193 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_177, COEFF_PROBS_711 11194 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_177_COEFF_PROBS_711_MASK (0xFF000000) 11195 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_177_COEFF_PROBS_711_LSBMASK (0x000000FF) 11196 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_177_COEFF_PROBS_711_SHIFT (24) 11197 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_177_COEFF_PROBS_711_SIGNED_FIELD IMG_FALSE 11198 11199 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_178_OFFSET (0x0EBC) 11200 11201 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_178, COEFF_PROBS_712 11202 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_178_COEFF_PROBS_712_MASK (0x000000FF) 11203 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_178_COEFF_PROBS_712_LSBMASK (0x000000FF) 11204 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_178_COEFF_PROBS_712_SHIFT (0) 11205 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_178_COEFF_PROBS_712_SIGNED_FIELD IMG_FALSE 11206 11207 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_178, COEFF_PROBS_713 11208 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_178_COEFF_PROBS_713_MASK (0x0000FF00) 11209 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_178_COEFF_PROBS_713_LSBMASK (0x000000FF) 11210 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_178_COEFF_PROBS_713_SHIFT (8) 11211 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_178_COEFF_PROBS_713_SIGNED_FIELD IMG_FALSE 11212 11213 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_178, COEFF_PROBS_714 11214 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_178_COEFF_PROBS_714_MASK (0x00FF0000) 11215 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_178_COEFF_PROBS_714_LSBMASK (0x000000FF) 11216 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_178_COEFF_PROBS_714_SHIFT (16) 11217 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_178_COEFF_PROBS_714_SIGNED_FIELD IMG_FALSE 11218 11219 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_178, COEFF_PROBS_715 11220 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_178_COEFF_PROBS_715_MASK (0xFF000000) 11221 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_178_COEFF_PROBS_715_LSBMASK (0x000000FF) 11222 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_178_COEFF_PROBS_715_SHIFT (24) 11223 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_178_COEFF_PROBS_715_SIGNED_FIELD IMG_FALSE 11224 11225 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_179_OFFSET (0x0EC0) 11226 11227 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_179, COEFF_PROBS_716 11228 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_179_COEFF_PROBS_716_MASK (0x000000FF) 11229 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_179_COEFF_PROBS_716_LSBMASK (0x000000FF) 11230 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_179_COEFF_PROBS_716_SHIFT (0) 11231 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_179_COEFF_PROBS_716_SIGNED_FIELD IMG_FALSE 11232 11233 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_179, COEFF_PROBS_717 11234 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_179_COEFF_PROBS_717_MASK (0x0000FF00) 11235 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_179_COEFF_PROBS_717_LSBMASK (0x000000FF) 11236 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_179_COEFF_PROBS_717_SHIFT (8) 11237 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_179_COEFF_PROBS_717_SIGNED_FIELD IMG_FALSE 11238 11239 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_179, COEFF_PROBS_718 11240 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_179_COEFF_PROBS_718_MASK (0x00FF0000) 11241 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_179_COEFF_PROBS_718_LSBMASK (0x000000FF) 11242 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_179_COEFF_PROBS_718_SHIFT (16) 11243 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_179_COEFF_PROBS_718_SIGNED_FIELD IMG_FALSE 11244 11245 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_179, COEFF_PROBS_719 11246 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_179_COEFF_PROBS_719_MASK (0xFF000000) 11247 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_179_COEFF_PROBS_719_LSBMASK (0x000000FF) 11248 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_179_COEFF_PROBS_719_SHIFT (24) 11249 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_179_COEFF_PROBS_719_SIGNED_FIELD IMG_FALSE 11250 11251 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_180_OFFSET (0x0EC4) 11252 11253 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_180, COEFF_PROBS_720 11254 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_180_COEFF_PROBS_720_MASK (0x000000FF) 11255 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_180_COEFF_PROBS_720_LSBMASK (0x000000FF) 11256 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_180_COEFF_PROBS_720_SHIFT (0) 11257 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_180_COEFF_PROBS_720_SIGNED_FIELD IMG_FALSE 11258 11259 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_180, COEFF_PROBS_721 11260 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_180_COEFF_PROBS_721_MASK (0x0000FF00) 11261 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_180_COEFF_PROBS_721_LSBMASK (0x000000FF) 11262 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_180_COEFF_PROBS_721_SHIFT (8) 11263 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_180_COEFF_PROBS_721_SIGNED_FIELD IMG_FALSE 11264 11265 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_180, COEFF_PROBS_722 11266 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_180_COEFF_PROBS_722_MASK (0x00FF0000) 11267 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_180_COEFF_PROBS_722_LSBMASK (0x000000FF) 11268 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_180_COEFF_PROBS_722_SHIFT (16) 11269 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_180_COEFF_PROBS_722_SIGNED_FIELD IMG_FALSE 11270 11271 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_180, COEFF_PROBS_723 11272 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_180_COEFF_PROBS_723_MASK (0xFF000000) 11273 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_180_COEFF_PROBS_723_LSBMASK (0x000000FF) 11274 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_180_COEFF_PROBS_723_SHIFT (24) 11275 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_180_COEFF_PROBS_723_SIGNED_FIELD IMG_FALSE 11276 11277 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_181_OFFSET (0x0EC8) 11278 11279 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_181, COEFF_PROBS_724 11280 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_181_COEFF_PROBS_724_MASK (0x000000FF) 11281 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_181_COEFF_PROBS_724_LSBMASK (0x000000FF) 11282 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_181_COEFF_PROBS_724_SHIFT (0) 11283 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_181_COEFF_PROBS_724_SIGNED_FIELD IMG_FALSE 11284 11285 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_181, COEFF_PROBS_725 11286 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_181_COEFF_PROBS_725_MASK (0x0000FF00) 11287 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_181_COEFF_PROBS_725_LSBMASK (0x000000FF) 11288 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_181_COEFF_PROBS_725_SHIFT (8) 11289 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_181_COEFF_PROBS_725_SIGNED_FIELD IMG_FALSE 11290 11291 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_181, COEFF_PROBS_726 11292 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_181_COEFF_PROBS_726_MASK (0x00FF0000) 11293 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_181_COEFF_PROBS_726_LSBMASK (0x000000FF) 11294 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_181_COEFF_PROBS_726_SHIFT (16) 11295 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_181_COEFF_PROBS_726_SIGNED_FIELD IMG_FALSE 11296 11297 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_181, COEFF_PROBS_727 11298 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_181_COEFF_PROBS_727_MASK (0xFF000000) 11299 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_181_COEFF_PROBS_727_LSBMASK (0x000000FF) 11300 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_181_COEFF_PROBS_727_SHIFT (24) 11301 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_181_COEFF_PROBS_727_SIGNED_FIELD IMG_FALSE 11302 11303 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_182_OFFSET (0x0ECC) 11304 11305 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_182, COEFF_PROBS_728 11306 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_182_COEFF_PROBS_728_MASK (0x000000FF) 11307 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_182_COEFF_PROBS_728_LSBMASK (0x000000FF) 11308 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_182_COEFF_PROBS_728_SHIFT (0) 11309 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_182_COEFF_PROBS_728_SIGNED_FIELD IMG_FALSE 11310 11311 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_182, COEFF_PROBS_729 11312 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_182_COEFF_PROBS_729_MASK (0x0000FF00) 11313 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_182_COEFF_PROBS_729_LSBMASK (0x000000FF) 11314 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_182_COEFF_PROBS_729_SHIFT (8) 11315 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_182_COEFF_PROBS_729_SIGNED_FIELD IMG_FALSE 11316 11317 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_182, COEFF_PROBS_730 11318 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_182_COEFF_PROBS_730_MASK (0x00FF0000) 11319 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_182_COEFF_PROBS_730_LSBMASK (0x000000FF) 11320 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_182_COEFF_PROBS_730_SHIFT (16) 11321 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_182_COEFF_PROBS_730_SIGNED_FIELD IMG_FALSE 11322 11323 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_182, COEFF_PROBS_731 11324 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_182_COEFF_PROBS_731_MASK (0xFF000000) 11325 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_182_COEFF_PROBS_731_LSBMASK (0x000000FF) 11326 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_182_COEFF_PROBS_731_SHIFT (24) 11327 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_182_COEFF_PROBS_731_SIGNED_FIELD IMG_FALSE 11328 11329 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_183_OFFSET (0x0ED0) 11330 11331 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_183, COEFF_PROBS_732 11332 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_183_COEFF_PROBS_732_MASK (0x000000FF) 11333 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_183_COEFF_PROBS_732_LSBMASK (0x000000FF) 11334 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_183_COEFF_PROBS_732_SHIFT (0) 11335 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_183_COEFF_PROBS_732_SIGNED_FIELD IMG_FALSE 11336 11337 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_183, COEFF_PROBS_733 11338 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_183_COEFF_PROBS_733_MASK (0x0000FF00) 11339 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_183_COEFF_PROBS_733_LSBMASK (0x000000FF) 11340 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_183_COEFF_PROBS_733_SHIFT (8) 11341 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_183_COEFF_PROBS_733_SIGNED_FIELD IMG_FALSE 11342 11343 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_183, COEFF_PROBS_734 11344 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_183_COEFF_PROBS_734_MASK (0x00FF0000) 11345 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_183_COEFF_PROBS_734_LSBMASK (0x000000FF) 11346 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_183_COEFF_PROBS_734_SHIFT (16) 11347 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_183_COEFF_PROBS_734_SIGNED_FIELD IMG_FALSE 11348 11349 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_183, COEFF_PROBS_735 11350 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_183_COEFF_PROBS_735_MASK (0xFF000000) 11351 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_183_COEFF_PROBS_735_LSBMASK (0x000000FF) 11352 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_183_COEFF_PROBS_735_SHIFT (24) 11353 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_183_COEFF_PROBS_735_SIGNED_FIELD IMG_FALSE 11354 11355 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_184_OFFSET (0x0ED4) 11356 11357 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_184, COEFF_PROBS_736 11358 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_184_COEFF_PROBS_736_MASK (0x000000FF) 11359 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_184_COEFF_PROBS_736_LSBMASK (0x000000FF) 11360 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_184_COEFF_PROBS_736_SHIFT (0) 11361 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_184_COEFF_PROBS_736_SIGNED_FIELD IMG_FALSE 11362 11363 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_184, COEFF_PROBS_737 11364 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_184_COEFF_PROBS_737_MASK (0x0000FF00) 11365 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_184_COEFF_PROBS_737_LSBMASK (0x000000FF) 11366 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_184_COEFF_PROBS_737_SHIFT (8) 11367 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_184_COEFF_PROBS_737_SIGNED_FIELD IMG_FALSE 11368 11369 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_184, COEFF_PROBS_738 11370 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_184_COEFF_PROBS_738_MASK (0x00FF0000) 11371 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_184_COEFF_PROBS_738_LSBMASK (0x000000FF) 11372 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_184_COEFF_PROBS_738_SHIFT (16) 11373 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_184_COEFF_PROBS_738_SIGNED_FIELD IMG_FALSE 11374 11375 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_184, COEFF_PROBS_739 11376 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_184_COEFF_PROBS_739_MASK (0xFF000000) 11377 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_184_COEFF_PROBS_739_LSBMASK (0x000000FF) 11378 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_184_COEFF_PROBS_739_SHIFT (24) 11379 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_184_COEFF_PROBS_739_SIGNED_FIELD IMG_FALSE 11380 11381 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_185_OFFSET (0x0ED8) 11382 11383 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_185, COEFF_PROBS_740 11384 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_185_COEFF_PROBS_740_MASK (0x000000FF) 11385 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_185_COEFF_PROBS_740_LSBMASK (0x000000FF) 11386 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_185_COEFF_PROBS_740_SHIFT (0) 11387 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_185_COEFF_PROBS_740_SIGNED_FIELD IMG_FALSE 11388 11389 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_185, COEFF_PROBS_741 11390 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_185_COEFF_PROBS_741_MASK (0x0000FF00) 11391 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_185_COEFF_PROBS_741_LSBMASK (0x000000FF) 11392 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_185_COEFF_PROBS_741_SHIFT (8) 11393 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_185_COEFF_PROBS_741_SIGNED_FIELD IMG_FALSE 11394 11395 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_185, COEFF_PROBS_742 11396 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_185_COEFF_PROBS_742_MASK (0x00FF0000) 11397 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_185_COEFF_PROBS_742_LSBMASK (0x000000FF) 11398 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_185_COEFF_PROBS_742_SHIFT (16) 11399 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_185_COEFF_PROBS_742_SIGNED_FIELD IMG_FALSE 11400 11401 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_185, COEFF_PROBS_743 11402 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_185_COEFF_PROBS_743_MASK (0xFF000000) 11403 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_185_COEFF_PROBS_743_LSBMASK (0x000000FF) 11404 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_185_COEFF_PROBS_743_SHIFT (24) 11405 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_185_COEFF_PROBS_743_SIGNED_FIELD IMG_FALSE 11406 11407 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_186_OFFSET (0x0EDC) 11408 11409 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_186, COEFF_PROBS_744 11410 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_186_COEFF_PROBS_744_MASK (0x000000FF) 11411 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_186_COEFF_PROBS_744_LSBMASK (0x000000FF) 11412 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_186_COEFF_PROBS_744_SHIFT (0) 11413 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_186_COEFF_PROBS_744_SIGNED_FIELD IMG_FALSE 11414 11415 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_186, COEFF_PROBS_745 11416 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_186_COEFF_PROBS_745_MASK (0x0000FF00) 11417 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_186_COEFF_PROBS_745_LSBMASK (0x000000FF) 11418 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_186_COEFF_PROBS_745_SHIFT (8) 11419 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_186_COEFF_PROBS_745_SIGNED_FIELD IMG_FALSE 11420 11421 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_186, COEFF_PROBS_746 11422 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_186_COEFF_PROBS_746_MASK (0x00FF0000) 11423 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_186_COEFF_PROBS_746_LSBMASK (0x000000FF) 11424 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_186_COEFF_PROBS_746_SHIFT (16) 11425 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_186_COEFF_PROBS_746_SIGNED_FIELD IMG_FALSE 11426 11427 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_186, COEFF_PROBS_747 11428 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_186_COEFF_PROBS_747_MASK (0xFF000000) 11429 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_186_COEFF_PROBS_747_LSBMASK (0x000000FF) 11430 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_186_COEFF_PROBS_747_SHIFT (24) 11431 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_186_COEFF_PROBS_747_SIGNED_FIELD IMG_FALSE 11432 11433 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_187_OFFSET (0x0EE0) 11434 11435 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_187, COEFF_PROBS_748 11436 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_187_COEFF_PROBS_748_MASK (0x000000FF) 11437 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_187_COEFF_PROBS_748_LSBMASK (0x000000FF) 11438 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_187_COEFF_PROBS_748_SHIFT (0) 11439 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_187_COEFF_PROBS_748_SIGNED_FIELD IMG_FALSE 11440 11441 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_187, COEFF_PROBS_749 11442 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_187_COEFF_PROBS_749_MASK (0x0000FF00) 11443 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_187_COEFF_PROBS_749_LSBMASK (0x000000FF) 11444 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_187_COEFF_PROBS_749_SHIFT (8) 11445 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_187_COEFF_PROBS_749_SIGNED_FIELD IMG_FALSE 11446 11447 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_187, COEFF_PROBS_750 11448 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_187_COEFF_PROBS_750_MASK (0x00FF0000) 11449 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_187_COEFF_PROBS_750_LSBMASK (0x000000FF) 11450 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_187_COEFF_PROBS_750_SHIFT (16) 11451 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_187_COEFF_PROBS_750_SIGNED_FIELD IMG_FALSE 11452 11453 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_187, COEFF_PROBS_751 11454 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_187_COEFF_PROBS_751_MASK (0xFF000000) 11455 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_187_COEFF_PROBS_751_LSBMASK (0x000000FF) 11456 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_187_COEFF_PROBS_751_SHIFT (24) 11457 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_187_COEFF_PROBS_751_SIGNED_FIELD IMG_FALSE 11458 11459 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_188_OFFSET (0x0EE4) 11460 11461 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_188, COEFF_PROBS_752 11462 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_188_COEFF_PROBS_752_MASK (0x000000FF) 11463 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_188_COEFF_PROBS_752_LSBMASK (0x000000FF) 11464 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_188_COEFF_PROBS_752_SHIFT (0) 11465 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_188_COEFF_PROBS_752_SIGNED_FIELD IMG_FALSE 11466 11467 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_188, COEFF_PROBS_753 11468 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_188_COEFF_PROBS_753_MASK (0x0000FF00) 11469 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_188_COEFF_PROBS_753_LSBMASK (0x000000FF) 11470 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_188_COEFF_PROBS_753_SHIFT (8) 11471 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_188_COEFF_PROBS_753_SIGNED_FIELD IMG_FALSE 11472 11473 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_188, COEFF_PROBS_754 11474 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_188_COEFF_PROBS_754_MASK (0x00FF0000) 11475 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_188_COEFF_PROBS_754_LSBMASK (0x000000FF) 11476 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_188_COEFF_PROBS_754_SHIFT (16) 11477 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_188_COEFF_PROBS_754_SIGNED_FIELD IMG_FALSE 11478 11479 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_188, COEFF_PROBS_755 11480 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_188_COEFF_PROBS_755_MASK (0xFF000000) 11481 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_188_COEFF_PROBS_755_LSBMASK (0x000000FF) 11482 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_188_COEFF_PROBS_755_SHIFT (24) 11483 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_188_COEFF_PROBS_755_SIGNED_FIELD IMG_FALSE 11484 11485 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_189_OFFSET (0x0EE8) 11486 11487 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_189, COEFF_PROBS_756 11488 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_189_COEFF_PROBS_756_MASK (0x000000FF) 11489 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_189_COEFF_PROBS_756_LSBMASK (0x000000FF) 11490 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_189_COEFF_PROBS_756_SHIFT (0) 11491 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_189_COEFF_PROBS_756_SIGNED_FIELD IMG_FALSE 11492 11493 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_189, COEFF_PROBS_757 11494 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_189_COEFF_PROBS_757_MASK (0x0000FF00) 11495 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_189_COEFF_PROBS_757_LSBMASK (0x000000FF) 11496 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_189_COEFF_PROBS_757_SHIFT (8) 11497 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_189_COEFF_PROBS_757_SIGNED_FIELD IMG_FALSE 11498 11499 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_189, COEFF_PROBS_758 11500 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_189_COEFF_PROBS_758_MASK (0x00FF0000) 11501 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_189_COEFF_PROBS_758_LSBMASK (0x000000FF) 11502 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_189_COEFF_PROBS_758_SHIFT (16) 11503 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_189_COEFF_PROBS_758_SIGNED_FIELD IMG_FALSE 11504 11505 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_189, COEFF_PROBS_759 11506 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_189_COEFF_PROBS_759_MASK (0xFF000000) 11507 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_189_COEFF_PROBS_759_LSBMASK (0x000000FF) 11508 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_189_COEFF_PROBS_759_SHIFT (24) 11509 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_189_COEFF_PROBS_759_SIGNED_FIELD IMG_FALSE 11510 11511 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_190_OFFSET (0x0EEC) 11512 11513 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_190, COEFF_PROBS_760 11514 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_190_COEFF_PROBS_760_MASK (0x000000FF) 11515 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_190_COEFF_PROBS_760_LSBMASK (0x000000FF) 11516 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_190_COEFF_PROBS_760_SHIFT (0) 11517 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_190_COEFF_PROBS_760_SIGNED_FIELD IMG_FALSE 11518 11519 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_190, COEFF_PROBS_761 11520 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_190_COEFF_PROBS_761_MASK (0x0000FF00) 11521 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_190_COEFF_PROBS_761_LSBMASK (0x000000FF) 11522 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_190_COEFF_PROBS_761_SHIFT (8) 11523 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_190_COEFF_PROBS_761_SIGNED_FIELD IMG_FALSE 11524 11525 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_190, COEFF_PROBS_762 11526 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_190_COEFF_PROBS_762_MASK (0x00FF0000) 11527 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_190_COEFF_PROBS_762_LSBMASK (0x000000FF) 11528 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_190_COEFF_PROBS_762_SHIFT (16) 11529 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_190_COEFF_PROBS_762_SIGNED_FIELD IMG_FALSE 11530 11531 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_190, COEFF_PROBS_763 11532 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_190_COEFF_PROBS_763_MASK (0xFF000000) 11533 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_190_COEFF_PROBS_763_LSBMASK (0x000000FF) 11534 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_190_COEFF_PROBS_763_SHIFT (24) 11535 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_190_COEFF_PROBS_763_SIGNED_FIELD IMG_FALSE 11536 11537 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_191_OFFSET (0x0EF0) 11538 11539 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_191, COEFF_PROBS_764 11540 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_191_COEFF_PROBS_764_MASK (0x000000FF) 11541 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_191_COEFF_PROBS_764_LSBMASK (0x000000FF) 11542 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_191_COEFF_PROBS_764_SHIFT (0) 11543 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_191_COEFF_PROBS_764_SIGNED_FIELD IMG_FALSE 11544 11545 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_191, COEFF_PROBS_765 11546 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_191_COEFF_PROBS_765_MASK (0x0000FF00) 11547 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_191_COEFF_PROBS_765_LSBMASK (0x000000FF) 11548 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_191_COEFF_PROBS_765_SHIFT (8) 11549 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_191_COEFF_PROBS_765_SIGNED_FIELD IMG_FALSE 11550 11551 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_191, COEFF_PROBS_766 11552 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_191_COEFF_PROBS_766_MASK (0x00FF0000) 11553 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_191_COEFF_PROBS_766_LSBMASK (0x000000FF) 11554 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_191_COEFF_PROBS_766_SHIFT (16) 11555 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_191_COEFF_PROBS_766_SIGNED_FIELD IMG_FALSE 11556 11557 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_191, COEFF_PROBS_767 11558 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_191_COEFF_PROBS_767_MASK (0xFF000000) 11559 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_191_COEFF_PROBS_767_LSBMASK (0x000000FF) 11560 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_191_COEFF_PROBS_767_SHIFT (24) 11561 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_191_COEFF_PROBS_767_SIGNED_FIELD IMG_FALSE 11562 11563 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_192_OFFSET (0x0EF4) 11564 11565 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_192, COEFF_PROBS_768 11566 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_192_COEFF_PROBS_768_MASK (0x000000FF) 11567 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_192_COEFF_PROBS_768_LSBMASK (0x000000FF) 11568 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_192_COEFF_PROBS_768_SHIFT (0) 11569 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_192_COEFF_PROBS_768_SIGNED_FIELD IMG_FALSE 11570 11571 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_192, COEFF_PROBS_769 11572 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_192_COEFF_PROBS_769_MASK (0x0000FF00) 11573 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_192_COEFF_PROBS_769_LSBMASK (0x000000FF) 11574 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_192_COEFF_PROBS_769_SHIFT (8) 11575 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_192_COEFF_PROBS_769_SIGNED_FIELD IMG_FALSE 11576 11577 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_192, COEFF_PROBS_770 11578 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_192_COEFF_PROBS_770_MASK (0x00FF0000) 11579 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_192_COEFF_PROBS_770_LSBMASK (0x000000FF) 11580 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_192_COEFF_PROBS_770_SHIFT (16) 11581 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_192_COEFF_PROBS_770_SIGNED_FIELD IMG_FALSE 11582 11583 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_192, COEFF_PROBS_771 11584 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_192_COEFF_PROBS_771_MASK (0xFF000000) 11585 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_192_COEFF_PROBS_771_LSBMASK (0x000000FF) 11586 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_192_COEFF_PROBS_771_SHIFT (24) 11587 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_192_COEFF_PROBS_771_SIGNED_FIELD IMG_FALSE 11588 11589 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_193_OFFSET (0x0EF8) 11590 11591 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_193, COEFF_PROBS_772 11592 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_193_COEFF_PROBS_772_MASK (0x000000FF) 11593 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_193_COEFF_PROBS_772_LSBMASK (0x000000FF) 11594 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_193_COEFF_PROBS_772_SHIFT (0) 11595 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_193_COEFF_PROBS_772_SIGNED_FIELD IMG_FALSE 11596 11597 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_193, COEFF_PROBS_773 11598 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_193_COEFF_PROBS_773_MASK (0x0000FF00) 11599 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_193_COEFF_PROBS_773_LSBMASK (0x000000FF) 11600 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_193_COEFF_PROBS_773_SHIFT (8) 11601 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_193_COEFF_PROBS_773_SIGNED_FIELD IMG_FALSE 11602 11603 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_193, COEFF_PROBS_774 11604 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_193_COEFF_PROBS_774_MASK (0x00FF0000) 11605 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_193_COEFF_PROBS_774_LSBMASK (0x000000FF) 11606 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_193_COEFF_PROBS_774_SHIFT (16) 11607 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_193_COEFF_PROBS_774_SIGNED_FIELD IMG_FALSE 11608 11609 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_193, COEFF_PROBS_775 11610 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_193_COEFF_PROBS_775_MASK (0xFF000000) 11611 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_193_COEFF_PROBS_775_LSBMASK (0x000000FF) 11612 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_193_COEFF_PROBS_775_SHIFT (24) 11613 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_193_COEFF_PROBS_775_SIGNED_FIELD IMG_FALSE 11614 11615 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_194_OFFSET (0x0EFC) 11616 11617 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_194, COEFF_PROBS_776 11618 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_194_COEFF_PROBS_776_MASK (0x000000FF) 11619 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_194_COEFF_PROBS_776_LSBMASK (0x000000FF) 11620 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_194_COEFF_PROBS_776_SHIFT (0) 11621 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_194_COEFF_PROBS_776_SIGNED_FIELD IMG_FALSE 11622 11623 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_194, COEFF_PROBS_777 11624 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_194_COEFF_PROBS_777_MASK (0x0000FF00) 11625 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_194_COEFF_PROBS_777_LSBMASK (0x000000FF) 11626 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_194_COEFF_PROBS_777_SHIFT (8) 11627 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_194_COEFF_PROBS_777_SIGNED_FIELD IMG_FALSE 11628 11629 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_194, COEFF_PROBS_778 11630 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_194_COEFF_PROBS_778_MASK (0x00FF0000) 11631 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_194_COEFF_PROBS_778_LSBMASK (0x000000FF) 11632 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_194_COEFF_PROBS_778_SHIFT (16) 11633 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_194_COEFF_PROBS_778_SIGNED_FIELD IMG_FALSE 11634 11635 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_194, COEFF_PROBS_779 11636 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_194_COEFF_PROBS_779_MASK (0xFF000000) 11637 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_194_COEFF_PROBS_779_LSBMASK (0x000000FF) 11638 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_194_COEFF_PROBS_779_SHIFT (24) 11639 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_194_COEFF_PROBS_779_SIGNED_FIELD IMG_FALSE 11640 11641 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_195_OFFSET (0x0F00) 11642 11643 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_195, COEFF_PROBS_780 11644 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_195_COEFF_PROBS_780_MASK (0x000000FF) 11645 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_195_COEFF_PROBS_780_LSBMASK (0x000000FF) 11646 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_195_COEFF_PROBS_780_SHIFT (0) 11647 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_195_COEFF_PROBS_780_SIGNED_FIELD IMG_FALSE 11648 11649 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_195, COEFF_PROBS_781 11650 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_195_COEFF_PROBS_781_MASK (0x0000FF00) 11651 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_195_COEFF_PROBS_781_LSBMASK (0x000000FF) 11652 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_195_COEFF_PROBS_781_SHIFT (8) 11653 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_195_COEFF_PROBS_781_SIGNED_FIELD IMG_FALSE 11654 11655 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_195, COEFF_PROBS_782 11656 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_195_COEFF_PROBS_782_MASK (0x00FF0000) 11657 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_195_COEFF_PROBS_782_LSBMASK (0x000000FF) 11658 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_195_COEFF_PROBS_782_SHIFT (16) 11659 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_195_COEFF_PROBS_782_SIGNED_FIELD IMG_FALSE 11660 11661 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_195, COEFF_PROBS_783 11662 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_195_COEFF_PROBS_783_MASK (0xFF000000) 11663 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_195_COEFF_PROBS_783_LSBMASK (0x000000FF) 11664 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_195_COEFF_PROBS_783_SHIFT (24) 11665 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_195_COEFF_PROBS_783_SIGNED_FIELD IMG_FALSE 11666 11667 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_196_OFFSET (0x0F04) 11668 11669 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_196, COEFF_PROBS_784 11670 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_196_COEFF_PROBS_784_MASK (0x000000FF) 11671 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_196_COEFF_PROBS_784_LSBMASK (0x000000FF) 11672 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_196_COEFF_PROBS_784_SHIFT (0) 11673 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_196_COEFF_PROBS_784_SIGNED_FIELD IMG_FALSE 11674 11675 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_196, COEFF_PROBS_785 11676 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_196_COEFF_PROBS_785_MASK (0x0000FF00) 11677 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_196_COEFF_PROBS_785_LSBMASK (0x000000FF) 11678 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_196_COEFF_PROBS_785_SHIFT (8) 11679 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_196_COEFF_PROBS_785_SIGNED_FIELD IMG_FALSE 11680 11681 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_196, COEFF_PROBS_786 11682 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_196_COEFF_PROBS_786_MASK (0x00FF0000) 11683 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_196_COEFF_PROBS_786_LSBMASK (0x000000FF) 11684 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_196_COEFF_PROBS_786_SHIFT (16) 11685 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_196_COEFF_PROBS_786_SIGNED_FIELD IMG_FALSE 11686 11687 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_196, COEFF_PROBS_787 11688 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_196_COEFF_PROBS_787_MASK (0xFF000000) 11689 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_196_COEFF_PROBS_787_LSBMASK (0x000000FF) 11690 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_196_COEFF_PROBS_787_SHIFT (24) 11691 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_196_COEFF_PROBS_787_SIGNED_FIELD IMG_FALSE 11692 11693 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_197_OFFSET (0x0F08) 11694 11695 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_197, COEFF_PROBS_788 11696 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_197_COEFF_PROBS_788_MASK (0x000000FF) 11697 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_197_COEFF_PROBS_788_LSBMASK (0x000000FF) 11698 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_197_COEFF_PROBS_788_SHIFT (0) 11699 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_197_COEFF_PROBS_788_SIGNED_FIELD IMG_FALSE 11700 11701 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_197, COEFF_PROBS_789 11702 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_197_COEFF_PROBS_789_MASK (0x0000FF00) 11703 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_197_COEFF_PROBS_789_LSBMASK (0x000000FF) 11704 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_197_COEFF_PROBS_789_SHIFT (8) 11705 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_197_COEFF_PROBS_789_SIGNED_FIELD IMG_FALSE 11706 11707 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_197, COEFF_PROBS_790 11708 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_197_COEFF_PROBS_790_MASK (0x00FF0000) 11709 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_197_COEFF_PROBS_790_LSBMASK (0x000000FF) 11710 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_197_COEFF_PROBS_790_SHIFT (16) 11711 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_197_COEFF_PROBS_790_SIGNED_FIELD IMG_FALSE 11712 11713 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_197, COEFF_PROBS_791 11714 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_197_COEFF_PROBS_791_MASK (0xFF000000) 11715 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_197_COEFF_PROBS_791_LSBMASK (0x000000FF) 11716 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_197_COEFF_PROBS_791_SHIFT (24) 11717 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_197_COEFF_PROBS_791_SIGNED_FIELD IMG_FALSE 11718 11719 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_198_OFFSET (0x0F0C) 11720 11721 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_198, COEFF_PROBS_792 11722 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_198_COEFF_PROBS_792_MASK (0x000000FF) 11723 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_198_COEFF_PROBS_792_LSBMASK (0x000000FF) 11724 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_198_COEFF_PROBS_792_SHIFT (0) 11725 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_198_COEFF_PROBS_792_SIGNED_FIELD IMG_FALSE 11726 11727 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_198, COEFF_PROBS_793 11728 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_198_COEFF_PROBS_793_MASK (0x0000FF00) 11729 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_198_COEFF_PROBS_793_LSBMASK (0x000000FF) 11730 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_198_COEFF_PROBS_793_SHIFT (8) 11731 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_198_COEFF_PROBS_793_SIGNED_FIELD IMG_FALSE 11732 11733 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_198, COEFF_PROBS_794 11734 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_198_COEFF_PROBS_794_MASK (0x00FF0000) 11735 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_198_COEFF_PROBS_794_LSBMASK (0x000000FF) 11736 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_198_COEFF_PROBS_794_SHIFT (16) 11737 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_198_COEFF_PROBS_794_SIGNED_FIELD IMG_FALSE 11738 11739 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_198, COEFF_PROBS_795 11740 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_198_COEFF_PROBS_795_MASK (0xFF000000) 11741 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_198_COEFF_PROBS_795_LSBMASK (0x000000FF) 11742 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_198_COEFF_PROBS_795_SHIFT (24) 11743 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_198_COEFF_PROBS_795_SIGNED_FIELD IMG_FALSE 11744 11745 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_199_OFFSET (0x0F10) 11746 11747 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_199, COEFF_PROBS_796 11748 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_199_COEFF_PROBS_796_MASK (0x000000FF) 11749 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_199_COEFF_PROBS_796_LSBMASK (0x000000FF) 11750 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_199_COEFF_PROBS_796_SHIFT (0) 11751 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_199_COEFF_PROBS_796_SIGNED_FIELD IMG_FALSE 11752 11753 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_199, COEFF_PROBS_797 11754 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_199_COEFF_PROBS_797_MASK (0x0000FF00) 11755 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_199_COEFF_PROBS_797_LSBMASK (0x000000FF) 11756 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_199_COEFF_PROBS_797_SHIFT (8) 11757 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_199_COEFF_PROBS_797_SIGNED_FIELD IMG_FALSE 11758 11759 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_199, COEFF_PROBS_798 11760 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_199_COEFF_PROBS_798_MASK (0x00FF0000) 11761 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_199_COEFF_PROBS_798_LSBMASK (0x000000FF) 11762 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_199_COEFF_PROBS_798_SHIFT (16) 11763 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_199_COEFF_PROBS_798_SIGNED_FIELD IMG_FALSE 11764 11765 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_199, COEFF_PROBS_799 11766 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_199_COEFF_PROBS_799_MASK (0xFF000000) 11767 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_199_COEFF_PROBS_799_LSBMASK (0x000000FF) 11768 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_199_COEFF_PROBS_799_SHIFT (24) 11769 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_199_COEFF_PROBS_799_SIGNED_FIELD IMG_FALSE 11770 11771 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_200_OFFSET (0x0F14) 11772 11773 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_200, COEFF_PROBS_800 11774 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_200_COEFF_PROBS_800_MASK (0x000000FF) 11775 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_200_COEFF_PROBS_800_LSBMASK (0x000000FF) 11776 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_200_COEFF_PROBS_800_SHIFT (0) 11777 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_200_COEFF_PROBS_800_SIGNED_FIELD IMG_FALSE 11778 11779 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_200, COEFF_PROBS_801 11780 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_200_COEFF_PROBS_801_MASK (0x0000FF00) 11781 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_200_COEFF_PROBS_801_LSBMASK (0x000000FF) 11782 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_200_COEFF_PROBS_801_SHIFT (8) 11783 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_200_COEFF_PROBS_801_SIGNED_FIELD IMG_FALSE 11784 11785 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_200, COEFF_PROBS_802 11786 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_200_COEFF_PROBS_802_MASK (0x00FF0000) 11787 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_200_COEFF_PROBS_802_LSBMASK (0x000000FF) 11788 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_200_COEFF_PROBS_802_SHIFT (16) 11789 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_200_COEFF_PROBS_802_SIGNED_FIELD IMG_FALSE 11790 11791 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_200, COEFF_PROBS_803 11792 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_200_COEFF_PROBS_803_MASK (0xFF000000) 11793 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_200_COEFF_PROBS_803_LSBMASK (0x000000FF) 11794 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_200_COEFF_PROBS_803_SHIFT (24) 11795 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_200_COEFF_PROBS_803_SIGNED_FIELD IMG_FALSE 11796 11797 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_201_OFFSET (0x0F18) 11798 11799 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_201, COEFF_PROBS_804 11800 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_201_COEFF_PROBS_804_MASK (0x000000FF) 11801 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_201_COEFF_PROBS_804_LSBMASK (0x000000FF) 11802 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_201_COEFF_PROBS_804_SHIFT (0) 11803 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_201_COEFF_PROBS_804_SIGNED_FIELD IMG_FALSE 11804 11805 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_201, COEFF_PROBS_805 11806 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_201_COEFF_PROBS_805_MASK (0x0000FF00) 11807 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_201_COEFF_PROBS_805_LSBMASK (0x000000FF) 11808 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_201_COEFF_PROBS_805_SHIFT (8) 11809 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_201_COEFF_PROBS_805_SIGNED_FIELD IMG_FALSE 11810 11811 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_201, COEFF_PROBS_806 11812 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_201_COEFF_PROBS_806_MASK (0x00FF0000) 11813 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_201_COEFF_PROBS_806_LSBMASK (0x000000FF) 11814 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_201_COEFF_PROBS_806_SHIFT (16) 11815 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_201_COEFF_PROBS_806_SIGNED_FIELD IMG_FALSE 11816 11817 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_201, COEFF_PROBS_807 11818 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_201_COEFF_PROBS_807_MASK (0xFF000000) 11819 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_201_COEFF_PROBS_807_LSBMASK (0x000000FF) 11820 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_201_COEFF_PROBS_807_SHIFT (24) 11821 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_201_COEFF_PROBS_807_SIGNED_FIELD IMG_FALSE 11822 11823 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_202_OFFSET (0x0F1C) 11824 11825 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_202, COEFF_PROBS_808 11826 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_202_COEFF_PROBS_808_MASK (0x000000FF) 11827 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_202_COEFF_PROBS_808_LSBMASK (0x000000FF) 11828 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_202_COEFF_PROBS_808_SHIFT (0) 11829 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_202_COEFF_PROBS_808_SIGNED_FIELD IMG_FALSE 11830 11831 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_202, COEFF_PROBS_809 11832 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_202_COEFF_PROBS_809_MASK (0x0000FF00) 11833 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_202_COEFF_PROBS_809_LSBMASK (0x000000FF) 11834 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_202_COEFF_PROBS_809_SHIFT (8) 11835 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_202_COEFF_PROBS_809_SIGNED_FIELD IMG_FALSE 11836 11837 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_202, COEFF_PROBS_810 11838 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_202_COEFF_PROBS_810_MASK (0x00FF0000) 11839 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_202_COEFF_PROBS_810_LSBMASK (0x000000FF) 11840 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_202_COEFF_PROBS_810_SHIFT (16) 11841 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_202_COEFF_PROBS_810_SIGNED_FIELD IMG_FALSE 11842 11843 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_202, COEFF_PROBS_811 11844 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_202_COEFF_PROBS_811_MASK (0xFF000000) 11845 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_202_COEFF_PROBS_811_LSBMASK (0x000000FF) 11846 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_202_COEFF_PROBS_811_SHIFT (24) 11847 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_202_COEFF_PROBS_811_SIGNED_FIELD IMG_FALSE 11848 11849 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_203_OFFSET (0x0F20) 11850 11851 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_203, COEFF_PROBS_812 11852 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_203_COEFF_PROBS_812_MASK (0x000000FF) 11853 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_203_COEFF_PROBS_812_LSBMASK (0x000000FF) 11854 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_203_COEFF_PROBS_812_SHIFT (0) 11855 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_203_COEFF_PROBS_812_SIGNED_FIELD IMG_FALSE 11856 11857 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_203, COEFF_PROBS_813 11858 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_203_COEFF_PROBS_813_MASK (0x0000FF00) 11859 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_203_COEFF_PROBS_813_LSBMASK (0x000000FF) 11860 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_203_COEFF_PROBS_813_SHIFT (8) 11861 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_203_COEFF_PROBS_813_SIGNED_FIELD IMG_FALSE 11862 11863 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_203, COEFF_PROBS_814 11864 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_203_COEFF_PROBS_814_MASK (0x00FF0000) 11865 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_203_COEFF_PROBS_814_LSBMASK (0x000000FF) 11866 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_203_COEFF_PROBS_814_SHIFT (16) 11867 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_203_COEFF_PROBS_814_SIGNED_FIELD IMG_FALSE 11868 11869 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_203, COEFF_PROBS_815 11870 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_203_COEFF_PROBS_815_MASK (0xFF000000) 11871 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_203_COEFF_PROBS_815_LSBMASK (0x000000FF) 11872 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_203_COEFF_PROBS_815_SHIFT (24) 11873 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_203_COEFF_PROBS_815_SIGNED_FIELD IMG_FALSE 11874 11875 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_204_OFFSET (0x0F24) 11876 11877 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_204, COEFF_PROBS_816 11878 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_204_COEFF_PROBS_816_MASK (0x000000FF) 11879 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_204_COEFF_PROBS_816_LSBMASK (0x000000FF) 11880 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_204_COEFF_PROBS_816_SHIFT (0) 11881 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_204_COEFF_PROBS_816_SIGNED_FIELD IMG_FALSE 11882 11883 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_204, COEFF_PROBS_817 11884 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_204_COEFF_PROBS_817_MASK (0x0000FF00) 11885 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_204_COEFF_PROBS_817_LSBMASK (0x000000FF) 11886 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_204_COEFF_PROBS_817_SHIFT (8) 11887 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_204_COEFF_PROBS_817_SIGNED_FIELD IMG_FALSE 11888 11889 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_204, COEFF_PROBS_818 11890 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_204_COEFF_PROBS_818_MASK (0x00FF0000) 11891 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_204_COEFF_PROBS_818_LSBMASK (0x000000FF) 11892 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_204_COEFF_PROBS_818_SHIFT (16) 11893 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_204_COEFF_PROBS_818_SIGNED_FIELD IMG_FALSE 11894 11895 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_204, COEFF_PROBS_819 11896 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_204_COEFF_PROBS_819_MASK (0xFF000000) 11897 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_204_COEFF_PROBS_819_LSBMASK (0x000000FF) 11898 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_204_COEFF_PROBS_819_SHIFT (24) 11899 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_204_COEFF_PROBS_819_SIGNED_FIELD IMG_FALSE 11900 11901 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_205_OFFSET (0x0F28) 11902 11903 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_205, COEFF_PROBS_820 11904 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_205_COEFF_PROBS_820_MASK (0x000000FF) 11905 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_205_COEFF_PROBS_820_LSBMASK (0x000000FF) 11906 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_205_COEFF_PROBS_820_SHIFT (0) 11907 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_205_COEFF_PROBS_820_SIGNED_FIELD IMG_FALSE 11908 11909 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_205, COEFF_PROBS_821 11910 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_205_COEFF_PROBS_821_MASK (0x0000FF00) 11911 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_205_COEFF_PROBS_821_LSBMASK (0x000000FF) 11912 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_205_COEFF_PROBS_821_SHIFT (8) 11913 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_205_COEFF_PROBS_821_SIGNED_FIELD IMG_FALSE 11914 11915 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_205, COEFF_PROBS_822 11916 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_205_COEFF_PROBS_822_MASK (0x00FF0000) 11917 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_205_COEFF_PROBS_822_LSBMASK (0x000000FF) 11918 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_205_COEFF_PROBS_822_SHIFT (16) 11919 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_205_COEFF_PROBS_822_SIGNED_FIELD IMG_FALSE 11920 11921 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_205, COEFF_PROBS_823 11922 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_205_COEFF_PROBS_823_MASK (0xFF000000) 11923 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_205_COEFF_PROBS_823_LSBMASK (0x000000FF) 11924 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_205_COEFF_PROBS_823_SHIFT (24) 11925 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_205_COEFF_PROBS_823_SIGNED_FIELD IMG_FALSE 11926 11927 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_206_OFFSET (0x0F2C) 11928 11929 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_206, COEFF_PROBS_824 11930 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_206_COEFF_PROBS_824_MASK (0x000000FF) 11931 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_206_COEFF_PROBS_824_LSBMASK (0x000000FF) 11932 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_206_COEFF_PROBS_824_SHIFT (0) 11933 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_206_COEFF_PROBS_824_SIGNED_FIELD IMG_FALSE 11934 11935 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_206, COEFF_PROBS_825 11936 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_206_COEFF_PROBS_825_MASK (0x0000FF00) 11937 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_206_COEFF_PROBS_825_LSBMASK (0x000000FF) 11938 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_206_COEFF_PROBS_825_SHIFT (8) 11939 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_206_COEFF_PROBS_825_SIGNED_FIELD IMG_FALSE 11940 11941 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_206, COEFF_PROBS_826 11942 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_206_COEFF_PROBS_826_MASK (0x00FF0000) 11943 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_206_COEFF_PROBS_826_LSBMASK (0x000000FF) 11944 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_206_COEFF_PROBS_826_SHIFT (16) 11945 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_206_COEFF_PROBS_826_SIGNED_FIELD IMG_FALSE 11946 11947 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_206, COEFF_PROBS_827 11948 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_206_COEFF_PROBS_827_MASK (0xFF000000) 11949 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_206_COEFF_PROBS_827_LSBMASK (0x000000FF) 11950 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_206_COEFF_PROBS_827_SHIFT (24) 11951 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_206_COEFF_PROBS_827_SIGNED_FIELD IMG_FALSE 11952 11953 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_207_OFFSET (0x0F30) 11954 11955 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_207, COEFF_PROBS_828 11956 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_207_COEFF_PROBS_828_MASK (0x000000FF) 11957 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_207_COEFF_PROBS_828_LSBMASK (0x000000FF) 11958 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_207_COEFF_PROBS_828_SHIFT (0) 11959 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_207_COEFF_PROBS_828_SIGNED_FIELD IMG_FALSE 11960 11961 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_207, COEFF_PROBS_829 11962 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_207_COEFF_PROBS_829_MASK (0x0000FF00) 11963 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_207_COEFF_PROBS_829_LSBMASK (0x000000FF) 11964 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_207_COEFF_PROBS_829_SHIFT (8) 11965 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_207_COEFF_PROBS_829_SIGNED_FIELD IMG_FALSE 11966 11967 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_207, COEFF_PROBS_830 11968 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_207_COEFF_PROBS_830_MASK (0x00FF0000) 11969 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_207_COEFF_PROBS_830_LSBMASK (0x000000FF) 11970 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_207_COEFF_PROBS_830_SHIFT (16) 11971 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_207_COEFF_PROBS_830_SIGNED_FIELD IMG_FALSE 11972 11973 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_207, COEFF_PROBS_831 11974 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_207_COEFF_PROBS_831_MASK (0xFF000000) 11975 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_207_COEFF_PROBS_831_LSBMASK (0x000000FF) 11976 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_207_COEFF_PROBS_831_SHIFT (24) 11977 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_207_COEFF_PROBS_831_SIGNED_FIELD IMG_FALSE 11978 11979 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_208_OFFSET (0x0F34) 11980 11981 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_208, COEFF_PROBS_832 11982 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_208_COEFF_PROBS_832_MASK (0x000000FF) 11983 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_208_COEFF_PROBS_832_LSBMASK (0x000000FF) 11984 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_208_COEFF_PROBS_832_SHIFT (0) 11985 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_208_COEFF_PROBS_832_SIGNED_FIELD IMG_FALSE 11986 11987 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_208, COEFF_PROBS_833 11988 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_208_COEFF_PROBS_833_MASK (0x0000FF00) 11989 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_208_COEFF_PROBS_833_LSBMASK (0x000000FF) 11990 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_208_COEFF_PROBS_833_SHIFT (8) 11991 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_208_COEFF_PROBS_833_SIGNED_FIELD IMG_FALSE 11992 11993 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_208, COEFF_PROBS_834 11994 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_208_COEFF_PROBS_834_MASK (0x00FF0000) 11995 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_208_COEFF_PROBS_834_LSBMASK (0x000000FF) 11996 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_208_COEFF_PROBS_834_SHIFT (16) 11997 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_208_COEFF_PROBS_834_SIGNED_FIELD IMG_FALSE 11998 11999 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_208, COEFF_PROBS_835 12000 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_208_COEFF_PROBS_835_MASK (0xFF000000) 12001 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_208_COEFF_PROBS_835_LSBMASK (0x000000FF) 12002 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_208_COEFF_PROBS_835_SHIFT (24) 12003 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_208_COEFF_PROBS_835_SIGNED_FIELD IMG_FALSE 12004 12005 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_209_OFFSET (0x0F38) 12006 12007 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_209, COEFF_PROBS_836 12008 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_209_COEFF_PROBS_836_MASK (0x000000FF) 12009 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_209_COEFF_PROBS_836_LSBMASK (0x000000FF) 12010 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_209_COEFF_PROBS_836_SHIFT (0) 12011 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_209_COEFF_PROBS_836_SIGNED_FIELD IMG_FALSE 12012 12013 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_209, COEFF_PROBS_837 12014 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_209_COEFF_PROBS_837_MASK (0x0000FF00) 12015 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_209_COEFF_PROBS_837_LSBMASK (0x000000FF) 12016 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_209_COEFF_PROBS_837_SHIFT (8) 12017 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_209_COEFF_PROBS_837_SIGNED_FIELD IMG_FALSE 12018 12019 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_209, COEFF_PROBS_838 12020 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_209_COEFF_PROBS_838_MASK (0x00FF0000) 12021 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_209_COEFF_PROBS_838_LSBMASK (0x000000FF) 12022 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_209_COEFF_PROBS_838_SHIFT (16) 12023 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_209_COEFF_PROBS_838_SIGNED_FIELD IMG_FALSE 12024 12025 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_209, COEFF_PROBS_839 12026 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_209_COEFF_PROBS_839_MASK (0xFF000000) 12027 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_209_COEFF_PROBS_839_LSBMASK (0x000000FF) 12028 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_209_COEFF_PROBS_839_SHIFT (24) 12029 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_209_COEFF_PROBS_839_SIGNED_FIELD IMG_FALSE 12030 12031 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_210_OFFSET (0x0F3C) 12032 12033 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_210, COEFF_PROBS_840 12034 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_210_COEFF_PROBS_840_MASK (0x000000FF) 12035 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_210_COEFF_PROBS_840_LSBMASK (0x000000FF) 12036 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_210_COEFF_PROBS_840_SHIFT (0) 12037 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_210_COEFF_PROBS_840_SIGNED_FIELD IMG_FALSE 12038 12039 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_210, COEFF_PROBS_841 12040 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_210_COEFF_PROBS_841_MASK (0x0000FF00) 12041 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_210_COEFF_PROBS_841_LSBMASK (0x000000FF) 12042 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_210_COEFF_PROBS_841_SHIFT (8) 12043 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_210_COEFF_PROBS_841_SIGNED_FIELD IMG_FALSE 12044 12045 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_210, COEFF_PROBS_842 12046 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_210_COEFF_PROBS_842_MASK (0x00FF0000) 12047 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_210_COEFF_PROBS_842_LSBMASK (0x000000FF) 12048 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_210_COEFF_PROBS_842_SHIFT (16) 12049 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_210_COEFF_PROBS_842_SIGNED_FIELD IMG_FALSE 12050 12051 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_210, COEFF_PROBS_843 12052 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_210_COEFF_PROBS_843_MASK (0xFF000000) 12053 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_210_COEFF_PROBS_843_LSBMASK (0x000000FF) 12054 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_210_COEFF_PROBS_843_SHIFT (24) 12055 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_210_COEFF_PROBS_843_SIGNED_FIELD IMG_FALSE 12056 12057 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_211_OFFSET (0x0F40) 12058 12059 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_211, COEFF_PROBS_844 12060 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_211_COEFF_PROBS_844_MASK (0x000000FF) 12061 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_211_COEFF_PROBS_844_LSBMASK (0x000000FF) 12062 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_211_COEFF_PROBS_844_SHIFT (0) 12063 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_211_COEFF_PROBS_844_SIGNED_FIELD IMG_FALSE 12064 12065 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_211, COEFF_PROBS_845 12066 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_211_COEFF_PROBS_845_MASK (0x0000FF00) 12067 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_211_COEFF_PROBS_845_LSBMASK (0x000000FF) 12068 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_211_COEFF_PROBS_845_SHIFT (8) 12069 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_211_COEFF_PROBS_845_SIGNED_FIELD IMG_FALSE 12070 12071 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_211, COEFF_PROBS_846 12072 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_211_COEFF_PROBS_846_MASK (0x00FF0000) 12073 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_211_COEFF_PROBS_846_LSBMASK (0x000000FF) 12074 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_211_COEFF_PROBS_846_SHIFT (16) 12075 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_211_COEFF_PROBS_846_SIGNED_FIELD IMG_FALSE 12076 12077 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_211, COEFF_PROBS_847 12078 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_211_COEFF_PROBS_847_MASK (0xFF000000) 12079 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_211_COEFF_PROBS_847_LSBMASK (0x000000FF) 12080 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_211_COEFF_PROBS_847_SHIFT (24) 12081 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_211_COEFF_PROBS_847_SIGNED_FIELD IMG_FALSE 12082 12083 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_212_OFFSET (0x0F44) 12084 12085 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_212, COEFF_PROBS_848 12086 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_212_COEFF_PROBS_848_MASK (0x000000FF) 12087 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_212_COEFF_PROBS_848_LSBMASK (0x000000FF) 12088 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_212_COEFF_PROBS_848_SHIFT (0) 12089 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_212_COEFF_PROBS_848_SIGNED_FIELD IMG_FALSE 12090 12091 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_212, COEFF_PROBS_849 12092 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_212_COEFF_PROBS_849_MASK (0x0000FF00) 12093 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_212_COEFF_PROBS_849_LSBMASK (0x000000FF) 12094 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_212_COEFF_PROBS_849_SHIFT (8) 12095 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_212_COEFF_PROBS_849_SIGNED_FIELD IMG_FALSE 12096 12097 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_212, COEFF_PROBS_850 12098 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_212_COEFF_PROBS_850_MASK (0x00FF0000) 12099 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_212_COEFF_PROBS_850_LSBMASK (0x000000FF) 12100 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_212_COEFF_PROBS_850_SHIFT (16) 12101 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_212_COEFF_PROBS_850_SIGNED_FIELD IMG_FALSE 12102 12103 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_212, COEFF_PROBS_851 12104 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_212_COEFF_PROBS_851_MASK (0xFF000000) 12105 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_212_COEFF_PROBS_851_LSBMASK (0x000000FF) 12106 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_212_COEFF_PROBS_851_SHIFT (24) 12107 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_212_COEFF_PROBS_851_SIGNED_FIELD IMG_FALSE 12108 12109 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_213_OFFSET (0x0F48) 12110 12111 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_213, COEFF_PROBS_852 12112 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_213_COEFF_PROBS_852_MASK (0x000000FF) 12113 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_213_COEFF_PROBS_852_LSBMASK (0x000000FF) 12114 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_213_COEFF_PROBS_852_SHIFT (0) 12115 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_213_COEFF_PROBS_852_SIGNED_FIELD IMG_FALSE 12116 12117 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_213, COEFF_PROBS_853 12118 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_213_COEFF_PROBS_853_MASK (0x0000FF00) 12119 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_213_COEFF_PROBS_853_LSBMASK (0x000000FF) 12120 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_213_COEFF_PROBS_853_SHIFT (8) 12121 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_213_COEFF_PROBS_853_SIGNED_FIELD IMG_FALSE 12122 12123 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_213, COEFF_PROBS_854 12124 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_213_COEFF_PROBS_854_MASK (0x00FF0000) 12125 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_213_COEFF_PROBS_854_LSBMASK (0x000000FF) 12126 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_213_COEFF_PROBS_854_SHIFT (16) 12127 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_213_COEFF_PROBS_854_SIGNED_FIELD IMG_FALSE 12128 12129 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_213, COEFF_PROBS_855 12130 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_213_COEFF_PROBS_855_MASK (0xFF000000) 12131 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_213_COEFF_PROBS_855_LSBMASK (0x000000FF) 12132 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_213_COEFF_PROBS_855_SHIFT (24) 12133 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_213_COEFF_PROBS_855_SIGNED_FIELD IMG_FALSE 12134 12135 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_214_OFFSET (0x0F4C) 12136 12137 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_214, COEFF_PROBS_856 12138 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_214_COEFF_PROBS_856_MASK (0x000000FF) 12139 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_214_COEFF_PROBS_856_LSBMASK (0x000000FF) 12140 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_214_COEFF_PROBS_856_SHIFT (0) 12141 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_214_COEFF_PROBS_856_SIGNED_FIELD IMG_FALSE 12142 12143 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_214, COEFF_PROBS_857 12144 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_214_COEFF_PROBS_857_MASK (0x0000FF00) 12145 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_214_COEFF_PROBS_857_LSBMASK (0x000000FF) 12146 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_214_COEFF_PROBS_857_SHIFT (8) 12147 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_214_COEFF_PROBS_857_SIGNED_FIELD IMG_FALSE 12148 12149 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_214, COEFF_PROBS_858 12150 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_214_COEFF_PROBS_858_MASK (0x00FF0000) 12151 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_214_COEFF_PROBS_858_LSBMASK (0x000000FF) 12152 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_214_COEFF_PROBS_858_SHIFT (16) 12153 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_214_COEFF_PROBS_858_SIGNED_FIELD IMG_FALSE 12154 12155 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_214, COEFF_PROBS_859 12156 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_214_COEFF_PROBS_859_MASK (0xFF000000) 12157 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_214_COEFF_PROBS_859_LSBMASK (0x000000FF) 12158 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_214_COEFF_PROBS_859_SHIFT (24) 12159 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_214_COEFF_PROBS_859_SIGNED_FIELD IMG_FALSE 12160 12161 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_215_OFFSET (0x0F50) 12162 12163 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_215, COEFF_PROBS_860 12164 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_215_COEFF_PROBS_860_MASK (0x000000FF) 12165 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_215_COEFF_PROBS_860_LSBMASK (0x000000FF) 12166 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_215_COEFF_PROBS_860_SHIFT (0) 12167 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_215_COEFF_PROBS_860_SIGNED_FIELD IMG_FALSE 12168 12169 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_215, COEFF_PROBS_861 12170 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_215_COEFF_PROBS_861_MASK (0x0000FF00) 12171 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_215_COEFF_PROBS_861_LSBMASK (0x000000FF) 12172 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_215_COEFF_PROBS_861_SHIFT (8) 12173 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_215_COEFF_PROBS_861_SIGNED_FIELD IMG_FALSE 12174 12175 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_215, COEFF_PROBS_862 12176 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_215_COEFF_PROBS_862_MASK (0x00FF0000) 12177 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_215_COEFF_PROBS_862_LSBMASK (0x000000FF) 12178 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_215_COEFF_PROBS_862_SHIFT (16) 12179 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_215_COEFF_PROBS_862_SIGNED_FIELD IMG_FALSE 12180 12181 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_215, COEFF_PROBS_863 12182 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_215_COEFF_PROBS_863_MASK (0xFF000000) 12183 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_215_COEFF_PROBS_863_LSBMASK (0x000000FF) 12184 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_215_COEFF_PROBS_863_SHIFT (24) 12185 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_215_COEFF_PROBS_863_SIGNED_FIELD IMG_FALSE 12186 12187 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_216_OFFSET (0x0F54) 12188 12189 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_216, COEFF_PROBS_864 12190 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_216_COEFF_PROBS_864_MASK (0x000000FF) 12191 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_216_COEFF_PROBS_864_LSBMASK (0x000000FF) 12192 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_216_COEFF_PROBS_864_SHIFT (0) 12193 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_216_COEFF_PROBS_864_SIGNED_FIELD IMG_FALSE 12194 12195 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_216, COEFF_PROBS_865 12196 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_216_COEFF_PROBS_865_MASK (0x0000FF00) 12197 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_216_COEFF_PROBS_865_LSBMASK (0x000000FF) 12198 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_216_COEFF_PROBS_865_SHIFT (8) 12199 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_216_COEFF_PROBS_865_SIGNED_FIELD IMG_FALSE 12200 12201 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_216, COEFF_PROBS_866 12202 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_216_COEFF_PROBS_866_MASK (0x00FF0000) 12203 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_216_COEFF_PROBS_866_LSBMASK (0x000000FF) 12204 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_216_COEFF_PROBS_866_SHIFT (16) 12205 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_216_COEFF_PROBS_866_SIGNED_FIELD IMG_FALSE 12206 12207 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_216, COEFF_PROBS_867 12208 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_216_COEFF_PROBS_867_MASK (0xFF000000) 12209 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_216_COEFF_PROBS_867_LSBMASK (0x000000FF) 12210 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_216_COEFF_PROBS_867_SHIFT (24) 12211 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_216_COEFF_PROBS_867_SIGNED_FIELD IMG_FALSE 12212 12213 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_217_OFFSET (0x0F58) 12214 12215 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_217, COEFF_PROBS_868 12216 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_217_COEFF_PROBS_868_MASK (0x000000FF) 12217 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_217_COEFF_PROBS_868_LSBMASK (0x000000FF) 12218 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_217_COEFF_PROBS_868_SHIFT (0) 12219 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_217_COEFF_PROBS_868_SIGNED_FIELD IMG_FALSE 12220 12221 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_217, COEFF_PROBS_869 12222 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_217_COEFF_PROBS_869_MASK (0x0000FF00) 12223 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_217_COEFF_PROBS_869_LSBMASK (0x000000FF) 12224 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_217_COEFF_PROBS_869_SHIFT (8) 12225 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_217_COEFF_PROBS_869_SIGNED_FIELD IMG_FALSE 12226 12227 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_217, COEFF_PROBS_870 12228 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_217_COEFF_PROBS_870_MASK (0x00FF0000) 12229 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_217_COEFF_PROBS_870_LSBMASK (0x000000FF) 12230 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_217_COEFF_PROBS_870_SHIFT (16) 12231 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_217_COEFF_PROBS_870_SIGNED_FIELD IMG_FALSE 12232 12233 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_217, COEFF_PROBS_871 12234 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_217_COEFF_PROBS_871_MASK (0xFF000000) 12235 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_217_COEFF_PROBS_871_LSBMASK (0x000000FF) 12236 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_217_COEFF_PROBS_871_SHIFT (24) 12237 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_217_COEFF_PROBS_871_SIGNED_FIELD IMG_FALSE 12238 12239 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_218_OFFSET (0x0F5C) 12240 12241 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_218, COEFF_PROBS_872 12242 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_218_COEFF_PROBS_872_MASK (0x000000FF) 12243 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_218_COEFF_PROBS_872_LSBMASK (0x000000FF) 12244 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_218_COEFF_PROBS_872_SHIFT (0) 12245 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_218_COEFF_PROBS_872_SIGNED_FIELD IMG_FALSE 12246 12247 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_218, COEFF_PROBS_873 12248 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_218_COEFF_PROBS_873_MASK (0x0000FF00) 12249 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_218_COEFF_PROBS_873_LSBMASK (0x000000FF) 12250 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_218_COEFF_PROBS_873_SHIFT (8) 12251 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_218_COEFF_PROBS_873_SIGNED_FIELD IMG_FALSE 12252 12253 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_218, COEFF_PROBS_874 12254 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_218_COEFF_PROBS_874_MASK (0x00FF0000) 12255 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_218_COEFF_PROBS_874_LSBMASK (0x000000FF) 12256 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_218_COEFF_PROBS_874_SHIFT (16) 12257 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_218_COEFF_PROBS_874_SIGNED_FIELD IMG_FALSE 12258 12259 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_218, COEFF_PROBS_875 12260 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_218_COEFF_PROBS_875_MASK (0xFF000000) 12261 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_218_COEFF_PROBS_875_LSBMASK (0x000000FF) 12262 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_218_COEFF_PROBS_875_SHIFT (24) 12263 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_218_COEFF_PROBS_875_SIGNED_FIELD IMG_FALSE 12264 12265 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_219_OFFSET (0x0F60) 12266 12267 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_219, COEFF_PROBS_876 12268 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_219_COEFF_PROBS_876_MASK (0x000000FF) 12269 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_219_COEFF_PROBS_876_LSBMASK (0x000000FF) 12270 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_219_COEFF_PROBS_876_SHIFT (0) 12271 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_219_COEFF_PROBS_876_SIGNED_FIELD IMG_FALSE 12272 12273 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_219, COEFF_PROBS_877 12274 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_219_COEFF_PROBS_877_MASK (0x0000FF00) 12275 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_219_COEFF_PROBS_877_LSBMASK (0x000000FF) 12276 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_219_COEFF_PROBS_877_SHIFT (8) 12277 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_219_COEFF_PROBS_877_SIGNED_FIELD IMG_FALSE 12278 12279 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_219, COEFF_PROBS_878 12280 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_219_COEFF_PROBS_878_MASK (0x00FF0000) 12281 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_219_COEFF_PROBS_878_LSBMASK (0x000000FF) 12282 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_219_COEFF_PROBS_878_SHIFT (16) 12283 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_219_COEFF_PROBS_878_SIGNED_FIELD IMG_FALSE 12284 12285 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_219, COEFF_PROBS_879 12286 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_219_COEFF_PROBS_879_MASK (0xFF000000) 12287 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_219_COEFF_PROBS_879_LSBMASK (0x000000FF) 12288 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_219_COEFF_PROBS_879_SHIFT (24) 12289 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_219_COEFF_PROBS_879_SIGNED_FIELD IMG_FALSE 12290 12291 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_220_OFFSET (0x0F64) 12292 12293 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_220, COEFF_PROBS_880 12294 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_220_COEFF_PROBS_880_MASK (0x000000FF) 12295 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_220_COEFF_PROBS_880_LSBMASK (0x000000FF) 12296 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_220_COEFF_PROBS_880_SHIFT (0) 12297 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_220_COEFF_PROBS_880_SIGNED_FIELD IMG_FALSE 12298 12299 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_220, COEFF_PROBS_881 12300 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_220_COEFF_PROBS_881_MASK (0x0000FF00) 12301 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_220_COEFF_PROBS_881_LSBMASK (0x000000FF) 12302 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_220_COEFF_PROBS_881_SHIFT (8) 12303 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_220_COEFF_PROBS_881_SIGNED_FIELD IMG_FALSE 12304 12305 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_220, COEFF_PROBS_882 12306 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_220_COEFF_PROBS_882_MASK (0x00FF0000) 12307 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_220_COEFF_PROBS_882_LSBMASK (0x000000FF) 12308 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_220_COEFF_PROBS_882_SHIFT (16) 12309 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_220_COEFF_PROBS_882_SIGNED_FIELD IMG_FALSE 12310 12311 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_220, COEFF_PROBS_883 12312 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_220_COEFF_PROBS_883_MASK (0xFF000000) 12313 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_220_COEFF_PROBS_883_LSBMASK (0x000000FF) 12314 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_220_COEFF_PROBS_883_SHIFT (24) 12315 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_220_COEFF_PROBS_883_SIGNED_FIELD IMG_FALSE 12316 12317 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_221_OFFSET (0x0F68) 12318 12319 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_221, COEFF_PROBS_884 12320 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_221_COEFF_PROBS_884_MASK (0x000000FF) 12321 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_221_COEFF_PROBS_884_LSBMASK (0x000000FF) 12322 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_221_COEFF_PROBS_884_SHIFT (0) 12323 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_221_COEFF_PROBS_884_SIGNED_FIELD IMG_FALSE 12324 12325 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_221, COEFF_PROBS_885 12326 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_221_COEFF_PROBS_885_MASK (0x0000FF00) 12327 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_221_COEFF_PROBS_885_LSBMASK (0x000000FF) 12328 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_221_COEFF_PROBS_885_SHIFT (8) 12329 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_221_COEFF_PROBS_885_SIGNED_FIELD IMG_FALSE 12330 12331 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_221, COEFF_PROBS_886 12332 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_221_COEFF_PROBS_886_MASK (0x00FF0000) 12333 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_221_COEFF_PROBS_886_LSBMASK (0x000000FF) 12334 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_221_COEFF_PROBS_886_SHIFT (16) 12335 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_221_COEFF_PROBS_886_SIGNED_FIELD IMG_FALSE 12336 12337 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_221, COEFF_PROBS_887 12338 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_221_COEFF_PROBS_887_MASK (0xFF000000) 12339 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_221_COEFF_PROBS_887_LSBMASK (0x000000FF) 12340 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_221_COEFF_PROBS_887_SHIFT (24) 12341 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_221_COEFF_PROBS_887_SIGNED_FIELD IMG_FALSE 12342 12343 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_222_OFFSET (0x0F6C) 12344 12345 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_222, COEFF_PROBS_888 12346 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_222_COEFF_PROBS_888_MASK (0x000000FF) 12347 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_222_COEFF_PROBS_888_LSBMASK (0x000000FF) 12348 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_222_COEFF_PROBS_888_SHIFT (0) 12349 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_222_COEFF_PROBS_888_SIGNED_FIELD IMG_FALSE 12350 12351 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_222, COEFF_PROBS_889 12352 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_222_COEFF_PROBS_889_MASK (0x0000FF00) 12353 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_222_COEFF_PROBS_889_LSBMASK (0x000000FF) 12354 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_222_COEFF_PROBS_889_SHIFT (8) 12355 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_222_COEFF_PROBS_889_SIGNED_FIELD IMG_FALSE 12356 12357 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_222, COEFF_PROBS_890 12358 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_222_COEFF_PROBS_890_MASK (0x00FF0000) 12359 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_222_COEFF_PROBS_890_LSBMASK (0x000000FF) 12360 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_222_COEFF_PROBS_890_SHIFT (16) 12361 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_222_COEFF_PROBS_890_SIGNED_FIELD IMG_FALSE 12362 12363 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_222, COEFF_PROBS_891 12364 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_222_COEFF_PROBS_891_MASK (0xFF000000) 12365 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_222_COEFF_PROBS_891_LSBMASK (0x000000FF) 12366 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_222_COEFF_PROBS_891_SHIFT (24) 12367 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_222_COEFF_PROBS_891_SIGNED_FIELD IMG_FALSE 12368 12369 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_223_OFFSET (0x0F70) 12370 12371 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_223, COEFF_PROBS_892 12372 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_223_COEFF_PROBS_892_MASK (0x000000FF) 12373 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_223_COEFF_PROBS_892_LSBMASK (0x000000FF) 12374 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_223_COEFF_PROBS_892_SHIFT (0) 12375 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_223_COEFF_PROBS_892_SIGNED_FIELD IMG_FALSE 12376 12377 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_223, COEFF_PROBS_893 12378 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_223_COEFF_PROBS_893_MASK (0x0000FF00) 12379 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_223_COEFF_PROBS_893_LSBMASK (0x000000FF) 12380 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_223_COEFF_PROBS_893_SHIFT (8) 12381 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_223_COEFF_PROBS_893_SIGNED_FIELD IMG_FALSE 12382 12383 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_223, COEFF_PROBS_894 12384 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_223_COEFF_PROBS_894_MASK (0x00FF0000) 12385 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_223_COEFF_PROBS_894_LSBMASK (0x000000FF) 12386 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_223_COEFF_PROBS_894_SHIFT (16) 12387 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_223_COEFF_PROBS_894_SIGNED_FIELD IMG_FALSE 12388 12389 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_223, COEFF_PROBS_895 12390 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_223_COEFF_PROBS_895_MASK (0xFF000000) 12391 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_223_COEFF_PROBS_895_LSBMASK (0x000000FF) 12392 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_223_COEFF_PROBS_895_SHIFT (24) 12393 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_223_COEFF_PROBS_895_SIGNED_FIELD IMG_FALSE 12394 12395 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_224_OFFSET (0x0F74) 12396 12397 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_224, COEFF_PROBS_896 12398 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_224_COEFF_PROBS_896_MASK (0x000000FF) 12399 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_224_COEFF_PROBS_896_LSBMASK (0x000000FF) 12400 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_224_COEFF_PROBS_896_SHIFT (0) 12401 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_224_COEFF_PROBS_896_SIGNED_FIELD IMG_FALSE 12402 12403 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_224, COEFF_PROBS_897 12404 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_224_COEFF_PROBS_897_MASK (0x0000FF00) 12405 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_224_COEFF_PROBS_897_LSBMASK (0x000000FF) 12406 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_224_COEFF_PROBS_897_SHIFT (8) 12407 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_224_COEFF_PROBS_897_SIGNED_FIELD IMG_FALSE 12408 12409 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_224, COEFF_PROBS_898 12410 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_224_COEFF_PROBS_898_MASK (0x00FF0000) 12411 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_224_COEFF_PROBS_898_LSBMASK (0x000000FF) 12412 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_224_COEFF_PROBS_898_SHIFT (16) 12413 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_224_COEFF_PROBS_898_SIGNED_FIELD IMG_FALSE 12414 12415 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_224, COEFF_PROBS_899 12416 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_224_COEFF_PROBS_899_MASK (0xFF000000) 12417 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_224_COEFF_PROBS_899_LSBMASK (0x000000FF) 12418 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_224_COEFF_PROBS_899_SHIFT (24) 12419 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_224_COEFF_PROBS_899_SIGNED_FIELD IMG_FALSE 12420 12421 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_225_OFFSET (0x0F78) 12422 12423 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_225, COEFF_PROBS_900 12424 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_225_COEFF_PROBS_900_MASK (0x000000FF) 12425 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_225_COEFF_PROBS_900_LSBMASK (0x000000FF) 12426 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_225_COEFF_PROBS_900_SHIFT (0) 12427 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_225_COEFF_PROBS_900_SIGNED_FIELD IMG_FALSE 12428 12429 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_225, COEFF_PROBS_901 12430 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_225_COEFF_PROBS_901_MASK (0x0000FF00) 12431 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_225_COEFF_PROBS_901_LSBMASK (0x000000FF) 12432 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_225_COEFF_PROBS_901_SHIFT (8) 12433 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_225_COEFF_PROBS_901_SIGNED_FIELD IMG_FALSE 12434 12435 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_225, COEFF_PROBS_902 12436 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_225_COEFF_PROBS_902_MASK (0x00FF0000) 12437 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_225_COEFF_PROBS_902_LSBMASK (0x000000FF) 12438 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_225_COEFF_PROBS_902_SHIFT (16) 12439 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_225_COEFF_PROBS_902_SIGNED_FIELD IMG_FALSE 12440 12441 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_225, COEFF_PROBS_903 12442 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_225_COEFF_PROBS_903_MASK (0xFF000000) 12443 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_225_COEFF_PROBS_903_LSBMASK (0x000000FF) 12444 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_225_COEFF_PROBS_903_SHIFT (24) 12445 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_225_COEFF_PROBS_903_SIGNED_FIELD IMG_FALSE 12446 12447 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_226_OFFSET (0x0F7C) 12448 12449 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_226, COEFF_PROBS_904 12450 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_226_COEFF_PROBS_904_MASK (0x000000FF) 12451 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_226_COEFF_PROBS_904_LSBMASK (0x000000FF) 12452 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_226_COEFF_PROBS_904_SHIFT (0) 12453 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_226_COEFF_PROBS_904_SIGNED_FIELD IMG_FALSE 12454 12455 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_226, COEFF_PROBS_905 12456 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_226_COEFF_PROBS_905_MASK (0x0000FF00) 12457 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_226_COEFF_PROBS_905_LSBMASK (0x000000FF) 12458 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_226_COEFF_PROBS_905_SHIFT (8) 12459 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_226_COEFF_PROBS_905_SIGNED_FIELD IMG_FALSE 12460 12461 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_226, COEFF_PROBS_906 12462 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_226_COEFF_PROBS_906_MASK (0x00FF0000) 12463 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_226_COEFF_PROBS_906_LSBMASK (0x000000FF) 12464 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_226_COEFF_PROBS_906_SHIFT (16) 12465 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_226_COEFF_PROBS_906_SIGNED_FIELD IMG_FALSE 12466 12467 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_226, COEFF_PROBS_907 12468 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_226_COEFF_PROBS_907_MASK (0xFF000000) 12469 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_226_COEFF_PROBS_907_LSBMASK (0x000000FF) 12470 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_226_COEFF_PROBS_907_SHIFT (24) 12471 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_226_COEFF_PROBS_907_SIGNED_FIELD IMG_FALSE 12472 12473 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_227_OFFSET (0x0F80) 12474 12475 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_227, COEFF_PROBS_908 12476 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_227_COEFF_PROBS_908_MASK (0x000000FF) 12477 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_227_COEFF_PROBS_908_LSBMASK (0x000000FF) 12478 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_227_COEFF_PROBS_908_SHIFT (0) 12479 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_227_COEFF_PROBS_908_SIGNED_FIELD IMG_FALSE 12480 12481 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_227, COEFF_PROBS_909 12482 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_227_COEFF_PROBS_909_MASK (0x0000FF00) 12483 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_227_COEFF_PROBS_909_LSBMASK (0x000000FF) 12484 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_227_COEFF_PROBS_909_SHIFT (8) 12485 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_227_COEFF_PROBS_909_SIGNED_FIELD IMG_FALSE 12486 12487 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_227, COEFF_PROBS_910 12488 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_227_COEFF_PROBS_910_MASK (0x00FF0000) 12489 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_227_COEFF_PROBS_910_LSBMASK (0x000000FF) 12490 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_227_COEFF_PROBS_910_SHIFT (16) 12491 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_227_COEFF_PROBS_910_SIGNED_FIELD IMG_FALSE 12492 12493 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_227, COEFF_PROBS_911 12494 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_227_COEFF_PROBS_911_MASK (0xFF000000) 12495 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_227_COEFF_PROBS_911_LSBMASK (0x000000FF) 12496 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_227_COEFF_PROBS_911_SHIFT (24) 12497 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_227_COEFF_PROBS_911_SIGNED_FIELD IMG_FALSE 12498 12499 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_228_OFFSET (0x0F84) 12500 12501 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_228, COEFF_PROBS_912 12502 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_228_COEFF_PROBS_912_MASK (0x000000FF) 12503 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_228_COEFF_PROBS_912_LSBMASK (0x000000FF) 12504 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_228_COEFF_PROBS_912_SHIFT (0) 12505 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_228_COEFF_PROBS_912_SIGNED_FIELD IMG_FALSE 12506 12507 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_228, COEFF_PROBS_913 12508 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_228_COEFF_PROBS_913_MASK (0x0000FF00) 12509 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_228_COEFF_PROBS_913_LSBMASK (0x000000FF) 12510 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_228_COEFF_PROBS_913_SHIFT (8) 12511 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_228_COEFF_PROBS_913_SIGNED_FIELD IMG_FALSE 12512 12513 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_228, COEFF_PROBS_914 12514 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_228_COEFF_PROBS_914_MASK (0x00FF0000) 12515 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_228_COEFF_PROBS_914_LSBMASK (0x000000FF) 12516 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_228_COEFF_PROBS_914_SHIFT (16) 12517 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_228_COEFF_PROBS_914_SIGNED_FIELD IMG_FALSE 12518 12519 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_228, COEFF_PROBS_915 12520 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_228_COEFF_PROBS_915_MASK (0xFF000000) 12521 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_228_COEFF_PROBS_915_LSBMASK (0x000000FF) 12522 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_228_COEFF_PROBS_915_SHIFT (24) 12523 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_228_COEFF_PROBS_915_SIGNED_FIELD IMG_FALSE 12524 12525 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_229_OFFSET (0x0F88) 12526 12527 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_229, COEFF_PROBS_916 12528 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_229_COEFF_PROBS_916_MASK (0x000000FF) 12529 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_229_COEFF_PROBS_916_LSBMASK (0x000000FF) 12530 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_229_COEFF_PROBS_916_SHIFT (0) 12531 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_229_COEFF_PROBS_916_SIGNED_FIELD IMG_FALSE 12532 12533 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_229, COEFF_PROBS_917 12534 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_229_COEFF_PROBS_917_MASK (0x0000FF00) 12535 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_229_COEFF_PROBS_917_LSBMASK (0x000000FF) 12536 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_229_COEFF_PROBS_917_SHIFT (8) 12537 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_229_COEFF_PROBS_917_SIGNED_FIELD IMG_FALSE 12538 12539 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_229, COEFF_PROBS_918 12540 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_229_COEFF_PROBS_918_MASK (0x00FF0000) 12541 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_229_COEFF_PROBS_918_LSBMASK (0x000000FF) 12542 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_229_COEFF_PROBS_918_SHIFT (16) 12543 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_229_COEFF_PROBS_918_SIGNED_FIELD IMG_FALSE 12544 12545 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_229, COEFF_PROBS_919 12546 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_229_COEFF_PROBS_919_MASK (0xFF000000) 12547 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_229_COEFF_PROBS_919_LSBMASK (0x000000FF) 12548 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_229_COEFF_PROBS_919_SHIFT (24) 12549 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_229_COEFF_PROBS_919_SIGNED_FIELD IMG_FALSE 12550 12551 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_230_OFFSET (0x0F8C) 12552 12553 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_230, COEFF_PROBS_920 12554 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_230_COEFF_PROBS_920_MASK (0x000000FF) 12555 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_230_COEFF_PROBS_920_LSBMASK (0x000000FF) 12556 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_230_COEFF_PROBS_920_SHIFT (0) 12557 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_230_COEFF_PROBS_920_SIGNED_FIELD IMG_FALSE 12558 12559 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_230, COEFF_PROBS_921 12560 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_230_COEFF_PROBS_921_MASK (0x0000FF00) 12561 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_230_COEFF_PROBS_921_LSBMASK (0x000000FF) 12562 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_230_COEFF_PROBS_921_SHIFT (8) 12563 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_230_COEFF_PROBS_921_SIGNED_FIELD IMG_FALSE 12564 12565 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_230, COEFF_PROBS_922 12566 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_230_COEFF_PROBS_922_MASK (0x00FF0000) 12567 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_230_COEFF_PROBS_922_LSBMASK (0x000000FF) 12568 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_230_COEFF_PROBS_922_SHIFT (16) 12569 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_230_COEFF_PROBS_922_SIGNED_FIELD IMG_FALSE 12570 12571 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_230, COEFF_PROBS_923 12572 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_230_COEFF_PROBS_923_MASK (0xFF000000) 12573 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_230_COEFF_PROBS_923_LSBMASK (0x000000FF) 12574 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_230_COEFF_PROBS_923_SHIFT (24) 12575 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_230_COEFF_PROBS_923_SIGNED_FIELD IMG_FALSE 12576 12577 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_231_OFFSET (0x0F90) 12578 12579 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_231, COEFF_PROBS_924 12580 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_231_COEFF_PROBS_924_MASK (0x000000FF) 12581 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_231_COEFF_PROBS_924_LSBMASK (0x000000FF) 12582 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_231_COEFF_PROBS_924_SHIFT (0) 12583 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_231_COEFF_PROBS_924_SIGNED_FIELD IMG_FALSE 12584 12585 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_231, COEFF_PROBS_925 12586 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_231_COEFF_PROBS_925_MASK (0x0000FF00) 12587 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_231_COEFF_PROBS_925_LSBMASK (0x000000FF) 12588 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_231_COEFF_PROBS_925_SHIFT (8) 12589 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_231_COEFF_PROBS_925_SIGNED_FIELD IMG_FALSE 12590 12591 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_231, COEFF_PROBS_926 12592 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_231_COEFF_PROBS_926_MASK (0x00FF0000) 12593 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_231_COEFF_PROBS_926_LSBMASK (0x000000FF) 12594 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_231_COEFF_PROBS_926_SHIFT (16) 12595 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_231_COEFF_PROBS_926_SIGNED_FIELD IMG_FALSE 12596 12597 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_231, COEFF_PROBS_927 12598 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_231_COEFF_PROBS_927_MASK (0xFF000000) 12599 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_231_COEFF_PROBS_927_LSBMASK (0x000000FF) 12600 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_231_COEFF_PROBS_927_SHIFT (24) 12601 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_231_COEFF_PROBS_927_SIGNED_FIELD IMG_FALSE 12602 12603 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_232_OFFSET (0x0F94) 12604 12605 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_232, COEFF_PROBS_928 12606 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_232_COEFF_PROBS_928_MASK (0x000000FF) 12607 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_232_COEFF_PROBS_928_LSBMASK (0x000000FF) 12608 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_232_COEFF_PROBS_928_SHIFT (0) 12609 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_232_COEFF_PROBS_928_SIGNED_FIELD IMG_FALSE 12610 12611 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_232, COEFF_PROBS_929 12612 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_232_COEFF_PROBS_929_MASK (0x0000FF00) 12613 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_232_COEFF_PROBS_929_LSBMASK (0x000000FF) 12614 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_232_COEFF_PROBS_929_SHIFT (8) 12615 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_232_COEFF_PROBS_929_SIGNED_FIELD IMG_FALSE 12616 12617 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_232, COEFF_PROBS_930 12618 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_232_COEFF_PROBS_930_MASK (0x00FF0000) 12619 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_232_COEFF_PROBS_930_LSBMASK (0x000000FF) 12620 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_232_COEFF_PROBS_930_SHIFT (16) 12621 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_232_COEFF_PROBS_930_SIGNED_FIELD IMG_FALSE 12622 12623 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_232, COEFF_PROBS_931 12624 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_232_COEFF_PROBS_931_MASK (0xFF000000) 12625 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_232_COEFF_PROBS_931_LSBMASK (0x000000FF) 12626 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_232_COEFF_PROBS_931_SHIFT (24) 12627 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_232_COEFF_PROBS_931_SIGNED_FIELD IMG_FALSE 12628 12629 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_233_OFFSET (0x0F98) 12630 12631 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_233, COEFF_PROBS_932 12632 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_233_COEFF_PROBS_932_MASK (0x000000FF) 12633 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_233_COEFF_PROBS_932_LSBMASK (0x000000FF) 12634 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_233_COEFF_PROBS_932_SHIFT (0) 12635 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_233_COEFF_PROBS_932_SIGNED_FIELD IMG_FALSE 12636 12637 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_233, COEFF_PROBS_933 12638 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_233_COEFF_PROBS_933_MASK (0x0000FF00) 12639 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_233_COEFF_PROBS_933_LSBMASK (0x000000FF) 12640 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_233_COEFF_PROBS_933_SHIFT (8) 12641 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_233_COEFF_PROBS_933_SIGNED_FIELD IMG_FALSE 12642 12643 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_233, COEFF_PROBS_934 12644 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_233_COEFF_PROBS_934_MASK (0x00FF0000) 12645 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_233_COEFF_PROBS_934_LSBMASK (0x000000FF) 12646 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_233_COEFF_PROBS_934_SHIFT (16) 12647 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_233_COEFF_PROBS_934_SIGNED_FIELD IMG_FALSE 12648 12649 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_233, COEFF_PROBS_935 12650 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_233_COEFF_PROBS_935_MASK (0xFF000000) 12651 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_233_COEFF_PROBS_935_LSBMASK (0x000000FF) 12652 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_233_COEFF_PROBS_935_SHIFT (24) 12653 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_233_COEFF_PROBS_935_SIGNED_FIELD IMG_FALSE 12654 12655 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_234_OFFSET (0x0F9C) 12656 12657 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_234, COEFF_PROBS_936 12658 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_234_COEFF_PROBS_936_MASK (0x000000FF) 12659 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_234_COEFF_PROBS_936_LSBMASK (0x000000FF) 12660 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_234_COEFF_PROBS_936_SHIFT (0) 12661 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_234_COEFF_PROBS_936_SIGNED_FIELD IMG_FALSE 12662 12663 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_234, COEFF_PROBS_937 12664 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_234_COEFF_PROBS_937_MASK (0x0000FF00) 12665 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_234_COEFF_PROBS_937_LSBMASK (0x000000FF) 12666 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_234_COEFF_PROBS_937_SHIFT (8) 12667 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_234_COEFF_PROBS_937_SIGNED_FIELD IMG_FALSE 12668 12669 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_234, COEFF_PROBS_938 12670 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_234_COEFF_PROBS_938_MASK (0x00FF0000) 12671 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_234_COEFF_PROBS_938_LSBMASK (0x000000FF) 12672 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_234_COEFF_PROBS_938_SHIFT (16) 12673 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_234_COEFF_PROBS_938_SIGNED_FIELD IMG_FALSE 12674 12675 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_234, COEFF_PROBS_939 12676 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_234_COEFF_PROBS_939_MASK (0xFF000000) 12677 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_234_COEFF_PROBS_939_LSBMASK (0x000000FF) 12678 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_234_COEFF_PROBS_939_SHIFT (24) 12679 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_234_COEFF_PROBS_939_SIGNED_FIELD IMG_FALSE 12680 12681 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_235_OFFSET (0x0FA0) 12682 12683 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_235, COEFF_PROBS_940 12684 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_235_COEFF_PROBS_940_MASK (0x000000FF) 12685 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_235_COEFF_PROBS_940_LSBMASK (0x000000FF) 12686 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_235_COEFF_PROBS_940_SHIFT (0) 12687 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_235_COEFF_PROBS_940_SIGNED_FIELD IMG_FALSE 12688 12689 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_235, COEFF_PROBS_941 12690 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_235_COEFF_PROBS_941_MASK (0x0000FF00) 12691 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_235_COEFF_PROBS_941_LSBMASK (0x000000FF) 12692 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_235_COEFF_PROBS_941_SHIFT (8) 12693 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_235_COEFF_PROBS_941_SIGNED_FIELD IMG_FALSE 12694 12695 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_235, COEFF_PROBS_942 12696 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_235_COEFF_PROBS_942_MASK (0x00FF0000) 12697 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_235_COEFF_PROBS_942_LSBMASK (0x000000FF) 12698 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_235_COEFF_PROBS_942_SHIFT (16) 12699 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_235_COEFF_PROBS_942_SIGNED_FIELD IMG_FALSE 12700 12701 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_235, COEFF_PROBS_943 12702 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_235_COEFF_PROBS_943_MASK (0xFF000000) 12703 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_235_COEFF_PROBS_943_LSBMASK (0x000000FF) 12704 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_235_COEFF_PROBS_943_SHIFT (24) 12705 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_235_COEFF_PROBS_943_SIGNED_FIELD IMG_FALSE 12706 12707 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_236_OFFSET (0x0FA4) 12708 12709 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_236, COEFF_PROBS_944 12710 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_236_COEFF_PROBS_944_MASK (0x000000FF) 12711 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_236_COEFF_PROBS_944_LSBMASK (0x000000FF) 12712 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_236_COEFF_PROBS_944_SHIFT (0) 12713 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_236_COEFF_PROBS_944_SIGNED_FIELD IMG_FALSE 12714 12715 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_236, COEFF_PROBS_945 12716 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_236_COEFF_PROBS_945_MASK (0x0000FF00) 12717 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_236_COEFF_PROBS_945_LSBMASK (0x000000FF) 12718 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_236_COEFF_PROBS_945_SHIFT (8) 12719 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_236_COEFF_PROBS_945_SIGNED_FIELD IMG_FALSE 12720 12721 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_236, COEFF_PROBS_946 12722 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_236_COEFF_PROBS_946_MASK (0x00FF0000) 12723 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_236_COEFF_PROBS_946_LSBMASK (0x000000FF) 12724 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_236_COEFF_PROBS_946_SHIFT (16) 12725 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_236_COEFF_PROBS_946_SIGNED_FIELD IMG_FALSE 12726 12727 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_236, COEFF_PROBS_947 12728 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_236_COEFF_PROBS_947_MASK (0xFF000000) 12729 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_236_COEFF_PROBS_947_LSBMASK (0x000000FF) 12730 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_236_COEFF_PROBS_947_SHIFT (24) 12731 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_236_COEFF_PROBS_947_SIGNED_FIELD IMG_FALSE 12732 12733 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_237_OFFSET (0x0FA8) 12734 12735 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_237, COEFF_PROBS_948 12736 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_237_COEFF_PROBS_948_MASK (0x000000FF) 12737 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_237_COEFF_PROBS_948_LSBMASK (0x000000FF) 12738 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_237_COEFF_PROBS_948_SHIFT (0) 12739 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_237_COEFF_PROBS_948_SIGNED_FIELD IMG_FALSE 12740 12741 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_237, COEFF_PROBS_949 12742 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_237_COEFF_PROBS_949_MASK (0x0000FF00) 12743 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_237_COEFF_PROBS_949_LSBMASK (0x000000FF) 12744 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_237_COEFF_PROBS_949_SHIFT (8) 12745 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_237_COEFF_PROBS_949_SIGNED_FIELD IMG_FALSE 12746 12747 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_237, COEFF_PROBS_950 12748 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_237_COEFF_PROBS_950_MASK (0x00FF0000) 12749 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_237_COEFF_PROBS_950_LSBMASK (0x000000FF) 12750 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_237_COEFF_PROBS_950_SHIFT (16) 12751 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_237_COEFF_PROBS_950_SIGNED_FIELD IMG_FALSE 12752 12753 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_237, COEFF_PROBS_951 12754 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_237_COEFF_PROBS_951_MASK (0xFF000000) 12755 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_237_COEFF_PROBS_951_LSBMASK (0x000000FF) 12756 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_237_COEFF_PROBS_951_SHIFT (24) 12757 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_237_COEFF_PROBS_951_SIGNED_FIELD IMG_FALSE 12758 12759 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_238_OFFSET (0x0FAC) 12760 12761 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_238, COEFF_PROBS_952 12762 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_238_COEFF_PROBS_952_MASK (0x000000FF) 12763 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_238_COEFF_PROBS_952_LSBMASK (0x000000FF) 12764 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_238_COEFF_PROBS_952_SHIFT (0) 12765 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_238_COEFF_PROBS_952_SIGNED_FIELD IMG_FALSE 12766 12767 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_238, COEFF_PROBS_953 12768 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_238_COEFF_PROBS_953_MASK (0x0000FF00) 12769 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_238_COEFF_PROBS_953_LSBMASK (0x000000FF) 12770 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_238_COEFF_PROBS_953_SHIFT (8) 12771 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_238_COEFF_PROBS_953_SIGNED_FIELD IMG_FALSE 12772 12773 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_238, COEFF_PROBS_954 12774 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_238_COEFF_PROBS_954_MASK (0x00FF0000) 12775 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_238_COEFF_PROBS_954_LSBMASK (0x000000FF) 12776 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_238_COEFF_PROBS_954_SHIFT (16) 12777 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_238_COEFF_PROBS_954_SIGNED_FIELD IMG_FALSE 12778 12779 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_238, COEFF_PROBS_955 12780 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_238_COEFF_PROBS_955_MASK (0xFF000000) 12781 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_238_COEFF_PROBS_955_LSBMASK (0x000000FF) 12782 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_238_COEFF_PROBS_955_SHIFT (24) 12783 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_238_COEFF_PROBS_955_SIGNED_FIELD IMG_FALSE 12784 12785 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_239_OFFSET (0x0FB0) 12786 12787 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_239, COEFF_PROBS_956 12788 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_239_COEFF_PROBS_956_MASK (0x000000FF) 12789 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_239_COEFF_PROBS_956_LSBMASK (0x000000FF) 12790 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_239_COEFF_PROBS_956_SHIFT (0) 12791 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_239_COEFF_PROBS_956_SIGNED_FIELD IMG_FALSE 12792 12793 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_239, COEFF_PROBS_957 12794 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_239_COEFF_PROBS_957_MASK (0x0000FF00) 12795 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_239_COEFF_PROBS_957_LSBMASK (0x000000FF) 12796 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_239_COEFF_PROBS_957_SHIFT (8) 12797 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_239_COEFF_PROBS_957_SIGNED_FIELD IMG_FALSE 12798 12799 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_239, COEFF_PROBS_958 12800 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_239_COEFF_PROBS_958_MASK (0x00FF0000) 12801 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_239_COEFF_PROBS_958_LSBMASK (0x000000FF) 12802 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_239_COEFF_PROBS_958_SHIFT (16) 12803 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_239_COEFF_PROBS_958_SIGNED_FIELD IMG_FALSE 12804 12805 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_239, COEFF_PROBS_959 12806 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_239_COEFF_PROBS_959_MASK (0xFF000000) 12807 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_239_COEFF_PROBS_959_LSBMASK (0x000000FF) 12808 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_239_COEFF_PROBS_959_SHIFT (24) 12809 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_239_COEFF_PROBS_959_SIGNED_FIELD IMG_FALSE 12810 12811 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_240_OFFSET (0x0FB4) 12812 12813 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_240, COEFF_PROBS_960 12814 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_240_COEFF_PROBS_960_MASK (0x000000FF) 12815 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_240_COEFF_PROBS_960_LSBMASK (0x000000FF) 12816 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_240_COEFF_PROBS_960_SHIFT (0) 12817 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_240_COEFF_PROBS_960_SIGNED_FIELD IMG_FALSE 12818 12819 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_240, COEFF_PROBS_961 12820 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_240_COEFF_PROBS_961_MASK (0x0000FF00) 12821 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_240_COEFF_PROBS_961_LSBMASK (0x000000FF) 12822 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_240_COEFF_PROBS_961_SHIFT (8) 12823 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_240_COEFF_PROBS_961_SIGNED_FIELD IMG_FALSE 12824 12825 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_240, COEFF_PROBS_962 12826 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_240_COEFF_PROBS_962_MASK (0x00FF0000) 12827 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_240_COEFF_PROBS_962_LSBMASK (0x000000FF) 12828 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_240_COEFF_PROBS_962_SHIFT (16) 12829 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_240_COEFF_PROBS_962_SIGNED_FIELD IMG_FALSE 12830 12831 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_240, COEFF_PROBS_963 12832 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_240_COEFF_PROBS_963_MASK (0xFF000000) 12833 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_240_COEFF_PROBS_963_LSBMASK (0x000000FF) 12834 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_240_COEFF_PROBS_963_SHIFT (24) 12835 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_240_COEFF_PROBS_963_SIGNED_FIELD IMG_FALSE 12836 12837 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_241_OFFSET (0x0FB8) 12838 12839 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_241, COEFF_PROBS_964 12840 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_241_COEFF_PROBS_964_MASK (0x000000FF) 12841 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_241_COEFF_PROBS_964_LSBMASK (0x000000FF) 12842 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_241_COEFF_PROBS_964_SHIFT (0) 12843 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_241_COEFF_PROBS_964_SIGNED_FIELD IMG_FALSE 12844 12845 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_241, COEFF_PROBS_965 12846 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_241_COEFF_PROBS_965_MASK (0x0000FF00) 12847 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_241_COEFF_PROBS_965_LSBMASK (0x000000FF) 12848 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_241_COEFF_PROBS_965_SHIFT (8) 12849 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_241_COEFF_PROBS_965_SIGNED_FIELD IMG_FALSE 12850 12851 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_241, COEFF_PROBS_966 12852 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_241_COEFF_PROBS_966_MASK (0x00FF0000) 12853 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_241_COEFF_PROBS_966_LSBMASK (0x000000FF) 12854 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_241_COEFF_PROBS_966_SHIFT (16) 12855 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_241_COEFF_PROBS_966_SIGNED_FIELD IMG_FALSE 12856 12857 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_241, COEFF_PROBS_967 12858 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_241_COEFF_PROBS_967_MASK (0xFF000000) 12859 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_241_COEFF_PROBS_967_LSBMASK (0x000000FF) 12860 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_241_COEFF_PROBS_967_SHIFT (24) 12861 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_241_COEFF_PROBS_967_SIGNED_FIELD IMG_FALSE 12862 12863 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_242_OFFSET (0x0FBC) 12864 12865 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_242, COEFF_PROBS_968 12866 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_242_COEFF_PROBS_968_MASK (0x000000FF) 12867 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_242_COEFF_PROBS_968_LSBMASK (0x000000FF) 12868 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_242_COEFF_PROBS_968_SHIFT (0) 12869 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_242_COEFF_PROBS_968_SIGNED_FIELD IMG_FALSE 12870 12871 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_242, COEFF_PROBS_969 12872 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_242_COEFF_PROBS_969_MASK (0x0000FF00) 12873 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_242_COEFF_PROBS_969_LSBMASK (0x000000FF) 12874 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_242_COEFF_PROBS_969_SHIFT (8) 12875 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_242_COEFF_PROBS_969_SIGNED_FIELD IMG_FALSE 12876 12877 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_242, COEFF_PROBS_970 12878 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_242_COEFF_PROBS_970_MASK (0x00FF0000) 12879 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_242_COEFF_PROBS_970_LSBMASK (0x000000FF) 12880 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_242_COEFF_PROBS_970_SHIFT (16) 12881 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_242_COEFF_PROBS_970_SIGNED_FIELD IMG_FALSE 12882 12883 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_242, COEFF_PROBS_971 12884 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_242_COEFF_PROBS_971_MASK (0xFF000000) 12885 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_242_COEFF_PROBS_971_LSBMASK (0x000000FF) 12886 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_242_COEFF_PROBS_971_SHIFT (24) 12887 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_242_COEFF_PROBS_971_SIGNED_FIELD IMG_FALSE 12888 12889 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_243_OFFSET (0x0FC0) 12890 12891 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_243, COEFF_PROBS_972 12892 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_243_COEFF_PROBS_972_MASK (0x000000FF) 12893 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_243_COEFF_PROBS_972_LSBMASK (0x000000FF) 12894 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_243_COEFF_PROBS_972_SHIFT (0) 12895 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_243_COEFF_PROBS_972_SIGNED_FIELD IMG_FALSE 12896 12897 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_243, COEFF_PROBS_973 12898 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_243_COEFF_PROBS_973_MASK (0x0000FF00) 12899 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_243_COEFF_PROBS_973_LSBMASK (0x000000FF) 12900 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_243_COEFF_PROBS_973_SHIFT (8) 12901 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_243_COEFF_PROBS_973_SIGNED_FIELD IMG_FALSE 12902 12903 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_243, COEFF_PROBS_974 12904 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_243_COEFF_PROBS_974_MASK (0x00FF0000) 12905 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_243_COEFF_PROBS_974_LSBMASK (0x000000FF) 12906 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_243_COEFF_PROBS_974_SHIFT (16) 12907 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_243_COEFF_PROBS_974_SIGNED_FIELD IMG_FALSE 12908 12909 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_243, COEFF_PROBS_975 12910 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_243_COEFF_PROBS_975_MASK (0xFF000000) 12911 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_243_COEFF_PROBS_975_LSBMASK (0x000000FF) 12912 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_243_COEFF_PROBS_975_SHIFT (24) 12913 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_243_COEFF_PROBS_975_SIGNED_FIELD IMG_FALSE 12914 12915 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_244_OFFSET (0x0FC4) 12916 12917 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_244, COEFF_PROBS_976 12918 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_244_COEFF_PROBS_976_MASK (0x000000FF) 12919 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_244_COEFF_PROBS_976_LSBMASK (0x000000FF) 12920 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_244_COEFF_PROBS_976_SHIFT (0) 12921 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_244_COEFF_PROBS_976_SIGNED_FIELD IMG_FALSE 12922 12923 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_244, COEFF_PROBS_977 12924 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_244_COEFF_PROBS_977_MASK (0x0000FF00) 12925 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_244_COEFF_PROBS_977_LSBMASK (0x000000FF) 12926 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_244_COEFF_PROBS_977_SHIFT (8) 12927 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_244_COEFF_PROBS_977_SIGNED_FIELD IMG_FALSE 12928 12929 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_244, COEFF_PROBS_978 12930 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_244_COEFF_PROBS_978_MASK (0x00FF0000) 12931 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_244_COEFF_PROBS_978_LSBMASK (0x000000FF) 12932 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_244_COEFF_PROBS_978_SHIFT (16) 12933 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_244_COEFF_PROBS_978_SIGNED_FIELD IMG_FALSE 12934 12935 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_244, COEFF_PROBS_979 12936 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_244_COEFF_PROBS_979_MASK (0xFF000000) 12937 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_244_COEFF_PROBS_979_LSBMASK (0x000000FF) 12938 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_244_COEFF_PROBS_979_SHIFT (24) 12939 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_244_COEFF_PROBS_979_SIGNED_FIELD IMG_FALSE 12940 12941 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_245_OFFSET (0x0FC8) 12942 12943 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_245, COEFF_PROBS_980 12944 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_245_COEFF_PROBS_980_MASK (0x000000FF) 12945 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_245_COEFF_PROBS_980_LSBMASK (0x000000FF) 12946 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_245_COEFF_PROBS_980_SHIFT (0) 12947 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_245_COEFF_PROBS_980_SIGNED_FIELD IMG_FALSE 12948 12949 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_245, COEFF_PROBS_981 12950 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_245_COEFF_PROBS_981_MASK (0x0000FF00) 12951 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_245_COEFF_PROBS_981_LSBMASK (0x000000FF) 12952 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_245_COEFF_PROBS_981_SHIFT (8) 12953 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_245_COEFF_PROBS_981_SIGNED_FIELD IMG_FALSE 12954 12955 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_245, COEFF_PROBS_982 12956 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_245_COEFF_PROBS_982_MASK (0x00FF0000) 12957 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_245_COEFF_PROBS_982_LSBMASK (0x000000FF) 12958 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_245_COEFF_PROBS_982_SHIFT (16) 12959 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_245_COEFF_PROBS_982_SIGNED_FIELD IMG_FALSE 12960 12961 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_245, COEFF_PROBS_983 12962 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_245_COEFF_PROBS_983_MASK (0xFF000000) 12963 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_245_COEFF_PROBS_983_LSBMASK (0x000000FF) 12964 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_245_COEFF_PROBS_983_SHIFT (24) 12965 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_245_COEFF_PROBS_983_SIGNED_FIELD IMG_FALSE 12966 12967 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_246_OFFSET (0x0FCC) 12968 12969 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_246, COEFF_PROBS_984 12970 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_246_COEFF_PROBS_984_MASK (0x000000FF) 12971 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_246_COEFF_PROBS_984_LSBMASK (0x000000FF) 12972 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_246_COEFF_PROBS_984_SHIFT (0) 12973 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_246_COEFF_PROBS_984_SIGNED_FIELD IMG_FALSE 12974 12975 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_246, COEFF_PROBS_985 12976 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_246_COEFF_PROBS_985_MASK (0x0000FF00) 12977 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_246_COEFF_PROBS_985_LSBMASK (0x000000FF) 12978 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_246_COEFF_PROBS_985_SHIFT (8) 12979 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_246_COEFF_PROBS_985_SIGNED_FIELD IMG_FALSE 12980 12981 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_246, COEFF_PROBS_986 12982 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_246_COEFF_PROBS_986_MASK (0x00FF0000) 12983 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_246_COEFF_PROBS_986_LSBMASK (0x000000FF) 12984 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_246_COEFF_PROBS_986_SHIFT (16) 12985 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_246_COEFF_PROBS_986_SIGNED_FIELD IMG_FALSE 12986 12987 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_246, COEFF_PROBS_987 12988 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_246_COEFF_PROBS_987_MASK (0xFF000000) 12989 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_246_COEFF_PROBS_987_LSBMASK (0x000000FF) 12990 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_246_COEFF_PROBS_987_SHIFT (24) 12991 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_246_COEFF_PROBS_987_SIGNED_FIELD IMG_FALSE 12992 12993 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_247_OFFSET (0x0FD0) 12994 12995 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_247, COEFF_PROBS_988 12996 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_247_COEFF_PROBS_988_MASK (0x000000FF) 12997 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_247_COEFF_PROBS_988_LSBMASK (0x000000FF) 12998 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_247_COEFF_PROBS_988_SHIFT (0) 12999 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_247_COEFF_PROBS_988_SIGNED_FIELD IMG_FALSE 13000 13001 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_247, COEFF_PROBS_989 13002 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_247_COEFF_PROBS_989_MASK (0x0000FF00) 13003 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_247_COEFF_PROBS_989_LSBMASK (0x000000FF) 13004 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_247_COEFF_PROBS_989_SHIFT (8) 13005 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_247_COEFF_PROBS_989_SIGNED_FIELD IMG_FALSE 13006 13007 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_247, COEFF_PROBS_990 13008 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_247_COEFF_PROBS_990_MASK (0x00FF0000) 13009 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_247_COEFF_PROBS_990_LSBMASK (0x000000FF) 13010 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_247_COEFF_PROBS_990_SHIFT (16) 13011 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_247_COEFF_PROBS_990_SIGNED_FIELD IMG_FALSE 13012 13013 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_247, COEFF_PROBS_991 13014 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_247_COEFF_PROBS_991_MASK (0xFF000000) 13015 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_247_COEFF_PROBS_991_LSBMASK (0x000000FF) 13016 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_247_COEFF_PROBS_991_SHIFT (24) 13017 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_247_COEFF_PROBS_991_SIGNED_FIELD IMG_FALSE 13018 13019 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_248_OFFSET (0x0FD4) 13020 13021 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_248, COEFF_PROBS_992 13022 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_248_COEFF_PROBS_992_MASK (0x000000FF) 13023 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_248_COEFF_PROBS_992_LSBMASK (0x000000FF) 13024 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_248_COEFF_PROBS_992_SHIFT (0) 13025 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_248_COEFF_PROBS_992_SIGNED_FIELD IMG_FALSE 13026 13027 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_248, COEFF_PROBS_993 13028 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_248_COEFF_PROBS_993_MASK (0x0000FF00) 13029 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_248_COEFF_PROBS_993_LSBMASK (0x000000FF) 13030 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_248_COEFF_PROBS_993_SHIFT (8) 13031 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_248_COEFF_PROBS_993_SIGNED_FIELD IMG_FALSE 13032 13033 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_248, COEFF_PROBS_994 13034 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_248_COEFF_PROBS_994_MASK (0x00FF0000) 13035 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_248_COEFF_PROBS_994_LSBMASK (0x000000FF) 13036 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_248_COEFF_PROBS_994_SHIFT (16) 13037 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_248_COEFF_PROBS_994_SIGNED_FIELD IMG_FALSE 13038 13039 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_248, COEFF_PROBS_995 13040 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_248_COEFF_PROBS_995_MASK (0xFF000000) 13041 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_248_COEFF_PROBS_995_LSBMASK (0x000000FF) 13042 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_248_COEFF_PROBS_995_SHIFT (24) 13043 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_248_COEFF_PROBS_995_SIGNED_FIELD IMG_FALSE 13044 13045 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_249_OFFSET (0x0FD8) 13046 13047 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_249, COEFF_PROBS_996 13048 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_249_COEFF_PROBS_996_MASK (0x000000FF) 13049 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_249_COEFF_PROBS_996_LSBMASK (0x000000FF) 13050 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_249_COEFF_PROBS_996_SHIFT (0) 13051 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_249_COEFF_PROBS_996_SIGNED_FIELD IMG_FALSE 13052 13053 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_249, COEFF_PROBS_997 13054 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_249_COEFF_PROBS_997_MASK (0x0000FF00) 13055 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_249_COEFF_PROBS_997_LSBMASK (0x000000FF) 13056 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_249_COEFF_PROBS_997_SHIFT (8) 13057 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_249_COEFF_PROBS_997_SIGNED_FIELD IMG_FALSE 13058 13059 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_249, COEFF_PROBS_998 13060 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_249_COEFF_PROBS_998_MASK (0x00FF0000) 13061 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_249_COEFF_PROBS_998_LSBMASK (0x000000FF) 13062 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_249_COEFF_PROBS_998_SHIFT (16) 13063 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_249_COEFF_PROBS_998_SIGNED_FIELD IMG_FALSE 13064 13065 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_249, COEFF_PROBS_999 13066 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_249_COEFF_PROBS_999_MASK (0xFF000000) 13067 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_249_COEFF_PROBS_999_LSBMASK (0x000000FF) 13068 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_249_COEFF_PROBS_999_SHIFT (24) 13069 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_249_COEFF_PROBS_999_SIGNED_FIELD IMG_FALSE 13070 13071 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_250_OFFSET (0x0FDC) 13072 13073 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_250, COEFF_PROBS_1000 13074 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_250_COEFF_PROBS_1000_MASK (0x000000FF) 13075 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_250_COEFF_PROBS_1000_LSBMASK (0x000000FF) 13076 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_250_COEFF_PROBS_1000_SHIFT (0) 13077 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_250_COEFF_PROBS_1000_SIGNED_FIELD IMG_FALSE 13078 13079 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_250, COEFF_PROBS_1001 13080 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_250_COEFF_PROBS_1001_MASK (0x0000FF00) 13081 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_250_COEFF_PROBS_1001_LSBMASK (0x000000FF) 13082 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_250_COEFF_PROBS_1001_SHIFT (8) 13083 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_250_COEFF_PROBS_1001_SIGNED_FIELD IMG_FALSE 13084 13085 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_250, COEFF_PROBS_1002 13086 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_250_COEFF_PROBS_1002_MASK (0x00FF0000) 13087 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_250_COEFF_PROBS_1002_LSBMASK (0x000000FF) 13088 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_250_COEFF_PROBS_1002_SHIFT (16) 13089 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_250_COEFF_PROBS_1002_SIGNED_FIELD IMG_FALSE 13090 13091 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_250, COEFF_PROBS_1003 13092 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_250_COEFF_PROBS_1003_MASK (0xFF000000) 13093 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_250_COEFF_PROBS_1003_LSBMASK (0x000000FF) 13094 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_250_COEFF_PROBS_1003_SHIFT (24) 13095 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_250_COEFF_PROBS_1003_SIGNED_FIELD IMG_FALSE 13096 13097 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_251_OFFSET (0x0FE0) 13098 13099 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_251, COEFF_PROBS_1004 13100 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_251_COEFF_PROBS_1004_MASK (0x000000FF) 13101 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_251_COEFF_PROBS_1004_LSBMASK (0x000000FF) 13102 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_251_COEFF_PROBS_1004_SHIFT (0) 13103 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_251_COEFF_PROBS_1004_SIGNED_FIELD IMG_FALSE 13104 13105 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_251, COEFF_PROBS_1005 13106 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_251_COEFF_PROBS_1005_MASK (0x0000FF00) 13107 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_251_COEFF_PROBS_1005_LSBMASK (0x000000FF) 13108 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_251_COEFF_PROBS_1005_SHIFT (8) 13109 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_251_COEFF_PROBS_1005_SIGNED_FIELD IMG_FALSE 13110 13111 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_251, COEFF_PROBS_1006 13112 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_251_COEFF_PROBS_1006_MASK (0x00FF0000) 13113 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_251_COEFF_PROBS_1006_LSBMASK (0x000000FF) 13114 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_251_COEFF_PROBS_1006_SHIFT (16) 13115 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_251_COEFF_PROBS_1006_SIGNED_FIELD IMG_FALSE 13116 13117 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_251, COEFF_PROBS_1007 13118 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_251_COEFF_PROBS_1007_MASK (0xFF000000) 13119 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_251_COEFF_PROBS_1007_LSBMASK (0x000000FF) 13120 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_251_COEFF_PROBS_1007_SHIFT (24) 13121 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_251_COEFF_PROBS_1007_SIGNED_FIELD IMG_FALSE 13122 13123 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_252_OFFSET (0x0FE4) 13124 13125 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_252, COEFF_PROBS_1008 13126 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_252_COEFF_PROBS_1008_MASK (0x000000FF) 13127 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_252_COEFF_PROBS_1008_LSBMASK (0x000000FF) 13128 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_252_COEFF_PROBS_1008_SHIFT (0) 13129 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_252_COEFF_PROBS_1008_SIGNED_FIELD IMG_FALSE 13130 13131 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_252, COEFF_PROBS_1009 13132 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_252_COEFF_PROBS_1009_MASK (0x0000FF00) 13133 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_252_COEFF_PROBS_1009_LSBMASK (0x000000FF) 13134 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_252_COEFF_PROBS_1009_SHIFT (8) 13135 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_252_COEFF_PROBS_1009_SIGNED_FIELD IMG_FALSE 13136 13137 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_252, COEFF_PROBS_1010 13138 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_252_COEFF_PROBS_1010_MASK (0x00FF0000) 13139 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_252_COEFF_PROBS_1010_LSBMASK (0x000000FF) 13140 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_252_COEFF_PROBS_1010_SHIFT (16) 13141 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_252_COEFF_PROBS_1010_SIGNED_FIELD IMG_FALSE 13142 13143 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_252, COEFF_PROBS_1011 13144 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_252_COEFF_PROBS_1011_MASK (0xFF000000) 13145 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_252_COEFF_PROBS_1011_LSBMASK (0x000000FF) 13146 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_252_COEFF_PROBS_1011_SHIFT (24) 13147 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_252_COEFF_PROBS_1011_SIGNED_FIELD IMG_FALSE 13148 13149 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_253_OFFSET (0x0FE8) 13150 13151 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_253, COEFF_PROBS_1012 13152 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_253_COEFF_PROBS_1012_MASK (0x000000FF) 13153 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_253_COEFF_PROBS_1012_LSBMASK (0x000000FF) 13154 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_253_COEFF_PROBS_1012_SHIFT (0) 13155 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_253_COEFF_PROBS_1012_SIGNED_FIELD IMG_FALSE 13156 13157 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_253, COEFF_PROBS_1013 13158 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_253_COEFF_PROBS_1013_MASK (0x0000FF00) 13159 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_253_COEFF_PROBS_1013_LSBMASK (0x000000FF) 13160 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_253_COEFF_PROBS_1013_SHIFT (8) 13161 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_253_COEFF_PROBS_1013_SIGNED_FIELD IMG_FALSE 13162 13163 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_253, COEFF_PROBS_1014 13164 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_253_COEFF_PROBS_1014_MASK (0x00FF0000) 13165 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_253_COEFF_PROBS_1014_LSBMASK (0x000000FF) 13166 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_253_COEFF_PROBS_1014_SHIFT (16) 13167 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_253_COEFF_PROBS_1014_SIGNED_FIELD IMG_FALSE 13168 13169 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_253, COEFF_PROBS_1015 13170 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_253_COEFF_PROBS_1015_MASK (0xFF000000) 13171 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_253_COEFF_PROBS_1015_LSBMASK (0x000000FF) 13172 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_253_COEFF_PROBS_1015_SHIFT (24) 13173 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_253_COEFF_PROBS_1015_SIGNED_FIELD IMG_FALSE 13174 13175 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_254_OFFSET (0x0FEC) 13176 13177 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_254, COEFF_PROBS_1016 13178 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_254_COEFF_PROBS_1016_MASK (0x000000FF) 13179 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_254_COEFF_PROBS_1016_LSBMASK (0x000000FF) 13180 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_254_COEFF_PROBS_1016_SHIFT (0) 13181 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_254_COEFF_PROBS_1016_SIGNED_FIELD IMG_FALSE 13182 13183 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_254, COEFF_PROBS_1017 13184 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_254_COEFF_PROBS_1017_MASK (0x0000FF00) 13185 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_254_COEFF_PROBS_1017_LSBMASK (0x000000FF) 13186 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_254_COEFF_PROBS_1017_SHIFT (8) 13187 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_254_COEFF_PROBS_1017_SIGNED_FIELD IMG_FALSE 13188 13189 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_254, COEFF_PROBS_1018 13190 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_254_COEFF_PROBS_1018_MASK (0x00FF0000) 13191 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_254_COEFF_PROBS_1018_LSBMASK (0x000000FF) 13192 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_254_COEFF_PROBS_1018_SHIFT (16) 13193 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_254_COEFF_PROBS_1018_SIGNED_FIELD IMG_FALSE 13194 13195 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_254, COEFF_PROBS_1019 13196 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_254_COEFF_PROBS_1019_MASK (0xFF000000) 13197 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_254_COEFF_PROBS_1019_LSBMASK (0x000000FF) 13198 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_254_COEFF_PROBS_1019_SHIFT (24) 13199 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_254_COEFF_PROBS_1019_SIGNED_FIELD IMG_FALSE 13200 13201 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_255_OFFSET (0x0FF0) 13202 13203 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_255, COEFF_PROBS_1020 13204 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_255_COEFF_PROBS_1020_MASK (0x000000FF) 13205 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_255_COEFF_PROBS_1020_LSBMASK (0x000000FF) 13206 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_255_COEFF_PROBS_1020_SHIFT (0) 13207 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_255_COEFF_PROBS_1020_SIGNED_FIELD IMG_FALSE 13208 13209 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_255, COEFF_PROBS_1021 13210 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_255_COEFF_PROBS_1021_MASK (0x0000FF00) 13211 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_255_COEFF_PROBS_1021_LSBMASK (0x000000FF) 13212 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_255_COEFF_PROBS_1021_SHIFT (8) 13213 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_255_COEFF_PROBS_1021_SIGNED_FIELD IMG_FALSE 13214 13215 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_255, COEFF_PROBS_1022 13216 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_255_COEFF_PROBS_1022_MASK (0x00FF0000) 13217 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_255_COEFF_PROBS_1022_LSBMASK (0x000000FF) 13218 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_255_COEFF_PROBS_1022_SHIFT (16) 13219 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_255_COEFF_PROBS_1022_SIGNED_FIELD IMG_FALSE 13220 13221 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_255, COEFF_PROBS_1023 13222 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_255_COEFF_PROBS_1023_MASK (0xFF000000) 13223 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_255_COEFF_PROBS_1023_LSBMASK (0x000000FF) 13224 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_255_COEFF_PROBS_1023_SHIFT (24) 13225 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_255_COEFF_PROBS_1023_SIGNED_FIELD IMG_FALSE 13226 13227 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_256_OFFSET (0x0FF4) 13228 13229 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_256, COEFF_PROBS_1024 13230 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_256_COEFF_PROBS_1024_MASK (0x000000FF) 13231 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_256_COEFF_PROBS_1024_LSBMASK (0x000000FF) 13232 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_256_COEFF_PROBS_1024_SHIFT (0) 13233 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_256_COEFF_PROBS_1024_SIGNED_FIELD IMG_FALSE 13234 13235 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_256, COEFF_PROBS_1025 13236 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_256_COEFF_PROBS_1025_MASK (0x0000FF00) 13237 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_256_COEFF_PROBS_1025_LSBMASK (0x000000FF) 13238 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_256_COEFF_PROBS_1025_SHIFT (8) 13239 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_256_COEFF_PROBS_1025_SIGNED_FIELD IMG_FALSE 13240 13241 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_256, COEFF_PROBS_1026 13242 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_256_COEFF_PROBS_1026_MASK (0x00FF0000) 13243 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_256_COEFF_PROBS_1026_LSBMASK (0x000000FF) 13244 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_256_COEFF_PROBS_1026_SHIFT (16) 13245 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_256_COEFF_PROBS_1026_SIGNED_FIELD IMG_FALSE 13246 13247 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_256, COEFF_PROBS_1027 13248 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_256_COEFF_PROBS_1027_MASK (0xFF000000) 13249 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_256_COEFF_PROBS_1027_LSBMASK (0x000000FF) 13250 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_256_COEFF_PROBS_1027_SHIFT (24) 13251 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_256_COEFF_PROBS_1027_SIGNED_FIELD IMG_FALSE 13252 13253 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_257_OFFSET (0x0FF8) 13254 13255 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_257, COEFF_PROBS_1028 13256 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_257_COEFF_PROBS_1028_MASK (0x000000FF) 13257 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_257_COEFF_PROBS_1028_LSBMASK (0x000000FF) 13258 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_257_COEFF_PROBS_1028_SHIFT (0) 13259 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_257_COEFF_PROBS_1028_SIGNED_FIELD IMG_FALSE 13260 13261 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_257, COEFF_PROBS_1029 13262 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_257_COEFF_PROBS_1029_MASK (0x0000FF00) 13263 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_257_COEFF_PROBS_1029_LSBMASK (0x000000FF) 13264 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_257_COEFF_PROBS_1029_SHIFT (8) 13265 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_257_COEFF_PROBS_1029_SIGNED_FIELD IMG_FALSE 13266 13267 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_257, COEFF_PROBS_1030 13268 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_257_COEFF_PROBS_1030_MASK (0x00FF0000) 13269 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_257_COEFF_PROBS_1030_LSBMASK (0x000000FF) 13270 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_257_COEFF_PROBS_1030_SHIFT (16) 13271 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_257_COEFF_PROBS_1030_SIGNED_FIELD IMG_FALSE 13272 13273 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_257, COEFF_PROBS_1031 13274 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_257_COEFF_PROBS_1031_MASK (0xFF000000) 13275 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_257_COEFF_PROBS_1031_LSBMASK (0x000000FF) 13276 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_257_COEFF_PROBS_1031_SHIFT (24) 13277 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_257_COEFF_PROBS_1031_SIGNED_FIELD IMG_FALSE 13278 13279 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_258_OFFSET (0x0FFC) 13280 13281 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_258, COEFF_PROBS_1032 13282 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_258_COEFF_PROBS_1032_MASK (0x000000FF) 13283 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_258_COEFF_PROBS_1032_LSBMASK (0x000000FF) 13284 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_258_COEFF_PROBS_1032_SHIFT (0) 13285 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_258_COEFF_PROBS_1032_SIGNED_FIELD IMG_FALSE 13286 13287 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_258, COEFF_PROBS_1033 13288 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_258_COEFF_PROBS_1033_MASK (0x0000FF00) 13289 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_258_COEFF_PROBS_1033_LSBMASK (0x000000FF) 13290 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_258_COEFF_PROBS_1033_SHIFT (8) 13291 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_258_COEFF_PROBS_1033_SIGNED_FIELD IMG_FALSE 13292 13293 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_258, COEFF_PROBS_1034 13294 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_258_COEFF_PROBS_1034_MASK (0x00FF0000) 13295 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_258_COEFF_PROBS_1034_LSBMASK (0x000000FF) 13296 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_258_COEFF_PROBS_1034_SHIFT (16) 13297 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_258_COEFF_PROBS_1034_SIGNED_FIELD IMG_FALSE 13298 13299 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_258, COEFF_PROBS_1035 13300 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_258_COEFF_PROBS_1035_MASK (0xFF000000) 13301 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_258_COEFF_PROBS_1035_LSBMASK (0x000000FF) 13302 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_258_COEFF_PROBS_1035_SHIFT (24) 13303 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_258_COEFF_PROBS_1035_SIGNED_FIELD IMG_FALSE 13304 13305 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_259_OFFSET (0x1000) 13306 13307 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_259, COEFF_PROBS_1036 13308 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_259_COEFF_PROBS_1036_MASK (0x000000FF) 13309 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_259_COEFF_PROBS_1036_LSBMASK (0x000000FF) 13310 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_259_COEFF_PROBS_1036_SHIFT (0) 13311 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_259_COEFF_PROBS_1036_SIGNED_FIELD IMG_FALSE 13312 13313 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_259, COEFF_PROBS_1037 13314 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_259_COEFF_PROBS_1037_MASK (0x0000FF00) 13315 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_259_COEFF_PROBS_1037_LSBMASK (0x000000FF) 13316 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_259_COEFF_PROBS_1037_SHIFT (8) 13317 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_259_COEFF_PROBS_1037_SIGNED_FIELD IMG_FALSE 13318 13319 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_259, COEFF_PROBS_1038 13320 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_259_COEFF_PROBS_1038_MASK (0x00FF0000) 13321 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_259_COEFF_PROBS_1038_LSBMASK (0x000000FF) 13322 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_259_COEFF_PROBS_1038_SHIFT (16) 13323 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_259_COEFF_PROBS_1038_SIGNED_FIELD IMG_FALSE 13324 13325 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_259, COEFF_PROBS_1039 13326 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_259_COEFF_PROBS_1039_MASK (0xFF000000) 13327 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_259_COEFF_PROBS_1039_LSBMASK (0x000000FF) 13328 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_259_COEFF_PROBS_1039_SHIFT (24) 13329 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_259_COEFF_PROBS_1039_SIGNED_FIELD IMG_FALSE 13330 13331 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_260_OFFSET (0x1004) 13332 13333 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_260, COEFF_PROBS_1040 13334 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_260_COEFF_PROBS_1040_MASK (0x000000FF) 13335 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_260_COEFF_PROBS_1040_LSBMASK (0x000000FF) 13336 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_260_COEFF_PROBS_1040_SHIFT (0) 13337 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_260_COEFF_PROBS_1040_SIGNED_FIELD IMG_FALSE 13338 13339 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_260, COEFF_PROBS_1041 13340 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_260_COEFF_PROBS_1041_MASK (0x0000FF00) 13341 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_260_COEFF_PROBS_1041_LSBMASK (0x000000FF) 13342 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_260_COEFF_PROBS_1041_SHIFT (8) 13343 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_260_COEFF_PROBS_1041_SIGNED_FIELD IMG_FALSE 13344 13345 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_260, COEFF_PROBS_1042 13346 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_260_COEFF_PROBS_1042_MASK (0x00FF0000) 13347 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_260_COEFF_PROBS_1042_LSBMASK (0x000000FF) 13348 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_260_COEFF_PROBS_1042_SHIFT (16) 13349 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_260_COEFF_PROBS_1042_SIGNED_FIELD IMG_FALSE 13350 13351 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_260, COEFF_PROBS_1043 13352 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_260_COEFF_PROBS_1043_MASK (0xFF000000) 13353 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_260_COEFF_PROBS_1043_LSBMASK (0x000000FF) 13354 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_260_COEFF_PROBS_1043_SHIFT (24) 13355 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_260_COEFF_PROBS_1043_SIGNED_FIELD IMG_FALSE 13356 13357 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_261_OFFSET (0x1008) 13358 13359 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_261, COEFF_PROBS_1044 13360 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_261_COEFF_PROBS_1044_MASK (0x000000FF) 13361 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_261_COEFF_PROBS_1044_LSBMASK (0x000000FF) 13362 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_261_COEFF_PROBS_1044_SHIFT (0) 13363 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_261_COEFF_PROBS_1044_SIGNED_FIELD IMG_FALSE 13364 13365 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_261, COEFF_PROBS_1045 13366 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_261_COEFF_PROBS_1045_MASK (0x0000FF00) 13367 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_261_COEFF_PROBS_1045_LSBMASK (0x000000FF) 13368 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_261_COEFF_PROBS_1045_SHIFT (8) 13369 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_261_COEFF_PROBS_1045_SIGNED_FIELD IMG_FALSE 13370 13371 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_261, COEFF_PROBS_1046 13372 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_261_COEFF_PROBS_1046_MASK (0x00FF0000) 13373 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_261_COEFF_PROBS_1046_LSBMASK (0x000000FF) 13374 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_261_COEFF_PROBS_1046_SHIFT (16) 13375 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_261_COEFF_PROBS_1046_SIGNED_FIELD IMG_FALSE 13376 13377 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_261, COEFF_PROBS_1047 13378 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_261_COEFF_PROBS_1047_MASK (0xFF000000) 13379 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_261_COEFF_PROBS_1047_LSBMASK (0x000000FF) 13380 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_261_COEFF_PROBS_1047_SHIFT (24) 13381 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_261_COEFF_PROBS_1047_SIGNED_FIELD IMG_FALSE 13382 13383 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_262_OFFSET (0x100C) 13384 13385 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_262, COEFF_PROBS_1048 13386 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_262_COEFF_PROBS_1048_MASK (0x000000FF) 13387 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_262_COEFF_PROBS_1048_LSBMASK (0x000000FF) 13388 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_262_COEFF_PROBS_1048_SHIFT (0) 13389 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_262_COEFF_PROBS_1048_SIGNED_FIELD IMG_FALSE 13390 13391 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_262, COEFF_PROBS_1049 13392 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_262_COEFF_PROBS_1049_MASK (0x0000FF00) 13393 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_262_COEFF_PROBS_1049_LSBMASK (0x000000FF) 13394 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_262_COEFF_PROBS_1049_SHIFT (8) 13395 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_262_COEFF_PROBS_1049_SIGNED_FIELD IMG_FALSE 13396 13397 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_262, COEFF_PROBS_1050 13398 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_262_COEFF_PROBS_1050_MASK (0x00FF0000) 13399 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_262_COEFF_PROBS_1050_LSBMASK (0x000000FF) 13400 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_262_COEFF_PROBS_1050_SHIFT (16) 13401 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_262_COEFF_PROBS_1050_SIGNED_FIELD IMG_FALSE 13402 13403 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_262, COEFF_PROBS_1051 13404 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_262_COEFF_PROBS_1051_MASK (0xFF000000) 13405 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_262_COEFF_PROBS_1051_LSBMASK (0x000000FF) 13406 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_262_COEFF_PROBS_1051_SHIFT (24) 13407 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_262_COEFF_PROBS_1051_SIGNED_FIELD IMG_FALSE 13408 13409 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_263_OFFSET (0x1010) 13410 13411 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_263, COEFF_PROBS_1052 13412 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_263_COEFF_PROBS_1052_MASK (0x000000FF) 13413 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_263_COEFF_PROBS_1052_LSBMASK (0x000000FF) 13414 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_263_COEFF_PROBS_1052_SHIFT (0) 13415 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_263_COEFF_PROBS_1052_SIGNED_FIELD IMG_FALSE 13416 13417 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_263, COEFF_PROBS_1053 13418 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_263_COEFF_PROBS_1053_MASK (0x0000FF00) 13419 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_263_COEFF_PROBS_1053_LSBMASK (0x000000FF) 13420 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_263_COEFF_PROBS_1053_SHIFT (8) 13421 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_263_COEFF_PROBS_1053_SIGNED_FIELD IMG_FALSE 13422 13423 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_263, COEFF_PROBS_1054 13424 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_263_COEFF_PROBS_1054_MASK (0x00FF0000) 13425 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_263_COEFF_PROBS_1054_LSBMASK (0x000000FF) 13426 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_263_COEFF_PROBS_1054_SHIFT (16) 13427 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_263_COEFF_PROBS_1054_SIGNED_FIELD IMG_FALSE 13428 13429 // MSVDX_VEC_LINE_STORE_RAM, COEFF_PROBS_REG_263, COEFF_PROBS_1055 13430 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_263_COEFF_PROBS_1055_MASK (0xFF000000) 13431 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_263_COEFF_PROBS_1055_LSBMASK (0x000000FF) 13432 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_263_COEFF_PROBS_1055_SHIFT (24) 13433 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_PROBS_REG_263_COEFF_PROBS_1055_SIGNED_FIELD IMG_FALSE 13434 13435 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT1_PROBS_REG_00_OFFSET (0x1014) 13436 13437 // MSVDX_VEC_LINE_STORE_RAM, COEFF_CAT1_PROBS_REG_00, COEFF_CAT1_PROBS_00 13438 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT1_PROBS_REG_00_COEFF_CAT1_PROBS_00_MASK (0x000000FF) 13439 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT1_PROBS_REG_00_COEFF_CAT1_PROBS_00_LSBMASK (0x000000FF) 13440 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT1_PROBS_REG_00_COEFF_CAT1_PROBS_00_SHIFT (0) 13441 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT1_PROBS_REG_00_COEFF_CAT1_PROBS_00_SIGNED_FIELD IMG_FALSE 13442 13443 // MSVDX_VEC_LINE_STORE_RAM, COEFF_CAT1_PROBS_REG_00, COEFF_CAT2_PROBS_00 13444 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT1_PROBS_REG_00_COEFF_CAT2_PROBS_00_MASK (0x0000FF00) 13445 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT1_PROBS_REG_00_COEFF_CAT2_PROBS_00_LSBMASK (0x000000FF) 13446 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT1_PROBS_REG_00_COEFF_CAT2_PROBS_00_SHIFT (8) 13447 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT1_PROBS_REG_00_COEFF_CAT2_PROBS_00_SIGNED_FIELD IMG_FALSE 13448 13449 // MSVDX_VEC_LINE_STORE_RAM, COEFF_CAT1_PROBS_REG_00, COEFF_CAT2_PROBS_01 13450 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT1_PROBS_REG_00_COEFF_CAT2_PROBS_01_MASK (0x00FF0000) 13451 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT1_PROBS_REG_00_COEFF_CAT2_PROBS_01_LSBMASK (0x000000FF) 13452 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT1_PROBS_REG_00_COEFF_CAT2_PROBS_01_SHIFT (16) 13453 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT1_PROBS_REG_00_COEFF_CAT2_PROBS_01_SIGNED_FIELD IMG_FALSE 13454 13455 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT3_PROBS_REG_00_OFFSET (0x1018) 13456 13457 // MSVDX_VEC_LINE_STORE_RAM, COEFF_CAT3_PROBS_REG_00, COEFF_CAT3_PROBS_00 13458 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT3_PROBS_REG_00_COEFF_CAT3_PROBS_00_MASK (0x000000FF) 13459 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT3_PROBS_REG_00_COEFF_CAT3_PROBS_00_LSBMASK (0x000000FF) 13460 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT3_PROBS_REG_00_COEFF_CAT3_PROBS_00_SHIFT (0) 13461 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT3_PROBS_REG_00_COEFF_CAT3_PROBS_00_SIGNED_FIELD IMG_FALSE 13462 13463 // MSVDX_VEC_LINE_STORE_RAM, COEFF_CAT3_PROBS_REG_00, COEFF_CAT3_PROBS_01 13464 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT3_PROBS_REG_00_COEFF_CAT3_PROBS_01_MASK (0x0000FF00) 13465 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT3_PROBS_REG_00_COEFF_CAT3_PROBS_01_LSBMASK (0x000000FF) 13466 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT3_PROBS_REG_00_COEFF_CAT3_PROBS_01_SHIFT (8) 13467 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT3_PROBS_REG_00_COEFF_CAT3_PROBS_01_SIGNED_FIELD IMG_FALSE 13468 13469 // MSVDX_VEC_LINE_STORE_RAM, COEFF_CAT3_PROBS_REG_00, COEFF_CAT3_PROBS_02 13470 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT3_PROBS_REG_00_COEFF_CAT3_PROBS_02_MASK (0x00FF0000) 13471 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT3_PROBS_REG_00_COEFF_CAT3_PROBS_02_LSBMASK (0x000000FF) 13472 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT3_PROBS_REG_00_COEFF_CAT3_PROBS_02_SHIFT (16) 13473 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT3_PROBS_REG_00_COEFF_CAT3_PROBS_02_SIGNED_FIELD IMG_FALSE 13474 13475 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT4_PROBS_REG_00_OFFSET (0x101C) 13476 13477 // MSVDX_VEC_LINE_STORE_RAM, COEFF_CAT4_PROBS_REG_00, COEFF_CAT4_PROBS_00 13478 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT4_PROBS_REG_00_COEFF_CAT4_PROBS_00_MASK (0x000000FF) 13479 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT4_PROBS_REG_00_COEFF_CAT4_PROBS_00_LSBMASK (0x000000FF) 13480 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT4_PROBS_REG_00_COEFF_CAT4_PROBS_00_SHIFT (0) 13481 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT4_PROBS_REG_00_COEFF_CAT4_PROBS_00_SIGNED_FIELD IMG_FALSE 13482 13483 // MSVDX_VEC_LINE_STORE_RAM, COEFF_CAT4_PROBS_REG_00, COEFF_CAT4_PROBS_01 13484 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT4_PROBS_REG_00_COEFF_CAT4_PROBS_01_MASK (0x0000FF00) 13485 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT4_PROBS_REG_00_COEFF_CAT4_PROBS_01_LSBMASK (0x000000FF) 13486 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT4_PROBS_REG_00_COEFF_CAT4_PROBS_01_SHIFT (8) 13487 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT4_PROBS_REG_00_COEFF_CAT4_PROBS_01_SIGNED_FIELD IMG_FALSE 13488 13489 // MSVDX_VEC_LINE_STORE_RAM, COEFF_CAT4_PROBS_REG_00, COEFF_CAT4_PROBS_02 13490 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT4_PROBS_REG_00_COEFF_CAT4_PROBS_02_MASK (0x00FF0000) 13491 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT4_PROBS_REG_00_COEFF_CAT4_PROBS_02_LSBMASK (0x000000FF) 13492 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT4_PROBS_REG_00_COEFF_CAT4_PROBS_02_SHIFT (16) 13493 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT4_PROBS_REG_00_COEFF_CAT4_PROBS_02_SIGNED_FIELD IMG_FALSE 13494 13495 // MSVDX_VEC_LINE_STORE_RAM, COEFF_CAT4_PROBS_REG_00, COEFF_CAT4_PROBS_03 13496 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT4_PROBS_REG_00_COEFF_CAT4_PROBS_03_MASK (0xFF000000) 13497 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT4_PROBS_REG_00_COEFF_CAT4_PROBS_03_LSBMASK (0x000000FF) 13498 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT4_PROBS_REG_00_COEFF_CAT4_PROBS_03_SHIFT (24) 13499 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT4_PROBS_REG_00_COEFF_CAT4_PROBS_03_SIGNED_FIELD IMG_FALSE 13500 13501 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT5_PROBS_REG_00_OFFSET (0x1020) 13502 13503 // MSVDX_VEC_LINE_STORE_RAM, COEFF_CAT5_PROBS_REG_00, COEFF_CAT5_PROBS_00 13504 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT5_PROBS_REG_00_COEFF_CAT5_PROBS_00_MASK (0x000000FF) 13505 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT5_PROBS_REG_00_COEFF_CAT5_PROBS_00_LSBMASK (0x000000FF) 13506 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT5_PROBS_REG_00_COEFF_CAT5_PROBS_00_SHIFT (0) 13507 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT5_PROBS_REG_00_COEFF_CAT5_PROBS_00_SIGNED_FIELD IMG_FALSE 13508 13509 // MSVDX_VEC_LINE_STORE_RAM, COEFF_CAT5_PROBS_REG_00, COEFF_CAT5_PROBS_01 13510 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT5_PROBS_REG_00_COEFF_CAT5_PROBS_01_MASK (0x0000FF00) 13511 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT5_PROBS_REG_00_COEFF_CAT5_PROBS_01_LSBMASK (0x000000FF) 13512 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT5_PROBS_REG_00_COEFF_CAT5_PROBS_01_SHIFT (8) 13513 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT5_PROBS_REG_00_COEFF_CAT5_PROBS_01_SIGNED_FIELD IMG_FALSE 13514 13515 // MSVDX_VEC_LINE_STORE_RAM, COEFF_CAT5_PROBS_REG_00, COEFF_CAT5_PROBS_02 13516 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT5_PROBS_REG_00_COEFF_CAT5_PROBS_02_MASK (0x00FF0000) 13517 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT5_PROBS_REG_00_COEFF_CAT5_PROBS_02_LSBMASK (0x000000FF) 13518 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT5_PROBS_REG_00_COEFF_CAT5_PROBS_02_SHIFT (16) 13519 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT5_PROBS_REG_00_COEFF_CAT5_PROBS_02_SIGNED_FIELD IMG_FALSE 13520 13521 // MSVDX_VEC_LINE_STORE_RAM, COEFF_CAT5_PROBS_REG_00, COEFF_CAT5_PROBS_03 13522 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT5_PROBS_REG_00_COEFF_CAT5_PROBS_03_MASK (0xFF000000) 13523 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT5_PROBS_REG_00_COEFF_CAT5_PROBS_03_LSBMASK (0x000000FF) 13524 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT5_PROBS_REG_00_COEFF_CAT5_PROBS_03_SHIFT (24) 13525 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT5_PROBS_REG_00_COEFF_CAT5_PROBS_03_SIGNED_FIELD IMG_FALSE 13526 13527 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT5_PROBS_REG_01_OFFSET (0x1024) 13528 13529 // MSVDX_VEC_LINE_STORE_RAM, COEFF_CAT5_PROBS_REG_01, COEFF_CAT5_PROBS_04 13530 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT5_PROBS_REG_01_COEFF_CAT5_PROBS_04_MASK (0x000000FF) 13531 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT5_PROBS_REG_01_COEFF_CAT5_PROBS_04_LSBMASK (0x000000FF) 13532 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT5_PROBS_REG_01_COEFF_CAT5_PROBS_04_SHIFT (0) 13533 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT5_PROBS_REG_01_COEFF_CAT5_PROBS_04_SIGNED_FIELD IMG_FALSE 13534 13535 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT6_PROBS_REG_00_OFFSET (0x1028) 13536 13537 // MSVDX_VEC_LINE_STORE_RAM, COEFF_CAT6_PROBS_REG_00, COEFF_CAT6_PROBS_00 13538 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT6_PROBS_REG_00_COEFF_CAT6_PROBS_00_MASK (0x000000FF) 13539 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT6_PROBS_REG_00_COEFF_CAT6_PROBS_00_LSBMASK (0x000000FF) 13540 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT6_PROBS_REG_00_COEFF_CAT6_PROBS_00_SHIFT (0) 13541 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT6_PROBS_REG_00_COEFF_CAT6_PROBS_00_SIGNED_FIELD IMG_FALSE 13542 13543 // MSVDX_VEC_LINE_STORE_RAM, COEFF_CAT6_PROBS_REG_00, COEFF_CAT6_PROBS_01 13544 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT6_PROBS_REG_00_COEFF_CAT6_PROBS_01_MASK (0x0000FF00) 13545 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT6_PROBS_REG_00_COEFF_CAT6_PROBS_01_LSBMASK (0x000000FF) 13546 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT6_PROBS_REG_00_COEFF_CAT6_PROBS_01_SHIFT (8) 13547 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT6_PROBS_REG_00_COEFF_CAT6_PROBS_01_SIGNED_FIELD IMG_FALSE 13548 13549 // MSVDX_VEC_LINE_STORE_RAM, COEFF_CAT6_PROBS_REG_00, COEFF_CAT6_PROBS_02 13550 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT6_PROBS_REG_00_COEFF_CAT6_PROBS_02_MASK (0x00FF0000) 13551 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT6_PROBS_REG_00_COEFF_CAT6_PROBS_02_LSBMASK (0x000000FF) 13552 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT6_PROBS_REG_00_COEFF_CAT6_PROBS_02_SHIFT (16) 13553 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT6_PROBS_REG_00_COEFF_CAT6_PROBS_02_SIGNED_FIELD IMG_FALSE 13554 13555 // MSVDX_VEC_LINE_STORE_RAM, COEFF_CAT6_PROBS_REG_00, COEFF_CAT6_PROBS_03 13556 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT6_PROBS_REG_00_COEFF_CAT6_PROBS_03_MASK (0xFF000000) 13557 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT6_PROBS_REG_00_COEFF_CAT6_PROBS_03_LSBMASK (0x000000FF) 13558 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT6_PROBS_REG_00_COEFF_CAT6_PROBS_03_SHIFT (24) 13559 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT6_PROBS_REG_00_COEFF_CAT6_PROBS_03_SIGNED_FIELD IMG_FALSE 13560 13561 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT6_PROBS_REG_01_OFFSET (0x102C) 13562 13563 // MSVDX_VEC_LINE_STORE_RAM, COEFF_CAT6_PROBS_REG_01, COEFF_CAT6_PROBS_04 13564 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT6_PROBS_REG_01_COEFF_CAT6_PROBS_04_MASK (0x000000FF) 13565 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT6_PROBS_REG_01_COEFF_CAT6_PROBS_04_LSBMASK (0x000000FF) 13566 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT6_PROBS_REG_01_COEFF_CAT6_PROBS_04_SHIFT (0) 13567 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT6_PROBS_REG_01_COEFF_CAT6_PROBS_04_SIGNED_FIELD IMG_FALSE 13568 13569 // MSVDX_VEC_LINE_STORE_RAM, COEFF_CAT6_PROBS_REG_01, COEFF_CAT6_PROBS_05 13570 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT6_PROBS_REG_01_COEFF_CAT6_PROBS_05_MASK (0x0000FF00) 13571 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT6_PROBS_REG_01_COEFF_CAT6_PROBS_05_LSBMASK (0x000000FF) 13572 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT6_PROBS_REG_01_COEFF_CAT6_PROBS_05_SHIFT (8) 13573 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT6_PROBS_REG_01_COEFF_CAT6_PROBS_05_SIGNED_FIELD IMG_FALSE 13574 13575 // MSVDX_VEC_LINE_STORE_RAM, COEFF_CAT6_PROBS_REG_01, COEFF_CAT6_PROBS_06 13576 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT6_PROBS_REG_01_COEFF_CAT6_PROBS_06_MASK (0x00FF0000) 13577 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT6_PROBS_REG_01_COEFF_CAT6_PROBS_06_LSBMASK (0x000000FF) 13578 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT6_PROBS_REG_01_COEFF_CAT6_PROBS_06_SHIFT (16) 13579 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT6_PROBS_REG_01_COEFF_CAT6_PROBS_06_SIGNED_FIELD IMG_FALSE 13580 13581 // MSVDX_VEC_LINE_STORE_RAM, COEFF_CAT6_PROBS_REG_01, COEFF_CAT6_PROBS_07 13582 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT6_PROBS_REG_01_COEFF_CAT6_PROBS_07_MASK (0xFF000000) 13583 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT6_PROBS_REG_01_COEFF_CAT6_PROBS_07_LSBMASK (0x000000FF) 13584 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT6_PROBS_REG_01_COEFF_CAT6_PROBS_07_SHIFT (24) 13585 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT6_PROBS_REG_01_COEFF_CAT6_PROBS_07_SIGNED_FIELD IMG_FALSE 13586 13587 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT6_PROBS_REG_02_OFFSET (0x1030) 13588 13589 // MSVDX_VEC_LINE_STORE_RAM, COEFF_CAT6_PROBS_REG_02, COEFF_CAT6_PROBS_08 13590 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT6_PROBS_REG_02_COEFF_CAT6_PROBS_08_MASK (0x000000FF) 13591 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT6_PROBS_REG_02_COEFF_CAT6_PROBS_08_LSBMASK (0x000000FF) 13592 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT6_PROBS_REG_02_COEFF_CAT6_PROBS_08_SHIFT (0) 13593 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT6_PROBS_REG_02_COEFF_CAT6_PROBS_08_SIGNED_FIELD IMG_FALSE 13594 13595 // MSVDX_VEC_LINE_STORE_RAM, COEFF_CAT6_PROBS_REG_02, COEFF_CAT6_PROBS_09 13596 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT6_PROBS_REG_02_COEFF_CAT6_PROBS_09_MASK (0x0000FF00) 13597 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT6_PROBS_REG_02_COEFF_CAT6_PROBS_09_LSBMASK (0x000000FF) 13598 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT6_PROBS_REG_02_COEFF_CAT6_PROBS_09_SHIFT (8) 13599 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT6_PROBS_REG_02_COEFF_CAT6_PROBS_09_SIGNED_FIELD IMG_FALSE 13600 13601 // MSVDX_VEC_LINE_STORE_RAM, COEFF_CAT6_PROBS_REG_02, COEFF_CAT6_PROBS_10 13602 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT6_PROBS_REG_02_COEFF_CAT6_PROBS_10_MASK (0x00FF0000) 13603 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT6_PROBS_REG_02_COEFF_CAT6_PROBS_10_LSBMASK (0x000000FF) 13604 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT6_PROBS_REG_02_COEFF_CAT6_PROBS_10_SHIFT (16) 13605 #define MSVDX_VEC_LINE_STORE_RAM_COEFF_CAT6_PROBS_REG_02_COEFF_CAT6_PROBS_10_SIGNED_FIELD IMG_FALSE 13606 13607 13608 13609 #ifdef __cplusplus 13610 } 13611 #endif 13612 13613 #endif /* __MSVDX_VEC_VP8_LINE_STORE_MEM_IO2_H__ */ 13614