1 //===-- llvm/CodeGen/AllocationOrder.h - Allocation Order -*- C++ -*-------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file implements an allocation order for virtual registers. 11 // 12 // The preferred allocation order for a virtual register depends on allocation 13 // hints and target hooks. The AllocationOrder class encapsulates all of that. 14 // 15 //===----------------------------------------------------------------------===// 16 17 #ifndef LLVM_LIB_CODEGEN_ALLOCATIONORDER_H 18 #define LLVM_LIB_CODEGEN_ALLOCATIONORDER_H 19 20 #include "llvm/ADT/ArrayRef.h" 21 #include "llvm/MC/MCRegisterInfo.h" 22 23 namespace llvm { 24 25 class RegisterClassInfo; 26 class VirtRegMap; 27 class LiveRegMatrix; 28 29 class LLVM_LIBRARY_VISIBILITY AllocationOrder { 30 SmallVector<MCPhysReg, 16> Hints; 31 ArrayRef<MCPhysReg> Order; 32 int Pos; 33 34 public: 35 /// Create a new AllocationOrder for VirtReg. 36 /// @param VirtReg Virtual register to allocate for. 37 /// @param VRM Virtual register map for function. 38 /// @param RegClassInfo Information about reserved and allocatable registers. 39 AllocationOrder(unsigned VirtReg, 40 const VirtRegMap &VRM, 41 const RegisterClassInfo &RegClassInfo, 42 const LiveRegMatrix *Matrix); 43 44 /// Get the allocation order without reordered hints. getOrder()45 ArrayRef<MCPhysReg> getOrder() const { return Order; } 46 47 /// Return the next physical register in the allocation order, or 0. 48 /// It is safe to call next() again after it returned 0, it will keep 49 /// returning 0 until rewind() is called. 50 unsigned next(unsigned Limit = 0) { 51 if (Pos < 0) 52 return Hints.end()[Pos++]; 53 if (!Limit) 54 Limit = Order.size(); 55 while (Pos < int(Limit)) { 56 unsigned Reg = Order[Pos++]; 57 if (!isHint(Reg)) 58 return Reg; 59 } 60 return 0; 61 } 62 63 /// As next(), but allow duplicates to be returned, and stop before the 64 /// Limit'th register in the RegisterClassInfo allocation order. 65 /// 66 /// This can produce more than Limit registers if there are hints. nextWithDups(unsigned Limit)67 unsigned nextWithDups(unsigned Limit) { 68 if (Pos < 0) 69 return Hints.end()[Pos++]; 70 if (Pos < int(Limit)) 71 return Order[Pos++]; 72 return 0; 73 } 74 75 /// Start over from the beginning. rewind()76 void rewind() { Pos = -int(Hints.size()); } 77 78 /// Return true if the last register returned from next() was a preferred register. isHint()79 bool isHint() const { return Pos <= 0; } 80 81 /// Return true if PhysReg is a preferred register. isHint(unsigned PhysReg)82 bool isHint(unsigned PhysReg) const { 83 return std::find(Hints.begin(), Hints.end(), PhysReg) != Hints.end(); 84 } 85 }; 86 87 } // end namespace llvm 88 89 #endif 90