1%default {"preinstr":"", "result":"a0", "chkzero":"0"}
2    /*
3     * Generic 32-bit binary operation.  Provide an "instr" line that
4     * specifies an instruction that performs "result = a0 op a1".
5     * This could be a MIPS instruction or a function call.  (If the result
6     * comes back in a register other than a0, you can override "result".)
7     *
8     * If "chkzero" is set to 1, we perform a divide-by-zero check on
9     * vCC (a1).  Useful for integer division and modulus.  Note that we
10     * *don't* check for (INT_MIN / -1) here, because the CPU handles it
11     * correctly.
12     *
13     * For: add-int, sub-int, mul-int, div-int, rem-int, and-int, or-int,
14     *      xor-int, shl-int, shr-int, ushr-int
15     */
16    /* binop vAA, vBB, vCC */
17    srl     a4, rINST, 8                # a4 <- AA
18    lbu     a2, 2(rPC)                  # a2 <- BB
19    lbu     a3, 3(rPC)                  # a3 <- CC
20    GET_VREG a0, a2                     # a0 <- vBB
21    GET_VREG a1, a3                     # a1 <- vCC
22    .if $chkzero
23    beqz    a1, common_errDivideByZero  # is second operand zero?
24    .endif
25    FETCH_ADVANCE_INST 2                # advance rPC, load rINST
26    $preinstr                           # optional op
27    $instr                              # $result <- op, a0-a3 changed
28    GET_INST_OPCODE v0                  # extract opcode from rINST
29    SET_VREG $result, a4                # vAA <- $result
30    GOTO_OPCODE v0                      # jump to next instruction
31