1 /*
2 * Author: Thomas Ingleby <thomas.c.ingleby@intel.com>
3 * Author: Michael Ring <mail@michael-ring.org>
4 * Copyright (c) 2014 Intel Corporation.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining
7 * a copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sublicense, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be
15 * included in all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
20 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 */
25
26 #include <stdlib.h>
27 #include <string.h>
28 #include <sys/mman.h>
29 #include <mraa/common.h>
30 #include <mraa_internal_types.h>
31
32 #include "common.h"
33 #include "arm/banana.h"
34
35 #define PLATFORM_NAME_BANANA_PI "Banana Pi"
36 #define PLATFORM_BANANA_PI 1
37 #define PLATFORM_NAME_BANANA_PRO "Banana Pro"
38 #define PLATFORM_BANANA_PRO 2
39 #define MMAP_PATH "/dev/mem"
40 #define DT_BASE "/sys/firmware/devicetree/base"
41
42 #define SUNXI_BASE (0x01C20000)
43 #define SUNXI_BLOCK_SIZE (4 * 1024)
44 #define SUNXI_GPIO_DAT 0x0810
45 #define SUNXI_GPIO_PORT_OFFSET 0x0024
46 #define MAX_SIZE 64
47
48 // MMAP
49 static uint8_t* mmap_reg = NULL;
50 static int mmap_fd = 0;
51 static int mmap_size;
52 static unsigned int mmap_count = 0;
53 static int platform_detected = 0;
54
55 const char* serialdev[] = { "/dev/ttyS0", "/dev/ttyS1", "/dev/ttyS2", "/dev/ttyS3",
56 "/dev/ttyS4", "/dev/ttyS5", "/dev/ttyS6", "/dev/ttyS7" };
57 const char* seriallink[] = { "/sys/class/tty/ttyS0", "/sys/class/tty/ttyS1", "/sys/class/tty/ttyS2",
58 "/sys/class/tty/ttyS3", "/sys/class/tty/ttyS4", "/sys/class/tty/ttyS5",
59 "/sys/class/tty/ttyS6", "/sys/class/tty/ttyS7" };
60 const char* i2clink[] = {
61 "/sys/class/i2c-dev/i2c-0", "/sys/class/i2c-dev/i2c-1", "/sys/class/i2c-dev/i2c-2",
62 "/sys/class/i2c-dev/i2c-3", "/sys/class/i2c-dev/i2c-4",
63 };
64 const char* spilink[] = { "/sys/class/spidev/spidev0.0",
65 "/sys/class/spidev/spidev1.0",
66 "/sys/class/spidev/spidev2.0",
67 "/sys/class/spidev/spidev3.0" };
68
69 mraa_result_t
mraa_banana_spi_init_pre(int index)70 mraa_banana_spi_init_pre(int index)
71 {
72 char devpath[MAX_SIZE];
73 sprintf(devpath, "/dev/spidev%u.0", plat->spi_bus[index].bus_id);
74 if (!mraa_file_exist(devpath)) {
75 syslog(LOG_INFO, "spi: trying modprobe for spi-sun4i");
76 system("modprobe spi-sun4i >/dev/null 2>&1");
77 syslog(LOG_INFO, "spi: trying modprobe for spidev");
78 system("modprobe spidev >/dev/null 2>&1");
79 }
80 if (!mraa_file_exist(devpath)) {
81 syslog(LOG_ERR, "spi: Device not initialized");
82 syslog(LOG_ERR, "spi: If you run a kernel >=3.18 then most likely spi support does not yet "
83 "fully work.");
84 return MRAA_ERROR_NO_RESOURCES;
85 }
86 return MRAA_SUCCESS;
87 }
88
89 mraa_result_t
mraa_banana_i2c_init_pre(unsigned int bus)90 mraa_banana_i2c_init_pre(unsigned int bus)
91 {
92 char devpath[MAX_SIZE];
93 sprintf(devpath, "/dev/i2c-%u", bus);
94 if (!mraa_file_exist(devpath)) {
95 syslog(LOG_INFO, "i2c: trying modprobe for i2c-dev");
96 system("modprobe i2c-dev >/dev/null 2>&1");
97 }
98 if (!mraa_file_exist(devpath)) {
99 syslog(LOG_ERR, "i2c: Device not initialized");
100 return MRAA_ERROR_NO_RESOURCES;
101 }
102 return MRAA_SUCCESS;
103 }
104
105 mraa_result_t
mraa_banana_mmap_write(mraa_gpio_context dev,int value)106 mraa_banana_mmap_write(mraa_gpio_context dev, int value)
107 {
108 uint32_t readvalue =
109 *(volatile uint32_t*) (mmap_reg + SUNXI_GPIO_DAT + (dev->pin / 32) * SUNXI_GPIO_PORT_OFFSET);
110 volatile uint32_t* addr;
111 if (value) {
112 *(volatile uint32_t*) (mmap_reg + SUNXI_GPIO_DAT + (dev->pin / 32) * SUNXI_GPIO_PORT_OFFSET) =
113 (uint32_t)((1 << (dev->pin % 32)) | readvalue);
114 } else {
115 *(volatile uint32_t*) (mmap_reg + SUNXI_GPIO_DAT + (dev->pin / 32) * SUNXI_GPIO_PORT_OFFSET) =
116 (uint32_t)(~(1 << (dev->pin % 32)) & readvalue);
117 }
118 return MRAA_SUCCESS;
119 }
120
121 int
mraa_banana_mmap_read(mraa_gpio_context dev)122 mraa_banana_mmap_read(mraa_gpio_context dev)
123 {
124 uint32_t value =
125 *(volatile uint32_t*) (mmap_reg + SUNXI_GPIO_DAT + (dev->pin / 32) * SUNXI_GPIO_PORT_OFFSET);
126 if (value & (uint32_t)(1 << (dev->pin % 32))) {
127 return 1;
128 }
129 return 0;
130 }
131
132 static mraa_result_t
mraa_banana_mmap_unsetup()133 mraa_banana_mmap_unsetup()
134 {
135 if (mmap_reg == NULL) {
136 syslog(LOG_ERR, "banana mmap: cannot unsetup NULLed mmap");
137 return MRAA_ERROR_INVALID_RESOURCE;
138 }
139 munmap(mmap_reg, mmap_size);
140 mmap_reg = NULL;
141 if (close(mmap_fd) != 0) {
142 return MRAA_ERROR_INVALID_RESOURCE;
143 }
144 return MRAA_SUCCESS;
145 }
146
147 mraa_result_t
mraa_banana_mmap_setup(mraa_gpio_context dev,mraa_boolean_t en)148 mraa_banana_mmap_setup(mraa_gpio_context dev, mraa_boolean_t en)
149 {
150 if (dev == NULL) {
151 syslog(LOG_ERR, "Banana mmap: context not valid");
152 return MRAA_ERROR_INVALID_HANDLE;
153 }
154
155 if (en == 0) {
156 if (dev->mmap_write == NULL && dev->mmap_read == NULL) {
157 syslog(LOG_ERR, "Banana mmap: can't disable disabled mmap gpio");
158 return MRAA_ERROR_INVALID_PARAMETER;
159 }
160 dev->mmap_write = NULL;
161 dev->mmap_read = NULL;
162 mmap_count--;
163 if (mmap_count == 0) {
164 return mraa_banana_mmap_unsetup();
165 }
166 return MRAA_SUCCESS;
167 }
168
169 if (dev->mmap_write != NULL && dev->mmap_read != NULL) {
170 syslog(LOG_ERR, "Banana mmap: can't enable enabled mmap gpio");
171 return MRAA_ERROR_INVALID_PARAMETER;
172 }
173
174 // Might need to make some elements of this thread safe.
175 // For example only allow one thread to enter the following block
176 // to prevent mmap'ing twice.
177 if (mmap_reg == NULL) {
178 if ((mmap_fd = open(MMAP_PATH, O_RDWR)) < 0) {
179 syslog(LOG_ERR, "Banana mmap: unable to open /dev/mem file");
180 return MRAA_ERROR_INVALID_HANDLE;
181 }
182
183 mmap_reg = (uint8_t*) mmap(NULL, SUNXI_BLOCK_SIZE, PROT_READ | PROT_WRITE,
184 MAP_FILE | MAP_SHARED, mmap_fd, SUNXI_BASE);
185 if (mmap_reg == MAP_FAILED) {
186 syslog(LOG_ERR, "Banana mmap: failed to mmap");
187 mmap_reg = NULL;
188 close(mmap_fd);
189 return MRAA_ERROR_NO_RESOURCES;
190 }
191 }
192 dev->mmap_write = &mraa_banana_mmap_write;
193 dev->mmap_read = &mraa_banana_mmap_read;
194 mmap_count++;
195
196 return MRAA_SUCCESS;
197 }
198
199 mraa_board_t*
mraa_banana()200 mraa_banana()
201 {
202 mraa_board_t* b = (mraa_board_t*) calloc(1, sizeof(mraa_board_t));
203 if (b == NULL) {
204 return NULL;
205 }
206
207 platform_detected = 0;
208 int i2c2 = -1;
209 int spi0 = -1;
210 int uart2 = -1;
211 int uart3 = -1;
212 int uart4 = -1;
213 int uart7 = -1;
214
215 if (mraa_file_exist(DT_BASE "/model")) {
216 // We are on a modern kernel, great!!!!
217 if (mraa_file_contains(DT_BASE "/model", "Banana Pro")) {
218 b->platform_name = PLATFORM_NAME_BANANA_PRO;
219 platform_detected = PLATFORM_BANANA_PRO;
220 b->phy_pin_count = MRAA_BANANA_PRO_PINCOUNT;
221 }
222
223 if (mraa_file_contains(DT_BASE "/model", "Banana Pi")) {
224 b->platform_name = PLATFORM_NAME_BANANA_PI;
225 platform_detected = PLATFORM_BANANA_PI;
226 b->phy_pin_count = MRAA_BANANA_PI_PINCOUNT;
227 }
228 if (mraa_file_contains(DT_BASE "/soc@01c00000/i2c@01c2b400/status", "okay")) {
229 i2c2 = 1;
230 }
231 if (mraa_file_contains(DT_BASE "/soc@01c00000/spi@01c05000/status", "okay")) {
232 spi0 = 1;
233 }
234 } else {
235 if (mraa_file_exist("/sys/class/leds/green:ph24:led1")) {
236 if (mraa_file_exist("/sys/class/leds/blue:pg02:led2")) {
237 b->platform_name = PLATFORM_NAME_BANANA_PRO;
238 platform_detected = PLATFORM_BANANA_PRO;
239 b->phy_pin_count = MRAA_BANANA_PRO_PINCOUNT;
240 } else {
241 b->platform_name = PLATFORM_NAME_BANANA_PI;
242 platform_detected = PLATFORM_BANANA_PI;
243 b->phy_pin_count = MRAA_BANANA_PI_PINCOUNT;
244 }
245 if (mraa_file_exist("/sys/class/i2c-dev/i2c-2")) {
246 i2c2 = 1;
247 }
248
249
250 if (mraa_file_exist("/sys/class/spi_master/spi0")) {
251 spi0 = 1;
252 }
253 }
254 }
255
256 if (platform_detected == 0) {
257 free(b);
258 syslog(LOG_ERR, "mraa: Could not detect Banana Pi or Banana Pro");
259 return NULL;
260 }
261
262 int devnum;
263 for (devnum = 0; devnum < 8; devnum++) {
264 if (mraa_link_targets(seriallink[devnum], "1c28800")) {
265 uart2 = devnum;
266 }
267 if (mraa_link_targets(seriallink[devnum], "1c28c00")) {
268 uart3 = devnum;
269 }
270 if (mraa_link_targets(seriallink[devnum], "1c29000")) {
271 uart4 = devnum;
272 }
273 if (mraa_link_targets(seriallink[devnum], "1c29c00")) {
274 uart7 = devnum;
275 }
276 }
277
278 for (devnum = 0; devnum < 5; devnum++) {
279 if (mraa_link_targets(i2clink[devnum], "1c2b400")) {
280 i2c2 = devnum;
281 }
282 }
283
284 for (devnum = 0; devnum < 4; devnum++) {
285 if (mraa_link_targets(spilink[devnum], "1c05000")) {
286 spi0 = devnum;
287 }
288 }
289
290 b->adv_func = (mraa_adv_func_t*) calloc(1, sizeof(mraa_adv_func_t));
291 if (b->adv_func == NULL) {
292 free(b);
293 return NULL;
294 }
295
296 b->pins = (mraa_pininfo_t*) calloc(b->phy_pin_count, sizeof(mraa_pininfo_t));
297 if (b->pins == NULL) {
298 free(b->adv_func);
299 free(b);
300 return NULL;
301 }
302
303 b->adv_func->spi_init_pre = &mraa_banana_spi_init_pre;
304 b->adv_func->i2c_init_pre = &mraa_banana_i2c_init_pre;
305 b->adv_func->gpio_mmap_setup = &mraa_banana_mmap_setup;
306
307 strncpy(b->pins[0].name, "INVALID", MRAA_PIN_NAME_SIZE);
308 b->pins[0].capabilites = (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 };
309
310 strncpy(b->pins[1].name, "3V3", MRAA_PIN_NAME_SIZE);
311 b->pins[1].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
312
313 strncpy(b->pins[2].name, "5V", MRAA_PIN_NAME_SIZE);
314 b->pins[2].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
315
316 if (i2c2 == 1) {
317 strncpy(b->pins[3].name, "TWI2-SDA", MRAA_PIN_NAME_SIZE); // PB21 Pin53 TWI2-SDA
318 b->pins[3].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 0, 0 };
319 } else {
320 strncpy(b->pins[3].name, "PB21", MRAA_PIN_NAME_SIZE); // PB21 Pin53 TWI2-SDA
321 b->pins[3].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
322 }
323 b->pins[3].gpio.pinmap = 53;
324
325 strncpy(b->pins[4].name, "5V", MRAA_PIN_NAME_SIZE);
326 b->pins[4].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
327
328 if (i2c2 == 1) {
329 strncpy(b->pins[5].name, "TWI2-SCK", MRAA_PIN_NAME_SIZE); // PB20 Pin52 TWI2-SCK
330 b->pins[5].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 0, 0 };
331 } else {
332 strncpy(b->pins[5].name, "PB20", MRAA_PIN_NAME_SIZE); // PB20 Pin52 TWI2-SCK
333 b->pins[5].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
334 }
335 b->pins[5].gpio.pinmap = 52;
336
337 strncpy(b->pins[6].name, "GND", MRAA_PIN_NAME_SIZE);
338 b->pins[6].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
339
340 if (platform_detected == PLATFORM_BANANA_PRO) {
341 strncpy(b->pins[7].name, "PH02", MRAA_PIN_NAME_SIZE); // PH2 Pin226
342 b->pins[7].gpio.pinmap = 226;
343 } else {
344 strncpy(b->pins[7].name, "PI03", MRAA_PIN_NAME_SIZE); // PI3 Pin259 PWM
345 b->pins[7].gpio.pinmap = 259;
346 }
347 b->pins[7].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
348
349 if (platform_detected == PLATFORM_BANANA_PRO) {
350 strncpy(b->pins[8].name, "UART4_TX", MRAA_PIN_NAME_SIZE); // PH4 Pin228 UART4_TX
351 b->pins[8].gpio.pinmap = 228;
352 } else {
353 strncpy(b->pins[8].name, "UART3_TX", MRAA_PIN_NAME_SIZE); // PH0 Pin224 UART3_TX
354 b->pins[8].gpio.pinmap = 224;
355 }
356 b->pins[8].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
357
358 strncpy(b->pins[9].name, "GND", MRAA_PIN_NAME_SIZE);
359 b->pins[9].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
360
361 if (platform_detected == PLATFORM_BANANA_PRO) {
362 strncpy(b->pins[10].name, "UART4_RX", MRAA_PIN_NAME_SIZE); // PH5 Pin229 UART4_RX
363 b->pins[10].gpio.pinmap = 229;
364 } else {
365 strncpy(b->pins[10].name, "UART3_RX", MRAA_PIN_NAME_SIZE); // PH1 Pin225 UART3_RX
366 b->pins[10].gpio.pinmap = 225;
367 }
368 b->pins[10].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
369
370 strncpy(b->pins[11].name, "PI19", MRAA_PIN_NAME_SIZE); // PI19 Pin275 IO+UART2_RX
371 b->pins[11].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
372 b->pins[11].gpio.pinmap = 275;
373
374 if (platform_detected == PLATFORM_BANANA_PRO) {
375 strncpy(b->pins[12].name, "PI03", MRAA_PIN_NAME_SIZE); // PI3 Pin259 PWM
376 b->pins[12].gpio.pinmap = 259;
377 } else {
378 strncpy(b->pins[12].name, "PH02", MRAA_PIN_NAME_SIZE); // PH2 Pin226
379 b->pins[12].gpio.pinmap = 226;
380 }
381 b->pins[12].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0, 0 };
382
383 strncpy(b->pins[13].name, "PI18", MRAA_PIN_NAME_SIZE); // PI18 Pin274 UART2_TX
384 b->pins[13].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
385 b->pins[13].gpio.pinmap = 274;
386
387 strncpy(b->pins[14].name, "GND", MRAA_PIN_NAME_SIZE);
388 b->pins[14].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
389
390 strncpy(b->pins[15].name, "PI17", MRAA_PIN_NAME_SIZE); // PI17 Pin273 UART2_CTS
391 b->pins[15].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
392 b->pins[15].gpio.pinmap = 273;
393
394 strncpy(b->pins[16].name, "PH20", MRAA_PIN_NAME_SIZE); // PH20 Pin 244 CAN_TX
395 b->pins[16].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
396 b->pins[16].gpio.pinmap = 244;
397
398 strncpy(b->pins[17].name, "3V3", MRAA_PIN_NAME_SIZE);
399 b->pins[17].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
400
401 strncpy(b->pins[18].name, "PH21", MRAA_PIN_NAME_SIZE); // PH21 Pin245 CAN_RX
402 b->pins[18].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
403 b->pins[18].gpio.pinmap = 245;
404
405 strncpy(b->pins[19].name, "SPI0MOSI", MRAA_PIN_NAME_SIZE); // PI12 SPI0
406 b->pins[19].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 };
407 b->pins[19].gpio.pinmap = 268;
408
409 strncpy(b->pins[20].name, "GND", MRAA_PIN_NAME_SIZE);
410 b->pins[20].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
411
412 strncpy(b->pins[21].name, "SPI0MISO", MRAA_PIN_NAME_SIZE); // PI13 SPI0
413 b->pins[21].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 };
414 b->pins[21].gpio.pinmap = 269;
415
416 strncpy(b->pins[22].name, "PI16", MRAA_PIN_NAME_SIZE); // PI16 UART2_RTS
417 b->pins[22].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
418 b->pins[22].gpio.pinmap = 272;
419
420 strncpy(b->pins[23].name, "SPI0CLK", MRAA_PIN_NAME_SIZE); // PI11 SPI0
421 b->pins[23].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 };
422 b->pins[23].gpio.pinmap = 267;
423
424 strncpy(b->pins[24].name, "SPI0CS0", MRAA_PIN_NAME_SIZE); // PI10 SPI0
425 b->pins[24].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 };
426 b->pins[24].gpio.pinmap = 266;
427
428 strncpy(b->pins[25].name, "GND", MRAA_PIN_NAME_SIZE);
429 b->pins[25].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
430
431 strncpy(b->pins[26].name, "SPI0CS1", MRAA_PIN_NAME_SIZE); // PI14 SPI0
432 b->pins[26].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 };
433 b->pins[26].gpio.pinmap = 270;
434
435 if (platform_detected == PLATFORM_BANANA_PI) {
436 strncpy(b->pins[27].name, "5V", MRAA_PIN_NAME_SIZE);
437 b->pins[27].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
438
439 strncpy(b->pins[28].name, "3V3", MRAA_PIN_NAME_SIZE);
440 b->pins[28].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
441
442 strncpy(b->pins[29].name, "PH05", MRAA_PIN_NAME_SIZE); // PH5
443 b->pins[29].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
444 b->pins[29].gpio.pinmap = 229;
445
446 strncpy(b->pins[30].name, "PI21", MRAA_PIN_NAME_SIZE); // PI21 UART7_RX
447 b->pins[30].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
448 b->pins[30].gpio.pinmap = 277;
449
450 strncpy(b->pins[31].name, "PH03", MRAA_PIN_NAME_SIZE); // PH3
451 b->pins[31].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
452 b->pins[31].gpio.pinmap = 227;
453
454 strncpy(b->pins[32].name, "PI20", MRAA_PIN_NAME_SIZE); // PI20 UART7_TX
455 b->pins[32].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
456 b->pins[32].gpio.pinmap = 276;
457
458 strncpy(b->pins[33].name, "GND", MRAA_PIN_NAME_SIZE);
459 b->pins[33].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
460
461 strncpy(b->pins[34].name, "GND", MRAA_PIN_NAME_SIZE);
462 b->pins[34].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
463 }
464
465 if (platform_detected == PLATFORM_BANANA_PRO) {
466
467 strncpy(b->pins[27].name, "HAT_SDA", MRAA_PIN_NAME_SIZE); // PI1 TWI3-SDA i2c3
468 b->pins[27].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
469 b->pins[27].gpio.pinmap = 257;
470
471 strncpy(b->pins[28].name, "HAT_SCK", MRAA_PIN_NAME_SIZE); // PI0 TWI3-SCK i2c3
472 b->pins[28].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
473 b->pins[28].gpio.pinmap = 256;
474
475 strncpy(b->pins[29].name, "PB03", MRAA_PIN_NAME_SIZE); // PB3 IR0_TX/SPDIF_MCLK
476 b->pins[29].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
477 b->pins[29].gpio.pinmap = 35;
478
479 strncpy(b->pins[30].name, "GND", MRAA_PIN_NAME_SIZE);
480 b->pins[30].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
481
482 strncpy(b->pins[31].name, "PI21", MRAA_PIN_NAME_SIZE); // PI21 UART7_RX
483 b->pins[31].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
484 b->pins[31].gpio.pinmap = 277;
485
486 strncpy(b->pins[32].name, "PI20", MRAA_PIN_NAME_SIZE); // PI20 UART7_TX
487 b->pins[32].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
488 b->pins[32].gpio.pinmap = 276;
489
490 strncpy(b->pins[33].name, "PB13", MRAA_PIN_NAME_SIZE); // PB13 SPDIF_D0
491 b->pins[33].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
492 b->pins[33].gpio.pinmap = 45;
493
494 strncpy(b->pins[34].name, "GND", MRAA_PIN_NAME_SIZE);
495 b->pins[34].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
496
497 strncpy(b->pins[35].name, "PB07", MRAA_PIN_NAME_SIZE); // PB07 I2S0_LRCK
498 b->pins[35].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
499 b->pins[35].gpio.pinmap = 39;
500
501 strncpy(b->pins[36].name, "PB06", MRAA_PIN_NAME_SIZE); // PB06 I2S0BCLK
502 b->pins[36].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
503 b->pins[36].gpio.pinmap = 38;
504
505 strncpy(b->pins[37].name, "PB05", MRAA_PIN_NAME_SIZE); // PB05 I2S0MCK
506 b->pins[37].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
507 b->pins[37].gpio.pinmap = 37;
508
509 strncpy(b->pins[38].name, "PB12", MRAA_PIN_NAME_SIZE); // PB12 I2S0_DI
510 b->pins[38].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
511 b->pins[38].gpio.pinmap = 44;
512
513 strncpy(b->pins[39].name, "GND", MRAA_PIN_NAME_SIZE);
514 b->pins[39].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
515
516 strncpy(b->pins[40].name, "PB08", MRAA_PIN_NAME_SIZE); // PB08 I2S0_DO0
517 b->pins[40].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
518 b->pins[40].gpio.pinmap = 40;
519 }
520
521 b->aio_count = 0;
522 b->adc_raw = 0;
523 b->adc_supported = 0;
524 b->pwm_default_period = 500;
525 b->pwm_max_period = 2147483;
526 b->pwm_min_period = 1;
527
528 b->gpio_count = 0;
529 int i;
530 for (i = 0; i < b->phy_pin_count; i++) {
531 if (b->pins[i].capabilites.gpio) {
532 b->gpio_count++;
533 }
534 }
535
536 // BUS DEFINITIONS
537 b->i2c_bus_count = 0;
538 b->def_i2c_bus = 0;
539 if (i2c2 >= 0) {
540 b->i2c_bus[b->i2c_bus_count].bus_id = i2c2;
541 b->i2c_bus[b->i2c_bus_count].sda = 3;
542 b->i2c_bus[b->i2c_bus_count].scl = 5;
543 b->i2c_bus_count++;
544 }
545
546 b->spi_bus_count = 0;
547 b->def_spi_bus = 0;
548 if (spi0 >= 0) {
549 b->spi_bus[b->spi_bus_count].bus_id = spi0;
550 b->spi_bus[b->spi_bus_count].slave_s = 0;
551 b->spi_bus[b->spi_bus_count].cs = 24;
552 b->spi_bus[b->spi_bus_count].mosi = 19;
553 b->spi_bus[b->spi_bus_count].miso = 21;
554 b->spi_bus[b->spi_bus_count].sclk = 23;
555 b->spi_bus_count++;
556 }
557
558 b->uart_dev_count = 0;
559 b->def_uart_dev = 0;
560 if ((uart3 >= 0) && (platform_detected == PLATFORM_BANANA_PI)) {
561 b->def_uart_dev = b->uart_dev_count;
562 b->uart_dev[b->uart_dev_count].device_path = serialdev[uart3];
563 b->uart_dev[b->uart_dev_count].rx = 11;
564 b->uart_dev[b->uart_dev_count].tx = 13;
565 b->uart_dev_count++;
566 }
567 if ((uart4 >= 0) && (platform_detected == PLATFORM_BANANA_PRO)) {
568 b->def_uart_dev = b->uart_dev_count;
569 b->uart_dev[b->uart_dev_count].device_path = serialdev[uart4];
570 b->uart_dev[b->uart_dev_count].rx = 10;
571 b->uart_dev[b->uart_dev_count].tx = 8;
572 b->uart_dev_count++;
573 }
574 if (uart7 >= 0) {
575 b->uart_dev[b->uart_dev_count].device_path = serialdev[uart7];
576 if (platform_detected == PLATFORM_BANANA_PRO) {
577 b->uart_dev[b->uart_dev_count].rx = 31;
578 b->uart_dev[b->uart_dev_count].tx = 32;
579 } else {
580 b->uart_dev[b->uart_dev_count].rx = 30;
581 b->uart_dev[b->uart_dev_count].tx = 32;
582 }
583 b->uart_dev_count++;
584 }
585 if (uart2 >= 0) {
586 b->uart_dev[b->uart_dev_count].device_path = serialdev[uart2];
587 b->uart_dev[b->uart_dev_count].rx = 11;
588 b->uart_dev[b->uart_dev_count].tx = 13;
589 b->uart_dev_count++;
590 }
591 return b;
592 }
593