| /art/compiler/optimizing/ |
| D | intrinsics_mips.cc | 535 __ Addiu(TMP, in, -1); in GenNumberOfTrailingZeroes() local
2042 __ Addiu(TMP, TMP, 4); in VisitStringEquals() local
2043 __ Addiu(temp3, temp3, 4); in VisitStringEquals() local
2044 __ Addiu(temp1, temp1, -2); in VisitStringEquals() local
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| D | code_generator_mips64.cc | 1097 __ Addiu(dst, lhs, rhs_imm); in HandleBinaryOp() local
1110 __ Addiu(dst, lhs, -rhs_imm); in HandleBinaryOp() local
4147 __ Addiu(temp_reg, value_reg, -lower_bound); in VisitPackedSwitch() local
4162 __ Addiu(temp_reg, temp_reg, -2); in VisitPackedSwitch() local
4170 __ Addiu(temp_reg, temp_reg, -1); in VisitPackedSwitch() local
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| D | code_generator_mips.cc | 1220 __ Addiu(dst, lhs, rhs_imm); in HandleBinaryOp() local
1226 __ Addiu(dst, lhs, -rhs_imm); in HandleBinaryOp() local
1346 __ Addiu(dst_low, lhs_low, low); in HandleBinaryOp() local
1358 __ Addiu(dst_high, lhs_high, high); in HandleBinaryOp() local
5152 __ Addiu(temp_reg, temp_reg, -2); in VisitPackedSwitch() local
5160 __ Addiu(temp_reg, temp_reg, -1); in VisitPackedSwitch() local
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| D | intrinsics_mips64.cc | 1454 __ Addiu(temp1, temp1, -4); in VisitStringEquals() local
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| /art/compiler/utils/mips/ |
| D | assembler_mips.cc | 190 void MipsAssembler::Addiu(Register rt, Register rs, uint16_t imm16) { in Addiu() function in art::mips::MipsAssembler
1365 Addiu(rd, ZERO, value); in LoadConst32()
1461 Addiu(rt, rs, value); in Addiu32()
2052 Addiu(lhs, RA, offset); in EmitBranch()
2147 Addiu(lhs, lhs, Low16Bits(offset)); in EmitBranch()
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| D | assembler_mips_test.cc | 262 TEST_F(AssemblerMIPSTest, Addiu) { in TEST_F() argument
263 DriverStr(RepeatRRIb(&mips::MipsAssembler::Addiu, -16, "addiu ${reg1}, ${reg2}, {imm}"), "Addiu"); in TEST_F()
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| D | assembler_mips.h | 125 void Addiu(Register rt, Register rs, uint16_t imm16);
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| /art/compiler/utils/mips64/ |
| D | assembler_mips64.h | 123 void Addiu(GpuRegister rt, GpuRegister rs, uint16_t imm16);
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| D | assembler_mips64.cc | 183 void Mips64Assembler::Addiu(GpuRegister rt, GpuRegister rs, uint16_t imm16) { in Addiu() function in art::mips64::Mips64Assembler
1041 Addiu(rd, ZERO, value); in LoadConst32()
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