| /art/test/427-bitwise/src/ |
| D | Main.java | 45 expectEquals(1, $opt$And(5, 3)); in andInt()
46 expectEquals(0, $opt$And(0, 0)); in andInt()
47 expectEquals(0, $opt$And(0, 3)); in andInt()
48 expectEquals(0, $opt$And(3, 0)); in andInt()
49 expectEquals(1, $opt$And(1, -3)); in andInt()
50 expectEquals(-12, $opt$And(-12, -3)); in andInt()
66 expectEquals(1L, $opt$And(5L, 3L)); in andLong()
67 expectEquals(0L, $opt$And(0L, 0L)); in andLong()
68 expectEquals(0L, $opt$And(0L, 3L)); in andLong()
69 expectEquals(0L, $opt$And(3L, 0L)); in andLong()
[all …]
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| /art/compiler/optimizing/ |
| D | intrinsics_mips.cc | 286 __ And(TMP, out, AT); in GenReverse() local
289 __ And(out, out, AT); in GenReverse() local
297 __ And(TMP, out, AT); in GenReverse() local
300 __ And(out, out, AT); in GenReverse() local
303 __ And(TMP, out, AT); in GenReverse() local
306 __ And(out, out, AT); in GenReverse() local
309 __ And(TMP, out, AT); in GenReverse() local
312 __ And(out, out, AT); in GenReverse() local
345 __ And(out_hi, TMP, AT); in GenReverse() local
348 __ And(TMP, TMP, AT); in GenReverse() local
[all …]
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| D | code_generator_mips.cc | 1207 __ And(dst, lhs, rhs_reg); in HandleBinaryOp() local
1244 __ And(dst_low, lhs_low, rhs_low); in HandleBinaryOp() local
1245 __ And(dst_high, lhs_high, rhs_high); in HandleBinaryOp() local
1322 __ And(dst_low, lhs_low, TMP); in HandleBinaryOp() local
1332 __ And(dst_high, lhs_high, TMP); in HandleBinaryOp() local
4903 __ And(dst_high, dst_high, TMP); in VisitTypeConversion() local
4974 __ And(dst, dst, TMP); in VisitTypeConversion() local
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| D | code_generator_arm64.cc | 1734 __ And(dst, lhs, rhs); in HandleBinaryOp() local
1930 __ And(out, left, right_operand); in VisitArm64DataProcWithShifterOp() local
2570 __ And(out, out, abs_imm - 1); in DivRemByPowerOfTwo() local
5054 __ And(temp, temp, Operand(LockWord::kReadBarrierStateMask)); in GenerateReferenceLoadWithBakerReadBarrier() local
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| D | code_generator_mips64.cc | 1083 __ And(dst, lhs, rhs_reg); in HandleBinaryOp() local
3986 __ And(dst, dst, TMP); in VisitTypeConversion() local
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| D | nodes.h | 1192 M(And, BinaryOperation) \
4640 DECLARE_INSTRUCTION(And);
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| /art/test/020-string/ |
| D | expected.txt | 13 llo And
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| /art/test/800-smali/smali/ |
| D | b_22411633_1.smali | 30 # And test whether it's initialized by calling hashCode.
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| D | b_22881413.smali | 133 # And somewhere at the end
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| /art/tools/dexfuzz/ |
| D | README | 54 And also at least two of the following backends:
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| /art/compiler/utils/mips/ |
| D | assembler_mips_test.cc | 310 TEST_F(AssemblerMIPSTest, And) { in TEST_F() argument
311 DriverStr(RepeatRRR(&mips::MipsAssembler::And, "and ${reg1}, ${reg2}, ${reg3}"), "And"); in TEST_F()
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| D | assembler_mips.h | 145 void And(Register rd, Register rs, Register rt);
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| D | assembler_mips.cc | 282 void MipsAssembler::And(Register rd, Register rs, Register rt) { in And() function in art::mips::MipsAssembler
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| /art/compiler/utils/arm/ |
| D | assembler_arm32_test.cc | 723 TEST_F(AssemblerArm32Test, And) { in TEST_F() argument
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| /art/compiler/utils/mips64/ |
| D | assembler_mips64.h | 142 void And(GpuRegister rd, GpuRegister rs, GpuRegister rt);
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| D | assembler_mips64.cc | 251 void Mips64Assembler::And(GpuRegister rd, GpuRegister rs, GpuRegister rt) { in And() function in art::mips64::Mips64Assembler
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