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Searched refs:R10 (Results 1 – 10 of 10) sorted by relevance

/art/runtime/arch/x86_64/
Dregisters_x86_64.h40 R10 = 10, enumerator
Dcontext_x86_64.cc72 gprs_[R10] = nullptr; in SmashCallerSaves()
/art/compiler/utils/x86_64/
Dassembler_x86_64_test.cc155 registers_.push_back(new x86_64::CpuRegister(x86_64::R10)); in SetUpHelpers()
172 secondary_register_names_.emplace(x86_64::CpuRegister(x86_64::R10), "r10d"); in SetUpHelpers()
189 tertiary_register_names_.emplace(x86_64::CpuRegister(x86_64::R10), "r10w"); in SetUpHelpers()
206 quaternary_register_names_.emplace(x86_64::CpuRegister(x86_64::R10), "r10b"); in SetUpHelpers()
1267 GetAssembler()->bsfl(x86_64::CpuRegister(x86_64::R10), x86_64::Address( in TEST_F()
1270 x86_64::CpuRegister(x86_64::R10), x86_64::CpuRegister(x86_64::RBX), x86_64::TIMES_4, 12)); in TEST_F()
1286 GetAssembler()->bsfq(x86_64::CpuRegister(x86_64::R10), x86_64::Address( in TEST_F()
1289 x86_64::CpuRegister(x86_64::R10), x86_64::CpuRegister(x86_64::RBX), x86_64::TIMES_4, 12)); in TEST_F()
1305 GetAssembler()->bsrl(x86_64::CpuRegister(x86_64::R10), x86_64::Address( in TEST_F()
1308 x86_64::CpuRegister(x86_64::R10), x86_64::CpuRegister(x86_64::RBX), x86_64::TIMES_4, 12)); in TEST_F()
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/art/runtime/arch/arm/
Dregisters_arm.h37 R10 = 10, enumerator
Dquick_method_frame_info_arm.h32 (1 << art::arm::R10) | (1 << art::arm::R11);
/art/compiler/jni/quick/arm/
Dcalling_convention_arm.cc231 callee_save_regs_.push_back(ArmManagedRegister::FromCoreRegister(R10)); in ArmJniCallingConvention()
242 result = 1 << R5 | 1 << R6 | 1 << R7 | 1 << R8 | 1 << R10 | 1 << R11 | 1 << LR; in CoreSpillMask()
/art/compiler/utils/arm/
Dassembler_arm32_test.cc93 new arm::Register(arm::R10), in SetUpHelpers()
155 shifter_operands_.push_back(arm::ShifterOperand(arm::R10)); in SetUpHelpers()
Dassembler_thumb2_test.cc59 new arm::Register(arm::R10), in SetUpHelpers()
/art/compiler/utils/
Dassembler_thumb_test.cc949 __ mul(R8, R9, R10); in TEST_F()
958 __ umull(R8, R9, R10, R11); in TEST_F()
965 __ sdiv(R8, R9, R10); in TEST_F()
968 __ udiv(R8, R9, R10); in TEST_F()
/art/compiler/optimizing/
Dcode_generator_arm.cc52 { R5, R6, R7, R8, R10, R11, LR };