Searched refs:SET_VREG (Results 1 – 25 of 174) sorted by relevance
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/art/runtime/interpreter/mterp/x86/ |
D | bindivLit8.S | 17 SET_VREG %eax, rINST 24 SET_VREG $result, rINST
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D | bindivLit16.S | 20 SET_VREG %eax, rINST 27 SET_VREG $result, rINST
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D | bindiv2addr.S | 20 SET_VREG $result, rINST 27 SET_VREG $result, rINST
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D | op_const_16.S | 3 SET_VREG %ecx, rINST # vAA <- ssssBBBB
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D | op_const.S | 3 SET_VREG %eax, rINST # vAA<- eax
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D | op_const_high16.S | 4 SET_VREG %eax, rINST # vAA <- eax
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D | op_const_4.S | 6 SET_VREG %eax, rINST
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D | op_const_wide.S | 5 SET_VREG %eax, %ecx
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D | unop.S | 12 SET_VREG %eax, %ecx
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/art/runtime/interpreter/mterp/out/ |
D | mterp_arm64.S | 257 .macro SET_VREG reg, vreg macro 395 SET_VREG w2, w0 // fp[A]<- x2 413 SET_VREG w2, w0 // fp[AA]<- r2 431 SET_VREG w2, w0 // fp[AAAA]<- w2 492 SET_VREG w2, w0 // fp[A]<- x2 512 SET_VREG w2, w0 // fp[AA]<- r2 532 SET_VREG w2, w0 // fp[AAAA]<- w2 551 SET_VREG w0, w2 // fp[AA]<- r0 584 SET_VREG w0, w2 // fp[AA]<- r0 703 SET_VREG w1, w0 // fp[A]<- w1 [all …]
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/art/runtime/interpreter/mterp/x86_64/ |
D | op_const_16.S | 3 SET_VREG %ecx, rINSTq # vAA <- ssssBBBB
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D | op_const.S | 3 SET_VREG %eax, rINSTq # vAA<- eax
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D | op_const_high16.S | 4 SET_VREG %eax, rINSTq # vAA <- eax
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D | op_const_4.S | 6 SET_VREG %eax, rINSTq
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/art/runtime/interpreter/mterp/arm64/ |
D | op_const_16.S | 5 SET_VREG w0, w3 // vAA<- w0
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D | op_const_high16.S | 6 SET_VREG w0, w3 // vAA<- r0
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D | op_const_4.S | 7 SET_VREG w1, w0 // fp[A]<- w1
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D | unop.S | 18 SET_VREG w0, w9 // vAA<- w0
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D | op_move_16.S | 12 SET_VREG w2, w0 // fp[AAAA]<- w2
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D | op_move_from16.S | 12 SET_VREG w2, w0 // fp[AA]<- r2
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D | op_const.S | 8 SET_VREG w0, w3 // vAA<- w0
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D | funopNarrow.S | 17 SET_VREG $tgtreg, w4 // vA<- d0
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D | op_move.S | 12 SET_VREG w2, w0 // fp[A]<- x2
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D | funopNarrower.S | 16 SET_VREG $tgtreg, w4 // vA<- d0
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/art/runtime/interpreter/mterp/mips64/ |
D | fcvtFooter.S | 17 SET_VREG$suffix $valreg, a1
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