Searched refs:andq (Results 1 – 6 of 6) sorted by relevance
| /art/compiler/utils/x86_64/ |
| D | assembler_x86_64.h | 532 void andq(CpuRegister dst, const Immediate& imm);
533 void andq(CpuRegister dst, CpuRegister src);
534 void andq(CpuRegister reg, const Address& address);
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| D | assembler_x86_64_test.cc | 632 DriverStr(RepeatRR(&x86_64::X86_64Assembler::andq, "andq %{reg2}, %{reg1}"), "andq"); in TEST_F()
636 DriverStr(RepeatRI(&x86_64::X86_64Assembler::andq, 4U /* andq only supports 32b imm */, in TEST_F()
937 GetAssembler()->andq(x86_64::CpuRegister(x86_64::R9), in TEST_F()
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| D | assembler_x86_64.cc | 1405 void X86_64Assembler::andq(CpuRegister reg, const Immediate& imm) { in andq() function in art::x86_64::X86_64Assembler
1413 void X86_64Assembler::andq(CpuRegister dst, CpuRegister src) { in andq() function in art::x86_64::X86_64Assembler
1421 void X86_64Assembler::andq(CpuRegister dst, const Address& src) { in andq() function in art::x86_64::X86_64Assembler
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| /art/compiler/optimizing/ |
| D | intrinsics_x86_64.cc | 2355 __ andq(temp, temp_mask); in SwapBits64() local
2356 __ andq(reg, temp_mask); in SwapBits64() local
2537 __ andq(out, tmp); in GenOneBit() local
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| D | code_generator_x86_64.cc | 6133 __ andq(first_reg, Immediate(static_cast<int32_t>(value))); in HandleBitwiseOperation() local
6135 __ andq(first_reg, codegen_->LiteralInt64Address(value)); in HandleBitwiseOperation() local
6138 __ andq(first_reg, Address(CpuRegister(RSP), second.GetStackIndex())); in HandleBitwiseOperation() local
6140 __ andq(first_reg, second.AsRegister<CpuRegister>()); in HandleBitwiseOperation() local
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| /art/runtime/interpreter/mterp/out/ |
| D | mterp_x86_64.S | 4135 andq (rFP,%rcx,4), %rax # ex: addq (rFP,%rcx,4),%rax
4846 andq %rax, (rFP,%rcx,4) # for ex: addq %rax,(rFP,%rcx,4)
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