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Searched refs:dreg (Results 1 – 8 of 8) sorted by relevance

/art/runtime/arch/mips64/
Dasm_support_mips64.S88 .macro MINint dreg,rreg,sreg,creg
91 .ifc \dreg, \rreg
92 selnez \dreg, \rreg, \creg
95 seleqz \dreg, \sreg, \creg
98 or \dreg, \dreg, \creg
103 .macro MINs dreg,rreg,sreg
107 MINint \dreg, \rreg, \sreg, $at
112 .macro MINu dreg,rreg,sreg
116 MINint \dreg, \rreg, \sreg, $at
/art/runtime/arch/mips/
Dasm_support_mips.S134 .macro MINint dreg,rreg,sreg,creg
138 .ifc \dreg, \rreg
139 selnez \dreg, \rreg, \creg
142 seleqz \dreg, \sreg, \creg
145 or \dreg, \dreg, \creg
147 movn \dreg, \rreg, \creg
148 movz \dreg, \sreg, \creg
154 .macro MINs dreg,rreg,sreg
158 MINint \dreg, \rreg, \sreg, $at
163 .macro MINu dreg,rreg,sreg
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/art/runtime/interpreter/mterp/arm64/
Dheader.S165 .macro PREFETCH_ADVANCE_INST dreg, sreg, count
166 ldrh \dreg, [\sreg, #((\count)*2)]!
/art/runtime/interpreter/mterp/arm/
Dheader.S168 .macro PREFETCH_ADVANCE_INST dreg, sreg, count
169 ldrh \dreg, [\sreg, #((\count)*2)]!
/art/compiler/utils/arm64/
Dmanaged_register_arm64_test.cc220 Arm64ManagedRegister dreg = Arm64ManagedRegister::FromDRegister(D0); in TEST() local
226 EXPECT_TRUE(reg.Overlaps(dreg)); in TEST()
232 dreg = Arm64ManagedRegister::FromDRegister(D5); in TEST()
238 EXPECT_TRUE(reg.Overlaps(dreg)); in TEST()
244 dreg = Arm64ManagedRegister::FromDRegister(D7); in TEST()
250 EXPECT_TRUE(reg.Overlaps(dreg)); in TEST()
256 dreg = Arm64ManagedRegister::FromDRegister(D31); in TEST()
262 EXPECT_TRUE(reg.Overlaps(dreg)); in TEST()
/art/runtime/interpreter/mterp/mips/
Dheader.S257 #define GET_PREFETCHED_OPCODE(dreg, sreg) andi dreg, sreg, 255 argument
/art/runtime/interpreter/mterp/out/
Dmterp_arm64.S172 .macro PREFETCH_ADVANCE_INST dreg, sreg, count
173 ldrh \dreg, [\sreg, #((\count)*2)]!
Dmterp_arm.S175 .macro PREFETCH_ADVANCE_INST dreg, sreg, count
176 ldrh \dreg, [\sreg, #((\count)*2)]!