Searched refs:maybe_temp (Results 1 – 8 of 8) sorted by relevance
| /art/compiler/optimizing/ |
| D | code_generator_x86_64.h | 238 Location maybe_temp);
253 Location maybe_temp);
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| D | code_generator_arm.h | 251 Location maybe_temp);
266 Location maybe_temp);
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| D | code_generator_x86.h | 243 Location maybe_temp);
258 Location maybe_temp);
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| D | code_generator_arm64.h | 235 Location maybe_temp);
250 Location maybe_temp);
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| D | code_generator_arm.cc | 5966 Location maybe_temp) { in GenerateReferenceLoadOneRegister() argument
5969 DCHECK(maybe_temp.IsRegister()) << maybe_temp; in GenerateReferenceLoadOneRegister()
5974 instruction, out, out_reg, offset, maybe_temp, /* needs_null_check */ false); in GenerateReferenceLoadOneRegister()
5980 __ Mov(maybe_temp.AsRegister<Register>(), out_reg); in GenerateReferenceLoadOneRegister()
5983 codegen_->GenerateReadBarrierSlow(instruction, out, out, maybe_temp, offset); in GenerateReferenceLoadOneRegister()
5997 Location maybe_temp) { in GenerateReferenceLoadTwoRegisters() argument
6002 DCHECK(maybe_temp.IsRegister()) << maybe_temp; in GenerateReferenceLoadTwoRegisters()
6006 instruction, out, obj_reg, offset, maybe_temp, /* needs_null_check */ false); in GenerateReferenceLoadTwoRegisters()
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| D | code_generator_x86_64.cc | 6174 Location maybe_temp) { in GenerateReferenceLoadOneRegister() argument
6177 DCHECK(maybe_temp.IsRegister()) << maybe_temp; in GenerateReferenceLoadOneRegister()
6182 instruction, out, out_reg, offset, maybe_temp, /* needs_null_check */ false); in GenerateReferenceLoadOneRegister()
6188 __ movl(maybe_temp.AsRegister<CpuRegister>(), out_reg); in GenerateReferenceLoadOneRegister()
6191 codegen_->GenerateReadBarrierSlow(instruction, out, out, maybe_temp, offset); in GenerateReferenceLoadOneRegister()
6205 Location maybe_temp) { in GenerateReferenceLoadTwoRegisters() argument
6210 DCHECK(maybe_temp.IsRegister()) << maybe_temp; in GenerateReferenceLoadTwoRegisters()
6214 instruction, out, obj_reg, offset, maybe_temp, /* needs_null_check */ false); in GenerateReferenceLoadTwoRegisters()
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| D | code_generator_x86.cc | 6711 Location maybe_temp) { in GenerateReferenceLoadOneRegister() argument
6714 DCHECK(maybe_temp.IsRegister()) << maybe_temp; in GenerateReferenceLoadOneRegister()
6719 instruction, out, out_reg, offset, maybe_temp, /* needs_null_check */ false); in GenerateReferenceLoadOneRegister()
6725 __ movl(maybe_temp.AsRegister<Register>(), out_reg); in GenerateReferenceLoadOneRegister()
6728 codegen_->GenerateReadBarrierSlow(instruction, out, out, maybe_temp, offset); in GenerateReferenceLoadOneRegister()
6742 Location maybe_temp) { in GenerateReferenceLoadTwoRegisters() argument
6747 DCHECK(maybe_temp.IsRegister()) << maybe_temp; in GenerateReferenceLoadTwoRegisters()
6751 instruction, out, obj_reg, offset, maybe_temp, /* needs_null_check */ false); in GenerateReferenceLoadTwoRegisters()
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| D | code_generator_arm64.cc | 4826 Location maybe_temp) { in GenerateReferenceLoadOneRegister() argument
4830 Register temp_reg = RegisterFrom(maybe_temp, type); in GenerateReferenceLoadOneRegister()
4849 codegen_->GenerateReadBarrierSlow(instruction, out, out, maybe_temp, offset); in GenerateReferenceLoadOneRegister()
4863 Location maybe_temp) { in GenerateReferenceLoadTwoRegisters() argument
4870 Register temp_reg = RegisterFrom(maybe_temp, type); in GenerateReferenceLoadTwoRegisters()
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