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Searched refs:temp_reg (Results 1 – 7 of 7) sorted by relevance

/art/runtime/arch/x86/
Dquick_entrypoints_x86.S27 MACRO2(SETUP_SAVE_ALL_CALLEE_SAVE_FRAME, got_reg, temp_reg)
35 movl SYMBOL(_ZN3art7Runtime9instance_E)@GOT(REG_VAR(got_reg)), REG_VAR(temp_reg)
36 movl (REG_VAR(temp_reg)), REG_VAR(temp_reg)
38 pushl RUNTIME_SAVE_ALL_CALLEE_SAVE_FRAME_OFFSET(REG_VAR(temp_reg))
53 MACRO2(SETUP_REFS_ONLY_CALLEE_SAVE_FRAME, got_reg, temp_reg)
61 movl SYMBOL(_ZN3art7Runtime9instance_E)@GOT(REG_VAR(got_reg)), REG_VAR(temp_reg)
62 movl (REG_VAR(temp_reg)), REG_VAR(temp_reg)
64 pushl RUNTIME_REFS_ONLY_CALLEE_SAVE_FRAME_OFFSET(REG_VAR(temp_reg))
81 MACRO2(SETUP_REFS_ONLY_CALLEE_SAVE_FRAME_PRESERVE_GOT_REG, got_reg, temp_reg)
91 movl SYMBOL(_ZN3art7Runtime9instance_E)@GOT(REG_VAR(got_reg)), REG_VAR(temp_reg)
[all …]
/art/compiler/optimizing/
Dcode_generator_x86.cc3910 Register temp_reg = locations->GetTemp(0).AsRegister<Register>(); in VisitRor() local
3914 __ movl(temp_reg, first_reg_hi); in VisitRor()
3916 __ shrd(first_reg_lo, temp_reg, second_reg); in VisitRor()
3917 __ movl(temp_reg, first_reg_hi); in VisitRor()
3920 __ cmovl(kNotEqual, first_reg_lo, temp_reg); in VisitRor()
3929 __ movl(temp_reg, first_reg_lo); in VisitRor()
3931 __ movl(first_reg_hi, temp_reg); in VisitRor()
3937 __ movl(temp_reg, first_reg_lo); in VisitRor()
3943 __ shrd(first_reg_hi, temp_reg, imm); in VisitRor()
3947 __ movl(temp_reg, first_reg_lo); in VisitRor()
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Dcode_generator_mips64.cc4145 GpuRegister temp_reg = TMP; in VisitPackedSwitch() local
4147 __ Addiu(temp_reg, value_reg, -lower_bound); in VisitPackedSwitch()
4150 __ Addu(temp_reg, value_reg, AT); in VisitPackedSwitch()
4155 __ Bltzc(temp_reg, codegen_->GetLabelOf(default_block)); in VisitPackedSwitch()
4159 __ Beqzc(temp_reg, codegen_->GetLabelOf(successors[0])); in VisitPackedSwitch()
4162 __ Addiu(temp_reg, temp_reg, -2); in VisitPackedSwitch()
4164 __ Bltzc(temp_reg, codegen_->GetLabelOf(successors[last_index + 1])); in VisitPackedSwitch()
4166 __ Beqzc(temp_reg, codegen_->GetLabelOf(successors[last_index + 2])); in VisitPackedSwitch()
4170 __ Addiu(temp_reg, temp_reg, -1); in VisitPackedSwitch()
4171 __ Beqzc(temp_reg, codegen_->GetLabelOf(successors[last_index + 1])); in VisitPackedSwitch()
Dcode_generator_arm.cc6134 Register temp_reg = temp.AsRegister<Register>(); in GenerateReferenceLoadWithBakerReadBarrier() local
6138 __ LoadFromOffset(kLoadWord, temp_reg, obj, monitor_offset); in GenerateReferenceLoadWithBakerReadBarrier()
6146 __ Lsr(temp_reg, temp_reg, LockWord::kReadBarrierStateShift); in GenerateReferenceLoadWithBakerReadBarrier()
6147 __ and_(temp_reg, temp_reg, ShifterOperand(LockWord::kReadBarrierStateMask)); in GenerateReferenceLoadWithBakerReadBarrier()
6156 __ bic(IP, temp_reg, ShifterOperand(LockWord::kReadBarrierStateMask)); in GenerateReferenceLoadWithBakerReadBarrier()
6191 __ cmp(temp_reg, ShifterOperand(ReadBarrier::gray_ptr_)); in GenerateReferenceLoadWithBakerReadBarrier()
6653 Register temp_reg = IP; in VisitPackedSwitch() local
6658 __ AddConstantSetFlags(temp_reg, value_reg, -lower_bound); in VisitPackedSwitch()
6665 __ AddConstantSetFlags(temp_reg, temp_reg, -2); in VisitPackedSwitch()
6673 __ CmpConstant(temp_reg, 1); in VisitPackedSwitch()
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Dcode_generator_mips.cc5140 Register temp_reg = TMP; in VisitPackedSwitch() local
5141 __ Addiu32(temp_reg, value_reg, -lower_bound); in VisitPackedSwitch()
5145 __ Bltz(temp_reg, codegen_->GetLabelOf(default_block)); in VisitPackedSwitch()
5149 __ Beqz(temp_reg, codegen_->GetLabelOf(successors[0])); in VisitPackedSwitch()
5152 __ Addiu(temp_reg, temp_reg, -2); in VisitPackedSwitch()
5154 __ Bltz(temp_reg, codegen_->GetLabelOf(successors[last_index + 1])); in VisitPackedSwitch()
5156 __ Beqz(temp_reg, codegen_->GetLabelOf(successors[last_index + 2])); in VisitPackedSwitch()
5160 __ Addiu(temp_reg, temp_reg, -1); in VisitPackedSwitch()
5161 __ Beqz(temp_reg, codegen_->GetLabelOf(successors[last_index + 1])); in VisitPackedSwitch()
Dcode_generator_x86_64.cc6356 CpuRegister temp_reg = temp.AsRegister<CpuRegister>(); in GenerateReferenceLoadWithBakerReadBarrier() local
6360 __ movl(temp_reg, Address(obj, monitor_offset)); in GenerateReferenceLoadWithBakerReadBarrier()
6368 __ shrl(temp_reg, Immediate(LockWord::kReadBarrierStateShift)); in GenerateReferenceLoadWithBakerReadBarrier()
6369 __ andl(temp_reg, Immediate(LockWord::kReadBarrierStateMask)); in GenerateReferenceLoadWithBakerReadBarrier()
6392 __ cmpl(temp_reg, Immediate(ReadBarrier::gray_ptr_)); in GenerateReferenceLoadWithBakerReadBarrier()
6483 CpuRegister temp_reg = locations->GetTemp(0).AsRegister<CpuRegister>(); in VisitPackedSwitch() local
6536 __ leal(temp_reg, Address(value_reg_in, -lower_bound)); in VisitPackedSwitch()
6537 value_reg_out = temp_reg.AsRegister(); in VisitPackedSwitch()
6550 __ movsxd(temp_reg, Address(base_reg, value_reg, TIMES_4, 0)); in VisitPackedSwitch()
6553 __ addq(temp_reg, base_reg); in VisitPackedSwitch()
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Dcode_generator_arm64.cc4830 Register temp_reg = RegisterFrom(maybe_temp, type); in GenerateReferenceLoadOneRegister() local
4838 temp_reg, in GenerateReferenceLoadOneRegister()
4846 __ Mov(temp_reg, out_reg); in GenerateReferenceLoadOneRegister()
4870 Register temp_reg = RegisterFrom(maybe_temp, type); in GenerateReferenceLoadTwoRegisters() local
4876 temp_reg, in GenerateReferenceLoadTwoRegisters()