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Searched refs:t0 (Results 1 – 25 of 219) sorted by relevance

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/bionic/libc/arch-mips/string/
Dstrcmp.S93 or t0, a0, a1
94 andi t0,0x3
95 bne t0, zero, L(byteloop)
107 subu t0, v0, t8; \
110 and t0, t0, t1; \
111 bne t0, zero, L(returnzero)
139 subu t0, v0, t8
141 and t1, t0, t1
142 xor t0, v0, v1
143 or t0, t0, t1
[all …]
/bionic/libc/tzcode/
Ddifftime.c25 double t1 = time1, t0 = time0; in difftime() local
26 return t1 - t0; in difftime()
38 uintmax_t t1 = time1, t0 = time0; in difftime() local
39 return time0 <= time1 ? t1 - t0 : dminus(t0 - t1); in difftime()
55 long double t1 = time1, t0 = time0; in difftime() local
56 return t1 - t0; in difftime()
/bionic/libc/arch-mips64/bionic/
Dsetjmp.S199 li t0, ~7
200 and a0, t0 # round jmpbuf addr DOWN to 8-byte boundary
211 andi t0, v0, 1 # extract savesigs flag
213 beqz t0, 1f # do saving of signal mask?
224 REG_L t0, SC_FLAG_OFFSET(a0) # move cookie to temp reg
230 m_mangle_reg_and_store ra, t0, t1, SC_REGS+0*REGSZ(a0)
231 m_mangle_reg_and_store s0, t0, t2, SC_REGS+1*REGSZ(a0)
232 m_mangle_reg_and_store s1, t0, t3, SC_REGS+2*REGSZ(a0)
233 m_mangle_reg_and_store s2, t0, t1, SC_REGS+3*REGSZ(a0)
234 m_mangle_reg_and_store s3, t0, t2, SC_REGS+4*REGSZ(a0)
[all …]
D__bionic_clone.S53 PTR_L t0,FRAMESZ+5*REGSZ(sp) # fn
55 PTR_S t0,FRAME_FN(a1) # fn
58 PTR_L t0,FRAME_GP(sp) # copy gp to child stack
59 PTR_S t0,FRAME_GP(a1)
/bionic/libc/arch-mips/bionic/
Dsetjmp.S199 li t0, ~7
200 and a0, t0 # round jmpbuf addr DOWN to 8-byte boundary
211 andi t0, v0, 1 # extract savesigs flag
213 beqz t0, 1f # do saving of signal mask?
224 REG_L t0, SC_FLAG_OFFSET(a0) # move cookie to temp reg
230 m_mangle_reg_and_store ra, t0, t1, SC_REGS+0*REGSZ(a0)
231 m_mangle_reg_and_store s0, t0, t2, SC_REGS+1*REGSZ(a0)
232 m_mangle_reg_and_store s1, t0, t3, SC_REGS+2*REGSZ(a0)
233 m_mangle_reg_and_store s2, t0, t1, SC_REGS+3*REGSZ(a0)
234 m_mangle_reg_and_store s3, t0, t2, SC_REGS+4*REGSZ(a0)
[all …]
/bionic/linker/arch/mips/
Dbegin.S45 la $t0, 1f
47 1: subu $t0, $ra, $t0
54 addu $t1, $t0
63 addu $s0, $t0
90 addu $t1, $t0
/bionic/linker/arch/mips64/
Dbegin.S64 LA t0, 1b
65 PTR_SUBU t0, ra, t0
72 PTR_ADDU t1, t0
81 PTR_ADDU s0, t0
107 PTR_ADDU t1, t0
/bionic/libc/arch-mips64/syscalls/
Dmadvise.S15 move t0, ra
23 move ra, t0
Dmkdirat.S15 move t0, ra
23 move ra, t0
Dmknodat.S15 move t0, ra
23 move ra, t0
Dmprotect.S15 move t0, ra
23 move ra, t0
Dmsync.S15 move t0, ra
23 move ra, t0
Drecvmmsg.S15 move t0, ra
23 move ra, t0
Dsched_getscheduler.S15 move t0, ra
23 move ra, t0
Dsched_rr_get_interval.S15 move t0, ra
23 move ra, t0
Dsched_setaffinity.S15 move t0, ra
23 move ra, t0
Dllistxattr.S15 move t0, ra
23 move ra, t0
Dlremovexattr.S15 move t0, ra
23 move ra, t0
Dlsetxattr.S15 move t0, ra
23 move ra, t0
Dmincore.S15 move t0, ra
23 move ra, t0
Dmlock.S15 move t0, ra
23 move ra, t0
Dmlockall.S15 move t0, ra
23 move ra, t0
Dmount.S15 move t0, ra
23 move ra, t0
Dmunlock.S15 move t0, ra
23 move ra, t0
Dmunlockall.S15 move t0, ra
23 move ra, t0

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