1 /* $OpenBSD: ieee.h,v 1.1 2004/02/01 05:09:49 drahn Exp $ */ 2 /* $NetBSD: ieee.h,v 1.2 2001/02/21 17:43:50 bjh21 Exp $ */ 3 4 /* 5 * Copyright (c) 1992, 1993 6 * The Regents of the University of California. All rights reserved. 7 * 8 * This software was developed by the Computer Systems Engineering group 9 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 10 * contributed to Berkeley. 11 * 12 * All advertising materials mentioning features or use of this software 13 * must display the following acknowledgement: 14 * This product includes software developed by the University of 15 * California, Lawrence Berkeley Laboratory. 16 * 17 * Redistribution and use in source and binary forms, with or without 18 * modification, are permitted provided that the following conditions 19 * are met: 20 * 1. Redistributions of source code must retain the above copyright 21 * notice, this list of conditions and the following disclaimer. 22 * 2. Redistributions in binary form must reproduce the above copyright 23 * notice, this list of conditions and the following disclaimer in the 24 * documentation and/or other materials provided with the distribution. 25 * 3. All advertising materials mentioning features or use of this software 26 * must display the following acknowledgement: 27 * This product includes software developed by the University of 28 * California, Berkeley and its contributors. 29 * 4. Neither the name of the University nor the names of its contributors 30 * may be used to endorse or promote products derived from this software 31 * without specific prior written permission. 32 * 33 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 34 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 35 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 36 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 37 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 38 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 39 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 40 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 41 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 42 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 43 * SUCH DAMAGE. 44 * 45 * @(#)ieee.h 8.1 (Berkeley) 6/11/93 46 */ 47 48 /* 49 * ieee.h defines the machine-dependent layout of the machine's IEEE 50 * floating point. 51 */ 52 53 /* 54 * Define the number of bits in each fraction and exponent. 55 * 56 * k k+1 57 * Note that 1.0 x 2 == 0.1 x 2 and that denorms are represented 58 * 59 * (-exp_bias+1) 60 * as fractions that look like 0.fffff x 2 . This means that 61 * 62 * -126 63 * the number 0.10000 x 2 , for instance, is the same as the normalized 64 * 65 * -127 -128 66 * float 1.0 x 2 . Thus, to represent 2 , we need one leading zero 67 * 68 * -129 69 * in the fraction; to represent 2 , we need two, and so on. This 70 * 71 * (-exp_bias-fracbits+1) 72 * implies that the smallest denormalized number is 2 73 * 74 * for whichever format we are talking about: for single precision, for 75 * 76 * -126 -149 77 * instance, we get .00000000000000000000001 x 2 , or 1.0 x 2 , and 78 * 79 * -149 == -127 - 23 + 1. 80 */ 81 82 /* 83 * The ARM has two sets of FP data formats. The FPA supports 32-bit, 64-bit 84 * and 96-bit IEEE formats, with the words in big-endian order. VFP supports 85 * 32-bin and 64-bit IEEE formats with the words in the CPU's native byte 86 * order. 87 * 88 * The FPA also has two packed decimal formats, but we ignore them here. 89 */ 90 91 #define SNG_EXPBITS 8 92 #define SNG_FRACBITS 23 93 94 #define DBL_EXPBITS 11 95 #define DBL_FRACBITS 52 96 97 #ifndef __VFP_FP__ 98 #define E80_EXPBITS 15 99 #define E80_FRACBITS 64 100 101 #define EXT_EXPBITS 15 102 #define EXT_FRACBITS 112 103 #endif 104 105 struct ieee_single { 106 u_int sng_frac:23; 107 u_int sng_exponent:8; 108 u_int sng_sign:1; 109 }; 110 111 #ifdef __VFP_FP__ 112 struct ieee_double { 113 #ifdef __ARMEB__ 114 u_int dbl_sign:1; 115 u_int dbl_exp:11; 116 u_int dbl_frach:20; 117 u_int dbl_fracl; 118 #else /* !__ARMEB__ */ 119 u_int dbl_fracl; 120 u_int dbl_frach:20; 121 u_int dbl_exp:11; 122 u_int dbl_sign:1; 123 #endif /* !__ARMEB__ */ 124 }; 125 #else /* !__VFP_FP__ */ 126 struct ieee_double { 127 u_int dbl_frach:20; 128 u_int dbl_exp:11; 129 u_int dbl_sign:1; 130 u_int dbl_fracl; 131 }; 132 133 union ieee_double_u { 134 double dblu_d; 135 struct ieee_double dblu_dbl; 136 }; 137 138 139 struct ieee_e80 { 140 u_int e80_exp:15; 141 u_int e80_zero:16; 142 u_int e80_sign:1; 143 u_int e80_frach:31; 144 u_int e80_j:1; 145 u_int e80_fracl; 146 }; 147 148 struct ieee_ext { 149 u_int ext_frach:16; 150 u_int ext_exp:15; 151 u_int ext_sign:1; 152 u_int ext_frachm; 153 u_int ext_fraclm; 154 u_int ext_fracl; 155 }; 156 #endif /* !__VFP_FP__ */ 157 158 /* 159 * Floats whose exponent is in [1..INFNAN) (of whatever type) are 160 * `normal'. Floats whose exponent is INFNAN are either Inf or NaN. 161 * Floats whose exponent is zero are either zero (iff all fraction 162 * bits are zero) or subnormal values. 163 * 164 * A NaN is a `signalling NaN' if its QUIETNAN bit is clear in its 165 * high fraction; if the bit is set, it is a `quiet NaN'. 166 */ 167 #define SNG_EXP_INFNAN 255 168 #define DBL_EXP_INFNAN 2047 169 #ifndef __VFP_FP__ 170 #define E80_EXP_INFNAN 32767 171 #define EXT_EXP_INFNAN 32767 172 #endif /* !__VFP_FP__ */ 173 174 #if 0 175 #define SNG_QUIETNAN (1 << 22) 176 #define DBL_QUIETNAN (1 << 19) 177 #ifndef __VFP_FP__ 178 #define E80_QUIETNAN (1 << 15) 179 #define EXT_QUIETNAN (1 << 15) 180 #endif /* !__VFP_FP__ */ 181 #endif 182 183 /* 184 * Exponent biases. 185 */ 186 #define SNG_EXP_BIAS 127 187 #define DBL_EXP_BIAS 1023 188 #ifndef __VFP_FP__ 189 #define E80_EXP_BIAS 16383 190 #define EXT_EXP_BIAS 16383 191 #endif /* !__VFP_FP__ */ 192