Searched refs:AddrBaseReg (Results 1 – 11 of 11) sorted by relevance
| /external/llvm/lib/Target/X86/ |
| D | X86OptimizeLEAs.cpp | 148 if (TII->getRegClass(Desc, MemOpNo + X86::AddrBaseReg, TRI, *MF) != in chooseBestLEA()
198 static const int IdenticalOpNums[] = {X86::AddrBaseReg, X86::AddrScaleAmt, in isSimilarMemOp()
282 MI.getOperand(MemOpNo + X86::AddrBaseReg) in removeRedundantAddrCalc()
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| D | X86AsmPrinter.cpp | 245 const MachineOperand &BaseReg = MI->getOperand(Op+X86::AddrBaseReg); in printLeaMemReference()
281 printOperand(P, MI, Op+X86::AddrBaseReg, O, Modifier); in printLeaMemReference()
310 const MachineOperand &BaseReg = MI->getOperand(Op+X86::AddrBaseReg); in printIntelMemReference()
326 printOperand(P, MI, Op+X86::AddrBaseReg, O, Modifier, AsmVariant); in printIntelMemReference()
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| D | X86CallFrameOptimization.cpp | 379 if (!I->getOperand(X86::AddrBaseReg).isReg() || in collectCallInfo()
380 (I->getOperand(X86::AddrBaseReg).getReg() != StackPtr) || in collectCallInfo()
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| D | X86FixupLEAs.cpp | 245 unsigned SrcReg = LEA->getOperand(1 + X86::AddrBaseReg).getReg(); in isLEASimpleIncOrDec()
299 MachineOperand &p = MI->getOperand(AddrOffset + X86::AddrBaseReg); in processInstruction()
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| D | X86InstrInfo.h | 126 MI->getOperand(Op+X86::AddrBaseReg).isReg() && in isLeaMem()
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| D | X86MCInstLower.cpp | 360 Inst.getOperand(AddrBase + X86::AddrBaseReg).isReg() && in SimplifyShortMoveForm()
385 (Inst.getOperand(AddrBase + X86::AddrBaseReg).getReg() != 0 || in SimplifyShortMoveForm()
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| D | X86InstrInfo.cpp | 2145 if (MI->getOperand(Op+X86::AddrBaseReg).isFI() && in isFrameOperand()
2152 FrameIndex = MI->getOperand(Op+X86::AddrBaseReg).getIndex(); in isFrameOperand()
2349 if (MI->getOperand(1+X86::AddrBaseReg).isReg() && in isReallyTriviallyReMaterializable()
2354 unsigned BaseReg = MI->getOperand(1+X86::AddrBaseReg).getReg(); in isReallyTriviallyReMaterializable()
2374 if (!MI->getOperand(1+X86::AddrBaseReg).isReg()) in isReallyTriviallyReMaterializable()
2376 unsigned BaseReg = MI->getOperand(1+X86::AddrBaseReg).getReg(); in isReallyTriviallyReMaterializable()
4589 BaseReg = MemOp->getOperand(MemRefBegin + X86::AddrBaseReg).getReg(); in getMemOpBaseRegImmOfs()
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| /external/llvm/lib/Target/X86/InstPrinter/ |
| D | X86IntelInstPrinter.cpp | 159 const MCOperand &BaseReg = MI->getOperand(Op+X86::AddrBaseReg); in printMemReference()
175 printOperand(MI, Op+X86::AddrBaseReg, O); in printMemReference()
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| D | X86ATTInstPrinter.cpp | 189 const MCOperand &BaseReg = MI->getOperand(Op + X86::AddrBaseReg); in printMemReference()
214 printOperand(MI, Op + X86::AddrBaseReg, O); in printMemReference()
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| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86MCCodeEmitter.cpp | 60 const MCOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg); in Is16BitMemOperand()
226 const MCOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg); in Is32BitMemOperand()
241 const MCOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg); in Is64BitMemOperand()
369 const MCOperand &Base = MI.getOperand(Op+X86::AddrBaseReg); in EmitMemModRMByte()
725 X86::AddrBaseReg).getReg())) in EmitVEXOpcodePrefix()
782 MI.getOperand(MemOperand+X86::AddrBaseReg).getReg())) in EmitVEXOpcodePrefix()
817 MI.getOperand(MemOperand+X86::AddrBaseReg).getReg())) in EmitVEXOpcodePrefix()
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| D | X86BaseInfo.h | 33 AddrBaseReg = 0, enumerator
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