/external/llvm/lib/CodeGen/ |
D | CodeGenPrepare.cpp | 2025 struct ExtAddrMode : public TargetLowering::AddrMode { 2539 ExtAddrMode &AddrMode; member in __anonebd7bfba0211::AddressingModeMatcher 2562 MemoryInst(MI), AddrMode(AM), InsertedInsts(InsertedInsts), in AddressingModeMatcher() 2619 if (AddrMode.Scale != 0 && AddrMode.ScaledReg != ScaleReg) in matchScaledValue() 2622 ExtAddrMode TestAddrMode = AddrMode; in matchScaledValue() 2634 AddrMode = TestAddrMode; in matchScaledValue() 2649 AddrMode = TestAddrMode; in matchScaledValue() 3129 ExtAddrMode BackupAddrMode = AddrMode; in matchOperationAddr() 3143 AddrMode = BackupAddrMode; in matchOperationAddr() 3153 AddrMode = BackupAddrMode; in matchOperationAddr() [all …]
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/external/llvm/lib/Target/ARM/ |
D | Thumb2InstrInfo.cpp | 451 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in rewriteT2FrameIndex() local 456 AddrMode = ARMII::AddrModeT2_i12; // FIXME. mode for thumb2? in rewriteT2FrameIndex() 526 if (AddrMode == ARMII::AddrMode4 || AddrMode == ARMII::AddrMode6) in rewriteT2FrameIndex() 532 if (AddrMode == ARMII::AddrModeT2_so) { in rewriteT2FrameIndex() 542 AddrMode = ARMII::AddrModeT2_i12; in rewriteT2FrameIndex() 547 if (AddrMode == ARMII::AddrModeT2_i8 || AddrMode == ARMII::AddrModeT2_i12) { in rewriteT2FrameIndex() 561 } else if (AddrMode == ARMII::AddrMode5) { in rewriteT2FrameIndex() 575 } else if (AddrMode == ARMII::AddrModeT2_i8s4) { in rewriteT2FrameIndex() 598 if (AddrMode == ARMII::AddrMode5) in rewriteT2FrameIndex() 612 if (AddrMode == ARMII::AddrMode5) in rewriteT2FrameIndex()
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D | ARMInstrFormats.td | 90 class AddrMode<bits<5> val> { 93 def AddrModeNone : AddrMode<0>; 94 def AddrMode1 : AddrMode<1>; 95 def AddrMode2 : AddrMode<2>; 96 def AddrMode3 : AddrMode<3>; 97 def AddrMode4 : AddrMode<4>; 98 def AddrMode5 : AddrMode<5>; 99 def AddrMode6 : AddrMode<6>; 100 def AddrModeT1_1 : AddrMode<7>; 101 def AddrModeT1_2 : AddrMode<8>; [all …]
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D | ARMBaseRegisterInfo.cpp | 424 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in getFrameIndexInstrOffset() local 428 switch (AddrMode) { in getFrameIndexInstrOffset() 613 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in isFrameOffsetLegal() local 622 if (AddrMode == ARMII::AddrMode4 || AddrMode == ARMII::AddrMode6) in isFrameOffsetLegal() 628 switch (AddrMode) { in isFrameOffsetLegal()
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D | ARMInstrNEON.td | 666 class VLD1D<bits<4> op7_4, string Dt, Operand AddrMode> 668 (ins AddrMode:$Rn), IIC_VLD1, 674 class VLD1Q<bits<4> op7_4, string Dt, Operand AddrMode> 676 (ins AddrMode:$Rn), IIC_VLD1x2, 694 multiclass VLD1DWB<bits<4> op7_4, string Dt, Operand AddrMode> { 696 (ins AddrMode:$Rn), IIC_VLD1u, 704 (ins AddrMode:$Rn, rGPR:$Rm), IIC_VLD1u, 711 multiclass VLD1QWB<bits<4> op7_4, string Dt, Operand AddrMode> { 713 (ins AddrMode:$Rn), IIC_VLD1x2u, 721 (ins AddrMode:$Rn, rGPR:$Rm), IIC_VLD1x2u, [all …]
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D | ARMISelLowering.h | 289 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, 291 bool isLegalT2ScaledAddressingMode(const AddrMode &AM, EVT VT) const;
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D | ThumbRegisterInfo.cpp | 364 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in rewriteFrameIndex() local 375 if (AddrMode != ARMII::AddrModeT1_s) in rewriteFrameIndex()
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/external/llvm/lib/Target/AMDGPU/ |
D | SIISelLowering.h | 62 bool isLegalFlatAddressingMode(const AddrMode &AM) const; 63 bool isLegalMUBUFAddressingMode(const AddrMode &AM) const; 70 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty,
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/external/llvm/lib/Target/ARM/MCTargetDesc/ |
D | ARMBaseInfo.h | 235 enum AddrMode { enum 255 inline static const char *AddrModeToString(AddrMode addrmode) { in AddrModeToString()
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/external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
D | HexagonBaseInfo.h | 83 enum AddrMode { enum
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/external/llvm/lib/Target/WebAssembly/ |
D | WebAssemblyISelLowering.h | 57 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty,
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/external/v8/src/arm64/ |
D | simulator-arm64.h | 668 AddrMode addrmode); 669 void LoadStorePairHelper(Instruction* instr, AddrMode addrmode); 671 AddrMode addrmode); 674 AddrMode addrmode);
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D | instructions-arm64.h | 72 enum AddrMode { enum
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D | assembler-arm64.h | 632 AddrMode addrmode = Offset); 643 AddrMode addrmode = Offset); 648 AddrMode addrmode() const { return addrmode_; } in addrmode() 675 AddrMode addrmode_;
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/external/v8/src/arm/ |
D | assembler-arm.h | 526 explicit MemOperand(Register rn, int32_t offset = 0, AddrMode am = Offset); 531 explicit MemOperand(Register rn, Register rm, AddrMode am = Offset); 537 ShiftOp shift_op, int shift_imm, AddrMode am = Offset); 540 AddrMode am = Offset)) { 557 AddrMode am() const { return am_; } in am() 569 AddrMode am_; // bits P, U, and W 581 explicit NeonMemOperand(Register rn, AddrMode am = Offset, int align = 0);
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D | constants-arm.h | 272 enum AddrMode { enum
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/external/llvm/lib/Target/AArch64/ |
D | AArch64ISelLowering.h | 316 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty, 324 int getScalingFactorCost(const DataLayout &DL, const AddrMode &AM, Type *Ty,
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/external/llvm/lib/Target/XCore/ |
D | XCoreISelLowering.h | 125 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM,
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonISelLowering.h | 215 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM,
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/external/llvm/include/llvm/Target/ |
D | TargetLowering.h | 1463 struct AddrMode { struct 1468 AddrMode() : BaseGV(nullptr), BaseOffs(0), HasBaseReg(false), Scale(0) {} in AddrMode() argument 1481 virtual bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, 1491 virtual int getScalingFactorCost(const DataLayout &DL, const AddrMode &AM,
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/external/llvm/include/llvm/CodeGen/ |
D | BasicTTIImpl.h | 124 TargetLoweringBase::AddrMode AM; in isLegalAddressingMode() 134 TargetLoweringBase::AddrMode AM; in getScalingFactorCost()
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/external/llvm/lib/Target/X86/ |
D | X86ISelLowering.h | 783 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, 803 int getScalingFactorCost(const DataLayout &DL, const AddrMode &AM, Type *Ty,
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/external/llvm/lib/Target/SystemZ/ |
D | SystemZISelLowering.h | 373 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty,
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/external/llvm/lib/Target/NVPTX/ |
D | NVPTXISelLowering.h | 455 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty,
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/external/vixl/src/vixl/a64/ |
D | simulator-a64.h | 1293 AddrMode addrmode); 1294 void LoadStorePairHelper(const Instruction* instr, AddrMode addrmode); 1297 AddrMode addrmode); 1299 AddrMode addr_mode); 1301 AddrMode addr_mode);
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