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Searched refs:AfterLegalizeDAG (Results 1 – 6 of 6) sorted by relevance

/external/llvm/include/llvm/CodeGen/
DDAGCombine.h20 AfterLegalizeDAG enumerator
/external/llvm/lib/Target/AMDGPU/
DSIISelLowering.cpp2000 if (DCI.getDAGCombineLevel() >= AfterLegalizeDAG && in PerformDAGCombine()
2032 if (DCI.getDAGCombineLevel() < AfterLegalizeDAG) in PerformDAGCombine()
2071 if (DCI.getDAGCombineLevel() < AfterLegalizeDAG) in PerformDAGCombine()
DAMDGPUISelLowering.cpp1128 if (DCI.getDAGCombineLevel() < AfterLegalizeDAG && in CombineFMinMaxLegacy()
1149 if (DCI.getDAGCombineLevel() < AfterLegalizeDAG && in CombineFMinMaxLegacy()
2459 if (DCI.getDAGCombineLevel() < AfterLegalizeDAG) in PerformDAGCombine()
/external/llvm/lib/CodeGen/SelectionDAG/
DDAGCombiner.cpp1286 if (Level == AfterLegalizeDAG) { in Run()
2800 if (N0.getOpcode() == ISD::VECTOR_SHUFFLE && Level < AfterLegalizeDAG) { in SimplifyBinOpWithSameOpcodeHands()
7457 if (Level < AfterLegalizeDAG && TLI.isTypeLegal(VT) && VT.isVector() && in visitBITCAST()
8198 bool AllowNewConst = (Level < AfterLegalizeDAG); in visitFADD()
9218 if (Level >= AfterLegalizeDAG && in visitFNEG()
9543 if (Level < AfterLegalizeDAG) in CombineToPreIndexedLoadStore()
9769 if (Level < AfterLegalizeDAG) in CombineToPostIndexedLoadStore()
10504 if (Level < AfterLegalizeDAG) in SliceUpLoad()
13450 N0.getOpcode() != ISD::VECTOR_SHUFFLE && Level < AfterLegalizeDAG && in visitVECTOR_SHUFFLE()
13474 Level < AfterLegalizeDAG && TLI.isTypeLegal(VT)) { in visitVECTOR_SHUFFLE()
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DSelectionDAGISel.cpp821 CurDAG->Combine(AfterLegalizeDAG, *AA, OptLevel); in CodeGenAndEmitDAG()
/external/llvm/include/llvm/Target/
DTargetLowering.h2185 return Level == AfterLegalizeDAG; in isAfterLegalizeVectorOps()