Searched refs:AltOrders (Results 1 – 7 of 7) sorted by relevance
| /external/llvm/lib/Target/ARM/ |
| D | ARMRegisterInfo.td | 200 let AltOrders = [(add LR, GPR), (trunc GPR, 8)];
210 let AltOrders = [(add LR, GPRnopc), (trunc GPRnopc, 8)];
220 let AltOrders = [(add LR, GPRnopc), (trunc GPRnopc, 8)];
238 let AltOrders = [(add LR, rGPR), (trunc rGPR, 8)];
256 let AltOrders = [(and tcGPR, tGPR)];
273 let AltOrders = [(add (decimate SPR, 2), SPR),
295 let AltOrders = [(rotl DPR, 16),
316 let AltOrders = [(rotl QPR, 8)];
342 let AltOrders = [(add (rotl QPR, 8), (rotl DPair, 16))];
377 let AltOrders = [(rotl QQPR, 8)];
[all …]
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | AMDILRegisterInfo.td | 90 let AltOrders = [(add (sequence "R%u", 1, 20))];
98 let AltOrders = [(add (sequence "R%u", 1, 20))];
106 let AltOrders = [(add (sequence "R%u", 1, 20))];
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCRegisterInfo.td | 238 let AltOrders = [(add (sub GPRC, R2), R2)];
250 let AltOrders = [(add (sub G8RC, X2), X2)];
263 let AltOrders = [(add (sub GPRC_NOR0, R2), R2)];
273 let AltOrders = [(add (sub G8RC_NOX0, X2), X2)];
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64RegisterInfo.td | 131 let AltOrders = [(rotl GPR32common, 8)];
136 let AltOrders = [(rotl GPR64common, 8)];
141 let AltOrders = [(rotl GPR32, 8)];
145 let AltOrders = [(rotl GPR64, 8)];
151 let AltOrders = [(rotl GPR32sp, 8)];
155 let AltOrders = [(rotl GPR64sp, 8)];
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| /external/llvm/utils/TableGen/ |
| D | CodeGenRegisters.cpp | 678 ListInit *AltOrders = R->getValueAsListInit("AltOrders"); in CodeGenRegisterClass() local
679 Orders.resize(1 + AltOrders->size()); in CodeGenRegisterClass()
692 for (unsigned i = 0, e = AltOrders->size(); i != e; ++i) { in CodeGenRegisterClass()
693 RegBank.getSets().evaluate(AltOrders->getElement(i), Order, R->getLoc()); in CodeGenRegisterClass()
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| /external/llvm/lib/Target/X86/ |
| D | X86RegisterInfo.td | 331 let AltOrders = [(sub GR8, AH, BH, CH, DH)];
383 let AltOrders = [(sub GR8_NOREX, AH, BH, CH, DH)];
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| /external/llvm/include/llvm/Target/ |
| D | Target.td | 195 // AltOrders - List of alternative allocation orders. The default order is
199 list<dag> AltOrders = [];
208 // MemberList, 1 to select the first AltOrders entry and so on.
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