Searched refs:CSel (Results 1 – 3 of 3) sorted by relevance
| /external/valgrind/VEX/priv/ |
| D | host_arm64_defs.c | 953 i->ARM64in.CSel.dst = dst; in ARM64Instr_CSel()
954 i->ARM64in.CSel.argL = argL; in ARM64Instr_CSel()
955 i->ARM64in.CSel.argR = argR; in ARM64Instr_CSel()
956 i->ARM64in.CSel.cond = cond; in ARM64Instr_CSel()
1507 ppHRegARM64(i->ARM64in.CSel.dst); in ppARM64Instr()
1509 ppHRegARM64(i->ARM64in.CSel.argL); in ppARM64Instr()
1511 ppHRegARM64(i->ARM64in.CSel.argR); in ppARM64Instr()
1512 vex_printf(", %s", showARM64CondCode(i->ARM64in.CSel.cond)); in ppARM64Instr()
1992 addHRegUse(u, HRmWrite, i->ARM64in.CSel.dst); in getRegUsage_ARM64Instr()
1993 addHRegUse(u, HRmRead, i->ARM64in.CSel.argL); in getRegUsage_ARM64Instr()
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| D | host_arm64_defs.h | 633 } CSel; member
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 7395 SDValue CSel = DAG.getNode(AArch64ISD::CSEL, DL, VT, Add, N0, CCVal, Cmp); in BuildSDIVPow2() local
7400 Created->push_back(CSel.getNode()); in BuildSDIVPow2()
7405 DAG.getNode(ISD::SRA, DL, VT, CSel, DAG.getConstant(Lg2, DL, MVT::i64)); in BuildSDIVPow2()
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