| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.h | 158 unsigned &SrcReg2, int &CmpMask,
163 unsigned SrcReg2, int CmpMask, int CmpValue,
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| D | AArch64InstrInfo.cpp | 652 unsigned &SrcReg2, int &CmpMask, in analyzeCompare() argument
672 CmpMask = ~0; in analyzeCompare()
681 CmpMask = ~0; in analyzeCompare()
691 CmpMask = ~0; in analyzeCompare()
828 MachineInstr *CmpInstr, unsigned SrcReg, unsigned SrcReg2, int CmpMask, in optimizeCompareInstr() argument
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| /external/llvm/lib/Target/X86/ |
| D | X86InstrInfo.h | 506 unsigned &SrcReg2, int &CmpMask,
513 unsigned SrcReg2, int CmpMask, int CmpValue,
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| D | X86InstrInfo.cpp | 4698 int &CmpMask, int &CmpValue) const { in analyzeCompare() argument
4710 CmpMask = ~0; in analyzeCompare()
4720 CmpMask = ~0; in analyzeCompare()
4729 CmpMask = ~0; in analyzeCompare()
4741 CmpMask = ~0; in analyzeCompare()
4750 CmpMask = ~0; in analyzeCompare()
4761 CmpMask = ~0; in analyzeCompare()
4921 int CmpMask, int CmpValue, in optimizeCompareInstr() argument
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| D | X86ISelLowering.cpp | 16630 SDValue CmpMask = getVectorMaskingNode(Cmp, Mask, in LowerINTRINSIC_WO_CHAIN() local
16635 DAG.getUNDEF(BitcastVT), CmpMask, in LowerINTRINSIC_WO_CHAIN()
16656 SDValue CmpMask = getScalarMaskingNode(Cmp, Mask, in LowerINTRINSIC_WO_CHAIN() local
16662 DAG.getNode(ISD::ANY_EXTEND, dl, MVT::i8, CmpMask), in LowerINTRINSIC_WO_CHAIN()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.h | 256 unsigned &SrcReg2, int &CmpMask,
264 unsigned SrcReg2, int CmpMask, int CmpValue,
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| D | ARMBaseInstrInfo.cpp | 2286 int &CmpMask, int &CmpValue) const { in analyzeCompare() argument
2293 CmpMask = ~0; in analyzeCompare()
2300 CmpMask = ~0; in analyzeCompare()
2307 CmpMask = MI->getOperand(1).getImm(); in analyzeCompare()
2320 int CmpMask, bool CommonUse) { in isSuitableForMask() argument
2324 if (CmpMask != MI->getOperand(2).getImm()) in isSuitableForMask()
2390 int CmpMask, int CmpValue, in optimizeCompareInstr() argument
2397 if (CmpMask != ~0) { in optimizeCompareInstr()
2398 if (!isSuitableForMask(MI, SrcReg, CmpMask, false) || isPredicated(MI)) { in optimizeCompareInstr()
2405 if (!isSuitableForMask(PotentialAND, SrcReg, CmpMask, true) || in optimizeCompareInstr()
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| /external/llvm/lib/CodeGen/ |
| D | PeepholeOptimizer.cpp | 567 int CmpMask, CmpValue; in optimizeCmpInstr() local
568 if (!TII->analyzeCompare(MI, SrcReg, SrcReg2, CmpMask, CmpValue) || in optimizeCmpInstr()
574 if (TII->optimizeCompareInstr(MI, SrcReg, SrcReg2, CmpMask, CmpValue, MRI)) { in optimizeCmpInstr()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonHardwareLoops.cpp | 450 int CmpImm = 0, CmpMask = 0; in findInductionRegister() local
452 CmpMask, CmpImm); in findInductionRegister()
1419 int CmpMask = 0, CmpValue = 0; in loopCountMayWrapOrUnderFlow() local
1421 if (!TII->analyzeCompare(MI, CmpReg1, CmpReg2, CmpMask, CmpValue)) in loopCountMayWrapOrUnderFlow()
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