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Searched refs:CondReg (Results 1 – 5 of 5) sorted by relevance

/external/llvm/lib/Target/Mips/
DMipsFastISel.cpp913 unsigned CondReg = createResultReg(&Mips::GPR32RegClass); in selectBranch() local
914 if (!emitCmp(CondReg, CI)) in selectBranch()
917 .addReg(CondReg) in selectBranch()
983 unsigned CondReg = getRegForValue(Cond); in selectSelect() local
985 if (!Src1Reg || !Src2Reg || !CondReg) in selectSelect()
992 if (!emitIntExt(MVT::i1, CondReg, MVT::i32, ZExtCondReg, true)) in selectSelect()
/external/llvm/lib/Target/AArch64/
DAArch64FastISel.cpp2359 unsigned CondReg = getRegForValue(BI->getCondition()); in selectBranch() local
2360 if (!CondReg) in selectBranch()
2373 unsigned CondReg = getRegForValue(BI->getCondition()); in selectBranch() local
2374 if (CondReg == 0) in selectBranch()
2387 = constrainOperandRegClass(II, CondReg, II.getNumDefs()); in selectBranch()
2599 unsigned CondReg = getRegForValue(Cond); in selectSelect() local
2600 if (!CondReg) in selectSelect()
2651 unsigned CondReg = getRegForValue(Cond); in selectSelect() local
2652 if (!CondReg) in selectSelect()
2657 CondReg = constrainOperandRegClass(II, CondReg, 1); in selectSelect()
[all …]
/external/llvm/lib/Target/X86/
DX86FastISel.cpp1850 unsigned CondReg = getRegForValue(Cond); in X86FastEmitCMoveSelect() local
1851 if (CondReg == 0) in X86FastEmitCMoveSelect()
1856 .addReg(CondReg, getKillRegState(CondIsKill)).addImm(1); in X86FastEmitCMoveSelect()
2023 unsigned CondReg = getRegForValue(Cond); in X86FastEmitPseudoSelect() local
2024 if (CondReg == 0) in X86FastEmitPseudoSelect()
2028 .addReg(CondReg, getKillRegState(CondIsKill)).addImm(1); in X86FastEmitPseudoSelect()
/external/llvm/lib/Target/ARM/
DARMFastISel.cpp1627 unsigned CondReg = getRegForValue(I->getOperand(0)); in SelectSelect() local
1628 if (CondReg == 0) return false; in SelectSelect()
1654 CondReg = constrainOperandRegClass(TII.get(TstOpc), CondReg, 0); in SelectSelect()
1657 .addReg(CondReg) in SelectSelect()
/external/llvm/lib/Target/PowerPC/
DPPCFastISel.cpp770 unsigned CondReg = createResultReg(&PPC::CRRCRegClass); in SelectBranch() local
773 CondReg)) in SelectBranch()
777 .addImm(PPCPred).addReg(CondReg).addMBB(TBB); in SelectBranch()