Searched refs:DepReg (Results 1 – 2 of 2) sorted by relevance
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonVLIWPacketizer.cpp | 266 SDep::Kind DepType, unsigned DepReg) { in isCallDependent() argument
268 if (DepReg == HRI->getRARegister()) in isCallDependent()
272 if (DepReg == HRI->getFrameRegister() || DepReg == HRI->getStackRegister()) in isCallDependent()
276 const TargetRegisterClass* RC = HRI->getMinimalPhysRegClass(DepReg); in isCallDependent()
283 if (MO.isReg() && MO.isUse() && (MO.getReg() == DepReg)) in isCallDependent()
364 const SUnit *PacketSU, unsigned DepReg, MachineBasicBlock::iterator &MII, in canPromoteToDotCur() argument
400 if (BI->readsRegister(DepReg, MF.getSubtarget().getRegisterInfo())) in canPromoteToDotCur()
525 const MachineInstr *PacketMI, unsigned DepReg) { in canPromoteToNewValueStore() argument
532 if (Val.isReg() && Val.getReg() != DepReg) in canPromoteToNewValueStore()
554 getPostIncrementOperand(MI, HII).getReg() == DepReg) { in canPromoteToNewValueStore()
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| D | HexagonVLIWPacketizer.h | 76 unsigned DepReg);
81 unsigned DepReg, MachineBasicBlock::iterator &MII,
89 unsigned DepReg, MachineBasicBlock::iterator &MII,
92 unsigned DepReg, MachineBasicBlock::iterator &MII);
94 const MachineInstr* PacketMI, unsigned DepReg);
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