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Searched refs:DivOpc (Results 1 – 3 of 3) sorted by relevance

/external/llvm/lib/Target/Mips/
DMipsFastISel.cpp1657 unsigned DivOpc; in selectDivRem() local
1663 DivOpc = Mips::SDIV; in selectDivRem()
1667 DivOpc = Mips::UDIV; in selectDivRem()
1676 emitInst(DivOpc).addReg(Src0Reg).addReg(Src1Reg); in selectDivRem()
/external/llvm/lib/Target/AArch64/
DAArch64FastISel.cpp4436 unsigned DivOpc; in selectRem() local
4442 DivOpc = Is64bit ? AArch64::SDIVXr : AArch64::SDIVWr; in selectRem()
4445 DivOpc = Is64bit ? AArch64::UDIVXr : AArch64::UDIVWr; in selectRem()
4461 unsigned QuotReg = fastEmitInst_rr(DivOpc, RC, Src0Reg, /*IsKill=*/false, in selectRem()
/external/llvm/lib/CodeGen/SelectionDAG/
DLegalizeDAG.cpp3453 unsigned DivOpc = isSigned ? ISD::SDIV : ISD::UDIV; in ExpandNode() local
3461 } else if (TLI.isOperationLegalOrCustom(DivOpc, VT)) { in ExpandNode()
3463 Tmp1 = DAG.getNode(DivOpc, dl, VT, Tmp2, Tmp3); in ExpandNode()