Searched refs:DstIdx (Results 1 – 9 of 9) sorted by relevance
| /external/llvm/lib/CodeGen/ |
| D | RegisterCoalescer.h | 39 unsigned DstIdx; variable
61 : TRI(tri), DstReg(0), SrcReg(0), DstIdx(0), SrcIdx(0), in CoalescerPair()
68 : TRI(tri), DstReg(PhysReg), SrcReg(VirtReg), DstIdx(0), SrcIdx(0), in CoalescerPair()
106 unsigned getDstIdx() const { return DstIdx; } in getDstIdx()
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| D | TwoAddressInstructionPass.cpp | 132 unsigned SrcIdx, unsigned DstIdx,
1216 unsigned SrcIdx, unsigned DstIdx, in tryInstructionTransform() argument
1222 unsigned regA = MI.getOperand(DstIdx).getReg(); in tryInstructionTransform()
1232 bool Commuted = tryInstructionCommute(&MI, DstIdx, SrcIdx, regBKilled, Dist); in tryInstructionTransform()
1414 unsigned DstIdx = 0; in collectTiedOperands() local
1415 if (!MI->isRegTiedToDefOperand(SrcIdx, &DstIdx)) in collectTiedOperands()
1419 MachineOperand &DstMO = MI->getOperand(DstIdx); in collectTiedOperands()
1440 TiedOperands[SrcReg].push_back(std::make_pair(SrcIdx, DstIdx)); in collectTiedOperands()
1465 unsigned DstIdx = TiedPairs[tpi].second; in processTiedPairs() local
1467 const MachineOperand &DstMO = MI->getOperand(DstIdx); in processTiedPairs()
[all …]
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| D | RegisterCoalescer.cpp | 305 SrcIdx = DstIdx = 0; in setRegisters()
352 SrcIdx, DstIdx); in setRegisters()
361 DstIdx = SrcSub; in setRegisters()
374 if (DstIdx && !SrcIdx) { in setRegisters()
376 std::swap(SrcIdx, DstIdx); in setRegisters()
395 std::swap(SrcIdx, DstIdx); in flip()
419 assert(!DstIdx && !SrcIdx && "Inconsistent CoalescerPair state."); in isCoalescable()
434 TRI.composeSubRegIndices(DstIdx, DstSub); in isCoalescable()
877 unsigned DstIdx = CP.isFlipped() ? CP.getSrcIdx() : CP.getDstIdx(); in reMaterializeTrivialDef() local
917 if (SrcIdx && DstIdx) in reMaterializeTrivialDef()
[all …]
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| /external/llvm/lib/Target/AMDGPU/ |
| D | R600ExpandSpecialInstrs.cpp | 83 int DstIdx = TII->getOperandIdx(MI.getOpcode(), AMDGPU::OpName::dst); in runOnMachineFunction() local
84 assert(DstIdx != -1); in runOnMachineFunction()
85 MachineOperand &DstOp = MI.getOperand(DstIdx); in runOnMachineFunction()
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| D | R600Packetizer.cpp | 93 int DstIdx = TII->getOperandIdx(BI->getOpcode(), AMDGPU::OpName::dst); in getPreviousVector() local
94 if (DstIdx == -1) { in getPreviousVector()
97 unsigned Dst = BI->getOperand(DstIdx).getReg(); in getPreviousVector()
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| D | R600ISelLowering.cpp | 210 int DstIdx = TII->getOperandIdx(MI->getOpcode(), AMDGPU::OpName::dst); in EmitInstrWithCustomInserter() local
211 assert(DstIdx != -1); in EmitInstrWithCustomInserter()
215 if (!MRI.use_empty(MI->getOperand(DstIdx).getReg()) || in EmitInstrWithCustomInserter()
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| D | SIInstrInfo.cpp | 2341 int DstIdx = AMDGPU::getNamedOperandIdx(MI->getOpcode(), AMDGPU::OpName::dst); in moveSMRDToVALU() local
2342 assert(DstIdx != -1); in moveSMRDToVALU()
2343 unsigned DstRCID = get(MI->getOpcode()).OpInfo[DstIdx].RegClass; in moveSMRDToVALU()
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| /external/llvm/lib/Analysis/ |
| D | DependenceAnalysis.cpp | 3422 DstIdx = DstGEP->idx_begin(); in depends() local
3424 ++SrcIdx, ++DstIdx, ++P) { in depends()
3426 Pair[P].Dst = SE->getSCEV(*DstIdx); in depends()
3852 DstIdx = DstGEP->idx_begin(); in getSplitIteration() local
3854 ++SrcIdx, ++DstIdx, ++P) { in getSplitIteration()
3856 Pair[P].Dst = SE->getSCEV(*DstIdx); in getSplitIteration()
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| /external/llvm/lib/Target/X86/ |
| D | X86InstrInfo.cpp | 5519 unsigned DstIdx = (Imm >> 4) & 3; in foldMemoryOperandCustom() local
5525 unsigned NewImm = (DstIdx << 4) | ZMask; in foldMemoryOperandCustom()
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