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Searched refs:DstReg (Results 1 – 25 of 125) sorted by relevance

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/external/mesa3d/src/gallium/drivers/r300/compiler/
Dradeon_program_tex.c68 inst_mov->U.I.DstReg.File = RC_FILE_TEMPORARY; in scale_texcoords()
69 inst_mov->U.I.DstReg.Index = temp; in scale_texcoords()
90 inst_rcp->U.I.DstReg.File = RC_FILE_TEMPORARY; in projective_divide()
91 inst_rcp->U.I.DstReg.Index = temp; in projective_divide()
92 inst_rcp->U.I.DstReg.WriteMask = RC_MASK_W; in projective_divide()
101 inst_mul->U.I.DstReg.File = RC_FILE_TEMPORARY; in projective_divide()
102 inst_mul->U.I.DstReg.Index = temp; in projective_divide()
165 struct rc_dst_register output_reg = inst->U.I.DstReg; in radeonTransformTEX()
171 inst->U.I.DstReg.File = RC_FILE_TEMPORARY; in radeonTransformTEX()
172 inst->U.I.DstReg.Index = tmp_texsample; in radeonTransformTEX()
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Dradeon_program_alu.c45 struct rc_dst_register DstReg, struct rc_src_register SrcReg) in emit1() argument
54 fpi->U.I.DstReg = DstReg; in emit1()
62 struct rc_dst_register DstReg, in emit2() argument
72 fpi->U.I.DstReg = DstReg; in emit2()
81 struct rc_dst_register DstReg, in emit3() argument
92 fpi->U.I.DstReg = DstReg; in emit3()
204 if (inst->U.I.DstReg.File != RC_FILE_TEMPORARY) in is_dst_safe_to_reuse()
209 inst->U.I.SrcReg[i].Index == inst->U.I.DstReg.Index) in is_dst_safe_to_reuse()
222 tmp = inst->U.I.DstReg.Index; in try_to_reuse_dst()
226 return dstregtmpmask(tmp, inst->U.I.DstReg.WriteMask); in try_to_reuse_dst()
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Dr3xx_vertprog.c194 t_dst_index(vp, &vpi->DstReg), in ei_vector1()
195 t_dst_mask(vpi->DstReg.WriteMask), in ei_vector1()
196 t_dst_class(vpi->DstReg.File)); in ei_vector1()
210 t_dst_index(vp, &vpi->DstReg), in ei_vector2()
211 t_dst_mask(vpi->DstReg.WriteMask), in ei_vector2()
212 t_dst_class(vpi->DstReg.File)); in ei_vector2()
226 t_dst_index(vp, &vpi->DstReg), in ei_math1()
227 t_dst_mask(vpi->DstReg.WriteMask), in ei_math1()
228 t_dst_class(vpi->DstReg.File)); in ei_math1()
243 t_dst_index(vp, &vpi->DstReg), in ei_lit()
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Dradeon_compiler.c128 if (inst->U.I.DstReg.File == RC_FILE_OUTPUT) in rc_calculate_inputs_outputs()
129 c->Program.OutputsWritten |= 1 << inst->U.I.DstReg.Index; in rc_calculate_inputs_outputs()
180 if (inst->U.I.DstReg.File == RC_FILE_OUTPUT && inst->U.I.DstReg.Index == output) { in rc_move_output()
181 inst->U.I.DstReg.Index = new_output; in rc_move_output()
182 inst->U.I.DstReg.WriteMask &= writemask; in rc_move_output()
203 if (inst->U.I.DstReg.File == RC_FILE_OUTPUT && inst->U.I.DstReg.Index == output) { in rc_copy_output()
204 inst->U.I.DstReg.File = RC_FILE_TEMPORARY; in rc_copy_output()
205 inst->U.I.DstReg.Index = tempreg; in rc_copy_output()
212 inst->U.I.DstReg.File = RC_FILE_OUTPUT; in rc_copy_output()
213 inst->U.I.DstReg.Index = output; in rc_copy_output()
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Dradeon_emulate_branches.c76 inst_mov->U.I.DstReg.File = RC_FILE_TEMPORARY; in handle_if()
77 inst_mov->U.I.DstReg.Index = rc_find_free_temporary(s->C); in handle_if()
78 inst_mov->U.I.DstReg.WriteMask = RC_MASK_X; in handle_if()
82 inst->U.I.SrcReg[0].Index = inst_mov->U.I.DstReg.Index; in handle_if()
166 inst_mov->U.I.DstReg.File = RC_FILE_TEMPORARY; in allocate_and_insert_proxies()
167 inst_mov->U.I.DstReg.Index = proxies->Temporary[index].Index; in allocate_and_insert_proxies()
168 inst_mov->U.I.DstReg.WriteMask = RC_MASK_XYZW; in allocate_and_insert_proxies()
185 inst_cmp->U.I.DstReg.File = file; in inject_cmp()
186 inst_cmp->U.I.DstReg.Index = index; in inject_cmp()
187 inst_cmp->U.I.DstReg.WriteMask = RC_MASK_XYZW; in inject_cmp()
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Dradeon_pair_translate.c90 *needrgb = (inst->DstReg.WriteMask & RC_MASK_XYZ) ? 1 : 0; in classify_instruction()
91 *needalpha = (inst->DstReg.WriteMask & RC_MASK_W) ? 1 : 0; in classify_instruction()
275 inst->DstReg.WriteMask); in set_pair_instruction()
284 if (inst->DstReg.File == RC_FILE_OUTPUT) { in set_pair_instruction()
285 if (inst->DstReg.Index == c->OutputDepth) { in set_pair_instruction()
286 pair->Alpha.DepthWriteMask |= GET_BIT(inst->DstReg.WriteMask, 3); in set_pair_instruction()
289 if (inst->DstReg.Index == c->OutputColor[i]) { in set_pair_instruction()
293 inst->DstReg.WriteMask & RC_MASK_XYZ; in set_pair_instruction()
295 GET_BIT(inst->DstReg.WriteMask, 3); in set_pair_instruction()
302 pair->RGB.DestIndex = inst->DstReg.Index; in set_pair_instruction()
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Dradeon_vert_fc.c106 build_pred_dst(&new_inst->U.I.DstReg, fc_state); in lower_bgnloop()
126 build_pred_dst(&new_inst->U.I.DstReg, fc_state); in lower_bgnloop()
140 inst->U.I.DstReg.Pred = RC_PRED_INV; in lower_brk()
146 inst->U.I.DstReg.Pred = RC_PRED_SET; in lower_brk()
149 build_pred_dst(&inst->U.I.DstReg, fc_state); in lower_brk()
160 build_pred_dst(&new_inst->U.I.DstReg, fc_state); in lower_endloop()
189 inst->U.I.DstReg.Pred = RC_PRED_SET; in lower_if()
205 build_pred_dst(&inst->U.I.DstReg, fc_state); in lower_if()
248 build_pred_dst(&inst->U.I.DstReg, &fc_state); in rc_vert_fc()
260 build_pred_dst(&inst->U.I.DstReg, &fc_state); in rc_vert_fc()
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Dr3xx_fragprog.c61 if (inst->DstReg.File != RC_FILE_OUTPUT || inst->DstReg.Index != c->OutputDepth) in rc_rewrite_depth_out()
64 if (inst->DstReg.WriteMask & RC_MASK_Z) { in rc_rewrite_depth_out()
65 inst->DstReg.WriteMask = RC_MASK_W; in rc_rewrite_depth_out()
67 inst->DstReg.WriteMask = 0; in rc_rewrite_depth_out()
/external/mesa3d/src/mesa/program/
Dprogramopt.c91 newInst[i].DstReg.File = PROGRAM_OUTPUT; in _mesa_insert_mvp_dp4_code()
92 newInst[i].DstReg.Index = VERT_RESULT_HPOS; in _mesa_insert_mvp_dp4_code()
93 newInst[i].DstReg.WriteMask = (WRITEMASK_X << i); in _mesa_insert_mvp_dp4_code()
163 newInst[0].DstReg.File = PROGRAM_TEMPORARY; in _mesa_insert_mvp_mad_code()
164 newInst[0].DstReg.Index = hposTemp; in _mesa_insert_mvp_mad_code()
165 newInst[0].DstReg.WriteMask = WRITEMASK_XYZW; in _mesa_insert_mvp_mad_code()
175 newInst[i].DstReg.File = PROGRAM_TEMPORARY; in _mesa_insert_mvp_mad_code()
176 newInst[i].DstReg.Index = hposTemp; in _mesa_insert_mvp_mad_code()
177 newInst[i].DstReg.WriteMask = WRITEMASK_XYZW; in _mesa_insert_mvp_mad_code()
190 newInst[3].DstReg.File = PROGRAM_OUTPUT; in _mesa_insert_mvp_mad_code()
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Dprog_optimize.c88 channel_mask = inst->DstReg.WriteMask & dst_mask; in get_src_arg_mask()
134 const GLuint mask = mov->DstReg.WriteMask; in get_dst_mask_for_mov()
234 if (inst->DstReg.File == file) { in replace_regs()
235 const GLuint index = inst->DstReg.Index; in replace_regs()
237 inst->DstReg.Index = map[index]; in replace_regs()
298 if (inst->DstReg.File == PROGRAM_TEMPORARY) { in _mesa_remove_dead_code_global()
299 const GLuint index = inst->DstReg.Index; in _mesa_remove_dead_code_global()
302 if (inst->DstReg.RelAddr) { in _mesa_remove_dead_code_global()
326 if (numDst != 0 && inst->DstReg.File == PROGRAM_TEMPORARY) { in _mesa_remove_dead_code_global()
327 GLint chan, index = inst->DstReg.Index; in _mesa_remove_dead_code_global()
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Dprog_instruction.c53 inst[i].DstReg.File = PROGRAM_UNDEFINED; in _mesa_init_instructions()
54 inst[i].DstReg.WriteMask = WRITEMASK_XYZW; in _mesa_init_instructions()
55 inst[i].DstReg.CondMask = COND_TR; in _mesa_init_instructions()
56 inst[i].DstReg.CondSwizzle = SWIZZLE_NOOP; in _mesa_init_instructions()
307 if (inst->DstReg.WriteMask == WRITEMASK_X || in _mesa_check_soa_dependencies()
308 inst->DstReg.WriteMask == WRITEMASK_Y || in _mesa_check_soa_dependencies()
309 inst->DstReg.WriteMask == WRITEMASK_Z || in _mesa_check_soa_dependencies()
310 inst->DstReg.WriteMask == WRITEMASK_W || in _mesa_check_soa_dependencies()
311 inst->DstReg.WriteMask == 0x0) { in _mesa_check_soa_dependencies()
318 if (inst->SrcReg[i].File == inst->DstReg.File && in _mesa_check_soa_dependencies()
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/external/llvm/lib/Target/AMDGPU/
DR600ExpandSpecialInstrs.cpp126 unsigned DstReg; in runOnMachineFunction() local
129 DstReg = MI.getOperand(Chan).getReg(); in runOnMachineFunction()
131 DstReg = Chan == 2 ? AMDGPU::T0_Z : AMDGPU::T0_W; in runOnMachineFunction()
134 DstReg, MI.getOperand(3 + (Chan % 2)).getReg(), PReg); in runOnMachineFunction()
155 unsigned DstReg; in runOnMachineFunction() local
158 DstReg = Chan == 0 ? AMDGPU::T0_X : AMDGPU::T0_Y; in runOnMachineFunction()
160 DstReg = MI.getOperand(Chan-2).getReg(); in runOnMachineFunction()
163 DstReg, MI.getOperand(3 + (Chan % 2)).getReg(), PReg); in runOnMachineFunction()
183 unsigned DstReg = MI.getOperand(0).getReg(); in runOnMachineFunction() local
187 TRI.getSubReg(DstReg, TRI.getSubRegFromChannel(Chan)), PReg); in runOnMachineFunction()
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DSIFixSGPRCopies.cpp132 unsigned DstReg = Copy.getOperand(0).getReg(); in getCopyRegClasses() local
144 TargetRegisterInfo::isVirtualRegister(DstReg) ? in getCopyRegClasses()
145 MRI.getRegClass(DstReg) : in getCopyRegClasses()
146 TRI.getPhysRegClass(DstReg); in getCopyRegClasses()
182 unsigned DstReg = MI.getOperand(0).getReg(); in foldVGPRCopyIntoRegSequence() local
183 if (!TRI->isSGPRClass(MRI.getRegClass(DstReg))) in foldVGPRCopyIntoRegSequence()
186 if (!MRI.hasOneUse(DstReg)) in foldVGPRCopyIntoRegSequence()
189 MachineInstr &CopyUse = *MRI.use_instr_begin(DstReg); in foldVGPRCopyIntoRegSequence()
204 MRI.setRegClass(DstReg, DstRC); in foldVGPRCopyIntoRegSequence()
/external/llvm/lib/Target/Hexagon/MCTargetDesc/
DHexagonMCDuplexInfo.cpp181 unsigned DstReg, PredReg, SrcReg, Src1Reg, Src2Reg; in getDuplexCandidateGroup() local
192 DstReg = MCI.getOperand(0).getReg(); in getDuplexCandidateGroup()
196 if (HexagonMCInstrInfo::isIntRegForSubInst(DstReg)) { in getDuplexCandidateGroup()
210 DstReg = MCI.getOperand(0).getReg(); in getDuplexCandidateGroup()
212 if (HexagonMCInstrInfo::isIntRegForSubInst(DstReg) && in getDuplexCandidateGroup()
231 DstReg = MCI.getOperand(0).getReg(); in getDuplexCandidateGroup()
233 if (HexagonMCInstrInfo::isIntRegForSubInst(DstReg) && in getDuplexCandidateGroup()
241 DstReg = MCI.getOperand(0).getReg(); in getDuplexCandidateGroup()
243 if (HexagonMCInstrInfo::isIntRegForSubInst(DstReg) && in getDuplexCandidateGroup()
251 DstReg = MCI.getOperand(0).getReg(); in getDuplexCandidateGroup()
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DHexagonMCCompound.cpp84 unsigned DstReg, SrcReg, Src1Reg, Src2Reg; in getCompoundCandidateGroup() local
100 DstReg = MI.getOperand(0).getReg(); in getCompoundCandidateGroup()
103 if ((Hexagon::P0 == DstReg || Hexagon::P1 == DstReg) && in getCompoundCandidateGroup()
114 DstReg = MI.getOperand(0).getReg(); in getCompoundCandidateGroup()
116 if ((Hexagon::P0 == DstReg || Hexagon::P1 == DstReg) && in getCompoundCandidateGroup()
126 DstReg = MI.getOperand(0).getReg(); in getCompoundCandidateGroup()
128 if (HexagonMCInstrInfo::isIntRegForSubInst(DstReg) && in getCompoundCandidateGroup()
136 DstReg = MI.getOperand(0).getReg(); in getCompoundCandidateGroup()
139 HexagonMCInstrInfo::isIntRegForSubInst(DstReg)) in getCompoundCandidateGroup()
145 DstReg = MI.getOperand(0).getReg(); in getCompoundCandidateGroup()
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/external/mesa3d/src/mesa/state_tracker/
Dst_atom_pixeltransfer.c163 inst[ic].DstReg.File = PROGRAM_TEMPORARY; in get_pixel_transfer_program()
164 inst[ic].DstReg.Index = colorTemp; in get_pixel_transfer_program()
187 inst[ic].DstReg.File = PROGRAM_TEMPORARY; in get_pixel_transfer_program()
188 inst[ic].DstReg.Index = colorTemp; in get_pixel_transfer_program()
216 inst[ic].DstReg.File = PROGRAM_TEMPORARY; in get_pixel_transfer_program()
217 inst[ic].DstReg.Index = temp; in get_pixel_transfer_program()
218 inst[ic].DstReg.WriteMask = WRITEMASK_XY; /* write R,G */ in get_pixel_transfer_program()
228 inst[ic].DstReg.File = PROGRAM_TEMPORARY; in get_pixel_transfer_program()
229 inst[ic].DstReg.Index = temp; in get_pixel_transfer_program()
230 inst[ic].DstReg.WriteMask = WRITEMASK_ZW; /* write B,A */ in get_pixel_transfer_program()
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/external/llvm/lib/Target/Hexagon/
DHexagonPeephole.cpp141 unsigned DstReg = Dst.getReg(); in runOnMachineFunction() local
144 if (TargetRegisterInfo::isVirtualRegister(DstReg) && in runOnMachineFunction()
149 PeepholeMap[DstReg] = SrcReg; in runOnMachineFunction()
163 unsigned DstReg = Dst.getReg(); in runOnMachineFunction() local
165 PeepholeMap[DstReg] = SrcReg; in runOnMachineFunction()
180 unsigned DstReg = Dst.getReg(); in runOnMachineFunction() local
182 PeepholeDoubleRegsMap[DstReg] = in runOnMachineFunction()
192 unsigned DstReg = Dst.getReg(); in runOnMachineFunction() local
195 if (TargetRegisterInfo::isVirtualRegister(DstReg) && in runOnMachineFunction()
200 PeepholeMap[DstReg] = SrcReg; in runOnMachineFunction()
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DHexagonInstrInfo.cpp786 unsigned DstReg = MI->getOperand(0).getReg(); in expandPostRAPseudo() local
787 if (SrcReg != DstReg) in expandPostRAPseudo()
788 copyPhysReg(MBB, MI, DL, DstReg, SrcReg, MI->getOperand(1).isKill()); in expandPostRAPseudo()
795 unsigned DstReg = MI->getOperand(0).getReg(); in expandPostRAPseudo() local
797 copyPhysReg(MBB, MI, DL, DstReg, SrcSubLo, MI->getOperand(1).isKill()); in expandPostRAPseudo()
805 unsigned DstReg = MI->getOperand(0).getReg(); in expandPostRAPseudo() local
807 copyPhysReg(MBB, MI, DL, DstReg, SrcSubHi, MI->getOperand(1).isKill()); in expandPostRAPseudo()
843 unsigned DstReg = MI->getOperand(0).getReg(); in expandPostRAPseudo() local
847 HRI.getSubReg(DstReg, Hexagon::subreg_loreg)) in expandPostRAPseudo()
852 HRI.getSubReg(DstReg, Hexagon::subreg_hireg)) in expandPostRAPseudo()
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/external/mesa3d/src/gallium/drivers/radeon/
DR600ExpandSpecialInstrs.cpp96 unsigned DstReg = MI.getOperand(0).getReg(); in runOnMachineFunction() local
120 DstReg = TRI.getSubReg(DstReg, SubRegIndex); in runOnMachineFunction()
124 Flags |= (Chan != TRI.getHWRegChan(DstReg) ? MO_FLAG_MASK : 0); in runOnMachineFunction()
125 unsigned DstBase = TRI.getHWRegIndex(DstReg); in runOnMachineFunction()
126 DstReg = AMDGPU::R600_TReg32RegClass.getRegister((DstBase * 4) + Chan); in runOnMachineFunction()
151 BuildMI(MBB, I, MBB.findDebugLoc(I), TII->get(Opcode), DstReg) in runOnMachineFunction()
/external/llvm/lib/Target/AArch64/
DAArch64ExpandPseudoInsts.cpp117 const unsigned DstReg = MI.getOperand(0).getReg(); in tryOrrMovk() local
121 .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead)) in tryOrrMovk()
122 .addReg(DstReg) in tryOrrMovk()
182 const unsigned DstReg = MI.getOperand(0).getReg(); in tryToreplicateChunks() local
198 .addReg(DstReg, in tryToreplicateChunks()
200 .addReg(DstReg) in tryToreplicateChunks()
223 .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead)) in tryToreplicateChunks()
224 .addReg(DstReg) in tryToreplicateChunks()
365 const unsigned DstReg = MI.getOperand(0).getReg(); in trySequenceOfOnes() local
372 .addReg(DstReg, in trySequenceOfOnes()
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/external/mesa3d/src/gallium/drivers/r300/compiler/tests/
Drc_test_helpers.c241 inst->U.I.DstReg.File = RC_FILE_TEMPORARY; in init_rc_normal_dst()
243 inst->U.I.DstReg.File = RC_FILE_OUTPUT; in init_rc_normal_dst()
251 inst->U.I.DstReg.Index = strtol(tokens.Index.String, NULL, 10); in init_rc_normal_dst()
260 inst->U.I.DstReg.WriteMask = RC_MASK_XYZW; in init_rc_normal_dst()
270 inst->U.I.DstReg.WriteMask |= RC_MASK_X; in init_rc_normal_dst()
273 inst->U.I.DstReg.WriteMask |= RC_MASK_Y; in init_rc_normal_dst()
276 inst->U.I.DstReg.WriteMask |= RC_MASK_Z; in init_rc_normal_dst()
279 inst->U.I.DstReg.WriteMask |= RC_MASK_W; in init_rc_normal_dst()
288 inst->U.I.DstReg.File, in init_rc_normal_dst()
289 inst->U.I.DstReg.Index, in init_rc_normal_dst()
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/external/llvm/lib/CodeGen/
DTwoAddressInstructionPass.cpp140 void scanUses(unsigned DstReg);
380 unsigned &SrcReg, unsigned &DstReg, in isCopyToReg() argument
383 DstReg = 0; in isCopyToReg()
385 DstReg = MI.getOperand(0).getReg(); in isCopyToReg()
388 DstReg = MI.getOperand(0).getReg(); in isCopyToReg()
394 IsDstPhys = TargetRegisterInfo::isPhysicalRegister(DstReg); in isCopyToReg()
464 unsigned SrcReg, DstReg; in isKilled() local
467 if (!isCopyToReg(*DefMI, TII, SrcReg, DstReg, IsSrcPhys, IsDstPhys)) in isKilled()
475 static bool isTwoAddrUse(MachineInstr &MI, unsigned Reg, unsigned &DstReg) { in isTwoAddrUse() argument
482 DstReg = MI.getOperand(ti).getReg(); in isTwoAddrUse()
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DRegisterCoalescer.h33 unsigned DstReg; variable
61 : TRI(tri), DstReg(0), SrcReg(0), DstIdx(0), SrcIdx(0), in CoalescerPair()
68 : TRI(tri), DstReg(PhysReg), SrcReg(VirtReg), DstIdx(0), SrcIdx(0), in CoalescerPair()
100 unsigned getDstReg() const { return DstReg; } in getDstReg()
DRegisterCoalescer.cpp204 void updateRegDefsUses(unsigned SrcReg, unsigned DstReg, unsigned SubIdx);
304 SrcReg = DstReg = 0; in setRegisters()
387 DstReg = Dst; in setRegisters()
392 if (TargetRegisterInfo::isPhysicalRegister(DstReg)) in flip()
394 std::swap(SrcReg, DstReg); in flip()
416 if (TargetRegisterInfo::isPhysicalRegister(DstReg)) { in isCoalescable()
425 return DstReg == Dst; in isCoalescable()
427 return TRI.getSubReg(DstReg, SrcSub) == Dst; in isCoalescable()
430 if (DstReg != Dst) in isCoalescable()
876 unsigned DstReg = CP.isFlipped() ? CP.getSrcReg() : CP.getDstReg(); in reMaterializeTrivialDef() local
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DOptimizePHIs.cpp92 unsigned DstReg = MI->getOperand(0).getReg(); in IsSingleValuePHICycle() local
105 if (SrcReg == DstReg) in IsSingleValuePHICycle()
135 unsigned DstReg = MI->getOperand(0).getReg(); in IsDeadPHICycle() local
136 assert(TargetRegisterInfo::isVirtualRegister(DstReg) && in IsDeadPHICycle()
147 for (MachineInstr &UseMI : MRI->use_instructions(DstReg)) { in IsDeadPHICycle()

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