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Searched refs:DstVec (Results 1 – 3 of 3) sorted by relevance

/external/llvm/lib/IR/
DVerifier.cpp2118 bool DstVec = DestTy->isVectorTy(); in visitUIToFPInst() local
2120 Assert(SrcVec == DstVec, in visitUIToFPInst()
2127 if (SrcVec && DstVec) in visitUIToFPInst()
2141 bool DstVec = DestTy->isVectorTy(); in visitSIToFPInst() local
2143 Assert(SrcVec == DstVec, in visitSIToFPInst()
2150 if (SrcVec && DstVec) in visitSIToFPInst()
2164 bool DstVec = DestTy->isVectorTy(); in visitFPToUIInst() local
2166 Assert(SrcVec == DstVec, in visitFPToUIInst()
2173 if (SrcVec && DstVec) in visitFPToUIInst()
2187 bool DstVec = DestTy->isVectorTy(); in visitFPToSIInst() local
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/external/llvm/lib/Target/X86/
DX86ISelLowering.cpp5837 SDValue DstVec; in LowerBUILD_VECTORvXi1() local
5848 DstVec = DAG.getBitcast(VT, Imm); in LowerBUILD_VECTORvXi1()
5851 DstVec = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, ExtVec, in LowerBUILD_VECTORvXi1()
5857 DstVec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, DstVec, in LowerBUILD_VECTORvXi1()
5861 return DstVec; in LowerBUILD_VECTORvXi1()
/external/llvm/lib/Target/AArch64/
DAArch64ISelLowering.cpp5591 SDValue DstVec = DstIsLeft ? V1 : V2; in LowerVECTOR_SHUFFLE() local
5608 ISD::INSERT_VECTOR_ELT, dl, VT, DstVec, in LowerVECTOR_SHUFFLE()