/external/llvm/lib/Target/XCore/ |
D | XCoreISelLowering.cpp | 677 LL = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, in TryExpandADDWithMul() 679 RL = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, in TryExpandADDWithMul() 681 AddendL = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, in TryExpandADDWithMul() 683 AddendH = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, in TryExpandADDWithMul() 706 LH = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, in TryExpandADDWithMul() 708 RH = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, in TryExpandADDWithMul() 737 SDValue LHSL = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, in ExpandADDSUB() 740 SDValue LHSH = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, in ExpandADDSUB() 743 SDValue RHSL = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, in ExpandADDSUB() 746 SDValue RHSH = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, in ExpandADDSUB() [all …]
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/external/llvm/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 179 EXTRACT_ELEMENT, enumerator
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/external/llvm/lib/Target/AMDGPU/ |
D | AMDGPUISelLowering.cpp | 1659 SDValue LHS_Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, LHS, zero); in LowerUDIVREM64() 1660 SDValue LHS_Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, LHS, one); in LowerUDIVREM64() 1663 SDValue RHS_Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, RHS, zero); in LowerUDIVREM64() 1664 SDValue RHS_Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, RHS, one); in LowerUDIVREM64() 1862 SDValue LHS_Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, LHS, Zero); in LowerSDIVREM() 1863 SDValue RHS_Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, RHS, Zero); in LowerSDIVREM() 2200 SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i32, S0, in LowerUINT_TO_FP() 2203 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i32, S0, in LowerUINT_TO_FP()
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeTypes.cpp | 1019 Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, NVT, Pair, in GetPairElements() 1021 Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, NVT, Pair, in GetPairElements()
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D | SelectionDAGDumper.cpp | 302 case ISD::EXTRACT_ELEMENT: return "extract_element"; in getOperationName()
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D | LegalizeDAG.cpp | 1294 case ISD::EXTRACT_ELEMENT: in LegalizeOp() 3290 case ISD::EXTRACT_ELEMENT: { in ExpandNode() 3617 BottomHalf = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, VT, Tmp1, in ExpandNode() 3619 TopHalf = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, VT, Tmp1, in ExpandNode() 3655 BottomHalf = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, VT, Ret, in ExpandNode() 3657 TopHalf = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, VT, Ret, in ExpandNode()
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D | LegalizeFloatTypes.cpp | 993 case ISD::EXTRACT_ELEMENT: ExpandRes_EXTRACT_ELEMENT(N, Lo, Hi); break; in ExpandFloatResult() 1486 case ISD::EXTRACT_ELEMENT: Res = ExpandOp_EXTRACT_ELEMENT(N); break; in ExpandFloatOperand()
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D | LegalizeIntegerTypes.cpp | 1302 case ISD::EXTRACT_ELEMENT: ExpandRes_EXTRACT_ELEMENT(N, Lo, Hi); break; in ExpandIntegerResult() 2661 case ISD::EXTRACT_ELEMENT: Res = ExpandOp_EXTRACT_ELEMENT(N); break; in ExpandIntegerOperand()
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D | SelectionDAG.cpp | 2466 case ISD::EXTRACT_ELEMENT: { in computeKnownBits() 2706 case ISD::EXTRACT_ELEMENT: { in ComputeNumSignBits() 3694 case ISD::EXTRACT_ELEMENT: in getNode()
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D | SelectionDAGBuilder.cpp | 473 Part1 = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, in getCopyToParts() 475 Part0 = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, in getCopyToParts()
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D | DAGCombiner.cpp | 7349 DAG.getNode(ISD::EXTRACT_ELEMENT, SDLoc(NewConv), MVT::i64, NewConv, in visitBITCAST() 7420 ISD::EXTRACT_ELEMENT, SDLoc(XorResult), MVT::i64, XorResult, in visitBITCAST()
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/external/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 2469 SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i32, WriteValue, in LowerWRITE_REGISTER() 2471 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i32, WriteValue, in LowerWRITE_REGISTER() 4211 SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, Op, in ExpandBITCAST() 4213 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, Op, in ExpandBITCAST() 4590 SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, N->getOperand(0), in Expand64BitShift() 4592 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, N->getOperand(0), in Expand64BitShift() 6767 SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, Op.getOperand(1), in ExpandDIV_Windows() 6769 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, Op.getOperand(1), in ExpandDIV_Windows()
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/external/llvm/lib/Target/Mips/ |
D | MipsSEISelLowering.cpp | 1297 SDValue InLo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i32, In, in initAccumulator() 1299 SDValue InHi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i32, In, in initAccumulator()
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/external/llvm/lib/Target/Sparc/ |
D | SparcISelLowering.cpp | 2887 SDValue BottomHalf = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, VT, in LowerUMULO_SMULO() 2889 SDValue TopHalf = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, VT, in LowerUMULO_SMULO()
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/external/llvm/lib/Target/X86/ |
D | X86ISelLowering.cpp | 16117 Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, Mask, in getMaskNode() 16119 Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, Mask, in getMaskNode() 20310 cpInL = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, HalfT, N->getOperand(2), in ReplaceNodeResults() 20312 cpInH = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, HalfT, N->getOperand(2), in ReplaceNodeResults() 20321 swapInL = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, HalfT, N->getOperand(3), in ReplaceNodeResults() 20323 swapInH = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, HalfT, N->getOperand(3), in ReplaceNodeResults()
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/external/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.cpp | 8061 SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, in ReplaceNodeResults() 8064 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, in ReplaceNodeResults()
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