Searched refs:ElemVT (Results 1 – 6 of 6) sorted by relevance
/external/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeTypesGeneric.cpp | 110 EVT ElemVT = NOutVT; in ExpandRes_BITCAST() local 111 EVT NVT = EVT::getVectorVT(*DAG.getContext(), ElemVT, NumElems); in ExpandRes_BITCAST() 115 unsigned NewSizeInBits = ElemVT.getSizeInBits() / 2; in ExpandRes_BITCAST() 120 ElemVT = EVT::getIntegerVT(*DAG.getContext(), NewSizeInBits); in ExpandRes_BITCAST() 121 NVT = EVT::getVectorVT(*DAG.getContext(), ElemVT, NumElems); in ExpandRes_BITCAST() 130 ISD::EXTRACT_VECTOR_ELT, dl, ElemVT, CastInOp, in ExpandRes_BITCAST()
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/external/llvm/lib/Target/SystemZ/ |
D | SystemZISelLowering.h | 501 SDValue combineExtract(SDLoc DL, EVT ElemVT, EVT VecVT, SDValue OrigOp,
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D | SystemZISelLowering.cpp | 3833 EVT ElemVT = BVN->getValueType(0).getVectorElementType(); in tryBuildVectorByteMask() local 3834 unsigned BytesPerElement = ElemVT.getStoreSize(); in tryBuildVectorByteMask()
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/external/llvm/lib/Target/AMDGPU/ |
D | R600ISelLowering.cpp | 1397 EVT ElemVT = ValueVT.getVectorElementType(); in LowerSTORE() local 1408 SDValue Elem = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, ElemVT, in LowerSTORE() 1590 EVT ElemVT = VT.getVectorElementType(); in LowerLOAD() local 1601 Loads[i] = DAG.getNode(AMDGPUISD::REGISTER_LOAD, DL, ElemVT, in LowerLOAD() 1607 Loads[i] = DAG.getUNDEF(ElemVT); in LowerLOAD() 1609 EVT TargetVT = EVT::getVectorVT(*DAG.getContext(), ElemVT, 4); in LowerLOAD()
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D | AMDGPUISelLowering.cpp | 1274 EVT ElemVT = VT.getVectorElementType(); in MergeVectorStore() local 1286 SDValue Elt = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, ElemVT, Value, in MergeVectorStore()
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/external/llvm/lib/Target/X86/ |
D | X86ISelLowering.cpp | 20180 auto ElemVT = InVT.getVectorElementType(); in ReplaceNodeResults() local 20181 auto RegVT = EVT::getVectorVT(*DAG.getContext(), ElemVT, in ReplaceNodeResults() 20182 RegSize / ElemVT.getSizeInBits()); in ReplaceNodeResults()
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