Searched refs:FMAD (Results 1 – 9 of 9) sorted by relevance
| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 248 FMAD, enumerator
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 2055 return DAG.getNode(ISD::FMAD, DL, VT, Two, A, RHS); in PerformDAGCombine()
2064 return DAG.getNode(ISD::FMAD, DL, VT, Two, A, LHS); in PerformDAGCombine()
2093 return DAG.getNode(ISD::FMAD, DL, VT, Two, A, NegRHS); in PerformDAGCombine()
2103 return DAG.getNode(ISD::FMAD, DL, VT, NegTwo, A, LHS); in PerformDAGCombine()
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| D | AMDGPUISelLowering.cpp | 103 setOperationAction(ISD::FMAD, MVT::f32, Legal); in AMDGPUTargetLowering()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 201 case ISD::FMAD: return "fmad"; in getOperationName()
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| D | DAGCombiner.cpp | 7642 bool HasFMAD = (LegalOperations && TLI.isOperationLegal(ISD::FMAD, VT)); in visitFADDForFMACombine()
7654 unsigned PreferredFusedOpcode = HasFMAD ? ISD::FMAD : ISD::FMA; in visitFADDForFMACombine()
7825 bool HasFMAD = (LegalOperations && TLI.isOperationLegal(ISD::FMAD, VT)); in visitFSUBForFMACombine()
7837 unsigned PreferredFusedOpcode = HasFMAD ? ISD::FMAD : ISD::FMA; in visitFSUBForFMACombine()
8091 bool HasFMAD = (LegalOperations && TLI.isOperationLegal(ISD::FMAD, VT)); in visitFMULForFMACombine()
8103 unsigned PreferredFusedOpcode = HasFMAD ? ISD::FMAD : ISD::FMA; in visitFMULForFMACombine()
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| D | LegalizeFloatTypes.cpp | 1881 case ISD::FMAD: R = PromoteFloatRes_FMAD(N); break; in PromoteFloatResult()
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| D | LegalizeDAG.cpp | 3384 case ISD::FMAD: in ExpandNode()
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| /external/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 792 setOperationAction(ISD::FMAD, VT, Expand); in initActions()
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| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 422 def fmad : SDNode<"ISD::FMAD" , SDTFPTernaryOp>;
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